1 //===----------------------------------------------------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPU.h" 11 #include "AMDGPUArgumentUsageInfo.h" 12 #include "SIRegisterInfo.h" 13 #include "llvm/Support/raw_ostream.h" 14 15 using namespace llvm; 16 17 #define DEBUG_TYPE "amdgpu-argument-reg-usage-info" 18 19 INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE, 20 "Argument Register Usage Information Storage", false, true) 21 22 void ArgDescriptor::print(raw_ostream &OS, 23 const TargetRegisterInfo *TRI) const { 24 if (!isSet()) { 25 OS << "<not set>\n"; 26 return; 27 } 28 29 if (isRegister()) 30 OS << "Reg " << PrintReg(getRegister(), TRI) << '\n'; 31 else 32 OS << "Stack offset " << getStackOffset() << '\n'; 33 } 34 35 char AMDGPUArgumentUsageInfo::ID = 0; 36 37 const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{}; 38 39 bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) { 40 return false; 41 } 42 43 bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) { 44 ArgInfoMap.clear(); 45 return false; 46 } 47 48 void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const { 49 for (const auto &FI : ArgInfoMap) { 50 OS << "Arguments for " << FI.first->getName() << '\n' 51 << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer 52 << " DispatchPtr: " << FI.second.DispatchPtr 53 << " QueuePtr: " << FI.second.QueuePtr 54 << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr 55 << " DispatchID: " << FI.second.DispatchID 56 << " FlatScratchInit: " << FI.second.FlatScratchInit 57 << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize 58 << " GridWorkgroupCountX: " << FI.second.GridWorkGroupCountX 59 << " GridWorkgroupCountY: " << FI.second.GridWorkGroupCountY 60 << " GridWorkgroupCountZ: " << FI.second.GridWorkGroupCountZ 61 << " WorkGroupIDX: " << FI.second.WorkGroupIDX 62 << " WorkGroupIDY: " << FI.second.WorkGroupIDY 63 << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ 64 << " WorkGroupInfo: " << FI.second.WorkGroupInfo 65 << " PrivateSegmentWaveByteOffset: " 66 << FI.second.PrivateSegmentWaveByteOffset 67 << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr 68 << " WorkItemIDX " << FI.second.WorkItemIDX 69 << " WorkItemIDY " << FI.second.WorkItemIDY 70 << " WorkItemIDZ " << FI.second.WorkItemIDZ 71 << '\n'; 72 } 73 } 74 75 std::pair<const ArgDescriptor *, const TargetRegisterClass *> 76 AMDGPUFunctionArgInfo::getPreloadedValue( 77 AMDGPUFunctionArgInfo::PreloadedValue Value) const { 78 switch (Value) { 79 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: { 80 return std::make_pair( 81 PrivateSegmentBuffer ? &PrivateSegmentBuffer : nullptr, 82 &AMDGPU::SGPR_128RegClass); 83 } 84 case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR: 85 return std::make_pair(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr, 86 &AMDGPU::SGPR_64RegClass); 87 case AMDGPUFunctionArgInfo::WORKGROUP_ID_X: 88 return std::make_pair(WorkGroupIDX ? &WorkGroupIDX : nullptr, 89 &AMDGPU::SGPR_32RegClass); 90 91 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y: 92 return std::make_pair(WorkGroupIDY ? &WorkGroupIDY : nullptr, 93 &AMDGPU::SGPR_32RegClass); 94 case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z: 95 return std::make_pair(WorkGroupIDZ ? &WorkGroupIDZ : nullptr, 96 &AMDGPU::SGPR_32RegClass); 97 case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET: 98 return std::make_pair( 99 PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr, 100 &AMDGPU::SGPR_32RegClass); 101 case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR: 102 return std::make_pair(KernargSegmentPtr ? &KernargSegmentPtr : nullptr, 103 &AMDGPU::SGPR_64RegClass); 104 case AMDGPUFunctionArgInfo::DISPATCH_ID: 105 return std::make_pair(DispatchID ? &DispatchID : nullptr, 106 &AMDGPU::SGPR_64RegClass); 107 case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT: 108 return std::make_pair(FlatScratchInit ? &FlatScratchInit : nullptr, 109 &AMDGPU::SGPR_64RegClass); 110 case AMDGPUFunctionArgInfo::DISPATCH_PTR: 111 return std::make_pair(DispatchPtr ? &DispatchPtr : nullptr, 112 &AMDGPU::SGPR_64RegClass); 113 case AMDGPUFunctionArgInfo::QUEUE_PTR: 114 return std::make_pair(QueuePtr ? &QueuePtr : nullptr, 115 &AMDGPU::SGPR_64RegClass); 116 case AMDGPUFunctionArgInfo::WORKITEM_ID_X: 117 return std::make_pair(WorkItemIDX ? &WorkItemIDX : nullptr, 118 &AMDGPU::VGPR_32RegClass); 119 case AMDGPUFunctionArgInfo::WORKITEM_ID_Y: 120 return std::make_pair(WorkItemIDY ? &WorkItemIDY : nullptr, 121 &AMDGPU::VGPR_32RegClass); 122 case AMDGPUFunctionArgInfo::WORKITEM_ID_Z: 123 return std::make_pair(WorkItemIDZ ? &WorkItemIDZ : nullptr, 124 &AMDGPU::VGPR_32RegClass); 125 } 126 llvm_unreachable("unexpected preloaded value type"); 127 } 128