1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Part of the ELFObjectFile class implementation. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/Object/ELFObjectFile.h" 14 #include "llvm/BinaryFormat/ELF.h" 15 #include "llvm/MC/MCInstrAnalysis.h" 16 #include "llvm/MC/TargetRegistry.h" 17 #include "llvm/Object/ELF.h" 18 #include "llvm/Object/ELFTypes.h" 19 #include "llvm/Object/Error.h" 20 #include "llvm/Support/ARMAttributeParser.h" 21 #include "llvm/Support/ARMBuildAttributes.h" 22 #include "llvm/Support/ErrorHandling.h" 23 #include "llvm/Support/HexagonAttributeParser.h" 24 #include "llvm/Support/RISCVAttributeParser.h" 25 #include "llvm/Support/RISCVAttributes.h" 26 #include "llvm/TargetParser/RISCVISAInfo.h" 27 #include "llvm/TargetParser/SubtargetFeature.h" 28 #include "llvm/TargetParser/Triple.h" 29 #include <algorithm> 30 #include <cstddef> 31 #include <cstdint> 32 #include <memory> 33 #include <optional> 34 #include <string> 35 #include <utility> 36 37 using namespace llvm; 38 using namespace object; 39 40 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = { 41 {"None", "NOTYPE", ELF::STT_NOTYPE}, 42 {"Object", "OBJECT", ELF::STT_OBJECT}, 43 {"Function", "FUNC", ELF::STT_FUNC}, 44 {"Section", "SECTION", ELF::STT_SECTION}, 45 {"File", "FILE", ELF::STT_FILE}, 46 {"Common", "COMMON", ELF::STT_COMMON}, 47 {"TLS", "TLS", ELF::STT_TLS}, 48 {"Unknown", "<unknown>: 7", 7}, 49 {"Unknown", "<unknown>: 8", 8}, 50 {"Unknown", "<unknown>: 9", 9}, 51 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC}, 52 {"OS Specific", "<OS specific>: 11", 11}, 53 {"OS Specific", "<OS specific>: 12", 12}, 54 {"Proc Specific", "<processor specific>: 13", 13}, 55 {"Proc Specific", "<processor specific>: 14", 14}, 56 {"Proc Specific", "<processor specific>: 15", 15} 57 }; 58 59 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source) 60 : ObjectFile(Type, Source) {} 61 62 template <class ELFT> 63 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>> 64 createPtr(MemoryBufferRef Object, bool InitContent) { 65 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent); 66 if (Error E = Ret.takeError()) 67 return std::move(E); 68 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret)); 69 } 70 71 Expected<std::unique_ptr<ObjectFile>> 72 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) { 73 std::pair<unsigned char, unsigned char> Ident = 74 getElfArchType(Obj.getBuffer()); 75 std::size_t MaxAlignment = 76 1ULL << llvm::countr_zero( 77 reinterpret_cast<uintptr_t>(Obj.getBufferStart())); 78 79 if (MaxAlignment < 2) 80 return createError("Insufficient alignment"); 81 82 if (Ident.first == ELF::ELFCLASS32) { 83 if (Ident.second == ELF::ELFDATA2LSB) 84 return createPtr<ELF32LE>(Obj, InitContent); 85 else if (Ident.second == ELF::ELFDATA2MSB) 86 return createPtr<ELF32BE>(Obj, InitContent); 87 else 88 return createError("Invalid ELF data"); 89 } else if (Ident.first == ELF::ELFCLASS64) { 90 if (Ident.second == ELF::ELFDATA2LSB) 91 return createPtr<ELF64LE>(Obj, InitContent); 92 else if (Ident.second == ELF::ELFDATA2MSB) 93 return createPtr<ELF64BE>(Obj, InitContent); 94 else 95 return createError("Invalid ELF data"); 96 } 97 return createError("Invalid ELF class"); 98 } 99 100 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const { 101 SubtargetFeatures Features; 102 unsigned PlatformFlags = getPlatformFlags(); 103 104 switch (PlatformFlags & ELF::EF_MIPS_ARCH) { 105 case ELF::EF_MIPS_ARCH_1: 106 break; 107 case ELF::EF_MIPS_ARCH_2: 108 Features.AddFeature("mips2"); 109 break; 110 case ELF::EF_MIPS_ARCH_3: 111 Features.AddFeature("mips3"); 112 break; 113 case ELF::EF_MIPS_ARCH_4: 114 Features.AddFeature("mips4"); 115 break; 116 case ELF::EF_MIPS_ARCH_5: 117 Features.AddFeature("mips5"); 118 break; 119 case ELF::EF_MIPS_ARCH_32: 120 Features.AddFeature("mips32"); 121 break; 122 case ELF::EF_MIPS_ARCH_64: 123 Features.AddFeature("mips64"); 124 break; 125 case ELF::EF_MIPS_ARCH_32R2: 126 Features.AddFeature("mips32r2"); 127 break; 128 case ELF::EF_MIPS_ARCH_64R2: 129 Features.AddFeature("mips64r2"); 130 break; 131 case ELF::EF_MIPS_ARCH_32R6: 132 Features.AddFeature("mips32r6"); 133 break; 134 case ELF::EF_MIPS_ARCH_64R6: 135 Features.AddFeature("mips64r6"); 136 break; 137 default: 138 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 139 } 140 141 switch (PlatformFlags & ELF::EF_MIPS_MACH) { 142 case ELF::EF_MIPS_MACH_NONE: 143 // No feature associated with this value. 144 break; 145 case ELF::EF_MIPS_MACH_OCTEON: 146 Features.AddFeature("cnmips"); 147 break; 148 default: 149 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 150 } 151 152 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16) 153 Features.AddFeature("mips16"); 154 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS) 155 Features.AddFeature("micromips"); 156 157 return Features; 158 } 159 160 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const { 161 SubtargetFeatures Features; 162 ARMAttributeParser Attributes; 163 if (Error E = getBuildAttributes(Attributes)) { 164 consumeError(std::move(E)); 165 return SubtargetFeatures(); 166 } 167 168 // both ARMv7-M and R have to support thumb hardware div 169 bool isV7 = false; 170 std::optional<unsigned> Attr = 171 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 172 if (Attr) 173 isV7 = *Attr == ARMBuildAttrs::v7; 174 175 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 176 if (Attr) { 177 switch (*Attr) { 178 case ARMBuildAttrs::ApplicationProfile: 179 Features.AddFeature("aclass"); 180 break; 181 case ARMBuildAttrs::RealTimeProfile: 182 Features.AddFeature("rclass"); 183 if (isV7) 184 Features.AddFeature("hwdiv"); 185 break; 186 case ARMBuildAttrs::MicroControllerProfile: 187 Features.AddFeature("mclass"); 188 if (isV7) 189 Features.AddFeature("hwdiv"); 190 break; 191 } 192 } 193 194 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use); 195 if (Attr) { 196 switch (*Attr) { 197 default: 198 break; 199 case ARMBuildAttrs::Not_Allowed: 200 Features.AddFeature("thumb", false); 201 Features.AddFeature("thumb2", false); 202 break; 203 case ARMBuildAttrs::AllowThumb32: 204 Features.AddFeature("thumb2"); 205 break; 206 } 207 } 208 209 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch); 210 if (Attr) { 211 switch (*Attr) { 212 default: 213 break; 214 case ARMBuildAttrs::Not_Allowed: 215 Features.AddFeature("vfp2sp", false); 216 Features.AddFeature("vfp3d16sp", false); 217 Features.AddFeature("vfp4d16sp", false); 218 break; 219 case ARMBuildAttrs::AllowFPv2: 220 Features.AddFeature("vfp2"); 221 break; 222 case ARMBuildAttrs::AllowFPv3A: 223 case ARMBuildAttrs::AllowFPv3B: 224 Features.AddFeature("vfp3"); 225 break; 226 case ARMBuildAttrs::AllowFPv4A: 227 case ARMBuildAttrs::AllowFPv4B: 228 Features.AddFeature("vfp4"); 229 break; 230 } 231 } 232 233 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch); 234 if (Attr) { 235 switch (*Attr) { 236 default: 237 break; 238 case ARMBuildAttrs::Not_Allowed: 239 Features.AddFeature("neon", false); 240 Features.AddFeature("fp16", false); 241 break; 242 case ARMBuildAttrs::AllowNeon: 243 Features.AddFeature("neon"); 244 break; 245 case ARMBuildAttrs::AllowNeon2: 246 Features.AddFeature("neon"); 247 Features.AddFeature("fp16"); 248 break; 249 } 250 } 251 252 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch); 253 if (Attr) { 254 switch (*Attr) { 255 default: 256 break; 257 case ARMBuildAttrs::Not_Allowed: 258 Features.AddFeature("mve", false); 259 Features.AddFeature("mve.fp", false); 260 break; 261 case ARMBuildAttrs::AllowMVEInteger: 262 Features.AddFeature("mve.fp", false); 263 Features.AddFeature("mve"); 264 break; 265 case ARMBuildAttrs::AllowMVEIntegerAndFloat: 266 Features.AddFeature("mve.fp"); 267 break; 268 } 269 } 270 271 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use); 272 if (Attr) { 273 switch (*Attr) { 274 default: 275 break; 276 case ARMBuildAttrs::DisallowDIV: 277 Features.AddFeature("hwdiv", false); 278 Features.AddFeature("hwdiv-arm", false); 279 break; 280 case ARMBuildAttrs::AllowDIVExt: 281 Features.AddFeature("hwdiv"); 282 Features.AddFeature("hwdiv-arm"); 283 break; 284 } 285 } 286 287 return Features; 288 } 289 290 static std::optional<std::string> hexagonAttrToFeatureString(unsigned Attr) { 291 switch (Attr) { 292 case 5: 293 return "v5"; 294 case 55: 295 return "v55"; 296 case 60: 297 return "v60"; 298 case 62: 299 return "v62"; 300 case 65: 301 return "v65"; 302 case 67: 303 return "v67"; 304 case 68: 305 return "v68"; 306 case 69: 307 return "v69"; 308 case 71: 309 return "v71"; 310 case 73: 311 return "v73"; 312 default: 313 return {}; 314 } 315 } 316 317 SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const { 318 SubtargetFeatures Features; 319 HexagonAttributeParser Parser; 320 if (Error E = getBuildAttributes(Parser)) { 321 // Return no attributes if none can be read. 322 // This behavior is important for backwards compatibility. 323 consumeError(std::move(E)); 324 return Features; 325 } 326 std::optional<unsigned> Attr; 327 328 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH))) { 329 if (std::optional<std::string> FeatureString = 330 hexagonAttrToFeatureString(*Attr)) 331 Features.AddFeature(*FeatureString); 332 } 333 334 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH))) { 335 std::optional<std::string> FeatureString = 336 hexagonAttrToFeatureString(*Attr); 337 // There is no corresponding hvx arch for v5 and v55. 338 if (FeatureString && *Attr >= 60) 339 Features.AddFeature("hvx" + *FeatureString); 340 } 341 342 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP))) 343 if (*Attr) 344 Features.AddFeature("hvx-ieee-fp"); 345 346 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT))) 347 if (*Attr) 348 Features.AddFeature("hvx-qfloat"); 349 350 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG))) 351 if (*Attr) 352 Features.AddFeature("zreg"); 353 354 if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO))) 355 if (*Attr) 356 Features.AddFeature("audio"); 357 358 if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC))) 359 if (*Attr) 360 Features.AddFeature("cabac"); 361 362 return Features; 363 } 364 365 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const { 366 SubtargetFeatures Features; 367 unsigned PlatformFlags = getPlatformFlags(); 368 369 if (PlatformFlags & ELF::EF_RISCV_RVC) { 370 Features.AddFeature("zca"); 371 } 372 373 RISCVAttributeParser Attributes; 374 if (Error E = getBuildAttributes(Attributes)) { 375 return std::move(E); 376 } 377 378 std::optional<StringRef> Attr = 379 Attributes.getAttributeString(RISCVAttrs::ARCH); 380 if (Attr) { 381 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr); 382 if (!ParseResult) 383 return ParseResult.takeError(); 384 auto &ISAInfo = *ParseResult; 385 386 if (ISAInfo->getXLen() == 32) 387 Features.AddFeature("64bit", false); 388 else if (ISAInfo->getXLen() == 64) 389 Features.AddFeature("64bit"); 390 else 391 llvm_unreachable("XLEN should be 32 or 64."); 392 393 Features.addFeaturesVector(ISAInfo->toFeatures()); 394 } 395 396 return Features; 397 } 398 399 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const { 400 SubtargetFeatures Features; 401 402 switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) { 403 case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT: 404 break; 405 case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT: 406 Features.AddFeature("d"); 407 // D implies F according to LoongArch ISA spec. 408 [[fallthrough]]; 409 case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT: 410 Features.AddFeature("f"); 411 break; 412 } 413 414 return Features; 415 } 416 417 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const { 418 switch (getEMachine()) { 419 case ELF::EM_MIPS: 420 return getMIPSFeatures(); 421 case ELF::EM_ARM: 422 return getARMFeatures(); 423 case ELF::EM_RISCV: 424 return getRISCVFeatures(); 425 case ELF::EM_LOONGARCH: 426 return getLoongArchFeatures(); 427 case ELF::EM_HEXAGON: 428 return getHexagonFeatures(); 429 default: 430 return SubtargetFeatures(); 431 } 432 } 433 434 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const { 435 switch (getEMachine()) { 436 case ELF::EM_AMDGPU: 437 return getAMDGPUCPUName(); 438 case ELF::EM_CUDA: 439 return getNVPTXCPUName(); 440 case ELF::EM_PPC: 441 case ELF::EM_PPC64: 442 return StringRef("future"); 443 case ELF::EM_BPF: 444 return StringRef("v4"); 445 default: 446 return std::nullopt; 447 } 448 } 449 450 StringRef ELFObjectFileBase::getAMDGPUCPUName() const { 451 assert(getEMachine() == ELF::EM_AMDGPU); 452 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH; 453 454 switch (CPU) { 455 // Radeon HD 2000/3000 Series (R600). 456 case ELF::EF_AMDGPU_MACH_R600_R600: 457 return "r600"; 458 case ELF::EF_AMDGPU_MACH_R600_R630: 459 return "r630"; 460 case ELF::EF_AMDGPU_MACH_R600_RS880: 461 return "rs880"; 462 case ELF::EF_AMDGPU_MACH_R600_RV670: 463 return "rv670"; 464 465 // Radeon HD 4000 Series (R700). 466 case ELF::EF_AMDGPU_MACH_R600_RV710: 467 return "rv710"; 468 case ELF::EF_AMDGPU_MACH_R600_RV730: 469 return "rv730"; 470 case ELF::EF_AMDGPU_MACH_R600_RV770: 471 return "rv770"; 472 473 // Radeon HD 5000 Series (Evergreen). 474 case ELF::EF_AMDGPU_MACH_R600_CEDAR: 475 return "cedar"; 476 case ELF::EF_AMDGPU_MACH_R600_CYPRESS: 477 return "cypress"; 478 case ELF::EF_AMDGPU_MACH_R600_JUNIPER: 479 return "juniper"; 480 case ELF::EF_AMDGPU_MACH_R600_REDWOOD: 481 return "redwood"; 482 case ELF::EF_AMDGPU_MACH_R600_SUMO: 483 return "sumo"; 484 485 // Radeon HD 6000 Series (Northern Islands). 486 case ELF::EF_AMDGPU_MACH_R600_BARTS: 487 return "barts"; 488 case ELF::EF_AMDGPU_MACH_R600_CAICOS: 489 return "caicos"; 490 case ELF::EF_AMDGPU_MACH_R600_CAYMAN: 491 return "cayman"; 492 case ELF::EF_AMDGPU_MACH_R600_TURKS: 493 return "turks"; 494 495 // AMDGCN GFX6. 496 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600: 497 return "gfx600"; 498 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601: 499 return "gfx601"; 500 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602: 501 return "gfx602"; 502 503 // AMDGCN GFX7. 504 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700: 505 return "gfx700"; 506 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701: 507 return "gfx701"; 508 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702: 509 return "gfx702"; 510 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703: 511 return "gfx703"; 512 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704: 513 return "gfx704"; 514 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705: 515 return "gfx705"; 516 517 // AMDGCN GFX8. 518 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: 519 return "gfx801"; 520 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: 521 return "gfx802"; 522 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: 523 return "gfx803"; 524 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805: 525 return "gfx805"; 526 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: 527 return "gfx810"; 528 529 // AMDGCN GFX9. 530 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: 531 return "gfx900"; 532 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: 533 return "gfx902"; 534 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: 535 return "gfx904"; 536 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: 537 return "gfx906"; 538 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908: 539 return "gfx908"; 540 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: 541 return "gfx909"; 542 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A: 543 return "gfx90a"; 544 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C: 545 return "gfx90c"; 546 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940: 547 return "gfx940"; 548 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941: 549 return "gfx941"; 550 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942: 551 return "gfx942"; 552 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX950: 553 return "gfx950"; 554 555 // AMDGCN GFX10. 556 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: 557 return "gfx1010"; 558 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: 559 return "gfx1011"; 560 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: 561 return "gfx1012"; 562 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013: 563 return "gfx1013"; 564 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: 565 return "gfx1030"; 566 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: 567 return "gfx1031"; 568 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: 569 return "gfx1032"; 570 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: 571 return "gfx1033"; 572 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034: 573 return "gfx1034"; 574 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035: 575 return "gfx1035"; 576 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036: 577 return "gfx1036"; 578 579 // AMDGCN GFX11. 580 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100: 581 return "gfx1100"; 582 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101: 583 return "gfx1101"; 584 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102: 585 return "gfx1102"; 586 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: 587 return "gfx1103"; 588 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: 589 return "gfx1150"; 590 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: 591 return "gfx1151"; 592 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: 593 return "gfx1152"; 594 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153: 595 return "gfx1153"; 596 597 // AMDGCN GFX12. 598 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: 599 return "gfx1200"; 600 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: 601 return "gfx1201"; 602 603 // Generic AMDGCN targets 604 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC: 605 return "gfx9-generic"; 606 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC: 607 return "gfx9-4-generic"; 608 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC: 609 return "gfx10-1-generic"; 610 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: 611 return "gfx10-3-generic"; 612 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC: 613 return "gfx11-generic"; 614 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC: 615 return "gfx12-generic"; 616 default: 617 llvm_unreachable("Unknown EF_AMDGPU_MACH value"); 618 } 619 } 620 621 StringRef ELFObjectFileBase::getNVPTXCPUName() const { 622 assert(getEMachine() == ELF::EM_CUDA); 623 unsigned SM = getPlatformFlags() & ELF::EF_CUDA_SM; 624 625 switch (SM) { 626 // Fermi architecture. 627 case ELF::EF_CUDA_SM20: 628 return "sm_20"; 629 case ELF::EF_CUDA_SM21: 630 return "sm_21"; 631 632 // Kepler architecture. 633 case ELF::EF_CUDA_SM30: 634 return "sm_30"; 635 case ELF::EF_CUDA_SM32: 636 return "sm_32"; 637 case ELF::EF_CUDA_SM35: 638 return "sm_35"; 639 case ELF::EF_CUDA_SM37: 640 return "sm_37"; 641 642 // Maxwell architecture. 643 case ELF::EF_CUDA_SM50: 644 return "sm_50"; 645 case ELF::EF_CUDA_SM52: 646 return "sm_52"; 647 case ELF::EF_CUDA_SM53: 648 return "sm_53"; 649 650 // Pascal architecture. 651 case ELF::EF_CUDA_SM60: 652 return "sm_60"; 653 case ELF::EF_CUDA_SM61: 654 return "sm_61"; 655 case ELF::EF_CUDA_SM62: 656 return "sm_62"; 657 658 // Volta architecture. 659 case ELF::EF_CUDA_SM70: 660 return "sm_70"; 661 case ELF::EF_CUDA_SM72: 662 return "sm_72"; 663 664 // Turing architecture. 665 case ELF::EF_CUDA_SM75: 666 return "sm_75"; 667 668 // Ampere architecture. 669 case ELF::EF_CUDA_SM80: 670 return "sm_80"; 671 case ELF::EF_CUDA_SM86: 672 return "sm_86"; 673 case ELF::EF_CUDA_SM87: 674 return "sm_87"; 675 676 // Ada architecture. 677 case ELF::EF_CUDA_SM89: 678 return "sm_89"; 679 680 // Hopper architecture. 681 case ELF::EF_CUDA_SM90: 682 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_90a" : "sm_90"; 683 default: 684 llvm_unreachable("Unknown EF_CUDA_SM value"); 685 } 686 } 687 688 // FIXME Encode from a tablegen description or target parser. 689 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const { 690 if (TheTriple.getSubArch() != Triple::NoSubArch) 691 return; 692 693 ARMAttributeParser Attributes; 694 if (Error E = getBuildAttributes(Attributes)) { 695 // TODO Propagate Error. 696 consumeError(std::move(E)); 697 return; 698 } 699 700 std::string Triple; 701 // Default to ARM, but use the triple if it's been set. 702 if (TheTriple.isThumb()) 703 Triple = "thumb"; 704 else 705 Triple = "arm"; 706 707 std::optional<unsigned> Attr = 708 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 709 if (Attr) { 710 switch (*Attr) { 711 case ARMBuildAttrs::v4: 712 Triple += "v4"; 713 break; 714 case ARMBuildAttrs::v4T: 715 Triple += "v4t"; 716 break; 717 case ARMBuildAttrs::v5T: 718 Triple += "v5t"; 719 break; 720 case ARMBuildAttrs::v5TE: 721 Triple += "v5te"; 722 break; 723 case ARMBuildAttrs::v5TEJ: 724 Triple += "v5tej"; 725 break; 726 case ARMBuildAttrs::v6: 727 Triple += "v6"; 728 break; 729 case ARMBuildAttrs::v6KZ: 730 Triple += "v6kz"; 731 break; 732 case ARMBuildAttrs::v6T2: 733 Triple += "v6t2"; 734 break; 735 case ARMBuildAttrs::v6K: 736 Triple += "v6k"; 737 break; 738 case ARMBuildAttrs::v7: { 739 std::optional<unsigned> ArchProfileAttr = 740 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 741 if (ArchProfileAttr && 742 *ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile) 743 Triple += "v7m"; 744 else 745 Triple += "v7"; 746 break; 747 } 748 case ARMBuildAttrs::v6_M: 749 Triple += "v6m"; 750 break; 751 case ARMBuildAttrs::v6S_M: 752 Triple += "v6sm"; 753 break; 754 case ARMBuildAttrs::v7E_M: 755 Triple += "v7em"; 756 break; 757 case ARMBuildAttrs::v8_A: 758 Triple += "v8a"; 759 break; 760 case ARMBuildAttrs::v8_R: 761 Triple += "v8r"; 762 break; 763 case ARMBuildAttrs::v8_M_Base: 764 Triple += "v8m.base"; 765 break; 766 case ARMBuildAttrs::v8_M_Main: 767 Triple += "v8m.main"; 768 break; 769 case ARMBuildAttrs::v8_1_M_Main: 770 Triple += "v8.1m.main"; 771 break; 772 case ARMBuildAttrs::v9_A: 773 Triple += "v9a"; 774 break; 775 } 776 } 777 if (!isLittleEndian()) 778 Triple += "eb"; 779 780 TheTriple.setArchName(Triple); 781 } 782 783 std::vector<ELFPltEntry> ELFObjectFileBase::getPltEntries() const { 784 std::string Err; 785 const auto Triple = makeTriple(); 786 const auto *T = TargetRegistry::lookupTarget(Triple.str(), Err); 787 if (!T) 788 return {}; 789 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0; 790 switch (Triple.getArch()) { 791 case Triple::x86: 792 JumpSlotReloc = ELF::R_386_JUMP_SLOT; 793 GlobDatReloc = ELF::R_386_GLOB_DAT; 794 break; 795 case Triple::x86_64: 796 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT; 797 GlobDatReloc = ELF::R_X86_64_GLOB_DAT; 798 break; 799 case Triple::aarch64: 800 case Triple::aarch64_be: 801 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT; 802 break; 803 default: 804 return {}; 805 } 806 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo()); 807 std::unique_ptr<const MCInstrAnalysis> MIA( 808 T->createMCInstrAnalysis(MII.get())); 809 if (!MIA) 810 return {}; 811 std::vector<std::pair<uint64_t, uint64_t>> PltEntries; 812 std::optional<SectionRef> RelaPlt, RelaDyn; 813 uint64_t GotBaseVA = 0; 814 for (const SectionRef &Section : sections()) { 815 Expected<StringRef> NameOrErr = Section.getName(); 816 if (!NameOrErr) { 817 consumeError(NameOrErr.takeError()); 818 continue; 819 } 820 StringRef Name = *NameOrErr; 821 822 if (Name == ".rela.plt" || Name == ".rel.plt") { 823 RelaPlt = Section; 824 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") { 825 RelaDyn = Section; 826 } else if (Name == ".got.plt") { 827 GotBaseVA = Section.getAddress(); 828 } else if (Name == ".plt" || Name == ".plt.got") { 829 Expected<StringRef> PltContents = Section.getContents(); 830 if (!PltContents) { 831 consumeError(PltContents.takeError()); 832 return {}; 833 } 834 llvm::append_range( 835 PltEntries, 836 MIA->findPltEntries(Section.getAddress(), 837 arrayRefFromStringRef(*PltContents), Triple)); 838 } 839 } 840 841 // Build a map from GOT entry virtual address to PLT entry virtual address. 842 DenseMap<uint64_t, uint64_t> GotToPlt; 843 for (auto [Plt, GotPlt] : PltEntries) { 844 uint64_t GotPltEntry = GotPlt; 845 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add 846 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address. 847 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit. 848 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386) 849 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA; 850 GotToPlt.insert(std::make_pair(GotPltEntry, Plt)); 851 } 852 853 // Find the relocations in the dynamic relocation table that point to 854 // locations in the GOT for which we know the corresponding PLT entry. 855 std::vector<ELFPltEntry> Result; 856 auto handleRels = [&](iterator_range<relocation_iterator> Rels, 857 uint32_t RelType, StringRef PltSec) { 858 for (const auto &R : Rels) { 859 if (R.getType() != RelType) 860 continue; 861 auto PltEntryIter = GotToPlt.find(R.getOffset()); 862 if (PltEntryIter != GotToPlt.end()) { 863 symbol_iterator Sym = R.getSymbol(); 864 if (Sym == symbol_end()) 865 Result.push_back( 866 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second}); 867 else 868 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(), 869 PltEntryIter->second}); 870 } 871 } 872 }; 873 874 if (RelaPlt) 875 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt"); 876 877 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's 878 // x86 port places the PLT entry in the .plt.got section. 879 if (RelaDyn) 880 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got"); 881 882 return Result; 883 } 884 885 template <class ELFT> 886 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl( 887 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex, 888 std::vector<PGOAnalysisMap> *PGOAnalyses) { 889 using Elf_Shdr = typename ELFT::Shdr; 890 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL; 891 std::vector<BBAddrMap> BBAddrMaps; 892 if (PGOAnalyses) 893 PGOAnalyses->clear(); 894 895 const auto &Sections = cantFail(EF.sections()); 896 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> { 897 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP && 898 Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0) 899 return false; 900 if (!TextSectionIndex) 901 return true; 902 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link); 903 if (!TextSecOrErr) 904 return createError("unable to get the linked-to section for " + 905 describe(EF, Sec) + ": " + 906 toString(TextSecOrErr.takeError())); 907 assert(*TextSecOrErr >= Sections.begin() && 908 "Text section pointer outside of bounds"); 909 if (*TextSectionIndex != 910 (unsigned)std::distance(Sections.begin(), *TextSecOrErr)) 911 return false; 912 return true; 913 }; 914 915 Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr = 916 EF.getSectionAndRelocations(IsMatch); 917 if (!SectionRelocMapOrErr) 918 return SectionRelocMapOrErr.takeError(); 919 920 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) { 921 if (IsRelocatable && !RelocSec) 922 return createError("unable to get relocation section for " + 923 describe(EF, *Sec)); 924 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr = 925 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses); 926 if (!BBAddrMapOrErr) { 927 if (PGOAnalyses) 928 PGOAnalyses->clear(); 929 return createError("unable to read " + describe(EF, *Sec) + ": " + 930 toString(BBAddrMapOrErr.takeError())); 931 } 932 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(), 933 std::back_inserter(BBAddrMaps)); 934 } 935 if (PGOAnalyses) 936 assert(PGOAnalyses->size() == BBAddrMaps.size() && 937 "The same number of BBAddrMaps and PGOAnalysisMaps should be " 938 "returned when PGO information is requested"); 939 return BBAddrMaps; 940 } 941 942 template <class ELFT> 943 static Expected<std::vector<VersionEntry>> 944 readDynsymVersionsImpl(const ELFFile<ELFT> &EF, 945 ELFObjectFileBase::elf_symbol_iterator_range Symbols) { 946 using Elf_Shdr = typename ELFT::Shdr; 947 const Elf_Shdr *VerSec = nullptr; 948 const Elf_Shdr *VerNeedSec = nullptr; 949 const Elf_Shdr *VerDefSec = nullptr; 950 // The user should ensure sections() can't fail here. 951 for (const Elf_Shdr &Sec : cantFail(EF.sections())) { 952 if (Sec.sh_type == ELF::SHT_GNU_versym) 953 VerSec = &Sec; 954 else if (Sec.sh_type == ELF::SHT_GNU_verdef) 955 VerDefSec = &Sec; 956 else if (Sec.sh_type == ELF::SHT_GNU_verneed) 957 VerNeedSec = &Sec; 958 } 959 if (!VerSec) 960 return std::vector<VersionEntry>(); 961 962 Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr = 963 EF.loadVersionMap(VerNeedSec, VerDefSec); 964 if (!MapOrErr) 965 return MapOrErr.takeError(); 966 967 std::vector<VersionEntry> Ret; 968 size_t I = 0; 969 for (const ELFSymbolRef &Sym : Symbols) { 970 ++I; 971 Expected<const typename ELFT::Versym *> VerEntryOrErr = 972 EF.template getEntry<typename ELFT::Versym>(*VerSec, I); 973 if (!VerEntryOrErr) 974 return createError("unable to read an entry with index " + Twine(I) + 975 " from " + describe(EF, *VerSec) + ": " + 976 toString(VerEntryOrErr.takeError())); 977 978 Expected<uint32_t> FlagsOrErr = Sym.getFlags(); 979 if (!FlagsOrErr) 980 return createError("unable to read flags for symbol with index " + 981 Twine(I) + ": " + toString(FlagsOrErr.takeError())); 982 983 bool IsDefault; 984 Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex( 985 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr, 986 (*FlagsOrErr) & SymbolRef::SF_Undefined); 987 if (!VerOrErr) 988 return createError("unable to get a version for entry " + Twine(I) + 989 " of " + describe(EF, *VerSec) + ": " + 990 toString(VerOrErr.takeError())); 991 992 Ret.push_back({(*VerOrErr).str(), IsDefault}); 993 } 994 995 return Ret; 996 } 997 998 Expected<std::vector<VersionEntry>> 999 ELFObjectFileBase::readDynsymVersions() const { 1000 elf_symbol_iterator_range Symbols = getDynamicSymbolIterators(); 1001 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1002 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1003 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1004 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1005 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1006 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1007 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1008 Symbols); 1009 } 1010 1011 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap( 1012 std::optional<unsigned> TextSectionIndex, 1013 std::vector<PGOAnalysisMap> *PGOAnalyses) const { 1014 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1015 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1016 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1017 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1018 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1019 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1020 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1021 TextSectionIndex, PGOAnalyses); 1022 } 1023 1024 StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const { 1025 auto Data = Sec.getRawDataRefImpl(); 1026 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1027 return Obj->getCrelDecodeProblem(Data); 1028 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1029 return Obj->getCrelDecodeProblem(Data); 1030 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1031 return Obj->getCrelDecodeProblem(Data); 1032 return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data); 1033 } 1034