xref: /llvm-project/llvm/lib/Object/ELFObjectFile.cpp (revision 1fc70210a6a585bad941f64bd3fca7909eeafdda)
1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Part of the ELFObjectFile class implementation.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/Object/ELFObjectFile.h"
14 #include "llvm/BinaryFormat/ELF.h"
15 #include "llvm/MC/MCInstrAnalysis.h"
16 #include "llvm/MC/SubtargetFeature.h"
17 #include "llvm/MC/TargetRegistry.h"
18 #include "llvm/Object/ELF.h"
19 #include "llvm/Object/ELFTypes.h"
20 #include "llvm/Object/Error.h"
21 #include "llvm/Support/ARMAttributeParser.h"
22 #include "llvm/Support/ARMBuildAttributes.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/MathExtras.h"
25 #include "llvm/Support/RISCVAttributeParser.h"
26 #include "llvm/Support/RISCVAttributes.h"
27 #include "llvm/Support/RISCVISAInfo.h"
28 #include "llvm/TargetParser/Triple.h"
29 #include <algorithm>
30 #include <cstddef>
31 #include <cstdint>
32 #include <memory>
33 #include <optional>
34 #include <string>
35 #include <utility>
36 
37 using namespace llvm;
38 using namespace object;
39 
40 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = {
41     {"None", "NOTYPE", ELF::STT_NOTYPE},
42     {"Object", "OBJECT", ELF::STT_OBJECT},
43     {"Function", "FUNC", ELF::STT_FUNC},
44     {"Section", "SECTION", ELF::STT_SECTION},
45     {"File", "FILE", ELF::STT_FILE},
46     {"Common", "COMMON", ELF::STT_COMMON},
47     {"TLS", "TLS", ELF::STT_TLS},
48     {"Unknown", "<unknown>: 7", 7},
49     {"Unknown", "<unknown>: 8", 8},
50     {"Unknown", "<unknown>: 9", 9},
51     {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC},
52     {"OS Specific", "<OS specific>: 11", 11},
53     {"OS Specific", "<OS specific>: 12", 12},
54     {"Proc Specific", "<processor specific>: 13", 13},
55     {"Proc Specific", "<processor specific>: 14", 14},
56     {"Proc Specific", "<processor specific>: 15", 15}
57 };
58 
59 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source)
60     : ObjectFile(Type, Source) {}
61 
62 template <class ELFT>
63 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>>
64 createPtr(MemoryBufferRef Object, bool InitContent) {
65   auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent);
66   if (Error E = Ret.takeError())
67     return std::move(E);
68   return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret));
69 }
70 
71 Expected<std::unique_ptr<ObjectFile>>
72 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) {
73   std::pair<unsigned char, unsigned char> Ident =
74       getElfArchType(Obj.getBuffer());
75   std::size_t MaxAlignment =
76       1ULL << llvm::countr_zero(
77           reinterpret_cast<uintptr_t>(Obj.getBufferStart()));
78 
79   if (MaxAlignment < 2)
80     return createError("Insufficient alignment");
81 
82   if (Ident.first == ELF::ELFCLASS32) {
83     if (Ident.second == ELF::ELFDATA2LSB)
84       return createPtr<ELF32LE>(Obj, InitContent);
85     else if (Ident.second == ELF::ELFDATA2MSB)
86       return createPtr<ELF32BE>(Obj, InitContent);
87     else
88       return createError("Invalid ELF data");
89   } else if (Ident.first == ELF::ELFCLASS64) {
90     if (Ident.second == ELF::ELFDATA2LSB)
91       return createPtr<ELF64LE>(Obj, InitContent);
92     else if (Ident.second == ELF::ELFDATA2MSB)
93       return createPtr<ELF64BE>(Obj, InitContent);
94     else
95       return createError("Invalid ELF data");
96   }
97   return createError("Invalid ELF class");
98 }
99 
100 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
101   SubtargetFeatures Features;
102   unsigned PlatformFlags = getPlatformFlags();
103 
104   switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
105   case ELF::EF_MIPS_ARCH_1:
106     break;
107   case ELF::EF_MIPS_ARCH_2:
108     Features.AddFeature("mips2");
109     break;
110   case ELF::EF_MIPS_ARCH_3:
111     Features.AddFeature("mips3");
112     break;
113   case ELF::EF_MIPS_ARCH_4:
114     Features.AddFeature("mips4");
115     break;
116   case ELF::EF_MIPS_ARCH_5:
117     Features.AddFeature("mips5");
118     break;
119   case ELF::EF_MIPS_ARCH_32:
120     Features.AddFeature("mips32");
121     break;
122   case ELF::EF_MIPS_ARCH_64:
123     Features.AddFeature("mips64");
124     break;
125   case ELF::EF_MIPS_ARCH_32R2:
126     Features.AddFeature("mips32r2");
127     break;
128   case ELF::EF_MIPS_ARCH_64R2:
129     Features.AddFeature("mips64r2");
130     break;
131   case ELF::EF_MIPS_ARCH_32R6:
132     Features.AddFeature("mips32r6");
133     break;
134   case ELF::EF_MIPS_ARCH_64R6:
135     Features.AddFeature("mips64r6");
136     break;
137   default:
138     llvm_unreachable("Unknown EF_MIPS_ARCH value");
139   }
140 
141   switch (PlatformFlags & ELF::EF_MIPS_MACH) {
142   case ELF::EF_MIPS_MACH_NONE:
143     // No feature associated with this value.
144     break;
145   case ELF::EF_MIPS_MACH_OCTEON:
146     Features.AddFeature("cnmips");
147     break;
148   default:
149     llvm_unreachable("Unknown EF_MIPS_ARCH value");
150   }
151 
152   if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
153     Features.AddFeature("mips16");
154   if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
155     Features.AddFeature("micromips");
156 
157   return Features;
158 }
159 
160 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
161   SubtargetFeatures Features;
162   ARMAttributeParser Attributes;
163   if (Error E = getBuildAttributes(Attributes)) {
164     consumeError(std::move(E));
165     return SubtargetFeatures();
166   }
167 
168   // both ARMv7-M and R have to support thumb hardware div
169   bool isV7 = false;
170   std::optional<unsigned> Attr =
171       Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
172   if (Attr)
173     isV7 = *Attr == ARMBuildAttrs::v7;
174 
175   Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
176   if (Attr) {
177     switch (*Attr) {
178     case ARMBuildAttrs::ApplicationProfile:
179       Features.AddFeature("aclass");
180       break;
181     case ARMBuildAttrs::RealTimeProfile:
182       Features.AddFeature("rclass");
183       if (isV7)
184         Features.AddFeature("hwdiv");
185       break;
186     case ARMBuildAttrs::MicroControllerProfile:
187       Features.AddFeature("mclass");
188       if (isV7)
189         Features.AddFeature("hwdiv");
190       break;
191     }
192   }
193 
194   Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use);
195   if (Attr) {
196     switch (*Attr) {
197     default:
198       break;
199     case ARMBuildAttrs::Not_Allowed:
200       Features.AddFeature("thumb", false);
201       Features.AddFeature("thumb2", false);
202       break;
203     case ARMBuildAttrs::AllowThumb32:
204       Features.AddFeature("thumb2");
205       break;
206     }
207   }
208 
209   Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch);
210   if (Attr) {
211     switch (*Attr) {
212     default:
213       break;
214     case ARMBuildAttrs::Not_Allowed:
215       Features.AddFeature("vfp2sp", false);
216       Features.AddFeature("vfp3d16sp", false);
217       Features.AddFeature("vfp4d16sp", false);
218       break;
219     case ARMBuildAttrs::AllowFPv2:
220       Features.AddFeature("vfp2");
221       break;
222     case ARMBuildAttrs::AllowFPv3A:
223     case ARMBuildAttrs::AllowFPv3B:
224       Features.AddFeature("vfp3");
225       break;
226     case ARMBuildAttrs::AllowFPv4A:
227     case ARMBuildAttrs::AllowFPv4B:
228       Features.AddFeature("vfp4");
229       break;
230     }
231   }
232 
233   Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch);
234   if (Attr) {
235     switch (*Attr) {
236     default:
237       break;
238     case ARMBuildAttrs::Not_Allowed:
239       Features.AddFeature("neon", false);
240       Features.AddFeature("fp16", false);
241       break;
242     case ARMBuildAttrs::AllowNeon:
243       Features.AddFeature("neon");
244       break;
245     case ARMBuildAttrs::AllowNeon2:
246       Features.AddFeature("neon");
247       Features.AddFeature("fp16");
248       break;
249     }
250   }
251 
252   Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch);
253   if (Attr) {
254     switch (*Attr) {
255     default:
256       break;
257     case ARMBuildAttrs::Not_Allowed:
258       Features.AddFeature("mve", false);
259       Features.AddFeature("mve.fp", false);
260       break;
261     case ARMBuildAttrs::AllowMVEInteger:
262       Features.AddFeature("mve.fp", false);
263       Features.AddFeature("mve");
264       break;
265     case ARMBuildAttrs::AllowMVEIntegerAndFloat:
266       Features.AddFeature("mve.fp");
267       break;
268     }
269   }
270 
271   Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use);
272   if (Attr) {
273     switch (*Attr) {
274     default:
275       break;
276     case ARMBuildAttrs::DisallowDIV:
277       Features.AddFeature("hwdiv", false);
278       Features.AddFeature("hwdiv-arm", false);
279       break;
280     case ARMBuildAttrs::AllowDIVExt:
281       Features.AddFeature("hwdiv");
282       Features.AddFeature("hwdiv-arm");
283       break;
284     }
285   }
286 
287   return Features;
288 }
289 
290 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const {
291   SubtargetFeatures Features;
292   unsigned PlatformFlags = getPlatformFlags();
293 
294   if (PlatformFlags & ELF::EF_RISCV_RVC) {
295     Features.AddFeature("c");
296   }
297 
298   RISCVAttributeParser Attributes;
299   if (Error E = getBuildAttributes(Attributes)) {
300     return std::move(E);
301   }
302 
303   std::optional<StringRef> Attr =
304       Attributes.getAttributeString(RISCVAttrs::ARCH);
305   if (Attr) {
306     auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr);
307     if (!ParseResult)
308       return ParseResult.takeError();
309     auto &ISAInfo = *ParseResult;
310 
311     if (ISAInfo->getXLen() == 32)
312       Features.AddFeature("64bit", false);
313     else if (ISAInfo->getXLen() == 64)
314       Features.AddFeature("64bit");
315     else
316       llvm_unreachable("XLEN should be 32 or 64.");
317 
318     Features.addFeaturesVector(ISAInfo->toFeatureVector());
319   }
320 
321   return Features;
322 }
323 
324 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const {
325   SubtargetFeatures Features;
326 
327   switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) {
328   case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT:
329     break;
330   case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT:
331     Features.AddFeature("d");
332     // D implies F according to LoongArch ISA spec.
333     [[fallthrough]];
334   case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT:
335     Features.AddFeature("f");
336     break;
337   }
338 
339   return Features;
340 }
341 
342 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const {
343   switch (getEMachine()) {
344   case ELF::EM_MIPS:
345     return getMIPSFeatures();
346   case ELF::EM_ARM:
347     return getARMFeatures();
348   case ELF::EM_RISCV:
349     return getRISCVFeatures();
350   case ELF::EM_LOONGARCH:
351     return getLoongArchFeatures();
352   default:
353     return SubtargetFeatures();
354   }
355 }
356 
357 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
358   switch (getEMachine()) {
359   case ELF::EM_AMDGPU:
360     return getAMDGPUCPUName();
361   case ELF::EM_PPC64:
362     return StringRef("future");
363   default:
364     return std::nullopt;
365   }
366 }
367 
368 StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
369   assert(getEMachine() == ELF::EM_AMDGPU);
370   unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH;
371 
372   switch (CPU) {
373   // Radeon HD 2000/3000 Series (R600).
374   case ELF::EF_AMDGPU_MACH_R600_R600:
375     return "r600";
376   case ELF::EF_AMDGPU_MACH_R600_R630:
377     return "r630";
378   case ELF::EF_AMDGPU_MACH_R600_RS880:
379     return "rs880";
380   case ELF::EF_AMDGPU_MACH_R600_RV670:
381     return "rv670";
382 
383   // Radeon HD 4000 Series (R700).
384   case ELF::EF_AMDGPU_MACH_R600_RV710:
385     return "rv710";
386   case ELF::EF_AMDGPU_MACH_R600_RV730:
387     return "rv730";
388   case ELF::EF_AMDGPU_MACH_R600_RV770:
389     return "rv770";
390 
391   // Radeon HD 5000 Series (Evergreen).
392   case ELF::EF_AMDGPU_MACH_R600_CEDAR:
393     return "cedar";
394   case ELF::EF_AMDGPU_MACH_R600_CYPRESS:
395     return "cypress";
396   case ELF::EF_AMDGPU_MACH_R600_JUNIPER:
397     return "juniper";
398   case ELF::EF_AMDGPU_MACH_R600_REDWOOD:
399     return "redwood";
400   case ELF::EF_AMDGPU_MACH_R600_SUMO:
401     return "sumo";
402 
403   // Radeon HD 6000 Series (Northern Islands).
404   case ELF::EF_AMDGPU_MACH_R600_BARTS:
405     return "barts";
406   case ELF::EF_AMDGPU_MACH_R600_CAICOS:
407     return "caicos";
408   case ELF::EF_AMDGPU_MACH_R600_CAYMAN:
409     return "cayman";
410   case ELF::EF_AMDGPU_MACH_R600_TURKS:
411     return "turks";
412 
413   // AMDGCN GFX6.
414   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600:
415     return "gfx600";
416   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601:
417     return "gfx601";
418   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602:
419     return "gfx602";
420 
421   // AMDGCN GFX7.
422   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700:
423     return "gfx700";
424   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701:
425     return "gfx701";
426   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702:
427     return "gfx702";
428   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703:
429     return "gfx703";
430   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704:
431     return "gfx704";
432   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705:
433     return "gfx705";
434 
435   // AMDGCN GFX8.
436   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801:
437     return "gfx801";
438   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802:
439     return "gfx802";
440   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803:
441     return "gfx803";
442   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805:
443     return "gfx805";
444   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810:
445     return "gfx810";
446 
447   // AMDGCN GFX9.
448   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900:
449     return "gfx900";
450   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902:
451     return "gfx902";
452   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904:
453     return "gfx904";
454   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906:
455     return "gfx906";
456   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908:
457     return "gfx908";
458   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909:
459     return "gfx909";
460   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A:
461     return "gfx90a";
462   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C:
463     return "gfx90c";
464   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940:
465     return "gfx940";
466   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941:
467     return "gfx941";
468 
469   // AMDGCN GFX10.
470   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010:
471     return "gfx1010";
472   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011:
473     return "gfx1011";
474   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012:
475     return "gfx1012";
476   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013:
477     return "gfx1013";
478   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030:
479     return "gfx1030";
480   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031:
481     return "gfx1031";
482   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032:
483     return "gfx1032";
484   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033:
485     return "gfx1033";
486   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034:
487     return "gfx1034";
488   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035:
489     return "gfx1035";
490   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036:
491     return "gfx1036";
492 
493   // AMDGCN GFX11.
494   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100:
495     return "gfx1100";
496   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101:
497     return "gfx1101";
498   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102:
499     return "gfx1102";
500   case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103:
501     return "gfx1103";
502   default:
503     llvm_unreachable("Unknown EF_AMDGPU_MACH value");
504   }
505 }
506 
507 // FIXME Encode from a tablegen description or target parser.
508 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
509   if (TheTriple.getSubArch() != Triple::NoSubArch)
510     return;
511 
512   ARMAttributeParser Attributes;
513   if (Error E = getBuildAttributes(Attributes)) {
514     // TODO Propagate Error.
515     consumeError(std::move(E));
516     return;
517   }
518 
519   std::string Triple;
520   // Default to ARM, but use the triple if it's been set.
521   if (TheTriple.isThumb())
522     Triple = "thumb";
523   else
524     Triple = "arm";
525 
526   std::optional<unsigned> Attr =
527       Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
528   if (Attr) {
529     switch (*Attr) {
530     case ARMBuildAttrs::v4:
531       Triple += "v4";
532       break;
533     case ARMBuildAttrs::v4T:
534       Triple += "v4t";
535       break;
536     case ARMBuildAttrs::v5T:
537       Triple += "v5t";
538       break;
539     case ARMBuildAttrs::v5TE:
540       Triple += "v5te";
541       break;
542     case ARMBuildAttrs::v5TEJ:
543       Triple += "v5tej";
544       break;
545     case ARMBuildAttrs::v6:
546       Triple += "v6";
547       break;
548     case ARMBuildAttrs::v6KZ:
549       Triple += "v6kz";
550       break;
551     case ARMBuildAttrs::v6T2:
552       Triple += "v6t2";
553       break;
554     case ARMBuildAttrs::v6K:
555       Triple += "v6k";
556       break;
557     case ARMBuildAttrs::v7: {
558       std::optional<unsigned> ArchProfileAttr =
559           Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
560       if (ArchProfileAttr &&
561           *ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile)
562         Triple += "v7m";
563       else
564         Triple += "v7";
565       break;
566     }
567     case ARMBuildAttrs::v6_M:
568       Triple += "v6m";
569       break;
570     case ARMBuildAttrs::v6S_M:
571       Triple += "v6sm";
572       break;
573     case ARMBuildAttrs::v7E_M:
574       Triple += "v7em";
575       break;
576     case ARMBuildAttrs::v8_A:
577       Triple += "v8a";
578       break;
579     case ARMBuildAttrs::v8_R:
580       Triple += "v8r";
581       break;
582     case ARMBuildAttrs::v8_M_Base:
583       Triple += "v8m.base";
584       break;
585     case ARMBuildAttrs::v8_M_Main:
586       Triple += "v8m.main";
587       break;
588     case ARMBuildAttrs::v8_1_M_Main:
589       Triple += "v8.1m.main";
590       break;
591     case ARMBuildAttrs::v9_A:
592       Triple += "v9a";
593       break;
594     }
595   }
596   if (!isLittleEndian())
597     Triple += "eb";
598 
599   TheTriple.setArchName(Triple);
600 }
601 
602 std::vector<std::pair<std::optional<DataRefImpl>, uint64_t>>
603 ELFObjectFileBase::getPltAddresses() const {
604   std::string Err;
605   const auto Triple = makeTriple();
606   const auto *T = TargetRegistry::lookupTarget(Triple.str(), Err);
607   if (!T)
608     return {};
609   uint64_t JumpSlotReloc = 0;
610   switch (Triple.getArch()) {
611     case Triple::x86:
612       JumpSlotReloc = ELF::R_386_JUMP_SLOT;
613       break;
614     case Triple::x86_64:
615       JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT;
616       break;
617     case Triple::aarch64:
618     case Triple::aarch64_be:
619       JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT;
620       break;
621     default:
622       return {};
623   }
624   std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo());
625   std::unique_ptr<const MCInstrAnalysis> MIA(
626       T->createMCInstrAnalysis(MII.get()));
627   if (!MIA)
628     return {};
629   std::optional<SectionRef> Plt, RelaPlt;
630   uint64_t GotBaseVA = 0;
631   for (const SectionRef &Section : sections()) {
632     Expected<StringRef> NameOrErr = Section.getName();
633     if (!NameOrErr) {
634       consumeError(NameOrErr.takeError());
635       continue;
636     }
637     StringRef Name = *NameOrErr;
638 
639     if (Name == ".plt")
640       Plt = Section;
641     else if (Name == ".rela.plt" || Name == ".rel.plt")
642       RelaPlt = Section;
643     else if (Name == ".got.plt")
644       GotBaseVA = Section.getAddress();
645   }
646   if (!Plt || !RelaPlt)
647     return {};
648   Expected<StringRef> PltContents = Plt->getContents();
649   if (!PltContents) {
650     consumeError(PltContents.takeError());
651     return {};
652   }
653   auto PltEntries = MIA->findPltEntries(
654       Plt->getAddress(), arrayRefFromStringRef(*PltContents), Triple);
655 
656   // Build a map from GOT entry virtual address to PLT entry virtual address.
657   DenseMap<uint64_t, uint64_t> GotToPlt;
658   for (auto [Plt, GotPltEntry] : PltEntries) {
659     // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add
660     // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address.
661     if (static_cast<int64_t>(GotPltEntry) < 0 && getEMachine() == ELF::EM_386)
662       GotPltEntry = ~GotPltEntry + GotBaseVA;
663     GotToPlt.insert(std::make_pair(GotPltEntry, Plt));
664   }
665   // Find the relocations in the dynamic relocation table that point to
666   // locations in the GOT for which we know the corresponding PLT entry.
667   std::vector<std::pair<std::optional<DataRefImpl>, uint64_t>> Result;
668   for (const auto &Relocation : RelaPlt->relocations()) {
669     if (Relocation.getType() != JumpSlotReloc)
670       continue;
671     auto PltEntryIter = GotToPlt.find(Relocation.getOffset());
672     if (PltEntryIter != GotToPlt.end()) {
673       symbol_iterator Sym = Relocation.getSymbol();
674       if (Sym == symbol_end())
675         Result.emplace_back(std::nullopt, PltEntryIter->second);
676       else
677         Result.emplace_back(Sym->getRawDataRefImpl(), PltEntryIter->second);
678     }
679   }
680   return Result;
681 }
682 
683 template <class ELFT>
684 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl(
685     const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex) {
686   using Elf_Shdr = typename ELFT::Shdr;
687   bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL;
688   std::vector<BBAddrMap> BBAddrMaps;
689 
690   const auto &Sections = cantFail(EF.sections());
691   auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> {
692     if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP &&
693         Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0)
694       return false;
695     if (!TextSectionIndex)
696       return true;
697     Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link);
698     if (!TextSecOrErr)
699       return createError("unable to get the linked-to section for " +
700                          describe(EF, Sec) + ": " +
701                          toString(TextSecOrErr.takeError()));
702     if (*TextSectionIndex != std::distance(Sections.begin(), *TextSecOrErr))
703       return false;
704     return true;
705   };
706 
707   Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr =
708       EF.getSectionAndRelocations(IsMatch);
709   if (!SectionRelocMapOrErr)
710     return SectionRelocMapOrErr.takeError();
711 
712   for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) {
713     if (IsRelocatable && !RelocSec)
714       return createError("unable to get relocation section for " +
715                          describe(EF, *Sec));
716     Expected<std::vector<BBAddrMap>> BBAddrMapOrErr =
717         EF.decodeBBAddrMap(*Sec, RelocSec);
718     if (!BBAddrMapOrErr)
719       return createError("unable to read " + describe(EF, *Sec) + ": " +
720                          toString(BBAddrMapOrErr.takeError()));
721     std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(),
722               std::back_inserter(BBAddrMaps));
723   }
724   return BBAddrMaps;
725 }
726 
727 template <class ELFT>
728 static Expected<std::vector<VersionEntry>>
729 readDynsymVersionsImpl(const ELFFile<ELFT> &EF,
730                        ELFObjectFileBase::elf_symbol_iterator_range Symbols) {
731   using Elf_Shdr = typename ELFT::Shdr;
732   const Elf_Shdr *VerSec = nullptr;
733   const Elf_Shdr *VerNeedSec = nullptr;
734   const Elf_Shdr *VerDefSec = nullptr;
735   // The user should ensure sections() can't fail here.
736   for (const Elf_Shdr &Sec : cantFail(EF.sections())) {
737     if (Sec.sh_type == ELF::SHT_GNU_versym)
738       VerSec = &Sec;
739     else if (Sec.sh_type == ELF::SHT_GNU_verdef)
740       VerDefSec = &Sec;
741     else if (Sec.sh_type == ELF::SHT_GNU_verneed)
742       VerNeedSec = &Sec;
743   }
744   if (!VerSec)
745     return std::vector<VersionEntry>();
746 
747   Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr =
748       EF.loadVersionMap(VerNeedSec, VerDefSec);
749   if (!MapOrErr)
750     return MapOrErr.takeError();
751 
752   std::vector<VersionEntry> Ret;
753   size_t I = 0;
754   for (const ELFSymbolRef &Sym : Symbols) {
755     ++I;
756     Expected<const typename ELFT::Versym *> VerEntryOrErr =
757         EF.template getEntry<typename ELFT::Versym>(*VerSec, I);
758     if (!VerEntryOrErr)
759       return createError("unable to read an entry with index " + Twine(I) +
760                          " from " + describe(EF, *VerSec) + ": " +
761                          toString(VerEntryOrErr.takeError()));
762 
763     Expected<uint32_t> FlagsOrErr = Sym.getFlags();
764     if (!FlagsOrErr)
765       return createError("unable to read flags for symbol with index " +
766                          Twine(I) + ": " + toString(FlagsOrErr.takeError()));
767 
768     bool IsDefault;
769     Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex(
770         (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr,
771         (*FlagsOrErr) & SymbolRef::SF_Undefined);
772     if (!VerOrErr)
773       return createError("unable to get a version for entry " + Twine(I) +
774                          " of " + describe(EF, *VerSec) + ": " +
775                          toString(VerOrErr.takeError()));
776 
777     Ret.push_back({(*VerOrErr).str(), IsDefault});
778   }
779 
780   return Ret;
781 }
782 
783 Expected<std::vector<VersionEntry>>
784 ELFObjectFileBase::readDynsymVersions() const {
785   elf_symbol_iterator_range Symbols = getDynamicSymbolIterators();
786   if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
787     return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
788   if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
789     return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
790   if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
791     return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
792   return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
793                                 Symbols);
794 }
795 
796 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap(
797     std::optional<unsigned> TextSectionIndex) const {
798   if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
799     return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex);
800   if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
801     return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex);
802   if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
803     return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex);
804   return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
805                            TextSectionIndex);
806 }
807