1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Part of the ELFObjectFile class implementation. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/Object/ELFObjectFile.h" 14 #include "llvm/BinaryFormat/ELF.h" 15 #include "llvm/MC/MCInstrAnalysis.h" 16 #include "llvm/MC/TargetRegistry.h" 17 #include "llvm/Object/ELF.h" 18 #include "llvm/Object/ELFTypes.h" 19 #include "llvm/Object/Error.h" 20 #include "llvm/Support/ARMAttributeParser.h" 21 #include "llvm/Support/ARMBuildAttributes.h" 22 #include "llvm/Support/ErrorHandling.h" 23 #include "llvm/Support/HexagonAttributeParser.h" 24 #include "llvm/Support/MathExtras.h" 25 #include "llvm/Support/RISCVAttributeParser.h" 26 #include "llvm/Support/RISCVAttributes.h" 27 #include "llvm/TargetParser/RISCVISAInfo.h" 28 #include "llvm/TargetParser/SubtargetFeature.h" 29 #include "llvm/TargetParser/Triple.h" 30 #include <algorithm> 31 #include <cstddef> 32 #include <cstdint> 33 #include <memory> 34 #include <optional> 35 #include <string> 36 #include <utility> 37 38 using namespace llvm; 39 using namespace object; 40 41 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = { 42 {"None", "NOTYPE", ELF::STT_NOTYPE}, 43 {"Object", "OBJECT", ELF::STT_OBJECT}, 44 {"Function", "FUNC", ELF::STT_FUNC}, 45 {"Section", "SECTION", ELF::STT_SECTION}, 46 {"File", "FILE", ELF::STT_FILE}, 47 {"Common", "COMMON", ELF::STT_COMMON}, 48 {"TLS", "TLS", ELF::STT_TLS}, 49 {"Unknown", "<unknown>: 7", 7}, 50 {"Unknown", "<unknown>: 8", 8}, 51 {"Unknown", "<unknown>: 9", 9}, 52 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC}, 53 {"OS Specific", "<OS specific>: 11", 11}, 54 {"OS Specific", "<OS specific>: 12", 12}, 55 {"Proc Specific", "<processor specific>: 13", 13}, 56 {"Proc Specific", "<processor specific>: 14", 14}, 57 {"Proc Specific", "<processor specific>: 15", 15} 58 }; 59 60 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source) 61 : ObjectFile(Type, Source) {} 62 63 template <class ELFT> 64 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>> 65 createPtr(MemoryBufferRef Object, bool InitContent) { 66 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent); 67 if (Error E = Ret.takeError()) 68 return std::move(E); 69 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret)); 70 } 71 72 Expected<std::unique_ptr<ObjectFile>> 73 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) { 74 std::pair<unsigned char, unsigned char> Ident = 75 getElfArchType(Obj.getBuffer()); 76 std::size_t MaxAlignment = 77 1ULL << llvm::countr_zero( 78 reinterpret_cast<uintptr_t>(Obj.getBufferStart())); 79 80 if (MaxAlignment < 2) 81 return createError("Insufficient alignment"); 82 83 if (Ident.first == ELF::ELFCLASS32) { 84 if (Ident.second == ELF::ELFDATA2LSB) 85 return createPtr<ELF32LE>(Obj, InitContent); 86 else if (Ident.second == ELF::ELFDATA2MSB) 87 return createPtr<ELF32BE>(Obj, InitContent); 88 else 89 return createError("Invalid ELF data"); 90 } else if (Ident.first == ELF::ELFCLASS64) { 91 if (Ident.second == ELF::ELFDATA2LSB) 92 return createPtr<ELF64LE>(Obj, InitContent); 93 else if (Ident.second == ELF::ELFDATA2MSB) 94 return createPtr<ELF64BE>(Obj, InitContent); 95 else 96 return createError("Invalid ELF data"); 97 } 98 return createError("Invalid ELF class"); 99 } 100 101 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const { 102 SubtargetFeatures Features; 103 unsigned PlatformFlags = getPlatformFlags(); 104 105 switch (PlatformFlags & ELF::EF_MIPS_ARCH) { 106 case ELF::EF_MIPS_ARCH_1: 107 break; 108 case ELF::EF_MIPS_ARCH_2: 109 Features.AddFeature("mips2"); 110 break; 111 case ELF::EF_MIPS_ARCH_3: 112 Features.AddFeature("mips3"); 113 break; 114 case ELF::EF_MIPS_ARCH_4: 115 Features.AddFeature("mips4"); 116 break; 117 case ELF::EF_MIPS_ARCH_5: 118 Features.AddFeature("mips5"); 119 break; 120 case ELF::EF_MIPS_ARCH_32: 121 Features.AddFeature("mips32"); 122 break; 123 case ELF::EF_MIPS_ARCH_64: 124 Features.AddFeature("mips64"); 125 break; 126 case ELF::EF_MIPS_ARCH_32R2: 127 Features.AddFeature("mips32r2"); 128 break; 129 case ELF::EF_MIPS_ARCH_64R2: 130 Features.AddFeature("mips64r2"); 131 break; 132 case ELF::EF_MIPS_ARCH_32R6: 133 Features.AddFeature("mips32r6"); 134 break; 135 case ELF::EF_MIPS_ARCH_64R6: 136 Features.AddFeature("mips64r6"); 137 break; 138 default: 139 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 140 } 141 142 switch (PlatformFlags & ELF::EF_MIPS_MACH) { 143 case ELF::EF_MIPS_MACH_NONE: 144 // No feature associated with this value. 145 break; 146 case ELF::EF_MIPS_MACH_OCTEON: 147 Features.AddFeature("cnmips"); 148 break; 149 default: 150 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 151 } 152 153 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16) 154 Features.AddFeature("mips16"); 155 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS) 156 Features.AddFeature("micromips"); 157 158 return Features; 159 } 160 161 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const { 162 SubtargetFeatures Features; 163 ARMAttributeParser Attributes; 164 if (Error E = getBuildAttributes(Attributes)) { 165 consumeError(std::move(E)); 166 return SubtargetFeatures(); 167 } 168 169 // both ARMv7-M and R have to support thumb hardware div 170 bool isV7 = false; 171 std::optional<unsigned> Attr = 172 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 173 if (Attr) 174 isV7 = *Attr == ARMBuildAttrs::v7; 175 176 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 177 if (Attr) { 178 switch (*Attr) { 179 case ARMBuildAttrs::ApplicationProfile: 180 Features.AddFeature("aclass"); 181 break; 182 case ARMBuildAttrs::RealTimeProfile: 183 Features.AddFeature("rclass"); 184 if (isV7) 185 Features.AddFeature("hwdiv"); 186 break; 187 case ARMBuildAttrs::MicroControllerProfile: 188 Features.AddFeature("mclass"); 189 if (isV7) 190 Features.AddFeature("hwdiv"); 191 break; 192 } 193 } 194 195 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use); 196 if (Attr) { 197 switch (*Attr) { 198 default: 199 break; 200 case ARMBuildAttrs::Not_Allowed: 201 Features.AddFeature("thumb", false); 202 Features.AddFeature("thumb2", false); 203 break; 204 case ARMBuildAttrs::AllowThumb32: 205 Features.AddFeature("thumb2"); 206 break; 207 } 208 } 209 210 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch); 211 if (Attr) { 212 switch (*Attr) { 213 default: 214 break; 215 case ARMBuildAttrs::Not_Allowed: 216 Features.AddFeature("vfp2sp", false); 217 Features.AddFeature("vfp3d16sp", false); 218 Features.AddFeature("vfp4d16sp", false); 219 break; 220 case ARMBuildAttrs::AllowFPv2: 221 Features.AddFeature("vfp2"); 222 break; 223 case ARMBuildAttrs::AllowFPv3A: 224 case ARMBuildAttrs::AllowFPv3B: 225 Features.AddFeature("vfp3"); 226 break; 227 case ARMBuildAttrs::AllowFPv4A: 228 case ARMBuildAttrs::AllowFPv4B: 229 Features.AddFeature("vfp4"); 230 break; 231 } 232 } 233 234 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch); 235 if (Attr) { 236 switch (*Attr) { 237 default: 238 break; 239 case ARMBuildAttrs::Not_Allowed: 240 Features.AddFeature("neon", false); 241 Features.AddFeature("fp16", false); 242 break; 243 case ARMBuildAttrs::AllowNeon: 244 Features.AddFeature("neon"); 245 break; 246 case ARMBuildAttrs::AllowNeon2: 247 Features.AddFeature("neon"); 248 Features.AddFeature("fp16"); 249 break; 250 } 251 } 252 253 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch); 254 if (Attr) { 255 switch (*Attr) { 256 default: 257 break; 258 case ARMBuildAttrs::Not_Allowed: 259 Features.AddFeature("mve", false); 260 Features.AddFeature("mve.fp", false); 261 break; 262 case ARMBuildAttrs::AllowMVEInteger: 263 Features.AddFeature("mve.fp", false); 264 Features.AddFeature("mve"); 265 break; 266 case ARMBuildAttrs::AllowMVEIntegerAndFloat: 267 Features.AddFeature("mve.fp"); 268 break; 269 } 270 } 271 272 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use); 273 if (Attr) { 274 switch (*Attr) { 275 default: 276 break; 277 case ARMBuildAttrs::DisallowDIV: 278 Features.AddFeature("hwdiv", false); 279 Features.AddFeature("hwdiv-arm", false); 280 break; 281 case ARMBuildAttrs::AllowDIVExt: 282 Features.AddFeature("hwdiv"); 283 Features.AddFeature("hwdiv-arm"); 284 break; 285 } 286 } 287 288 return Features; 289 } 290 291 static std::optional<std::string> hexagonAttrToFeatureString(unsigned Attr) { 292 switch (Attr) { 293 case 5: 294 return "v5"; 295 case 55: 296 return "v55"; 297 case 60: 298 return "v60"; 299 case 62: 300 return "v62"; 301 case 65: 302 return "v65"; 303 case 67: 304 return "v67"; 305 case 68: 306 return "v68"; 307 case 69: 308 return "v69"; 309 case 71: 310 return "v71"; 311 case 73: 312 return "v73"; 313 default: 314 return {}; 315 } 316 } 317 318 SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const { 319 SubtargetFeatures Features; 320 HexagonAttributeParser Parser; 321 if (Error E = getBuildAttributes(Parser)) { 322 // Return no attributes if none can be read. 323 // This behavior is important for backwards compatibility. 324 consumeError(std::move(E)); 325 return Features; 326 } 327 std::optional<unsigned> Attr; 328 329 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH))) { 330 if (std::optional<std::string> FeatureString = 331 hexagonAttrToFeatureString(*Attr)) 332 Features.AddFeature(*FeatureString); 333 } 334 335 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH))) { 336 std::optional<std::string> FeatureString = 337 hexagonAttrToFeatureString(*Attr); 338 // There is no corresponding hvx arch for v5 and v55. 339 if (FeatureString && *Attr >= 60) 340 Features.AddFeature("hvx" + *FeatureString); 341 } 342 343 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP))) 344 if (*Attr) 345 Features.AddFeature("hvx-ieee-fp"); 346 347 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT))) 348 if (*Attr) 349 Features.AddFeature("hvx-qfloat"); 350 351 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG))) 352 if (*Attr) 353 Features.AddFeature("zreg"); 354 355 if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO))) 356 if (*Attr) 357 Features.AddFeature("audio"); 358 359 if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC))) 360 if (*Attr) 361 Features.AddFeature("cabac"); 362 363 return Features; 364 } 365 366 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const { 367 SubtargetFeatures Features; 368 unsigned PlatformFlags = getPlatformFlags(); 369 370 if (PlatformFlags & ELF::EF_RISCV_RVC) { 371 Features.AddFeature("zca"); 372 } 373 374 RISCVAttributeParser Attributes; 375 if (Error E = getBuildAttributes(Attributes)) { 376 return std::move(E); 377 } 378 379 std::optional<StringRef> Attr = 380 Attributes.getAttributeString(RISCVAttrs::ARCH); 381 if (Attr) { 382 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr); 383 if (!ParseResult) 384 return ParseResult.takeError(); 385 auto &ISAInfo = *ParseResult; 386 387 if (ISAInfo->getXLen() == 32) 388 Features.AddFeature("64bit", false); 389 else if (ISAInfo->getXLen() == 64) 390 Features.AddFeature("64bit"); 391 else 392 llvm_unreachable("XLEN should be 32 or 64."); 393 394 Features.addFeaturesVector(ISAInfo->toFeatures()); 395 } 396 397 return Features; 398 } 399 400 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const { 401 SubtargetFeatures Features; 402 403 switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) { 404 case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT: 405 break; 406 case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT: 407 Features.AddFeature("d"); 408 // D implies F according to LoongArch ISA spec. 409 [[fallthrough]]; 410 case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT: 411 Features.AddFeature("f"); 412 break; 413 } 414 415 return Features; 416 } 417 418 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const { 419 switch (getEMachine()) { 420 case ELF::EM_MIPS: 421 return getMIPSFeatures(); 422 case ELF::EM_ARM: 423 return getARMFeatures(); 424 case ELF::EM_RISCV: 425 return getRISCVFeatures(); 426 case ELF::EM_LOONGARCH: 427 return getLoongArchFeatures(); 428 case ELF::EM_HEXAGON: 429 return getHexagonFeatures(); 430 default: 431 return SubtargetFeatures(); 432 } 433 } 434 435 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const { 436 switch (getEMachine()) { 437 case ELF::EM_AMDGPU: 438 return getAMDGPUCPUName(); 439 case ELF::EM_CUDA: 440 return getNVPTXCPUName(); 441 case ELF::EM_PPC: 442 case ELF::EM_PPC64: 443 return StringRef("future"); 444 case ELF::EM_BPF: 445 return StringRef("v4"); 446 default: 447 return std::nullopt; 448 } 449 } 450 451 StringRef ELFObjectFileBase::getAMDGPUCPUName() const { 452 assert(getEMachine() == ELF::EM_AMDGPU); 453 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH; 454 455 switch (CPU) { 456 // Radeon HD 2000/3000 Series (R600). 457 case ELF::EF_AMDGPU_MACH_R600_R600: 458 return "r600"; 459 case ELF::EF_AMDGPU_MACH_R600_R630: 460 return "r630"; 461 case ELF::EF_AMDGPU_MACH_R600_RS880: 462 return "rs880"; 463 case ELF::EF_AMDGPU_MACH_R600_RV670: 464 return "rv670"; 465 466 // Radeon HD 4000 Series (R700). 467 case ELF::EF_AMDGPU_MACH_R600_RV710: 468 return "rv710"; 469 case ELF::EF_AMDGPU_MACH_R600_RV730: 470 return "rv730"; 471 case ELF::EF_AMDGPU_MACH_R600_RV770: 472 return "rv770"; 473 474 // Radeon HD 5000 Series (Evergreen). 475 case ELF::EF_AMDGPU_MACH_R600_CEDAR: 476 return "cedar"; 477 case ELF::EF_AMDGPU_MACH_R600_CYPRESS: 478 return "cypress"; 479 case ELF::EF_AMDGPU_MACH_R600_JUNIPER: 480 return "juniper"; 481 case ELF::EF_AMDGPU_MACH_R600_REDWOOD: 482 return "redwood"; 483 case ELF::EF_AMDGPU_MACH_R600_SUMO: 484 return "sumo"; 485 486 // Radeon HD 6000 Series (Northern Islands). 487 case ELF::EF_AMDGPU_MACH_R600_BARTS: 488 return "barts"; 489 case ELF::EF_AMDGPU_MACH_R600_CAICOS: 490 return "caicos"; 491 case ELF::EF_AMDGPU_MACH_R600_CAYMAN: 492 return "cayman"; 493 case ELF::EF_AMDGPU_MACH_R600_TURKS: 494 return "turks"; 495 496 // AMDGCN GFX6. 497 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600: 498 return "gfx600"; 499 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601: 500 return "gfx601"; 501 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602: 502 return "gfx602"; 503 504 // AMDGCN GFX7. 505 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700: 506 return "gfx700"; 507 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701: 508 return "gfx701"; 509 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702: 510 return "gfx702"; 511 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703: 512 return "gfx703"; 513 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704: 514 return "gfx704"; 515 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705: 516 return "gfx705"; 517 518 // AMDGCN GFX8. 519 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: 520 return "gfx801"; 521 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: 522 return "gfx802"; 523 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: 524 return "gfx803"; 525 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805: 526 return "gfx805"; 527 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: 528 return "gfx810"; 529 530 // AMDGCN GFX9. 531 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: 532 return "gfx900"; 533 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: 534 return "gfx902"; 535 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: 536 return "gfx904"; 537 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: 538 return "gfx906"; 539 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908: 540 return "gfx908"; 541 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: 542 return "gfx909"; 543 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A: 544 return "gfx90a"; 545 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C: 546 return "gfx90c"; 547 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940: 548 return "gfx940"; 549 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941: 550 return "gfx941"; 551 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942: 552 return "gfx942"; 553 554 // AMDGCN GFX10. 555 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: 556 return "gfx1010"; 557 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: 558 return "gfx1011"; 559 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: 560 return "gfx1012"; 561 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013: 562 return "gfx1013"; 563 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: 564 return "gfx1030"; 565 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: 566 return "gfx1031"; 567 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: 568 return "gfx1032"; 569 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: 570 return "gfx1033"; 571 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034: 572 return "gfx1034"; 573 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035: 574 return "gfx1035"; 575 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036: 576 return "gfx1036"; 577 578 // AMDGCN GFX11. 579 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100: 580 return "gfx1100"; 581 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101: 582 return "gfx1101"; 583 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102: 584 return "gfx1102"; 585 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: 586 return "gfx1103"; 587 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: 588 return "gfx1150"; 589 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: 590 return "gfx1151"; 591 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: 592 return "gfx1152"; 593 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153: 594 return "gfx1153"; 595 596 // AMDGCN GFX12. 597 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: 598 return "gfx1200"; 599 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: 600 return "gfx1201"; 601 602 // Generic AMDGCN targets 603 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC: 604 return "gfx9-generic"; 605 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC: 606 return "gfx10-1-generic"; 607 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: 608 return "gfx10-3-generic"; 609 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC: 610 return "gfx11-generic"; 611 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC: 612 return "gfx12-generic"; 613 default: 614 llvm_unreachable("Unknown EF_AMDGPU_MACH value"); 615 } 616 } 617 618 StringRef ELFObjectFileBase::getNVPTXCPUName() const { 619 assert(getEMachine() == ELF::EM_CUDA); 620 unsigned SM = getPlatformFlags() & ELF::EF_CUDA_SM; 621 622 switch (SM) { 623 // Fermi architecture. 624 case ELF::EF_CUDA_SM20: 625 return "sm_20"; 626 case ELF::EF_CUDA_SM21: 627 return "sm_21"; 628 629 // Kepler architecture. 630 case ELF::EF_CUDA_SM30: 631 return "sm_30"; 632 case ELF::EF_CUDA_SM32: 633 return "sm_32"; 634 case ELF::EF_CUDA_SM35: 635 return "sm_35"; 636 case ELF::EF_CUDA_SM37: 637 return "sm_37"; 638 639 // Maxwell architecture. 640 case ELF::EF_CUDA_SM50: 641 return "sm_50"; 642 case ELF::EF_CUDA_SM52: 643 return "sm_52"; 644 case ELF::EF_CUDA_SM53: 645 return "sm_53"; 646 647 // Pascal architecture. 648 case ELF::EF_CUDA_SM60: 649 return "sm_60"; 650 case ELF::EF_CUDA_SM61: 651 return "sm_61"; 652 case ELF::EF_CUDA_SM62: 653 return "sm_62"; 654 655 // Volta architecture. 656 case ELF::EF_CUDA_SM70: 657 return "sm_70"; 658 case ELF::EF_CUDA_SM72: 659 return "sm_72"; 660 661 // Turing architecture. 662 case ELF::EF_CUDA_SM75: 663 return "sm_75"; 664 665 // Ampere architecture. 666 case ELF::EF_CUDA_SM80: 667 return "sm_80"; 668 case ELF::EF_CUDA_SM86: 669 return "sm_86"; 670 case ELF::EF_CUDA_SM87: 671 return "sm_87"; 672 673 // Ada architecture. 674 case ELF::EF_CUDA_SM89: 675 return "sm_89"; 676 677 // Hopper architecture. 678 case ELF::EF_CUDA_SM90: 679 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_90a" : "sm_90"; 680 default: 681 llvm_unreachable("Unknown EF_CUDA_SM value"); 682 } 683 } 684 685 // FIXME Encode from a tablegen description or target parser. 686 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const { 687 if (TheTriple.getSubArch() != Triple::NoSubArch) 688 return; 689 690 ARMAttributeParser Attributes; 691 if (Error E = getBuildAttributes(Attributes)) { 692 // TODO Propagate Error. 693 consumeError(std::move(E)); 694 return; 695 } 696 697 std::string Triple; 698 // Default to ARM, but use the triple if it's been set. 699 if (TheTriple.isThumb()) 700 Triple = "thumb"; 701 else 702 Triple = "arm"; 703 704 std::optional<unsigned> Attr = 705 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 706 if (Attr) { 707 switch (*Attr) { 708 case ARMBuildAttrs::v4: 709 Triple += "v4"; 710 break; 711 case ARMBuildAttrs::v4T: 712 Triple += "v4t"; 713 break; 714 case ARMBuildAttrs::v5T: 715 Triple += "v5t"; 716 break; 717 case ARMBuildAttrs::v5TE: 718 Triple += "v5te"; 719 break; 720 case ARMBuildAttrs::v5TEJ: 721 Triple += "v5tej"; 722 break; 723 case ARMBuildAttrs::v6: 724 Triple += "v6"; 725 break; 726 case ARMBuildAttrs::v6KZ: 727 Triple += "v6kz"; 728 break; 729 case ARMBuildAttrs::v6T2: 730 Triple += "v6t2"; 731 break; 732 case ARMBuildAttrs::v6K: 733 Triple += "v6k"; 734 break; 735 case ARMBuildAttrs::v7: { 736 std::optional<unsigned> ArchProfileAttr = 737 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 738 if (ArchProfileAttr && 739 *ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile) 740 Triple += "v7m"; 741 else 742 Triple += "v7"; 743 break; 744 } 745 case ARMBuildAttrs::v6_M: 746 Triple += "v6m"; 747 break; 748 case ARMBuildAttrs::v6S_M: 749 Triple += "v6sm"; 750 break; 751 case ARMBuildAttrs::v7E_M: 752 Triple += "v7em"; 753 break; 754 case ARMBuildAttrs::v8_A: 755 Triple += "v8a"; 756 break; 757 case ARMBuildAttrs::v8_R: 758 Triple += "v8r"; 759 break; 760 case ARMBuildAttrs::v8_M_Base: 761 Triple += "v8m.base"; 762 break; 763 case ARMBuildAttrs::v8_M_Main: 764 Triple += "v8m.main"; 765 break; 766 case ARMBuildAttrs::v8_1_M_Main: 767 Triple += "v8.1m.main"; 768 break; 769 case ARMBuildAttrs::v9_A: 770 Triple += "v9a"; 771 break; 772 } 773 } 774 if (!isLittleEndian()) 775 Triple += "eb"; 776 777 TheTriple.setArchName(Triple); 778 } 779 780 std::vector<ELFPltEntry> ELFObjectFileBase::getPltEntries() const { 781 std::string Err; 782 const auto Triple = makeTriple(); 783 const auto *T = TargetRegistry::lookupTarget(Triple.str(), Err); 784 if (!T) 785 return {}; 786 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0; 787 switch (Triple.getArch()) { 788 case Triple::x86: 789 JumpSlotReloc = ELF::R_386_JUMP_SLOT; 790 GlobDatReloc = ELF::R_386_GLOB_DAT; 791 break; 792 case Triple::x86_64: 793 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT; 794 GlobDatReloc = ELF::R_X86_64_GLOB_DAT; 795 break; 796 case Triple::aarch64: 797 case Triple::aarch64_be: 798 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT; 799 break; 800 default: 801 return {}; 802 } 803 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo()); 804 std::unique_ptr<const MCInstrAnalysis> MIA( 805 T->createMCInstrAnalysis(MII.get())); 806 if (!MIA) 807 return {}; 808 std::vector<std::pair<uint64_t, uint64_t>> PltEntries; 809 std::optional<SectionRef> RelaPlt, RelaDyn; 810 uint64_t GotBaseVA = 0; 811 for (const SectionRef &Section : sections()) { 812 Expected<StringRef> NameOrErr = Section.getName(); 813 if (!NameOrErr) { 814 consumeError(NameOrErr.takeError()); 815 continue; 816 } 817 StringRef Name = *NameOrErr; 818 819 if (Name == ".rela.plt" || Name == ".rel.plt") { 820 RelaPlt = Section; 821 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") { 822 RelaDyn = Section; 823 } else if (Name == ".got.plt") { 824 GotBaseVA = Section.getAddress(); 825 } else if (Name == ".plt" || Name == ".plt.got") { 826 Expected<StringRef> PltContents = Section.getContents(); 827 if (!PltContents) { 828 consumeError(PltContents.takeError()); 829 return {}; 830 } 831 llvm::append_range( 832 PltEntries, 833 MIA->findPltEntries(Section.getAddress(), 834 arrayRefFromStringRef(*PltContents), Triple)); 835 } 836 } 837 838 // Build a map from GOT entry virtual address to PLT entry virtual address. 839 DenseMap<uint64_t, uint64_t> GotToPlt; 840 for (auto [Plt, GotPlt] : PltEntries) { 841 uint64_t GotPltEntry = GotPlt; 842 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add 843 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address. 844 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit. 845 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386) 846 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA; 847 GotToPlt.insert(std::make_pair(GotPltEntry, Plt)); 848 } 849 850 // Find the relocations in the dynamic relocation table that point to 851 // locations in the GOT for which we know the corresponding PLT entry. 852 std::vector<ELFPltEntry> Result; 853 auto handleRels = [&](iterator_range<relocation_iterator> Rels, 854 uint32_t RelType, StringRef PltSec) { 855 for (const auto &R : Rels) { 856 if (R.getType() != RelType) 857 continue; 858 auto PltEntryIter = GotToPlt.find(R.getOffset()); 859 if (PltEntryIter != GotToPlt.end()) { 860 symbol_iterator Sym = R.getSymbol(); 861 if (Sym == symbol_end()) 862 Result.push_back( 863 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second}); 864 else 865 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(), 866 PltEntryIter->second}); 867 } 868 } 869 }; 870 871 if (RelaPlt) 872 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt"); 873 874 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's 875 // x86 port places the PLT entry in the .plt.got section. 876 if (RelaDyn) 877 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got"); 878 879 return Result; 880 } 881 882 template <class ELFT> 883 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl( 884 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex, 885 std::vector<PGOAnalysisMap> *PGOAnalyses) { 886 using Elf_Shdr = typename ELFT::Shdr; 887 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL; 888 std::vector<BBAddrMap> BBAddrMaps; 889 if (PGOAnalyses) 890 PGOAnalyses->clear(); 891 892 const auto &Sections = cantFail(EF.sections()); 893 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> { 894 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP && 895 Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0) 896 return false; 897 if (!TextSectionIndex) 898 return true; 899 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link); 900 if (!TextSecOrErr) 901 return createError("unable to get the linked-to section for " + 902 describe(EF, Sec) + ": " + 903 toString(TextSecOrErr.takeError())); 904 assert(*TextSecOrErr >= Sections.begin() && 905 "Text section pointer outside of bounds"); 906 if (*TextSectionIndex != 907 (unsigned)std::distance(Sections.begin(), *TextSecOrErr)) 908 return false; 909 return true; 910 }; 911 912 Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr = 913 EF.getSectionAndRelocations(IsMatch); 914 if (!SectionRelocMapOrErr) 915 return SectionRelocMapOrErr.takeError(); 916 917 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) { 918 if (IsRelocatable && !RelocSec) 919 return createError("unable to get relocation section for " + 920 describe(EF, *Sec)); 921 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr = 922 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses); 923 if (!BBAddrMapOrErr) { 924 if (PGOAnalyses) 925 PGOAnalyses->clear(); 926 return createError("unable to read " + describe(EF, *Sec) + ": " + 927 toString(BBAddrMapOrErr.takeError())); 928 } 929 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(), 930 std::back_inserter(BBAddrMaps)); 931 } 932 if (PGOAnalyses) 933 assert(PGOAnalyses->size() == BBAddrMaps.size() && 934 "The same number of BBAddrMaps and PGOAnalysisMaps should be " 935 "returned when PGO information is requested"); 936 return BBAddrMaps; 937 } 938 939 template <class ELFT> 940 static Expected<std::vector<VersionEntry>> 941 readDynsymVersionsImpl(const ELFFile<ELFT> &EF, 942 ELFObjectFileBase::elf_symbol_iterator_range Symbols) { 943 using Elf_Shdr = typename ELFT::Shdr; 944 const Elf_Shdr *VerSec = nullptr; 945 const Elf_Shdr *VerNeedSec = nullptr; 946 const Elf_Shdr *VerDefSec = nullptr; 947 // The user should ensure sections() can't fail here. 948 for (const Elf_Shdr &Sec : cantFail(EF.sections())) { 949 if (Sec.sh_type == ELF::SHT_GNU_versym) 950 VerSec = &Sec; 951 else if (Sec.sh_type == ELF::SHT_GNU_verdef) 952 VerDefSec = &Sec; 953 else if (Sec.sh_type == ELF::SHT_GNU_verneed) 954 VerNeedSec = &Sec; 955 } 956 if (!VerSec) 957 return std::vector<VersionEntry>(); 958 959 Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr = 960 EF.loadVersionMap(VerNeedSec, VerDefSec); 961 if (!MapOrErr) 962 return MapOrErr.takeError(); 963 964 std::vector<VersionEntry> Ret; 965 size_t I = 0; 966 for (const ELFSymbolRef &Sym : Symbols) { 967 ++I; 968 Expected<const typename ELFT::Versym *> VerEntryOrErr = 969 EF.template getEntry<typename ELFT::Versym>(*VerSec, I); 970 if (!VerEntryOrErr) 971 return createError("unable to read an entry with index " + Twine(I) + 972 " from " + describe(EF, *VerSec) + ": " + 973 toString(VerEntryOrErr.takeError())); 974 975 Expected<uint32_t> FlagsOrErr = Sym.getFlags(); 976 if (!FlagsOrErr) 977 return createError("unable to read flags for symbol with index " + 978 Twine(I) + ": " + toString(FlagsOrErr.takeError())); 979 980 bool IsDefault; 981 Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex( 982 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr, 983 (*FlagsOrErr) & SymbolRef::SF_Undefined); 984 if (!VerOrErr) 985 return createError("unable to get a version for entry " + Twine(I) + 986 " of " + describe(EF, *VerSec) + ": " + 987 toString(VerOrErr.takeError())); 988 989 Ret.push_back({(*VerOrErr).str(), IsDefault}); 990 } 991 992 return Ret; 993 } 994 995 Expected<std::vector<VersionEntry>> 996 ELFObjectFileBase::readDynsymVersions() const { 997 elf_symbol_iterator_range Symbols = getDynamicSymbolIterators(); 998 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 999 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1000 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1001 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1002 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1003 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1004 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1005 Symbols); 1006 } 1007 1008 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap( 1009 std::optional<unsigned> TextSectionIndex, 1010 std::vector<PGOAnalysisMap> *PGOAnalyses) const { 1011 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1012 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1013 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1014 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1015 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1016 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1017 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1018 TextSectionIndex, PGOAnalyses); 1019 } 1020 1021 StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const { 1022 auto Data = Sec.getRawDataRefImpl(); 1023 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1024 return Obj->getCrelDecodeProblem(Data); 1025 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1026 return Obj->getCrelDecodeProblem(Data); 1027 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1028 return Obj->getCrelDecodeProblem(Data); 1029 return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data); 1030 } 1031