1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass is responsible for finalizing the functions frame layout, saving 11 // callee saved registers, and for emitting prolog & epilog code for the 12 // function. 13 // 14 // This pass must be run after register allocation. After this pass is 15 // executed, it is illegal to construct MO_FrameIndex operands. 16 // 17 // This pass provides an optional shrink wrapping variant of prolog/epilog 18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp. 19 // 20 //===----------------------------------------------------------------------===// 21 22 #define DEBUG_TYPE "pei" 23 #include "PrologEpilogInserter.h" 24 #include "llvm/CodeGen/MachineDominators.h" 25 #include "llvm/CodeGen/MachineLoopInfo.h" 26 #include "llvm/CodeGen/MachineInstr.h" 27 #include "llvm/CodeGen/MachineFrameInfo.h" 28 #include "llvm/CodeGen/MachineRegisterInfo.h" 29 #include "llvm/CodeGen/RegisterScavenging.h" 30 #include "llvm/Target/TargetMachine.h" 31 #include "llvm/Target/TargetRegisterInfo.h" 32 #include "llvm/Target/TargetFrameInfo.h" 33 #include "llvm/Target/TargetInstrInfo.h" 34 #include "llvm/Support/CommandLine.h" 35 #include "llvm/Support/Compiler.h" 36 #include "llvm/Support/Debug.h" 37 #include "llvm/ADT/IndexedMap.h" 38 #include "llvm/ADT/SmallSet.h" 39 #include "llvm/ADT/Statistic.h" 40 #include "llvm/ADT/STLExtras.h" 41 #include <climits> 42 43 using namespace llvm; 44 45 char PEI::ID = 0; 46 47 INITIALIZE_PASS(PEI, "prologepilog", 48 "Prologue/Epilogue Insertion", false, false) 49 50 STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered"); 51 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged"); 52 53 /// createPrologEpilogCodeInserter - This function returns a pass that inserts 54 /// prolog and epilog code, and eliminates abstract frame references. 55 /// 56 FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); } 57 58 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract 59 /// frame indexes with appropriate references. 60 /// 61 bool PEI::runOnMachineFunction(MachineFunction &Fn) { 62 const Function* F = Fn.getFunction(); 63 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); 64 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL; 65 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn); 66 67 // Calculate the MaxCallFrameSize and AdjustsStack variables for the 68 // function's frame information. Also eliminates call frame pseudo 69 // instructions. 70 calculateCallsInformation(Fn); 71 72 // Allow the target machine to make some adjustments to the function 73 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters. 74 TRI->processFunctionBeforeCalleeSavedScan(Fn, RS); 75 76 // Scan the function for modified callee saved registers and insert spill code 77 // for any callee saved registers that are modified. 78 calculateCalleeSavedRegisters(Fn); 79 80 // Determine placement of CSR spill/restore code: 81 // - With shrink wrapping, place spills and restores to tightly 82 // enclose regions in the Machine CFG of the function where 83 // they are used. 84 // - Without shink wrapping (default), place all spills in the 85 // entry block, all restores in return blocks. 86 placeCSRSpillsAndRestores(Fn); 87 88 // Add the code to save and restore the callee saved registers 89 if (!F->hasFnAttr(Attribute::Naked)) 90 insertCSRSpillsAndRestores(Fn); 91 92 // Allow the target machine to make final modifications to the function 93 // before the frame layout is finalized. 94 TRI->processFunctionBeforeFrameFinalized(Fn); 95 96 // Calculate actual frame offsets for all abstract stack objects... 97 calculateFrameObjectOffsets(Fn); 98 99 // Add prolog and epilog code to the function. This function is required 100 // to align the stack frame as necessary for any stack variables or 101 // called functions. Because of this, calculateCalleeSavedRegisters() 102 // must be called before this function in order to set the AdjustsStack 103 // and MaxCallFrameSize variables. 104 if (!F->hasFnAttr(Attribute::Naked)) 105 insertPrologEpilogCode(Fn); 106 107 // Replace all MO_FrameIndex operands with physical register references 108 // and actual offsets. 109 // 110 replaceFrameIndices(Fn); 111 112 // If register scavenging is needed, as we've enabled doing it as a 113 // post-pass, scavenge the virtual registers that frame index elimiation 114 // inserted. 115 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging) 116 scavengeFrameVirtualRegs(Fn); 117 118 delete RS; 119 clearAllSets(); 120 return true; 121 } 122 123 #if 0 124 void PEI::getAnalysisUsage(AnalysisUsage &AU) const { 125 AU.setPreservesCFG(); 126 if (ShrinkWrapping || ShrinkWrapFunc != "") { 127 AU.addRequired<MachineLoopInfo>(); 128 AU.addRequired<MachineDominatorTree>(); 129 } 130 AU.addPreserved<MachineLoopInfo>(); 131 AU.addPreserved<MachineDominatorTree>(); 132 MachineFunctionPass::getAnalysisUsage(AU); 133 } 134 #endif 135 136 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack 137 /// variables for the function's frame information and eliminate call frame 138 /// pseudo instructions. 139 void PEI::calculateCallsInformation(MachineFunction &Fn) { 140 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); 141 MachineFrameInfo *MFI = Fn.getFrameInfo(); 142 143 unsigned MaxCallFrameSize = 0; 144 bool AdjustsStack = MFI->adjustsStack(); 145 146 // Get the function call frame set-up and tear-down instruction opcode 147 int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode(); 148 int FrameDestroyOpcode = RegInfo->getCallFrameDestroyOpcode(); 149 150 // Early exit for targets which have no call frame setup/destroy pseudo 151 // instructions. 152 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1) 153 return; 154 155 std::vector<MachineBasicBlock::iterator> FrameSDOps; 156 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) 157 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I) 158 if (I->getOpcode() == FrameSetupOpcode || 159 I->getOpcode() == FrameDestroyOpcode) { 160 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo" 161 " instructions should have a single immediate argument!"); 162 unsigned Size = I->getOperand(0).getImm(); 163 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size; 164 AdjustsStack = true; 165 FrameSDOps.push_back(I); 166 } else if (I->isInlineAsm()) { 167 // Some inline asm's need a stack frame, as indicated by operand 1. 168 if (I->getOperand(1).getImm()) 169 AdjustsStack = true; 170 } 171 172 MFI->setAdjustsStack(AdjustsStack); 173 MFI->setMaxCallFrameSize(MaxCallFrameSize); 174 175 for (std::vector<MachineBasicBlock::iterator>::iterator 176 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) { 177 MachineBasicBlock::iterator I = *i; 178 179 // If call frames are not being included as part of the stack frame, and 180 // the target doesn't indicate otherwise, remove the call frame pseudos 181 // here. The sub/add sp instruction pairs are still inserted, but we don't 182 // need to track the SP adjustment for frame index elimination. 183 if (RegInfo->canSimplifyCallFramePseudos(Fn)) 184 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I); 185 } 186 } 187 188 189 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved 190 /// registers. 191 void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) { 192 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); 193 const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo(); 194 MachineFrameInfo *MFI = Fn.getFrameInfo(); 195 196 // Get the callee saved register list... 197 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn); 198 199 // These are used to keep track the callee-save area. Initialize them. 200 MinCSFrameIndex = INT_MAX; 201 MaxCSFrameIndex = 0; 202 203 // Early exit for targets which have no callee saved registers. 204 if (CSRegs == 0 || CSRegs[0] == 0) 205 return; 206 207 // In Naked functions we aren't going to save any registers. 208 if (Fn.getFunction()->hasFnAttr(Attribute::Naked)) 209 return; 210 211 std::vector<CalleeSavedInfo> CSI; 212 for (unsigned i = 0; CSRegs[i]; ++i) { 213 unsigned Reg = CSRegs[i]; 214 if (Fn.getRegInfo().isPhysRegUsed(Reg)) { 215 // If the reg is modified, save it! 216 CSI.push_back(CalleeSavedInfo(Reg)); 217 } else { 218 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); 219 *AliasSet; ++AliasSet) { // Check alias registers too. 220 if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) { 221 CSI.push_back(CalleeSavedInfo(Reg)); 222 break; 223 } 224 } 225 } 226 } 227 228 if (CSI.empty()) 229 return; // Early exit if no callee saved registers are modified! 230 231 unsigned NumFixedSpillSlots; 232 const TargetFrameInfo::SpillSlot *FixedSpillSlots = 233 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots); 234 235 // Now that we know which registers need to be saved and restored, allocate 236 // stack slots for them. 237 for (std::vector<CalleeSavedInfo>::iterator 238 I = CSI.begin(), E = CSI.end(); I != E; ++I) { 239 unsigned Reg = I->getReg(); 240 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg); 241 242 int FrameIdx; 243 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) { 244 I->setFrameIdx(FrameIdx); 245 continue; 246 } 247 248 // Check to see if this physreg must be spilled to a particular stack slot 249 // on this target. 250 const TargetFrameInfo::SpillSlot *FixedSlot = FixedSpillSlots; 251 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots && 252 FixedSlot->Reg != Reg) 253 ++FixedSlot; 254 255 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) { 256 // Nope, just spill it anywhere convenient. 257 unsigned Align = RC->getAlignment(); 258 unsigned StackAlign = TFI->getStackAlignment(); 259 260 // We may not be able to satisfy the desired alignment specification of 261 // the TargetRegisterClass if the stack alignment is smaller. Use the 262 // min. 263 Align = std::min(Align, StackAlign); 264 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true); 265 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx; 266 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx; 267 } else { 268 // Spill it to the stack where we must. 269 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true); 270 } 271 272 I->setFrameIdx(FrameIdx); 273 } 274 275 MFI->setCalleeSavedInfo(CSI); 276 } 277 278 /// insertCSRSpillsAndRestores - Insert spill and restore code for 279 /// callee saved registers used in the function, handling shrink wrapping. 280 /// 281 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) { 282 // Get callee saved register information. 283 MachineFrameInfo *MFI = Fn.getFrameInfo(); 284 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo(); 285 286 MFI->setCalleeSavedInfoValid(true); 287 288 // Early exit if no callee saved registers are modified! 289 if (CSI.empty()) 290 return; 291 292 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo(); 293 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); 294 MachineBasicBlock::iterator I; 295 296 if (! ShrinkWrapThisFunction) { 297 // Spill using target interface. 298 I = EntryBlock->begin(); 299 if (!TII.spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) { 300 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 301 // Add the callee-saved register as live-in. 302 // It's killed at the spill. 303 EntryBlock->addLiveIn(CSI[i].getReg()); 304 305 // Insert the spill to the stack frame. 306 unsigned Reg = CSI[i].getReg(); 307 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 308 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true, 309 CSI[i].getFrameIdx(), RC, TRI); 310 } 311 } 312 313 // Restore using target interface. 314 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) { 315 MachineBasicBlock* MBB = ReturnBlocks[ri]; 316 I = MBB->end(); --I; 317 318 // Skip over all terminator instructions, which are part of the return 319 // sequence. 320 MachineBasicBlock::iterator I2 = I; 321 while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator()) 322 I = I2; 323 324 bool AtStart = I == MBB->begin(); 325 MachineBasicBlock::iterator BeforeI = I; 326 if (!AtStart) 327 --BeforeI; 328 329 // Restore all registers immediately before the return and any 330 // terminators that preceed it. 331 if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) { 332 for (unsigned i = 0, e = CSI.size(); i != e; ++i) { 333 unsigned Reg = CSI[i].getReg(); 334 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 335 TII.loadRegFromStackSlot(*MBB, I, Reg, 336 CSI[i].getFrameIdx(), 337 RC, TRI); 338 assert(I != MBB->begin() && 339 "loadRegFromStackSlot didn't insert any code!"); 340 // Insert in reverse order. loadRegFromStackSlot can insert 341 // multiple instructions. 342 if (AtStart) 343 I = MBB->begin(); 344 else { 345 I = BeforeI; 346 ++I; 347 } 348 } 349 } 350 } 351 return; 352 } 353 354 // Insert spills. 355 std::vector<CalleeSavedInfo> blockCSI; 356 for (CSRegBlockMap::iterator BI = CSRSave.begin(), 357 BE = CSRSave.end(); BI != BE; ++BI) { 358 MachineBasicBlock* MBB = BI->first; 359 CSRegSet save = BI->second; 360 361 if (save.empty()) 362 continue; 363 364 blockCSI.clear(); 365 for (CSRegSet::iterator RI = save.begin(), 366 RE = save.end(); RI != RE; ++RI) { 367 blockCSI.push_back(CSI[*RI]); 368 } 369 assert(blockCSI.size() > 0 && 370 "Could not collect callee saved register info"); 371 372 I = MBB->begin(); 373 374 // When shrink wrapping, use stack slot stores/loads. 375 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) { 376 // Add the callee-saved register as live-in. 377 // It's killed at the spill. 378 MBB->addLiveIn(blockCSI[i].getReg()); 379 380 // Insert the spill to the stack frame. 381 unsigned Reg = blockCSI[i].getReg(); 382 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 383 TII.storeRegToStackSlot(*MBB, I, Reg, 384 true, 385 blockCSI[i].getFrameIdx(), 386 RC, TRI); 387 } 388 } 389 390 for (CSRegBlockMap::iterator BI = CSRRestore.begin(), 391 BE = CSRRestore.end(); BI != BE; ++BI) { 392 MachineBasicBlock* MBB = BI->first; 393 CSRegSet restore = BI->second; 394 395 if (restore.empty()) 396 continue; 397 398 blockCSI.clear(); 399 for (CSRegSet::iterator RI = restore.begin(), 400 RE = restore.end(); RI != RE; ++RI) { 401 blockCSI.push_back(CSI[*RI]); 402 } 403 assert(blockCSI.size() > 0 && 404 "Could not find callee saved register info"); 405 406 // If MBB is empty and needs restores, insert at the _beginning_. 407 if (MBB->empty()) { 408 I = MBB->begin(); 409 } else { 410 I = MBB->end(); 411 --I; 412 413 // Skip over all terminator instructions, which are part of the 414 // return sequence. 415 if (! I->getDesc().isTerminator()) { 416 ++I; 417 } else { 418 MachineBasicBlock::iterator I2 = I; 419 while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator()) 420 I = I2; 421 } 422 } 423 424 bool AtStart = I == MBB->begin(); 425 MachineBasicBlock::iterator BeforeI = I; 426 if (!AtStart) 427 --BeforeI; 428 429 // Restore all registers immediately before the return and any 430 // terminators that preceed it. 431 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) { 432 unsigned Reg = blockCSI[i].getReg(); 433 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); 434 TII.loadRegFromStackSlot(*MBB, I, Reg, 435 blockCSI[i].getFrameIdx(), 436 RC, TRI); 437 assert(I != MBB->begin() && 438 "loadRegFromStackSlot didn't insert any code!"); 439 // Insert in reverse order. loadRegFromStackSlot can insert 440 // multiple instructions. 441 if (AtStart) 442 I = MBB->begin(); 443 else { 444 I = BeforeI; 445 ++I; 446 } 447 } 448 } 449 } 450 451 /// AdjustStackOffset - Helper function used to adjust the stack frame offset. 452 static inline void 453 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx, 454 bool StackGrowsDown, int64_t &Offset, 455 unsigned &MaxAlign) { 456 // If the stack grows down, add the object size to find the lowest address. 457 if (StackGrowsDown) 458 Offset += MFI->getObjectSize(FrameIdx); 459 460 unsigned Align = MFI->getObjectAlignment(FrameIdx); 461 462 // If the alignment of this object is greater than that of the stack, then 463 // increase the stack alignment to match. 464 MaxAlign = std::max(MaxAlign, Align); 465 466 // Adjust to alignment boundary. 467 Offset = (Offset + Align - 1) / Align * Align; 468 469 if (StackGrowsDown) { 470 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n"); 471 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset 472 } else { 473 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n"); 474 MFI->setObjectOffset(FrameIdx, Offset); 475 Offset += MFI->getObjectSize(FrameIdx); 476 } 477 } 478 479 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the 480 /// abstract stack objects. 481 /// 482 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { 483 const TargetFrameInfo &TFI = *Fn.getTarget().getFrameInfo(); 484 485 bool StackGrowsDown = 486 TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown; 487 488 // Loop over all of the stack objects, assigning sequential addresses... 489 MachineFrameInfo *MFI = Fn.getFrameInfo(); 490 491 // Start at the beginning of the local area. 492 // The Offset is the distance from the stack top in the direction 493 // of stack growth -- so it's always nonnegative. 494 int LocalAreaOffset = TFI.getOffsetOfLocalArea(); 495 if (StackGrowsDown) 496 LocalAreaOffset = -LocalAreaOffset; 497 assert(LocalAreaOffset >= 0 498 && "Local area offset should be in direction of stack growth"); 499 int64_t Offset = LocalAreaOffset; 500 501 // If there are fixed sized objects that are preallocated in the local area, 502 // non-fixed objects can't be allocated right at the start of local area. 503 // We currently don't support filling in holes in between fixed sized 504 // objects, so we adjust 'Offset' to point to the end of last fixed sized 505 // preallocated object. 506 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) { 507 int64_t FixedOff; 508 if (StackGrowsDown) { 509 // The maximum distance from the stack pointer is at lower address of 510 // the object -- which is given by offset. For down growing stack 511 // the offset is negative, so we negate the offset to get the distance. 512 FixedOff = -MFI->getObjectOffset(i); 513 } else { 514 // The maximum distance from the start pointer is at the upper 515 // address of the object. 516 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i); 517 } 518 if (FixedOff > Offset) Offset = FixedOff; 519 } 520 521 // First assign frame offsets to stack objects that are used to spill 522 // callee saved registers. 523 if (StackGrowsDown) { 524 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) { 525 // If the stack grows down, we need to add the size to find the lowest 526 // address of the object. 527 Offset += MFI->getObjectSize(i); 528 529 unsigned Align = MFI->getObjectAlignment(i); 530 // Adjust to alignment boundary 531 Offset = (Offset+Align-1)/Align*Align; 532 533 MFI->setObjectOffset(i, -Offset); // Set the computed offset 534 } 535 } else { 536 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex; 537 for (int i = MaxCSFI; i >= MinCSFI ; --i) { 538 unsigned Align = MFI->getObjectAlignment(i); 539 // Adjust to alignment boundary 540 Offset = (Offset+Align-1)/Align*Align; 541 542 MFI->setObjectOffset(i, Offset); 543 Offset += MFI->getObjectSize(i); 544 } 545 } 546 547 unsigned MaxAlign = MFI->getMaxAlignment(); 548 549 // Make sure the special register scavenging spill slot is closest to the 550 // frame pointer if a frame pointer is required. 551 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); 552 if (RS && RegInfo->hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) { 553 int SFI = RS->getScavengingFrameIndex(); 554 if (SFI >= 0) 555 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign); 556 } 557 558 // FIXME: Once this is working, then enable flag will change to a target 559 // check for whether the frame is large enough to want to use virtual 560 // frame index registers. Functions which don't want/need this optimization 561 // will continue to use the existing code path. 562 if (MFI->getUseLocalStackAllocationBlock()) { 563 unsigned Align = MFI->getLocalFrameMaxAlign(); 564 565 // Adjust to alignment boundary. 566 Offset = (Offset + Align - 1) / Align * Align; 567 568 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n"); 569 570 // Resolve offsets for objects in the local block. 571 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) { 572 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i); 573 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second; 574 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" << 575 FIOffset << "]\n"); 576 MFI->setObjectOffset(Entry.first, FIOffset); 577 } 578 // Allocate the local block 579 Offset += MFI->getLocalFrameSize(); 580 581 MaxAlign = std::max(Align, MaxAlign); 582 } 583 584 // Make sure that the stack protector comes before the local variables on the 585 // stack. 586 SmallSet<int, 16> LargeStackObjs; 587 if (MFI->getStackProtectorIndex() >= 0) { 588 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown, 589 Offset, MaxAlign); 590 591 // Assign large stack objects first. 592 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) { 593 if (MFI->isObjectPreAllocated(i) && 594 MFI->getUseLocalStackAllocationBlock()) 595 continue; 596 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex) 597 continue; 598 if (RS && (int)i == RS->getScavengingFrameIndex()) 599 continue; 600 if (MFI->isDeadObjectIndex(i)) 601 continue; 602 if (MFI->getStackProtectorIndex() == (int)i) 603 continue; 604 if (!MFI->MayNeedStackProtector(i)) 605 continue; 606 607 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign); 608 LargeStackObjs.insert(i); 609 } 610 } 611 612 // Then assign frame offsets to stack objects that are not used to spill 613 // callee saved registers. 614 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) { 615 if (MFI->isObjectPreAllocated(i) && 616 MFI->getUseLocalStackAllocationBlock()) 617 continue; 618 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex) 619 continue; 620 if (RS && (int)i == RS->getScavengingFrameIndex()) 621 continue; 622 if (MFI->isDeadObjectIndex(i)) 623 continue; 624 if (MFI->getStackProtectorIndex() == (int)i) 625 continue; 626 if (LargeStackObjs.count(i)) 627 continue; 628 629 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign); 630 } 631 632 // Make sure the special register scavenging spill slot is closest to the 633 // stack pointer. 634 if (RS && (!RegInfo->hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) { 635 int SFI = RS->getScavengingFrameIndex(); 636 if (SFI >= 0) 637 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign); 638 } 639 640 if (!RegInfo->targetHandlesStackFrameRounding()) { 641 // If we have reserved argument space for call sites in the function 642 // immediately on entry to the current function, count it as part of the 643 // overall stack size. 644 if (MFI->adjustsStack() && RegInfo->hasReservedCallFrame(Fn)) 645 Offset += MFI->getMaxCallFrameSize(); 646 647 // Round up the size to a multiple of the alignment. If the function has 648 // any calls or alloca's, align to the target's StackAlignment value to 649 // ensure that the callee's frame or the alloca data is suitably aligned; 650 // otherwise, for leaf functions, align to the TransientStackAlignment 651 // value. 652 unsigned StackAlign; 653 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() || 654 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0)) 655 StackAlign = TFI.getStackAlignment(); 656 else 657 StackAlign = TFI.getTransientStackAlignment(); 658 659 // If the frame pointer is eliminated, all frame offsets will be relative to 660 // SP not FP. Align to MaxAlign so this works. 661 StackAlign = std::max(StackAlign, MaxAlign); 662 unsigned AlignMask = StackAlign - 1; 663 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask); 664 } 665 666 // Update frame info to pretend that this is part of the stack... 667 MFI->setStackSize(Offset - LocalAreaOffset); 668 } 669 670 /// insertPrologEpilogCode - Scan the function for modified callee saved 671 /// registers, insert spill code for these callee saved registers, then add 672 /// prolog and epilog code to the function. 673 /// 674 void PEI::insertPrologEpilogCode(MachineFunction &Fn) { 675 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo(); 676 677 // Add prologue to the function... 678 TRI->emitPrologue(Fn); 679 680 // Add epilogue to restore the callee-save registers in each exiting block 681 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) { 682 // If last instruction is a return instruction, add an epilogue 683 if (!I->empty() && I->back().getDesc().isReturn()) 684 TRI->emitEpilogue(Fn, *I); 685 } 686 } 687 688 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical 689 /// register references and actual offsets. 690 /// 691 void PEI::replaceFrameIndices(MachineFunction &Fn) { 692 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do? 693 694 const TargetMachine &TM = Fn.getTarget(); 695 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!"); 696 const TargetRegisterInfo &TRI = *TM.getRegisterInfo(); 697 const TargetFrameInfo *TFI = TM.getFrameInfo(); 698 bool StackGrowsDown = 699 TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown; 700 int FrameSetupOpcode = TRI.getCallFrameSetupOpcode(); 701 int FrameDestroyOpcode = TRI.getCallFrameDestroyOpcode(); 702 703 for (MachineFunction::iterator BB = Fn.begin(), 704 E = Fn.end(); BB != E; ++BB) { 705 #ifndef NDEBUG 706 int SPAdjCount = 0; // frame setup / destroy count. 707 #endif 708 int SPAdj = 0; // SP offset due to call frame setup / destroy. 709 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB); 710 711 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { 712 713 if (I->getOpcode() == FrameSetupOpcode || 714 I->getOpcode() == FrameDestroyOpcode) { 715 #ifndef NDEBUG 716 // Track whether we see even pairs of them 717 SPAdjCount += I->getOpcode() == FrameSetupOpcode ? 1 : -1; 718 #endif 719 // Remember how much SP has been adjusted to create the call 720 // frame. 721 int Size = I->getOperand(0).getImm(); 722 723 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) || 724 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode)) 725 Size = -Size; 726 727 SPAdj += Size; 728 729 MachineBasicBlock::iterator PrevI = BB->end(); 730 if (I != BB->begin()) PrevI = prior(I); 731 TRI.eliminateCallFramePseudoInstr(Fn, *BB, I); 732 733 // Visit the instructions created by eliminateCallFramePseudoInstr(). 734 if (PrevI == BB->end()) 735 I = BB->begin(); // The replaced instr was the first in the block. 736 else 737 I = llvm::next(PrevI); 738 continue; 739 } 740 741 MachineInstr *MI = I; 742 bool DoIncr = true; 743 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) 744 if (MI->getOperand(i).isFI()) { 745 // Some instructions (e.g. inline asm instructions) can have 746 // multiple frame indices and/or cause eliminateFrameIndex 747 // to insert more than one instruction. We need the register 748 // scavenger to go through all of these instructions so that 749 // it can update its register information. We keep the 750 // iterator at the point before insertion so that we can 751 // revisit them in full. 752 bool AtBeginning = (I == BB->begin()); 753 if (!AtBeginning) --I; 754 755 // If this instruction has a FrameIndex operand, we need to 756 // use that target machine register info object to eliminate 757 // it. 758 TRI.eliminateFrameIndex(MI, SPAdj, 759 FrameIndexVirtualScavenging ? NULL : RS); 760 761 // Reset the iterator if we were at the beginning of the BB. 762 if (AtBeginning) { 763 I = BB->begin(); 764 DoIncr = false; 765 } 766 767 MI = 0; 768 break; 769 } 770 771 if (DoIncr && I != BB->end()) ++I; 772 773 // Update register states. 774 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI); 775 } 776 777 // If we have evenly matched pairs of frame setup / destroy instructions, 778 // make sure the adjustments come out to zero. If we don't have matched 779 // pairs, we can't be sure the missing bit isn't in another basic block 780 // due to a custom inserter playing tricks, so just asserting SPAdj==0 781 // isn't sufficient. See tMOVCC on Thumb1, for example. 782 assert((SPAdjCount || SPAdj == 0) && 783 "Unbalanced call frame setup / destroy pairs?"); 784 } 785 } 786 787 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers 788 /// with physical registers. Use the register scavenger to find an 789 /// appropriate register to use. 790 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) { 791 // Run through the instructions and find any virtual registers. 792 for (MachineFunction::iterator BB = Fn.begin(), 793 E = Fn.end(); BB != E; ++BB) { 794 RS->enterBasicBlock(BB); 795 796 unsigned VirtReg = 0; 797 unsigned ScratchReg = 0; 798 int SPAdj = 0; 799 800 // The instruction stream may change in the loop, so check BB->end() 801 // directly. 802 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) { 803 MachineInstr *MI = I; 804 bool DoIncr = true; 805 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 806 if (MI->getOperand(i).isReg()) { 807 MachineOperand &MO = MI->getOperand(i); 808 unsigned Reg = MO.getReg(); 809 if (Reg == 0) 810 continue; 811 if (!TargetRegisterInfo::isVirtualRegister(Reg)) 812 continue; 813 814 ++NumVirtualFrameRegs; 815 816 // Have we already allocated a scratch register for this virtual? 817 if (Reg != VirtReg) { 818 // When we first encounter a new virtual register, it 819 // must be a definition. 820 assert(MI->getOperand(i).isDef() && 821 "frame index virtual missing def!"); 822 // Scavenge a new scratch register 823 VirtReg = Reg; 824 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg); 825 ScratchReg = RS->scavengeRegister(RC, I, SPAdj); 826 ++NumScavengedRegs; 827 } 828 // replace this reference to the virtual register with the 829 // scratch register. 830 assert (ScratchReg && "Missing scratch register!"); 831 MI->getOperand(i).setReg(ScratchReg); 832 833 } 834 } 835 if (DoIncr) { 836 RS->forward(I); 837 ++I; 838 } 839 } 840 } 841 } 842