1 //===-- lib/CodeGen/MachineInstrBundle.cpp --------------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "llvm/CodeGen/MachineInstrBundle.h" 11 #include "llvm/ADT/SmallSet.h" 12 #include "llvm/ADT/SmallVector.h" 13 #include "llvm/CodeGen/MachineFunctionPass.h" 14 #include "llvm/CodeGen/MachineInstrBuilder.h" 15 #include "llvm/CodeGen/Passes.h" 16 #include "llvm/Target/TargetInstrInfo.h" 17 #include "llvm/Target/TargetMachine.h" 18 #include "llvm/Target/TargetRegisterInfo.h" 19 #include "llvm/Target/TargetSubtargetInfo.h" 20 #include <utility> 21 using namespace llvm; 22 23 namespace { 24 class UnpackMachineBundles : public MachineFunctionPass { 25 public: 26 static char ID; // Pass identification 27 UnpackMachineBundles( 28 std::function<bool(const MachineFunction &)> Ftor = nullptr) 29 : MachineFunctionPass(ID), PredicateFtor(std::move(Ftor)) { 30 initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry()); 31 } 32 33 bool runOnMachineFunction(MachineFunction &MF) override; 34 35 private: 36 std::function<bool(const MachineFunction &)> PredicateFtor; 37 }; 38 } // end anonymous namespace 39 40 char UnpackMachineBundles::ID = 0; 41 char &llvm::UnpackMachineBundlesID = UnpackMachineBundles::ID; 42 INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles", 43 "Unpack machine instruction bundles", false, false) 44 45 bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) { 46 if (PredicateFtor && !PredicateFtor(MF)) 47 return false; 48 49 bool Changed = false; 50 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { 51 MachineBasicBlock *MBB = &*I; 52 53 for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(), 54 MIE = MBB->instr_end(); MII != MIE; ) { 55 MachineInstr *MI = &*MII; 56 57 // Remove BUNDLE instruction and the InsideBundle flags from bundled 58 // instructions. 59 if (MI->isBundle()) { 60 while (++MII != MIE && MII->isBundledWithPred()) { 61 MII->unbundleFromPred(); 62 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) { 63 MachineOperand &MO = MII->getOperand(i); 64 if (MO.isReg() && MO.isInternalRead()) 65 MO.setIsInternalRead(false); 66 } 67 } 68 MI->eraseFromParent(); 69 70 Changed = true; 71 continue; 72 } 73 74 ++MII; 75 } 76 } 77 78 return Changed; 79 } 80 81 FunctionPass * 82 llvm::createUnpackMachineBundles( 83 std::function<bool(const MachineFunction &)> Ftor) { 84 return new UnpackMachineBundles(std::move(Ftor)); 85 } 86 87 namespace { 88 class FinalizeMachineBundles : public MachineFunctionPass { 89 public: 90 static char ID; // Pass identification 91 FinalizeMachineBundles() : MachineFunctionPass(ID) { 92 initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry()); 93 } 94 95 bool runOnMachineFunction(MachineFunction &MF) override; 96 }; 97 } // end anonymous namespace 98 99 char FinalizeMachineBundles::ID = 0; 100 char &llvm::FinalizeMachineBundlesID = FinalizeMachineBundles::ID; 101 INITIALIZE_PASS(FinalizeMachineBundles, "finalize-mi-bundles", 102 "Finalize machine instruction bundles", false, false) 103 104 bool FinalizeMachineBundles::runOnMachineFunction(MachineFunction &MF) { 105 return llvm::finalizeBundles(MF); 106 } 107 108 109 /// finalizeBundle - Finalize a machine instruction bundle which includes 110 /// a sequence of instructions starting from FirstMI to LastMI (exclusive). 111 /// This routine adds a BUNDLE instruction to represent the bundle, it adds 112 /// IsInternalRead markers to MachineOperands which are defined inside the 113 /// bundle, and it copies externally visible defs and uses to the BUNDLE 114 /// instruction. 115 void llvm::finalizeBundle(MachineBasicBlock &MBB, 116 MachineBasicBlock::instr_iterator FirstMI, 117 MachineBasicBlock::instr_iterator LastMI) { 118 assert(FirstMI != LastMI && "Empty bundle?"); 119 MIBundleBuilder Bundle(MBB, FirstMI, LastMI); 120 121 MachineFunction &MF = *MBB.getParent(); 122 const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); 123 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); 124 125 MachineInstrBuilder MIB = 126 BuildMI(MF, FirstMI->getDebugLoc(), TII->get(TargetOpcode::BUNDLE)); 127 Bundle.prepend(MIB); 128 129 SmallVector<unsigned, 32> LocalDefs; 130 SmallSet<unsigned, 32> LocalDefSet; 131 SmallSet<unsigned, 8> DeadDefSet; 132 SmallSet<unsigned, 16> KilledDefSet; 133 SmallVector<unsigned, 8> ExternUses; 134 SmallSet<unsigned, 8> ExternUseSet; 135 SmallSet<unsigned, 8> KilledUseSet; 136 SmallSet<unsigned, 8> UndefUseSet; 137 SmallVector<MachineOperand*, 4> Defs; 138 for (; FirstMI != LastMI; ++FirstMI) { 139 for (unsigned i = 0, e = FirstMI->getNumOperands(); i != e; ++i) { 140 MachineOperand &MO = FirstMI->getOperand(i); 141 if (!MO.isReg()) 142 continue; 143 if (MO.isDef()) { 144 Defs.push_back(&MO); 145 continue; 146 } 147 148 unsigned Reg = MO.getReg(); 149 if (!Reg) 150 continue; 151 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); 152 if (LocalDefSet.count(Reg)) { 153 MO.setIsInternalRead(); 154 if (MO.isKill()) 155 // Internal def is now killed. 156 KilledDefSet.insert(Reg); 157 } else { 158 if (ExternUseSet.insert(Reg).second) { 159 ExternUses.push_back(Reg); 160 if (MO.isUndef()) 161 UndefUseSet.insert(Reg); 162 } 163 if (MO.isKill()) 164 // External def is now killed. 165 KilledUseSet.insert(Reg); 166 } 167 } 168 169 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 170 MachineOperand &MO = *Defs[i]; 171 unsigned Reg = MO.getReg(); 172 if (!Reg) 173 continue; 174 175 if (LocalDefSet.insert(Reg).second) { 176 LocalDefs.push_back(Reg); 177 if (MO.isDead()) { 178 DeadDefSet.insert(Reg); 179 } 180 } else { 181 // Re-defined inside the bundle, it's no longer killed. 182 KilledDefSet.erase(Reg); 183 if (!MO.isDead()) 184 // Previously defined but dead. 185 DeadDefSet.erase(Reg); 186 } 187 188 if (!MO.isDead()) { 189 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { 190 unsigned SubReg = *SubRegs; 191 if (LocalDefSet.insert(SubReg).second) 192 LocalDefs.push_back(SubReg); 193 } 194 } 195 } 196 197 Defs.clear(); 198 } 199 200 SmallSet<unsigned, 32> Added; 201 for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) { 202 unsigned Reg = LocalDefs[i]; 203 if (Added.insert(Reg).second) { 204 // If it's not live beyond end of the bundle, mark it dead. 205 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); 206 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | 207 getImplRegState(true)); 208 } 209 } 210 211 for (unsigned i = 0, e = ExternUses.size(); i != e; ++i) { 212 unsigned Reg = ExternUses[i]; 213 bool isKill = KilledUseSet.count(Reg); 214 bool isUndef = UndefUseSet.count(Reg); 215 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | 216 getImplRegState(true)); 217 } 218 } 219 220 /// finalizeBundle - Same functionality as the previous finalizeBundle except 221 /// the last instruction in the bundle is not provided as an input. This is 222 /// used in cases where bundles are pre-determined by marking instructions 223 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that 224 /// points to the end of the bundle. 225 MachineBasicBlock::instr_iterator 226 llvm::finalizeBundle(MachineBasicBlock &MBB, 227 MachineBasicBlock::instr_iterator FirstMI) { 228 MachineBasicBlock::instr_iterator E = MBB.instr_end(); 229 MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI); 230 while (LastMI != E && LastMI->isInsideBundle()) 231 ++LastMI; 232 finalizeBundle(MBB, FirstMI, LastMI); 233 return LastMI; 234 } 235 236 /// finalizeBundles - Finalize instruction bundles in the specified 237 /// MachineFunction. Return true if any bundles are finalized. 238 bool llvm::finalizeBundles(MachineFunction &MF) { 239 bool Changed = false; 240 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) { 241 MachineBasicBlock &MBB = *I; 242 MachineBasicBlock::instr_iterator MII = MBB.instr_begin(); 243 MachineBasicBlock::instr_iterator MIE = MBB.instr_end(); 244 if (MII == MIE) 245 continue; 246 assert(!MII->isInsideBundle() && 247 "First instr cannot be inside bundle before finalization!"); 248 249 for (++MII; MII != MIE; ) { 250 if (!MII->isInsideBundle()) 251 ++MII; 252 else { 253 MII = finalizeBundle(MBB, std::prev(MII)); 254 Changed = true; 255 } 256 } 257 } 258 259 return Changed; 260 } 261 262 //===----------------------------------------------------------------------===// 263 // MachineOperand iterator 264 //===----------------------------------------------------------------------===// 265 266 MachineOperandIteratorBase::VirtRegInfo 267 MachineOperandIteratorBase::analyzeVirtReg(unsigned Reg, 268 SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops) { 269 VirtRegInfo RI = { false, false, false }; 270 for(; isValid(); ++*this) { 271 MachineOperand &MO = deref(); 272 if (!MO.isReg() || MO.getReg() != Reg) 273 continue; 274 275 // Remember each (MI, OpNo) that refers to Reg. 276 if (Ops) 277 Ops->push_back(std::make_pair(MO.getParent(), getOperandNo())); 278 279 // Both defs and uses can read virtual registers. 280 if (MO.readsReg()) { 281 RI.Reads = true; 282 if (MO.isDef()) 283 RI.Tied = true; 284 } 285 286 // Only defs can write. 287 if (MO.isDef()) 288 RI.Writes = true; 289 else if (!RI.Tied && MO.getParent()->isRegTiedToDefOperand(getOperandNo())) 290 RI.Tied = true; 291 } 292 return RI; 293 } 294 295 MachineOperandIteratorBase::PhysRegInfo 296 MachineOperandIteratorBase::analyzePhysReg(unsigned Reg, 297 const TargetRegisterInfo *TRI) { 298 bool AllDefsDead = true; 299 PhysRegInfo PRI = {false, false, false, false, false, false, false, false}; 300 301 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && 302 "analyzePhysReg not given a physical register!"); 303 for (; isValid(); ++*this) { 304 MachineOperand &MO = deref(); 305 306 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) { 307 PRI.Clobbered = true; 308 continue; 309 } 310 311 if (!MO.isReg()) 312 continue; 313 314 unsigned MOReg = MO.getReg(); 315 if (!MOReg || !TargetRegisterInfo::isPhysicalRegister(MOReg)) 316 continue; 317 318 if (!TRI->regsOverlap(MOReg, Reg)) 319 continue; 320 321 bool Covered = TRI->isSuperRegisterEq(Reg, MOReg); 322 if (MO.readsReg()) { 323 PRI.Read = true; 324 if (Covered) { 325 PRI.FullyRead = true; 326 if (MO.isKill()) 327 PRI.Killed = true; 328 } 329 } else if (MO.isDef()) { 330 PRI.Defined = true; 331 if (Covered) 332 PRI.FullyDefined = true; 333 if (!MO.isDead()) 334 AllDefsDead = false; 335 } 336 } 337 338 if (AllDefsDead) { 339 if (PRI.FullyDefined || PRI.Clobbered) 340 PRI.DeadDef = true; 341 else if (PRI.Defined) 342 PRI.PartialDeadDef = true; 343 } 344 345 return PRI; 346 } 347