xref: /llvm-project/llvm/lib/CodeGen/LiveStacks.cpp (revision 735ab61ac828bd61398e6847d60e308fdf2b54ec)
1 //===-- LiveStacks.cpp - Live Stack Slot Analysis -------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the live stack slot analysis pass. It is analogous to
10 // live interval analysis except it's analyzing liveness of stack slots rather
11 // than registers.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/CodeGen/LiveStacks.h"
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
17 #include "llvm/CodeGen/TargetSubtargetInfo.h"
18 using namespace llvm;
19 
20 #define DEBUG_TYPE "livestacks"
21 
22 char LiveStacks::ID = 0;
23 INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE,
24                 "Live Stack Slot Analysis", false, false)
25 INITIALIZE_PASS_DEPENDENCY(SlotIndexesWrapperPass)
26 INITIALIZE_PASS_END(LiveStacks, DEBUG_TYPE,
27                 "Live Stack Slot Analysis", false, false)
28 
29 char &llvm::LiveStacksID = LiveStacks::ID;
30 
31 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
32   AU.setPreservesAll();
33   AU.addPreserved<SlotIndexesWrapperPass>();
34   AU.addRequiredTransitive<SlotIndexesWrapperPass>();
35   MachineFunctionPass::getAnalysisUsage(AU);
36 }
37 
38 void LiveStacks::releaseMemory() {
39   // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
40   VNInfoAllocator.Reset();
41   S2IMap.clear();
42   S2RCMap.clear();
43 }
44 
45 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
46   TRI = MF.getSubtarget().getRegisterInfo();
47   // FIXME: No analysis is being done right now. We are relying on the
48   // register allocators to provide the information.
49   return false;
50 }
51 
52 LiveInterval &
53 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) {
54   assert(Slot >= 0 && "Spill slot indice must be >= 0");
55   SS2IntervalMap::iterator I = S2IMap.find(Slot);
56   if (I == S2IMap.end()) {
57     I = S2IMap
58             .emplace(
59                 std::piecewise_construct, std::forward_as_tuple(Slot),
60                 std::forward_as_tuple(Register::index2StackSlot(Slot), 0.0F))
61             .first;
62     S2RCMap.insert(std::make_pair(Slot, RC));
63   } else {
64     // Use the largest common subclass register class.
65     const TargetRegisterClass *OldRC = S2RCMap[Slot];
66     S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
67   }
68   return I->second;
69 }
70 
71 /// print - Implement the dump method.
72 void LiveStacks::print(raw_ostream &OS, const Module*) const {
73 
74   OS << "********** INTERVALS **********\n";
75   for (const_iterator I = begin(), E = end(); I != E; ++I) {
76     I->second.print(OS);
77     int Slot = I->first;
78     const TargetRegisterClass *RC = getIntervalRegClass(Slot);
79     if (RC)
80       OS << " [" << TRI->getRegClassName(RC) << "]\n";
81     else
82       OS << " [Unknown]\n";
83   }
84 }
85