1 //===-- DynamicRegisterInfoTest.cpp ---------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "gmock/gmock.h" 10 #include "gtest/gtest.h" 11 12 #include "lldb/Target/DynamicRegisterInfo.h" 13 #include "lldb/Utility/ArchSpec.h" 14 15 using namespace lldb_private; 16 17 static std::vector<uint32_t> regs_to_vector(uint32_t *regs) { 18 std::vector<uint32_t> ret; 19 if (regs) { 20 while (*regs != LLDB_INVALID_REGNUM) 21 ret.push_back(*regs++); 22 } 23 return ret; 24 } 25 26 class DynamicRegisterInfoTest : public ::testing::Test { 27 protected: 28 DynamicRegisterInfo info; 29 uint32_t next_regnum = 0; 30 ConstString group{"group"}; 31 32 uint32_t AddTestRegister(const char *name, uint32_t byte_size, 33 std::vector<uint32_t> value_regs = {}, 34 std::vector<uint32_t> invalidate_regs = {}) { 35 struct RegisterInfo new_reg { 36 name, nullptr, byte_size, LLDB_INVALID_INDEX32, lldb::eEncodingUint, 37 lldb::eFormatUnsigned, 38 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 39 next_regnum, next_regnum}, 40 nullptr, nullptr, nullptr, 0 41 }; 42 43 if (!value_regs.empty()) { 44 value_regs.push_back(LLDB_INVALID_REGNUM); 45 new_reg.value_regs = value_regs.data(); 46 } 47 if (!invalidate_regs.empty()) { 48 invalidate_regs.push_back(LLDB_INVALID_REGNUM); 49 new_reg.invalidate_regs = invalidate_regs.data(); 50 } 51 52 info.AddRegister(new_reg, group); 53 return next_regnum++; 54 } 55 56 void AssertRegisterInfo(uint32_t reg_num, const char *reg_name, 57 uint32_t byte_offset, 58 std::vector<uint32_t> value_regs = {}, 59 std::vector<uint32_t> invalidate_regs = {}) { 60 const RegisterInfo *reg = info.GetRegisterInfoAtIndex(reg_num); 61 EXPECT_NE(reg, nullptr); 62 if (!reg) 63 return; 64 65 EXPECT_STREQ(reg->name, reg_name); 66 EXPECT_EQ(reg->byte_offset, byte_offset); 67 EXPECT_THAT(regs_to_vector(reg->value_regs), value_regs); 68 EXPECT_THAT(regs_to_vector(reg->invalidate_regs), invalidate_regs); 69 } 70 }; 71 72 #define ASSERT_REG(reg, ...) { \ 73 SCOPED_TRACE("at register " #reg); \ 74 AssertRegisterInfo(reg, #reg, __VA_ARGS__); \ 75 } 76 77 TEST_F(DynamicRegisterInfoTest, finalize_regs) { 78 // Add regular registers 79 uint32_t b1 = AddTestRegister("b1", 8); 80 uint32_t b2 = AddTestRegister("b2", 8); 81 82 // Add a few sub-registers 83 uint32_t s1 = AddTestRegister("s1", 4, {b1}); 84 uint32_t s2 = AddTestRegister("s2", 4, {b2}); 85 86 // Add a register with invalidate_regs 87 uint32_t i1 = AddTestRegister("i1", 8, {}, {b1}); 88 89 // Add a register with indirect invalidate regs to be expanded 90 // TODO: why is it done conditionally to value_regs? 91 uint32_t i2 = AddTestRegister("i2", 4, {b2}, {i1}); 92 93 info.Finalize(lldb_private::ArchSpec()); 94 95 ASSERT_REG(b1, 0); 96 ASSERT_REG(b2, 8); 97 ASSERT_REG(s1, 0, {b1}); 98 ASSERT_REG(s2, 8, {b2}); 99 ASSERT_REG(i1, 16, {}, {b1}); 100 ASSERT_REG(i2, 8, {b2}, {b1, i1}); 101 } 102 103 TEST_F(DynamicRegisterInfoTest, no_finalize_regs) { 104 // Add regular registers 105 uint32_t b1 = AddTestRegister("b1", 8); 106 uint32_t b2 = AddTestRegister("b2", 8); 107 108 // Add a few sub-registers 109 uint32_t s1 = AddTestRegister("s1", 4, {b1}); 110 uint32_t s2 = AddTestRegister("s2", 4, {b2}); 111 112 // Add a register with invalidate_regs 113 uint32_t i1 = AddTestRegister("i1", 8, {}, {b1}); 114 115 // Add a register with indirect invalidate regs to be expanded 116 // TODO: why is it done conditionally to value_regs? 117 uint32_t i2 = AddTestRegister("i2", 4, {b2}, {i1}); 118 119 ASSERT_REG(b1, LLDB_INVALID_INDEX32); 120 ASSERT_REG(b2, LLDB_INVALID_INDEX32); 121 ASSERT_REG(s1, LLDB_INVALID_INDEX32); 122 ASSERT_REG(s2, LLDB_INVALID_INDEX32); 123 ASSERT_REG(i1, LLDB_INVALID_INDEX32); 124 ASSERT_REG(i2, LLDB_INVALID_INDEX32); 125 } 126 127 TEST_F(DynamicRegisterInfoTest, add_supplementary_register) { 128 // Add a base register 129 uint32_t rax = AddTestRegister("rax", 8); 130 131 // Register numbers 132 uint32_t eax = 1; 133 uint32_t ax = 2; 134 uint32_t al = 3; 135 136 ConstString group{"supplementary registers"}; 137 uint32_t value_regs[2] = {rax, LLDB_INVALID_REGNUM}; 138 struct RegisterInfo eax_reg { 139 "eax", nullptr, 4, LLDB_INVALID_INDEX32, lldb::eEncodingUint, 140 lldb::eFormatUnsigned, 141 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, eax, 142 eax}, 143 value_regs, nullptr, nullptr, 0 144 }; 145 info.AddSupplementaryRegister(eax_reg, group); 146 147 struct RegisterInfo ax_reg { 148 "ax", nullptr, 2, LLDB_INVALID_INDEX32, lldb::eEncodingUint, 149 lldb::eFormatUnsigned, 150 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, ax, ax}, 151 value_regs, nullptr, nullptr, 0 152 }; 153 info.AddSupplementaryRegister(ax_reg, group); 154 155 struct RegisterInfo al_reg { 156 "al", nullptr, 1, LLDB_INVALID_INDEX32, lldb::eEncodingUint, 157 lldb::eFormatUnsigned, 158 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, al, al}, 159 value_regs, nullptr, nullptr, 0 160 }; 161 info.AddSupplementaryRegister(al_reg, group); 162 163 info.Finalize(lldb_private::ArchSpec()); 164 165 ASSERT_REG(rax, 0, {}, {eax, ax, al}); 166 ASSERT_REG(eax, 0, {rax}, {rax, ax, al}); 167 ASSERT_REG(ax, 0, {rax}, {rax, eax, al}); 168 ASSERT_REG(al, 0, {rax}, {rax, eax, ax}); 169 } 170