xref: /llvm-project/lldb/test/API/functionalities/gdb_remote_client/TestNestedRegDefinitions.py (revision 4cc8f2a017c76af25234afc7c380550e9c93135c) 
1from __future__ import print_function
2import lldb
3from lldbsuite.test.lldbtest import *
4from lldbsuite.test.decorators import *
5from lldbsuite.test.gdbclientutils import *
6from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
7
8class TestNestedRegDefinitions(GDBRemoteTestBase):
9
10    @skipIfXmlSupportMissing
11    @skipIfRemote
12    def test(self):
13        """
14        Test lldb's parsing of the <architecture> tag in the target.xml register
15        description packet.
16        """
17        class MyResponder(MockGDBServerResponder):
18
19            def qXferRead(self, obj, annex, offset, length):
20                if annex == "target.xml":
21                    return """<?xml version="1.0"?><!DOCTYPE target SYSTEM "gdb-target.dtd"><target><architecture>i386:x86-64</architecture><xi:include href="i386-64bit.xml"/></target>""", False
22
23                if annex == "i386-64bit.xml":
24                    return """<?xml version="1.0"?>
25<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
26
27     Copying and distribution of this file, with or without modification,
28     are permitted in any medium without royalty provided the copyright
29     notice and this notice are preserved.  -->
30
31<!-- I386 64bit -->
32
33<!DOCTYPE target SYSTEM "gdb-target.dtd">
34<feature name="org.gnu.gdb.i386.64bit">
35  <xi:include href="i386-64bit-core.xml"/>
36  <xi:include href="i386-64bit-sse.xml"/>
37</feature>""", False
38
39                if annex == "i386-64bit-core.xml":
40                    return """<?xml version="1.0"?>
41<!-- Copyright (C) 2010-2015 Free Software Foundation, Inc.
42
43     Copying and distribution of this file, with or without modification,
44     are permitted in any medium without royalty provided the copyright
45     notice and this notice are preserved.  -->
46
47<!DOCTYPE feature SYSTEM "gdb-target.dtd">
48<feature name="org.gnu.gdb.i386.core">
49  <flags id="i386_eflags" size="4">
50    <field name="CF" start="0" end="0"/>
51    <field name="" start="1" end="1"/>
52    <field name="PF" start="2" end="2"/>
53    <field name="AF" start="4" end="4"/>
54    <field name="ZF" start="6" end="6"/>
55    <field name="SF" start="7" end="7"/>
56    <field name="TF" start="8" end="8"/>
57    <field name="IF" start="9" end="9"/>
58    <field name="DF" start="10" end="10"/>
59    <field name="OF" start="11" end="11"/>
60    <field name="NT" start="14" end="14"/>
61    <field name="RF" start="16" end="16"/>
62    <field name="VM" start="17" end="17"/>
63    <field name="AC" start="18" end="18"/>
64    <field name="VIF" start="19" end="19"/>
65    <field name="VIP" start="20" end="20"/>
66    <field name="ID" start="21" end="21"/>
67  </flags>
68
69  <reg name="rax" bitsize="64" type="int64"/>
70  <reg name="rbx" bitsize="64" type="int64"/>
71  <reg name="rcx" bitsize="64" type="int64"/>
72  <reg name="rdx" bitsize="64" type="int64"/>
73  <reg name="rsi" bitsize="64" type="int64"/>
74  <reg name="rdi" bitsize="64" type="int64"/>
75  <reg name="rbp" bitsize="64" type="data_ptr"/>
76  <reg name="rsp" bitsize="64" type="data_ptr"/>
77  <reg name="r8" bitsize="64" type="int64"/>
78  <reg name="r9" bitsize="64" type="int64"/>
79  <reg name="r10" bitsize="64" type="int64"/>
80  <reg name="r11" bitsize="64" type="int64"/>
81  <reg name="r12" bitsize="64" type="int64"/>
82  <reg name="r13" bitsize="64" type="int64"/>
83  <reg name="r14" bitsize="64" type="int64"/>
84  <reg name="r15" bitsize="64" type="int64"/>
85
86  <reg name="rip" bitsize="64" type="code_ptr"/>
87  <reg name="eflags" bitsize="32" type="i386_eflags"/>
88  <reg name="cs" bitsize="32" type="int32"/>
89  <reg name="ss" bitsize="32" type="int32"/>
90  <reg name="ds" bitsize="32" type="int32"/>
91  <reg name="es" bitsize="32" type="int32"/>
92  <reg name="fs" bitsize="32" type="int32"/>
93  <reg name="gs" bitsize="32" type="int32"/>
94
95  <reg name="st0" bitsize="80" type="i387_ext"/>
96  <reg name="st1" bitsize="80" type="i387_ext"/>
97  <reg name="st2" bitsize="80" type="i387_ext"/>
98  <reg name="st3" bitsize="80" type="i387_ext"/>
99  <reg name="st4" bitsize="80" type="i387_ext"/>
100  <reg name="st5" bitsize="80" type="i387_ext"/>
101  <reg name="st6" bitsize="80" type="i387_ext"/>
102  <reg name="st7" bitsize="80" type="i387_ext"/>
103
104  <reg name="fctrl" bitsize="32" type="int" group="float"/>
105  <reg name="fstat" bitsize="32" type="int" group="float"/>
106  <reg name="ftag" bitsize="32" type="int" group="float"/>
107  <reg name="fiseg" bitsize="32" type="int" group="float"/>
108  <reg name="fioff" bitsize="32" type="int" group="float"/>
109  <reg name="foseg" bitsize="32" type="int" group="float"/>
110  <reg name="fooff" bitsize="32" type="int" group="float"/>
111  <reg name="fop" bitsize="32" type="int" group="float"/>
112</feature>""", False
113
114                if annex == "i386-64bit-sse.xml":
115                    return """<?xml version="1.0"?>
116<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
117
118     Copying and distribution of this file, with or without modification,
119     are permitted in any medium without royalty provided the copyright
120     notice and this notice are preserved.  -->
121
122<!DOCTYPE feature SYSTEM "gdb-target.dtd">
123<feature name="org.gnu.gdb.i386.64bit.sse">
124  <vector id="v4f" type="ieee_single" count="4"/>
125  <vector id="v2d" type="ieee_double" count="2"/>
126  <vector id="v16i8" type="int8" count="16"/>
127  <vector id="v8i16" type="int16" count="8"/>
128  <vector id="v4i32" type="int32" count="4"/>
129  <vector id="v2i64" type="int64" count="2"/>
130  <union id="vec128">
131    <field name="v4_float" type="v4f"/>
132    <field name="v2_double" type="v2d"/>
133    <field name="v16_int8" type="v16i8"/>
134    <field name="v8_int16" type="v8i16"/>
135    <field name="v4_int32" type="v4i32"/>
136    <field name="v2_int64" type="v2i64"/>
137    <field name="uint128" type="uint128"/>
138  </union>
139  <flags id="i386_mxcsr" size="4">
140    <field name="IE" start="0" end="0"/>
141    <field name="DE" start="1" end="1"/>
142    <field name="ZE" start="2" end="2"/>
143    <field name="OE" start="3" end="3"/>
144    <field name="UE" start="4" end="4"/>
145    <field name="PE" start="5" end="5"/>
146    <field name="DAZ" start="6" end="6"/>
147    <field name="IM" start="7" end="7"/>
148    <field name="DM" start="8" end="8"/>
149    <field name="ZM" start="9" end="9"/>
150    <field name="OM" start="10" end="10"/>
151    <field name="UM" start="11" end="11"/>
152    <field name="PM" start="12" end="12"/>
153    <field name="FZ" start="15" end="15"/>
154  </flags>
155
156  <reg name="xmm0" bitsize="128" type="vec128" regnum="40"/>
157  <reg name="xmm1" bitsize="128" type="vec128"/>
158  <reg name="xmm2" bitsize="128" type="vec128"/>
159  <reg name="xmm3" bitsize="128" type="vec128"/>
160  <reg name="xmm4" bitsize="128" type="vec128"/>
161  <reg name="xmm5" bitsize="128" type="vec128"/>
162  <reg name="xmm6" bitsize="128" type="vec128"/>
163  <reg name="xmm7" bitsize="128" type="vec128"/>
164  <reg name="xmm8" bitsize="128" type="vec128"/>
165  <reg name="xmm9" bitsize="128" type="vec128"/>
166  <reg name="xmm10" bitsize="128" type="vec128"/>
167  <reg name="xmm11" bitsize="128" type="vec128"/>
168  <reg name="xmm12" bitsize="128" type="vec128"/>
169  <reg name="xmm13" bitsize="128" type="vec128"/>
170  <reg name="xmm14" bitsize="128" type="vec128"/>
171  <reg name="xmm15" bitsize="128" type="vec128"/>
172
173  <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
174</feature>""", False
175
176                return None, False
177
178            def readRegister(self, regnum):
179                return ""
180
181            def readRegisters(self):
182                return "0600000000000000c0b7c00080fffffff021c60080ffffff1a00000000000000020000000000000078b7c00080ffffff203f8ca090ffffff103f8ca090ffffff3025990a80ffffff809698000000000070009f0a80ffffff020000000000000000eae10080ffffff00000000000000001822d74f1a00000078b7c00080ffffff0e12410080ffff004602000008000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f0300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f0000"
183
184            def haltReason(self):
185                return "T02thread:dead;threads:dead;"
186
187            def qfThreadInfo(self):
188                return "mdead"
189
190            def qC(self):
191                return ""
192
193            def qSupported(self, client_supported):
194                return "PacketSize=4000;qXfer:features:read+"
195
196            def QThreadSuffixSupported(self):
197                return "OK"
198
199            def QListThreadsInStopReply(self):
200                return "OK"
201
202        self.server.responder = MyResponder()
203        if self.TraceOn():
204            self.runCmd("log enable gdb-remote packets")
205            self.addTearDownHook(
206                    lambda: self.runCmd("log disable gdb-remote packets"))
207
208        target = self.dbg.CreateTargetWithFileAndArch(None, None)
209
210        process = self.connect(target)
211
212        if self.TraceOn():
213            interp = self.dbg.GetCommandInterpreter()
214            result = lldb.SBCommandReturnObject()
215            interp.HandleCommand("target list", result)
216            print(result.GetOutput())
217
218        rip_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("rip")
219        self.assertEqual(rip_valobj.GetValueAsUnsigned(), 0x00ffff800041120e)
220
221        r15_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r15")
222        self.assertEqual(r15_valobj.GetValueAsUnsigned(), 0xffffff8000c0b778)
223
224        mxcsr_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("mxcsr")
225        self.assertEqual(mxcsr_valobj.GetValueAsUnsigned(), 0x00001f80)
226
227        gpr_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(0).GetName()
228        self.assertEqual(gpr_reg_set_name, "general")
229
230        float_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(1).GetName()
231        self.assertEqual(float_reg_set_name, "float")
232
233        vector_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(2).GetName()
234        self.assertEqual(vector_reg_set_name, "vector")
235
236        if self.TraceOn():
237            print("rip is 0x%x" % rip_valobj.GetValueAsUnsigned())
238            print("r15 is 0x%x" % r15_valobj.GetValueAsUnsigned())
239            print("mxcsr is 0x%x" % mxcsr_valobj.GetValueAsUnsigned())
240