xref: /llvm-project/lldb/test/API/functionalities/gdb_remote_client/TestNestedRegDefinitions.py (revision 33c0f93f6c10acff885fe11b9897943313cd5c26) 
1from __future__ import print_function
2import lldb
3from lldbsuite.test.lldbtest import *
4from lldbsuite.test.decorators import *
5from lldbsuite.test.gdbclientutils import *
6from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase
7
8class TestNestedRegDefinitions(GDBRemoteTestBase):
9
10    mydir = TestBase.compute_mydir(__file__)
11
12    @skipIfXmlSupportMissing
13    @skipIfRemote
14    def test(self):
15        """
16        Test lldb's parsing of the <architecture> tag in the target.xml register
17        description packet.
18        """
19        class MyResponder(MockGDBServerResponder):
20
21            def qXferRead(self, obj, annex, offset, length):
22                if annex == "target.xml":
23                    return """<?xml version="1.0"?><!DOCTYPE target SYSTEM "gdb-target.dtd"><target><architecture>i386:x86-64</architecture><xi:include href="i386-64bit.xml"/></target>""", False
24
25                if annex == "i386-64bit.xml":
26                    return """<?xml version="1.0"?>
27<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
28
29     Copying and distribution of this file, with or without modification,
30     are permitted in any medium without royalty provided the copyright
31     notice and this notice are preserved.  -->
32
33<!-- I386 64bit -->
34
35<!DOCTYPE target SYSTEM "gdb-target.dtd">
36<feature name="org.gnu.gdb.i386.64bit">
37  <xi:include href="i386-64bit-core.xml"/>
38  <xi:include href="i386-64bit-sse.xml"/>
39</feature>""", False
40
41                if annex == "i386-64bit-core.xml":
42                    return """<?xml version="1.0"?>
43<!-- Copyright (C) 2010-2015 Free Software Foundation, Inc.
44
45     Copying and distribution of this file, with or without modification,
46     are permitted in any medium without royalty provided the copyright
47     notice and this notice are preserved.  -->
48
49<!DOCTYPE feature SYSTEM "gdb-target.dtd">
50<feature name="org.gnu.gdb.i386.core">
51  <flags id="i386_eflags" size="4">
52    <field name="CF" start="0" end="0"/>
53    <field name="" start="1" end="1"/>
54    <field name="PF" start="2" end="2"/>
55    <field name="AF" start="4" end="4"/>
56    <field name="ZF" start="6" end="6"/>
57    <field name="SF" start="7" end="7"/>
58    <field name="TF" start="8" end="8"/>
59    <field name="IF" start="9" end="9"/>
60    <field name="DF" start="10" end="10"/>
61    <field name="OF" start="11" end="11"/>
62    <field name="NT" start="14" end="14"/>
63    <field name="RF" start="16" end="16"/>
64    <field name="VM" start="17" end="17"/>
65    <field name="AC" start="18" end="18"/>
66    <field name="VIF" start="19" end="19"/>
67    <field name="VIP" start="20" end="20"/>
68    <field name="ID" start="21" end="21"/>
69  </flags>
70
71  <reg name="rax" bitsize="64" type="int64"/>
72  <reg name="rbx" bitsize="64" type="int64"/>
73  <reg name="rcx" bitsize="64" type="int64"/>
74  <reg name="rdx" bitsize="64" type="int64"/>
75  <reg name="rsi" bitsize="64" type="int64"/>
76  <reg name="rdi" bitsize="64" type="int64"/>
77  <reg name="rbp" bitsize="64" type="data_ptr"/>
78  <reg name="rsp" bitsize="64" type="data_ptr"/>
79  <reg name="r8" bitsize="64" type="int64"/>
80  <reg name="r9" bitsize="64" type="int64"/>
81  <reg name="r10" bitsize="64" type="int64"/>
82  <reg name="r11" bitsize="64" type="int64"/>
83  <reg name="r12" bitsize="64" type="int64"/>
84  <reg name="r13" bitsize="64" type="int64"/>
85  <reg name="r14" bitsize="64" type="int64"/>
86  <reg name="r15" bitsize="64" type="int64"/>
87
88  <reg name="rip" bitsize="64" type="code_ptr"/>
89  <reg name="eflags" bitsize="32" type="i386_eflags"/>
90  <reg name="cs" bitsize="32" type="int32"/>
91  <reg name="ss" bitsize="32" type="int32"/>
92  <reg name="ds" bitsize="32" type="int32"/>
93  <reg name="es" bitsize="32" type="int32"/>
94  <reg name="fs" bitsize="32" type="int32"/>
95  <reg name="gs" bitsize="32" type="int32"/>
96
97  <reg name="st0" bitsize="80" type="i387_ext"/>
98  <reg name="st1" bitsize="80" type="i387_ext"/>
99  <reg name="st2" bitsize="80" type="i387_ext"/>
100  <reg name="st3" bitsize="80" type="i387_ext"/>
101  <reg name="st4" bitsize="80" type="i387_ext"/>
102  <reg name="st5" bitsize="80" type="i387_ext"/>
103  <reg name="st6" bitsize="80" type="i387_ext"/>
104  <reg name="st7" bitsize="80" type="i387_ext"/>
105
106  <reg name="fctrl" bitsize="32" type="int" group="float"/>
107  <reg name="fstat" bitsize="32" type="int" group="float"/>
108  <reg name="ftag" bitsize="32" type="int" group="float"/>
109  <reg name="fiseg" bitsize="32" type="int" group="float"/>
110  <reg name="fioff" bitsize="32" type="int" group="float"/>
111  <reg name="foseg" bitsize="32" type="int" group="float"/>
112  <reg name="fooff" bitsize="32" type="int" group="float"/>
113  <reg name="fop" bitsize="32" type="int" group="float"/>
114</feature>""", False
115
116                if annex == "i386-64bit-sse.xml":
117                    return """<?xml version="1.0"?>
118<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
119
120     Copying and distribution of this file, with or without modification,
121     are permitted in any medium without royalty provided the copyright
122     notice and this notice are preserved.  -->
123
124<!DOCTYPE feature SYSTEM "gdb-target.dtd">
125<feature name="org.gnu.gdb.i386.64bit.sse">
126  <vector id="v4f" type="ieee_single" count="4"/>
127  <vector id="v2d" type="ieee_double" count="2"/>
128  <vector id="v16i8" type="int8" count="16"/>
129  <vector id="v8i16" type="int16" count="8"/>
130  <vector id="v4i32" type="int32" count="4"/>
131  <vector id="v2i64" type="int64" count="2"/>
132  <union id="vec128">
133    <field name="v4_float" type="v4f"/>
134    <field name="v2_double" type="v2d"/>
135    <field name="v16_int8" type="v16i8"/>
136    <field name="v8_int16" type="v8i16"/>
137    <field name="v4_int32" type="v4i32"/>
138    <field name="v2_int64" type="v2i64"/>
139    <field name="uint128" type="uint128"/>
140  </union>
141  <flags id="i386_mxcsr" size="4">
142    <field name="IE" start="0" end="0"/>
143    <field name="DE" start="1" end="1"/>
144    <field name="ZE" start="2" end="2"/>
145    <field name="OE" start="3" end="3"/>
146    <field name="UE" start="4" end="4"/>
147    <field name="PE" start="5" end="5"/>
148    <field name="DAZ" start="6" end="6"/>
149    <field name="IM" start="7" end="7"/>
150    <field name="DM" start="8" end="8"/>
151    <field name="ZM" start="9" end="9"/>
152    <field name="OM" start="10" end="10"/>
153    <field name="UM" start="11" end="11"/>
154    <field name="PM" start="12" end="12"/>
155    <field name="FZ" start="15" end="15"/>
156  </flags>
157
158  <reg name="xmm0" bitsize="128" type="vec128" regnum="40"/>
159  <reg name="xmm1" bitsize="128" type="vec128"/>
160  <reg name="xmm2" bitsize="128" type="vec128"/>
161  <reg name="xmm3" bitsize="128" type="vec128"/>
162  <reg name="xmm4" bitsize="128" type="vec128"/>
163  <reg name="xmm5" bitsize="128" type="vec128"/>
164  <reg name="xmm6" bitsize="128" type="vec128"/>
165  <reg name="xmm7" bitsize="128" type="vec128"/>
166  <reg name="xmm8" bitsize="128" type="vec128"/>
167  <reg name="xmm9" bitsize="128" type="vec128"/>
168  <reg name="xmm10" bitsize="128" type="vec128"/>
169  <reg name="xmm11" bitsize="128" type="vec128"/>
170  <reg name="xmm12" bitsize="128" type="vec128"/>
171  <reg name="xmm13" bitsize="128" type="vec128"/>
172  <reg name="xmm14" bitsize="128" type="vec128"/>
173  <reg name="xmm15" bitsize="128" type="vec128"/>
174
175  <reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
176</feature>""", False
177
178                return None, False
179
180            def readRegister(self, regnum):
181                return ""
182
183            def readRegisters(self):
184                return "0600000000000000c0b7c00080fffffff021c60080ffffff1a00000000000000020000000000000078b7c00080ffffff203f8ca090ffffff103f8ca090ffffff3025990a80ffffff809698000000000070009f0a80ffffff020000000000000000eae10080ffffff00000000000000001822d74f1a00000078b7c00080ffffff0e12410080ffff004602000008000000100000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f0300000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f0000"
185
186            def haltReason(self):
187                return "T02thread:dead;threads:dead;"
188
189            def qfThreadInfo(self):
190                return "mdead"
191
192            def qC(self):
193                return ""
194
195            def qSupported(self, client_supported):
196                return "PacketSize=4000;qXfer:features:read+"
197
198            def QThreadSuffixSupported(self):
199                return "OK"
200
201            def QListThreadsInStopReply(self):
202                return "OK"
203
204        self.server.responder = MyResponder()
205        if self.TraceOn():
206            self.runCmd("log enable gdb-remote packets")
207            self.addTearDownHook(
208                    lambda: self.runCmd("log disable gdb-remote packets"))
209
210        target = self.dbg.CreateTargetWithFileAndArch(None, None)
211
212        process = self.connect(target)
213
214        if self.TraceOn():
215            interp = self.dbg.GetCommandInterpreter()
216            result = lldb.SBCommandReturnObject()
217            interp.HandleCommand("target list", result)
218            print(result.GetOutput())
219
220        rip_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("rip")
221        self.assertEqual(rip_valobj.GetValueAsUnsigned(), 0x00ffff800041120e)
222
223        r15_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("r15")
224        self.assertEqual(r15_valobj.GetValueAsUnsigned(), 0xffffff8000c0b778)
225
226        mxcsr_valobj = process.GetThreadAtIndex(0).GetFrameAtIndex(0).FindRegister("mxcsr")
227        self.assertEqual(mxcsr_valobj.GetValueAsUnsigned(), 0x00001f80)
228
229        gpr_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(0).GetName()
230        self.assertEqual(gpr_reg_set_name, "general")
231
232        float_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(1).GetName()
233        self.assertEqual(float_reg_set_name, "float")
234
235        vector_reg_set_name = process.GetThreadAtIndex(0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(2).GetName()
236        self.assertEqual(vector_reg_set_name, "vector")
237
238        if self.TraceOn():
239            print("rip is 0x%x" % rip_valobj.GetValueAsUnsigned())
240            print("r15 is 0x%x" % r15_valobj.GetValueAsUnsigned())
241            print("mxcsr is 0x%x" % mxcsr_valobj.GetValueAsUnsigned())
242