1 //===-- GDBRemoteRegisterContext.cpp --------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "GDBRemoteRegisterContext.h" 10 11 #include "lldb/Target/ExecutionContext.h" 12 #include "lldb/Target/Target.h" 13 #include "lldb/Utility/DataBufferHeap.h" 14 #include "lldb/Utility/DataExtractor.h" 15 #include "lldb/Utility/RegisterValue.h" 16 #include "lldb/Utility/Scalar.h" 17 #include "lldb/Utility/StreamString.h" 18 #include "ProcessGDBRemote.h" 19 #include "ProcessGDBRemoteLog.h" 20 #include "ThreadGDBRemote.h" 21 #include "Utility/ARM_DWARF_Registers.h" 22 #include "Utility/ARM_ehframe_Registers.h" 23 #include "lldb/Utility/StringExtractorGDBRemote.h" 24 25 #include <memory> 26 27 using namespace lldb; 28 using namespace lldb_private; 29 using namespace lldb_private::process_gdb_remote; 30 31 // GDBRemoteRegisterContext constructor 32 GDBRemoteRegisterContext::GDBRemoteRegisterContext( 33 ThreadGDBRemote &thread, uint32_t concrete_frame_idx, 34 GDBRemoteDynamicRegisterInfoSP reg_info_sp, bool read_all_at_once, 35 bool write_all_at_once) 36 : RegisterContext(thread, concrete_frame_idx), 37 m_reg_info_sp(std::move(reg_info_sp)), m_reg_valid(), m_reg_data(), 38 m_read_all_at_once(read_all_at_once), 39 m_write_all_at_once(write_all_at_once), m_gpacket_cached(false) { 40 // Resize our vector of bools to contain one bool for every register. We will 41 // use these boolean values to know when a register value is valid in 42 // m_reg_data. 43 m_reg_valid.resize(m_reg_info_sp->GetNumRegisters()); 44 45 // Make a heap based buffer that is big enough to store all registers 46 DataBufferSP reg_data_sp( 47 new DataBufferHeap(m_reg_info_sp->GetRegisterDataByteSize(), 0)); 48 m_reg_data.SetData(reg_data_sp); 49 m_reg_data.SetByteOrder(thread.GetProcess()->GetByteOrder()); 50 } 51 52 // Destructor 53 GDBRemoteRegisterContext::~GDBRemoteRegisterContext() = default; 54 55 void GDBRemoteRegisterContext::InvalidateAllRegisters() { 56 SetAllRegisterValid(false); 57 } 58 59 void GDBRemoteRegisterContext::SetAllRegisterValid(bool b) { 60 m_gpacket_cached = b; 61 std::vector<bool>::iterator pos, end = m_reg_valid.end(); 62 for (pos = m_reg_valid.begin(); pos != end; ++pos) 63 *pos = b; 64 } 65 66 size_t GDBRemoteRegisterContext::GetRegisterCount() { 67 return m_reg_info_sp->GetNumRegisters(); 68 } 69 70 const RegisterInfo * 71 GDBRemoteRegisterContext::GetRegisterInfoAtIndex(size_t reg) { 72 RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfoAtIndex(reg); 73 74 if (reg_info && reg_info->dynamic_size_dwarf_expr_bytes) { 75 const ArchSpec &arch = m_thread.GetProcess()->GetTarget().GetArchitecture(); 76 uint8_t reg_size = UpdateDynamicRegisterSize(arch, reg_info); 77 reg_info->byte_size = reg_size; 78 } 79 return reg_info; 80 } 81 82 size_t GDBRemoteRegisterContext::GetRegisterSetCount() { 83 return m_reg_info_sp->GetNumRegisterSets(); 84 } 85 86 const RegisterSet *GDBRemoteRegisterContext::GetRegisterSet(size_t reg_set) { 87 return m_reg_info_sp->GetRegisterSet(reg_set); 88 } 89 90 bool GDBRemoteRegisterContext::ReadRegister(const RegisterInfo *reg_info, 91 RegisterValue &value) { 92 // Read the register 93 if (ReadRegisterBytes(reg_info)) { 94 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 95 if (m_reg_valid[reg] == false) 96 return false; 97 const bool partial_data_ok = false; 98 Status error(value.SetValueFromData( 99 reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok)); 100 return error.Success(); 101 } 102 return false; 103 } 104 105 bool GDBRemoteRegisterContext::PrivateSetRegisterValue( 106 uint32_t reg, llvm::ArrayRef<uint8_t> data) { 107 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 108 if (reg_info == nullptr) 109 return false; 110 111 // Invalidate if needed 112 InvalidateIfNeeded(false); 113 114 const size_t reg_byte_size = reg_info->byte_size; 115 memcpy(const_cast<uint8_t *>( 116 m_reg_data.PeekData(reg_info->byte_offset, reg_byte_size)), 117 data.data(), std::min(data.size(), reg_byte_size)); 118 bool success = data.size() >= reg_byte_size; 119 if (success) { 120 SetRegisterIsValid(reg, true); 121 } else if (data.size() > 0) { 122 // Only set register is valid to false if we copied some bytes, else leave 123 // it as it was. 124 SetRegisterIsValid(reg, false); 125 } 126 return success; 127 } 128 129 bool GDBRemoteRegisterContext::PrivateSetRegisterValue(uint32_t reg, 130 uint64_t new_reg_val) { 131 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 132 if (reg_info == nullptr) 133 return false; 134 135 // Early in process startup, we can get a thread that has an invalid byte 136 // order because the process hasn't been completely set up yet (see the ctor 137 // where the byte order is setfrom the process). If that's the case, we 138 // can't set the value here. 139 if (m_reg_data.GetByteOrder() == eByteOrderInvalid) { 140 return false; 141 } 142 143 // Invalidate if needed 144 InvalidateIfNeeded(false); 145 146 DataBufferSP buffer_sp(new DataBufferHeap(&new_reg_val, sizeof(new_reg_val))); 147 DataExtractor data(buffer_sp, endian::InlHostByteOrder(), sizeof(void *)); 148 149 // If our register context and our register info disagree, which should never 150 // happen, don't overwrite past the end of the buffer. 151 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 152 return false; 153 154 // Grab a pointer to where we are going to put this register 155 uint8_t *dst = const_cast<uint8_t *>( 156 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 157 158 if (dst == nullptr) 159 return false; 160 161 if (data.CopyByteOrderedData(0, // src offset 162 reg_info->byte_size, // src length 163 dst, // dst 164 reg_info->byte_size, // dst length 165 m_reg_data.GetByteOrder())) // dst byte order 166 { 167 SetRegisterIsValid(reg, true); 168 return true; 169 } 170 return false; 171 } 172 173 // Helper function for GDBRemoteRegisterContext::ReadRegisterBytes(). 174 bool GDBRemoteRegisterContext::GetPrimordialRegister( 175 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 176 const uint32_t lldb_reg = reg_info->kinds[eRegisterKindLLDB]; 177 const uint32_t remote_reg = reg_info->kinds[eRegisterKindProcessPlugin]; 178 179 if (DataBufferSP buffer_sp = 180 gdb_comm.ReadRegister(m_thread.GetProtocolID(), remote_reg)) 181 return PrivateSetRegisterValue( 182 lldb_reg, llvm::ArrayRef<uint8_t>(buffer_sp->GetBytes(), 183 buffer_sp->GetByteSize())); 184 return false; 185 } 186 187 bool GDBRemoteRegisterContext::ReadRegisterBytes(const RegisterInfo *reg_info) { 188 ExecutionContext exe_ctx(CalculateThread()); 189 190 Process *process = exe_ctx.GetProcessPtr(); 191 Thread *thread = exe_ctx.GetThreadPtr(); 192 if (process == nullptr || thread == nullptr) 193 return false; 194 195 GDBRemoteCommunicationClient &gdb_comm( 196 ((ProcessGDBRemote *)process)->GetGDBRemote()); 197 198 InvalidateIfNeeded(false); 199 200 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 201 202 if (!GetRegisterIsValid(reg)) { 203 if (m_read_all_at_once && !m_gpacket_cached) { 204 if (DataBufferSP buffer_sp = 205 gdb_comm.ReadAllRegisters(m_thread.GetProtocolID())) { 206 memcpy(const_cast<uint8_t *>(m_reg_data.GetDataStart()), 207 buffer_sp->GetBytes(), 208 std::min(buffer_sp->GetByteSize(), m_reg_data.GetByteSize())); 209 if (buffer_sp->GetByteSize() >= m_reg_data.GetByteSize()) { 210 SetAllRegisterValid(true); 211 return true; 212 } else if (buffer_sp->GetByteSize() > 0) { 213 const int regcount = m_reg_info_sp->GetNumRegisters(); 214 for (int i = 0; i < regcount; i++) { 215 struct RegisterInfo *reginfo = 216 m_reg_info_sp->GetRegisterInfoAtIndex(i); 217 if (reginfo->byte_offset + reginfo->byte_size <= 218 buffer_sp->GetByteSize()) { 219 m_reg_valid[i] = true; 220 } else { 221 m_reg_valid[i] = false; 222 } 223 } 224 225 m_gpacket_cached = true; 226 if (GetRegisterIsValid(reg)) 227 return true; 228 } else { 229 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 230 GDBR_LOG_PACKETS)); 231 LLDB_LOGF( 232 log, 233 "error: GDBRemoteRegisterContext::ReadRegisterBytes tried " 234 "to read the " 235 "entire register context at once, expected at least %" PRId64 236 " bytes " 237 "but only got %" PRId64 " bytes.", 238 m_reg_data.GetByteSize(), buffer_sp->GetByteSize()); 239 return false; 240 } 241 } 242 } 243 if (reg_info->value_regs) { 244 // Process this composite register request by delegating to the 245 // constituent primordial registers. 246 247 // Index of the primordial register. 248 bool success = true; 249 for (uint32_t idx = 0; success; ++idx) { 250 const uint32_t prim_reg = reg_info->value_regs[idx]; 251 if (prim_reg == LLDB_INVALID_REGNUM) 252 break; 253 // We have a valid primordial register as our constituent. Grab the 254 // corresponding register info. 255 const RegisterInfo *prim_reg_info = 256 GetRegisterInfo(eRegisterKindLLDB, prim_reg); 257 if (prim_reg_info == nullptr) 258 success = false; 259 else { 260 // Read the containing register if it hasn't already been read 261 if (!GetRegisterIsValid(prim_reg)) 262 success = GetPrimordialRegister(prim_reg_info, gdb_comm); 263 } 264 } 265 266 if (success) { 267 // If we reach this point, all primordial register requests have 268 // succeeded. Validate this composite register. 269 SetRegisterIsValid(reg_info, true); 270 } 271 } else { 272 // Get each register individually 273 GetPrimordialRegister(reg_info, gdb_comm); 274 } 275 276 // Make sure we got a valid register value after reading it 277 if (!GetRegisterIsValid(reg)) 278 return false; 279 } 280 281 return true; 282 } 283 284 bool GDBRemoteRegisterContext::WriteRegister(const RegisterInfo *reg_info, 285 const RegisterValue &value) { 286 DataExtractor data; 287 if (value.GetData(data)) 288 return WriteRegisterBytes(reg_info, data, 0); 289 return false; 290 } 291 292 // Helper function for GDBRemoteRegisterContext::WriteRegisterBytes(). 293 bool GDBRemoteRegisterContext::SetPrimordialRegister( 294 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 295 StreamString packet; 296 StringExtractorGDBRemote response; 297 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 298 // Invalidate just this register 299 SetRegisterIsValid(reg, false); 300 301 return gdb_comm.WriteRegister( 302 m_thread.GetProtocolID(), reg_info->kinds[eRegisterKindProcessPlugin], 303 {m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size), 304 reg_info->byte_size}); 305 } 306 307 bool GDBRemoteRegisterContext::WriteRegisterBytes(const RegisterInfo *reg_info, 308 DataExtractor &data, 309 uint32_t data_offset) { 310 ExecutionContext exe_ctx(CalculateThread()); 311 312 Process *process = exe_ctx.GetProcessPtr(); 313 Thread *thread = exe_ctx.GetThreadPtr(); 314 if (process == nullptr || thread == nullptr) 315 return false; 316 317 GDBRemoteCommunicationClient &gdb_comm( 318 ((ProcessGDBRemote *)process)->GetGDBRemote()); 319 320 assert(m_reg_data.GetByteSize() >= 321 reg_info->byte_offset + reg_info->byte_size); 322 323 // If our register context and our register info disagree, which should never 324 // happen, don't overwrite past the end of the buffer. 325 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 326 return false; 327 328 // Grab a pointer to where we are going to put this register 329 uint8_t *dst = const_cast<uint8_t *>( 330 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 331 332 if (dst == nullptr) 333 return false; 334 335 // Code below is specific to AArch64 target in SVE state 336 // If vector granule (vg) register is being written then thread's 337 // register context reconfiguration is triggered on success. 338 bool do_reconfigure_arm64_sve = false; 339 const ArchSpec &arch = process->GetTarget().GetArchitecture(); 340 if (arch.IsValid() && arch.GetTriple().isAArch64()) 341 if (strcmp(reg_info->name, "vg") == 0) 342 do_reconfigure_arm64_sve = true; 343 344 if (data.CopyByteOrderedData(data_offset, // src offset 345 reg_info->byte_size, // src length 346 dst, // dst 347 reg_info->byte_size, // dst length 348 m_reg_data.GetByteOrder())) // dst byte order 349 { 350 GDBRemoteClientBase::Lock lock(gdb_comm); 351 if (lock) { 352 if (m_write_all_at_once) { 353 // Invalidate all register values 354 InvalidateIfNeeded(true); 355 356 // Set all registers in one packet 357 if (gdb_comm.WriteAllRegisters( 358 m_thread.GetProtocolID(), 359 {m_reg_data.GetDataStart(), size_t(m_reg_data.GetByteSize())})) 360 361 { 362 SetAllRegisterValid(false); 363 364 if (do_reconfigure_arm64_sve) 365 AArch64SVEReconfigure(); 366 367 return true; 368 } 369 } else { 370 bool success = true; 371 372 if (reg_info->value_regs) { 373 // This register is part of another register. In this case we read 374 // the actual register data for any "value_regs", and once all that 375 // data is read, we will have enough data in our register context 376 // bytes for the value of this register 377 378 // Invalidate this composite register first. 379 380 for (uint32_t idx = 0; success; ++idx) { 381 const uint32_t reg = reg_info->value_regs[idx]; 382 if (reg == LLDB_INVALID_REGNUM) 383 break; 384 // We have a valid primordial register as our constituent. Grab the 385 // corresponding register info. 386 const RegisterInfo *value_reg_info = 387 GetRegisterInfo(eRegisterKindLLDB, reg); 388 if (value_reg_info == nullptr) 389 success = false; 390 else 391 success = SetPrimordialRegister(value_reg_info, gdb_comm); 392 } 393 } else { 394 // This is an actual register, write it 395 success = SetPrimordialRegister(reg_info, gdb_comm); 396 397 if (success && do_reconfigure_arm64_sve) 398 AArch64SVEReconfigure(); 399 } 400 401 // Check if writing this register will invalidate any other register 402 // values? If so, invalidate them 403 if (reg_info->invalidate_regs) { 404 for (uint32_t idx = 0, reg = reg_info->invalidate_regs[0]; 405 reg != LLDB_INVALID_REGNUM; 406 reg = reg_info->invalidate_regs[++idx]) 407 SetRegisterIsValid(ConvertRegisterKindToRegisterNumber( 408 eRegisterKindLLDB, reg), 409 false); 410 } 411 412 return success; 413 } 414 } else { 415 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 416 GDBR_LOG_PACKETS)); 417 if (log) { 418 if (log->GetVerbose()) { 419 StreamString strm; 420 gdb_comm.DumpHistory(strm); 421 LLDB_LOGF(log, 422 "error: failed to get packet sequence mutex, not sending " 423 "write register for \"%s\":\n%s", 424 reg_info->name, strm.GetData()); 425 } else 426 LLDB_LOGF(log, 427 "error: failed to get packet sequence mutex, not sending " 428 "write register for \"%s\"", 429 reg_info->name); 430 } 431 } 432 } 433 return false; 434 } 435 436 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 437 RegisterCheckpoint ®_checkpoint) { 438 ExecutionContext exe_ctx(CalculateThread()); 439 440 Process *process = exe_ctx.GetProcessPtr(); 441 Thread *thread = exe_ctx.GetThreadPtr(); 442 if (process == nullptr || thread == nullptr) 443 return false; 444 445 GDBRemoteCommunicationClient &gdb_comm( 446 ((ProcessGDBRemote *)process)->GetGDBRemote()); 447 448 uint32_t save_id = 0; 449 if (gdb_comm.SaveRegisterState(thread->GetProtocolID(), save_id)) { 450 reg_checkpoint.SetID(save_id); 451 reg_checkpoint.GetData().reset(); 452 return true; 453 } else { 454 reg_checkpoint.SetID(0); // Invalid save ID is zero 455 return ReadAllRegisterValues(reg_checkpoint.GetData()); 456 } 457 } 458 459 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 460 const RegisterCheckpoint ®_checkpoint) { 461 uint32_t save_id = reg_checkpoint.GetID(); 462 if (save_id != 0) { 463 ExecutionContext exe_ctx(CalculateThread()); 464 465 Process *process = exe_ctx.GetProcessPtr(); 466 Thread *thread = exe_ctx.GetThreadPtr(); 467 if (process == nullptr || thread == nullptr) 468 return false; 469 470 GDBRemoteCommunicationClient &gdb_comm( 471 ((ProcessGDBRemote *)process)->GetGDBRemote()); 472 473 return gdb_comm.RestoreRegisterState(m_thread.GetProtocolID(), save_id); 474 } else { 475 return WriteAllRegisterValues(reg_checkpoint.GetData()); 476 } 477 } 478 479 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 480 lldb::DataBufferSP &data_sp) { 481 ExecutionContext exe_ctx(CalculateThread()); 482 483 Process *process = exe_ctx.GetProcessPtr(); 484 Thread *thread = exe_ctx.GetThreadPtr(); 485 if (process == nullptr || thread == nullptr) 486 return false; 487 488 GDBRemoteCommunicationClient &gdb_comm( 489 ((ProcessGDBRemote *)process)->GetGDBRemote()); 490 491 const bool use_g_packet = 492 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 493 494 GDBRemoteClientBase::Lock lock(gdb_comm); 495 if (lock) { 496 if (gdb_comm.SyncThreadState(m_thread.GetProtocolID())) 497 InvalidateAllRegisters(); 498 499 if (use_g_packet && 500 (data_sp = gdb_comm.ReadAllRegisters(m_thread.GetProtocolID()))) 501 return true; 502 503 // We're going to read each register 504 // individually and store them as binary data in a buffer. 505 const RegisterInfo *reg_info; 506 507 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 508 i++) { 509 if (reg_info 510 ->value_regs) // skip registers that are slices of real registers 511 continue; 512 ReadRegisterBytes(reg_info); 513 // ReadRegisterBytes saves the contents of the register in to the 514 // m_reg_data buffer 515 } 516 data_sp = std::make_shared<DataBufferHeap>( 517 m_reg_data.GetDataStart(), m_reg_info_sp->GetRegisterDataByteSize()); 518 return true; 519 } else { 520 521 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 522 GDBR_LOG_PACKETS)); 523 if (log) { 524 if (log->GetVerbose()) { 525 StreamString strm; 526 gdb_comm.DumpHistory(strm); 527 LLDB_LOGF(log, 528 "error: failed to get packet sequence mutex, not sending " 529 "read all registers:\n%s", 530 strm.GetData()); 531 } else 532 LLDB_LOGF(log, 533 "error: failed to get packet sequence mutex, not sending " 534 "read all registers"); 535 } 536 } 537 538 data_sp.reset(); 539 return false; 540 } 541 542 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 543 const lldb::DataBufferSP &data_sp) { 544 if (!data_sp || data_sp->GetBytes() == nullptr || data_sp->GetByteSize() == 0) 545 return false; 546 547 ExecutionContext exe_ctx(CalculateThread()); 548 549 Process *process = exe_ctx.GetProcessPtr(); 550 Thread *thread = exe_ctx.GetThreadPtr(); 551 if (process == nullptr || thread == nullptr) 552 return false; 553 554 GDBRemoteCommunicationClient &gdb_comm( 555 ((ProcessGDBRemote *)process)->GetGDBRemote()); 556 557 const bool use_g_packet = 558 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 559 560 GDBRemoteClientBase::Lock lock(gdb_comm); 561 if (lock) { 562 // The data_sp contains the G response packet. 563 if (use_g_packet) { 564 if (gdb_comm.WriteAllRegisters( 565 m_thread.GetProtocolID(), 566 {data_sp->GetBytes(), size_t(data_sp->GetByteSize())})) 567 return true; 568 569 uint32_t num_restored = 0; 570 // We need to manually go through all of the registers and restore them 571 // manually 572 DataExtractor restore_data(data_sp, m_reg_data.GetByteOrder(), 573 m_reg_data.GetAddressByteSize()); 574 575 const RegisterInfo *reg_info; 576 577 // The g packet contents may either include the slice registers 578 // (registers defined in terms of other registers, e.g. eax is a subset 579 // of rax) or not. The slice registers should NOT be in the g packet, 580 // but some implementations may incorrectly include them. 581 // 582 // If the slice registers are included in the packet, we must step over 583 // the slice registers when parsing the packet -- relying on the 584 // RegisterInfo byte_offset field would be incorrect. If the slice 585 // registers are not included, then using the byte_offset values into the 586 // data buffer is the best way to find individual register values. 587 588 uint64_t size_including_slice_registers = 0; 589 uint64_t size_not_including_slice_registers = 0; 590 uint64_t size_by_highest_offset = 0; 591 592 for (uint32_t reg_idx = 0; 593 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; ++reg_idx) { 594 size_including_slice_registers += reg_info->byte_size; 595 if (reg_info->value_regs == nullptr) 596 size_not_including_slice_registers += reg_info->byte_size; 597 if (reg_info->byte_offset >= size_by_highest_offset) 598 size_by_highest_offset = reg_info->byte_offset + reg_info->byte_size; 599 } 600 601 bool use_byte_offset_into_buffer; 602 if (size_by_highest_offset == restore_data.GetByteSize()) { 603 // The size of the packet agrees with the highest offset: + size in the 604 // register file 605 use_byte_offset_into_buffer = true; 606 } else if (size_not_including_slice_registers == 607 restore_data.GetByteSize()) { 608 // The size of the packet is the same as concatenating all of the 609 // registers sequentially, skipping the slice registers 610 use_byte_offset_into_buffer = true; 611 } else if (size_including_slice_registers == restore_data.GetByteSize()) { 612 // The slice registers are present in the packet (when they shouldn't 613 // be). Don't try to use the RegisterInfo byte_offset into the 614 // restore_data, it will point to the wrong place. 615 use_byte_offset_into_buffer = false; 616 } else { 617 // None of our expected sizes match the actual g packet data we're 618 // looking at. The most conservative approach here is to use the 619 // running total byte offset. 620 use_byte_offset_into_buffer = false; 621 } 622 623 // In case our register definitions don't include the correct offsets, 624 // keep track of the size of each reg & compute offset based on that. 625 uint32_t running_byte_offset = 0; 626 for (uint32_t reg_idx = 0; 627 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; 628 ++reg_idx, running_byte_offset += reg_info->byte_size) { 629 // Skip composite aka slice registers (e.g. eax is a slice of rax). 630 if (reg_info->value_regs) 631 continue; 632 633 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 634 635 uint32_t register_offset; 636 if (use_byte_offset_into_buffer) { 637 register_offset = reg_info->byte_offset; 638 } else { 639 register_offset = running_byte_offset; 640 } 641 642 const uint32_t reg_byte_size = reg_info->byte_size; 643 644 const uint8_t *restore_src = 645 restore_data.PeekData(register_offset, reg_byte_size); 646 if (restore_src) { 647 SetRegisterIsValid(reg, false); 648 if (gdb_comm.WriteRegister( 649 m_thread.GetProtocolID(), 650 reg_info->kinds[eRegisterKindProcessPlugin], 651 {restore_src, reg_byte_size})) 652 ++num_restored; 653 } 654 } 655 return num_restored > 0; 656 } else { 657 // For the use_g_packet == false case, we're going to write each register 658 // individually. The data buffer is binary data in this case, instead of 659 // ascii characters. 660 661 bool arm64_debugserver = false; 662 if (m_thread.GetProcess().get()) { 663 const ArchSpec &arch = 664 m_thread.GetProcess()->GetTarget().GetArchitecture(); 665 if (arch.IsValid() && (arch.GetMachine() == llvm::Triple::aarch64 || 666 arch.GetMachine() == llvm::Triple::aarch64_32) && 667 arch.GetTriple().getVendor() == llvm::Triple::Apple && 668 arch.GetTriple().getOS() == llvm::Triple::IOS) { 669 arm64_debugserver = true; 670 } 671 } 672 uint32_t num_restored = 0; 673 const RegisterInfo *reg_info; 674 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 675 i++) { 676 if (reg_info->value_regs) // skip registers that are slices of real 677 // registers 678 continue; 679 // Skip the fpsr and fpcr floating point status/control register 680 // writing to work around a bug in an older version of debugserver that 681 // would lead to register context corruption when writing fpsr/fpcr. 682 if (arm64_debugserver && (strcmp(reg_info->name, "fpsr") == 0 || 683 strcmp(reg_info->name, "fpcr") == 0)) { 684 continue; 685 } 686 687 SetRegisterIsValid(reg_info, false); 688 if (gdb_comm.WriteRegister(m_thread.GetProtocolID(), 689 reg_info->kinds[eRegisterKindProcessPlugin], 690 {data_sp->GetBytes() + reg_info->byte_offset, 691 reg_info->byte_size})) 692 ++num_restored; 693 } 694 return num_restored > 0; 695 } 696 } else { 697 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 698 GDBR_LOG_PACKETS)); 699 if (log) { 700 if (log->GetVerbose()) { 701 StreamString strm; 702 gdb_comm.DumpHistory(strm); 703 LLDB_LOGF(log, 704 "error: failed to get packet sequence mutex, not sending " 705 "write all registers:\n%s", 706 strm.GetData()); 707 } else 708 LLDB_LOGF(log, 709 "error: failed to get packet sequence mutex, not sending " 710 "write all registers"); 711 } 712 } 713 return false; 714 } 715 716 uint32_t GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber( 717 lldb::RegisterKind kind, uint32_t num) { 718 return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num); 719 } 720 721 bool GDBRemoteRegisterContext::AArch64SVEReconfigure() { 722 if (!m_reg_info_sp) 723 return false; 724 725 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("vg"); 726 if (!reg_info) 727 return false; 728 729 uint64_t fail_value = LLDB_INVALID_ADDRESS; 730 uint32_t vg_reg_num = reg_info->kinds[eRegisterKindLLDB]; 731 uint64_t vg_reg_value = ReadRegisterAsUnsigned(vg_reg_num, fail_value); 732 733 if (vg_reg_value != fail_value && vg_reg_value <= 32) { 734 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("p0"); 735 if (!reg_info || vg_reg_value == reg_info->byte_size) 736 return false; 737 738 if (m_reg_info_sp->UpdateARM64SVERegistersInfos(vg_reg_value)) { 739 // Make a heap based buffer that is big enough to store all registers 740 m_reg_data.SetData(std::make_shared<DataBufferHeap>( 741 m_reg_info_sp->GetRegisterDataByteSize(), 0)); 742 m_reg_data.SetByteOrder(GetByteOrder()); 743 744 InvalidateAllRegisters(); 745 746 return true; 747 } 748 } 749 750 return false; 751 } 752 753 bool GDBRemoteDynamicRegisterInfo::UpdateARM64SVERegistersInfos(uint64_t vg) { 754 // SVE Z register size is vg x 8 bytes. 755 uint32_t z_reg_byte_size = vg * 8; 756 757 // SVE vector length has changed, accordingly set size of Z, P and FFR 758 // registers. Also invalidate register offsets it will be recalculated 759 // after SVE register size update. 760 for (auto ® : m_regs) { 761 if (reg.value_regs == nullptr) { 762 if (reg.name[0] == 'z' && isdigit(reg.name[1])) 763 reg.byte_size = z_reg_byte_size; 764 else if (reg.name[0] == 'p' && isdigit(reg.name[1])) 765 reg.byte_size = vg; 766 else if (strcmp(reg.name, "ffr") == 0) 767 reg.byte_size = vg; 768 } 769 reg.byte_offset = LLDB_INVALID_INDEX32; 770 } 771 772 // Re-calculate register offsets 773 ConfigureOffsets(); 774 return true; 775 } 776 777 void GDBRemoteDynamicRegisterInfo::HardcodeARMRegisters(bool from_scratch) { 778 // For Advanced SIMD and VFP register mapping. 779 static uint32_t g_d0_regs[] = {26, 27, LLDB_INVALID_REGNUM}; // (s0, s1) 780 static uint32_t g_d1_regs[] = {28, 29, LLDB_INVALID_REGNUM}; // (s2, s3) 781 static uint32_t g_d2_regs[] = {30, 31, LLDB_INVALID_REGNUM}; // (s4, s5) 782 static uint32_t g_d3_regs[] = {32, 33, LLDB_INVALID_REGNUM}; // (s6, s7) 783 static uint32_t g_d4_regs[] = {34, 35, LLDB_INVALID_REGNUM}; // (s8, s9) 784 static uint32_t g_d5_regs[] = {36, 37, LLDB_INVALID_REGNUM}; // (s10, s11) 785 static uint32_t g_d6_regs[] = {38, 39, LLDB_INVALID_REGNUM}; // (s12, s13) 786 static uint32_t g_d7_regs[] = {40, 41, LLDB_INVALID_REGNUM}; // (s14, s15) 787 static uint32_t g_d8_regs[] = {42, 43, LLDB_INVALID_REGNUM}; // (s16, s17) 788 static uint32_t g_d9_regs[] = {44, 45, LLDB_INVALID_REGNUM}; // (s18, s19) 789 static uint32_t g_d10_regs[] = {46, 47, LLDB_INVALID_REGNUM}; // (s20, s21) 790 static uint32_t g_d11_regs[] = {48, 49, LLDB_INVALID_REGNUM}; // (s22, s23) 791 static uint32_t g_d12_regs[] = {50, 51, LLDB_INVALID_REGNUM}; // (s24, s25) 792 static uint32_t g_d13_regs[] = {52, 53, LLDB_INVALID_REGNUM}; // (s26, s27) 793 static uint32_t g_d14_regs[] = {54, 55, LLDB_INVALID_REGNUM}; // (s28, s29) 794 static uint32_t g_d15_regs[] = {56, 57, LLDB_INVALID_REGNUM}; // (s30, s31) 795 static uint32_t g_q0_regs[] = { 796 26, 27, 28, 29, LLDB_INVALID_REGNUM}; // (d0, d1) -> (s0, s1, s2, s3) 797 static uint32_t g_q1_regs[] = { 798 30, 31, 32, 33, LLDB_INVALID_REGNUM}; // (d2, d3) -> (s4, s5, s6, s7) 799 static uint32_t g_q2_regs[] = { 800 34, 35, 36, 37, LLDB_INVALID_REGNUM}; // (d4, d5) -> (s8, s9, s10, s11) 801 static uint32_t g_q3_regs[] = { 802 38, 39, 40, 41, LLDB_INVALID_REGNUM}; // (d6, d7) -> (s12, s13, s14, s15) 803 static uint32_t g_q4_regs[] = { 804 42, 43, 44, 45, LLDB_INVALID_REGNUM}; // (d8, d9) -> (s16, s17, s18, s19) 805 static uint32_t g_q5_regs[] = { 806 46, 47, 48, 49, 807 LLDB_INVALID_REGNUM}; // (d10, d11) -> (s20, s21, s22, s23) 808 static uint32_t g_q6_regs[] = { 809 50, 51, 52, 53, 810 LLDB_INVALID_REGNUM}; // (d12, d13) -> (s24, s25, s26, s27) 811 static uint32_t g_q7_regs[] = { 812 54, 55, 56, 57, 813 LLDB_INVALID_REGNUM}; // (d14, d15) -> (s28, s29, s30, s31) 814 static uint32_t g_q8_regs[] = {59, 60, LLDB_INVALID_REGNUM}; // (d16, d17) 815 static uint32_t g_q9_regs[] = {61, 62, LLDB_INVALID_REGNUM}; // (d18, d19) 816 static uint32_t g_q10_regs[] = {63, 64, LLDB_INVALID_REGNUM}; // (d20, d21) 817 static uint32_t g_q11_regs[] = {65, 66, LLDB_INVALID_REGNUM}; // (d22, d23) 818 static uint32_t g_q12_regs[] = {67, 68, LLDB_INVALID_REGNUM}; // (d24, d25) 819 static uint32_t g_q13_regs[] = {69, 70, LLDB_INVALID_REGNUM}; // (d26, d27) 820 static uint32_t g_q14_regs[] = {71, 72, LLDB_INVALID_REGNUM}; // (d28, d29) 821 static uint32_t g_q15_regs[] = {73, 74, LLDB_INVALID_REGNUM}; // (d30, d31) 822 823 // This is our array of composite registers, with each element coming from 824 // the above register mappings. 825 static uint32_t *g_composites[] = { 826 g_d0_regs, g_d1_regs, g_d2_regs, g_d3_regs, g_d4_regs, g_d5_regs, 827 g_d6_regs, g_d7_regs, g_d8_regs, g_d9_regs, g_d10_regs, g_d11_regs, 828 g_d12_regs, g_d13_regs, g_d14_regs, g_d15_regs, g_q0_regs, g_q1_regs, 829 g_q2_regs, g_q3_regs, g_q4_regs, g_q5_regs, g_q6_regs, g_q7_regs, 830 g_q8_regs, g_q9_regs, g_q10_regs, g_q11_regs, g_q12_regs, g_q13_regs, 831 g_q14_regs, g_q15_regs}; 832 833 // clang-format off 834 static RegisterInfo g_register_infos[] = { 835 // NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS SIZE EXPR SIZE LEN 836 // ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== =============== ========= ======== 837 { "r0", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr, nullptr, 0 }, 838 { "r1", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr, nullptr, 0 }, 839 { "r2", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr, nullptr, 0 }, 840 { "r3", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr, nullptr, 0 }, 841 { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr, nullptr, 0 }, 842 { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr, nullptr, 0 }, 843 { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr, nullptr, 0 }, 844 { "r7", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr, nullptr, 0 }, 845 { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr, nullptr, 0 }, 846 { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr, nullptr, 0 }, 847 { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr, nullptr, 0 }, 848 { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr, nullptr, 0 }, 849 { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr, nullptr, 0 }, 850 { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr, nullptr, 0 }, 851 { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr, nullptr, 0 }, 852 { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr, nullptr, 0 }, 853 { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr, nullptr, 0 }, 854 { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr, nullptr, 0 }, 855 { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr, nullptr, 0 }, 856 { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr, nullptr, 0 }, 857 { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr, nullptr, 0 }, 858 { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr, nullptr, 0 }, 859 { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr, nullptr, 0 }, 860 { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr, nullptr, 0 }, 861 { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr, nullptr, 0 }, 862 { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr, nullptr, 0 }, 863 { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr, nullptr, 0 }, 864 { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr, nullptr, 0 }, 865 { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr, nullptr, 0 }, 866 { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr, nullptr, 0 }, 867 { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr, nullptr, 0 }, 868 { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr, nullptr, 0 }, 869 { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr, nullptr, 0 }, 870 { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr, nullptr, 0 }, 871 { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr, nullptr, 0 }, 872 { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr, nullptr, 0 }, 873 { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr, nullptr, 0 }, 874 { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr, nullptr, 0 }, 875 { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr, nullptr, 0 }, 876 { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr, nullptr, 0 }, 877 { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr, nullptr, 0 }, 878 { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr, nullptr, 0 }, 879 { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr, nullptr, 0 }, 880 { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr, nullptr, 0 }, 881 { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr, nullptr, 0 }, 882 { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr, nullptr, 0 }, 883 { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr, nullptr, 0 }, 884 { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr, nullptr, 0 }, 885 { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr, nullptr, 0 }, 886 { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr, nullptr, 0 }, 887 { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr, nullptr, 0 }, 888 { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr, nullptr, 0 }, 889 { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr, nullptr, 0 }, 890 { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr, nullptr, 0 }, 891 { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr, nullptr, 0 }, 892 { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr, nullptr, 0 }, 893 { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr, nullptr, 0 }, 894 { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr, nullptr, 0 }, 895 { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr, nullptr, 0 }, 896 { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr, nullptr, 0 }, 897 { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr, nullptr, 0 }, 898 { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr, nullptr, 0 }, 899 { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr, nullptr, 0 }, 900 { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr, nullptr, 0 }, 901 { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr, nullptr, 0 }, 902 { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr, nullptr, 0 }, 903 { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr, nullptr, 0 }, 904 { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr, nullptr, 0 }, 905 { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr, nullptr, 0 }, 906 { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr, nullptr, 0 }, 907 { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr, nullptr, 0 }, 908 { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr, nullptr, 0 }, 909 { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr, nullptr, 0 }, 910 { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr, nullptr, 0 }, 911 { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr, nullptr, 0 }, 912 { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr, nullptr, 0 }, 913 { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr, nullptr, 0 }, 914 { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr, nullptr, 0 }, 915 { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr, nullptr, 0 }, 916 { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr, nullptr, 0 }, 917 { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr, nullptr, 0 }, 918 { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr, nullptr, 0 }, 919 { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr, nullptr, 0 }, 920 { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr, nullptr, 0 }, 921 { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr, nullptr, 0 }, 922 { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr, nullptr, 0 }, 923 { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr, nullptr, 0 }, 924 { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr, nullptr, 0 }, 925 { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr, nullptr, 0 }, 926 { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr, nullptr, 0 }, 927 { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr, nullptr, 0 }, 928 { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr, nullptr, 0 }, 929 { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr, nullptr, 0 }, 930 { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr, nullptr, 0 }, 931 { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr, nullptr, 0 }, 932 { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr, nullptr, 0 }, 933 { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr, nullptr, 0 }, 934 { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr, nullptr, 0 }, 935 { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr, nullptr, 0 }, 936 { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr, nullptr, 0 }, 937 { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr, nullptr, 0 }, 938 { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr, nullptr, 0 }, 939 { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr, nullptr, 0 }, 940 { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr, nullptr, 0 }, 941 { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr, nullptr, 0 }, 942 { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr, nullptr, 0 }, 943 { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr, nullptr, 0 } 944 }; 945 // clang-format on 946 947 static const uint32_t num_registers = llvm::array_lengthof(g_register_infos); 948 static ConstString gpr_reg_set("General Purpose Registers"); 949 static ConstString sfp_reg_set("Software Floating Point Registers"); 950 static ConstString vfp_reg_set("Floating Point Registers"); 951 size_t i; 952 if (from_scratch) { 953 // Calculate the offsets of the registers 954 // Note that the layout of the "composite" registers (d0-d15 and q0-q15) 955 // which comes after the "primordial" registers is important. This enables 956 // us to calculate the offset of the composite register by using the offset 957 // of its first primordial register. For example, to calculate the offset 958 // of q0, use s0's offset. 959 if (g_register_infos[2].byte_offset == 0) { 960 uint32_t byte_offset = 0; 961 for (i = 0; i < num_registers; ++i) { 962 // For primordial registers, increment the byte_offset by the byte_size 963 // to arrive at the byte_offset for the next register. Otherwise, we 964 // have a composite register whose offset can be calculated by 965 // consulting the offset of its first primordial register. 966 if (!g_register_infos[i].value_regs) { 967 g_register_infos[i].byte_offset = byte_offset; 968 byte_offset += g_register_infos[i].byte_size; 969 } else { 970 const uint32_t first_primordial_reg = 971 g_register_infos[i].value_regs[0]; 972 g_register_infos[i].byte_offset = 973 g_register_infos[first_primordial_reg].byte_offset; 974 } 975 } 976 } 977 for (i = 0; i < num_registers; ++i) { 978 if (i <= 15 || i == 25) 979 AddRegister(g_register_infos[i], gpr_reg_set); 980 else if (i <= 24) 981 AddRegister(g_register_infos[i], sfp_reg_set); 982 else 983 AddRegister(g_register_infos[i], vfp_reg_set); 984 } 985 } else { 986 // Add composite registers to our primordial registers, then. 987 const size_t num_composites = llvm::array_lengthof(g_composites); 988 const size_t num_dynamic_regs = GetNumRegisters(); 989 const size_t num_common_regs = num_registers - num_composites; 990 RegisterInfo *g_comp_register_infos = g_register_infos + num_common_regs; 991 992 // First we need to validate that all registers that we already have match 993 // the non composite regs. If so, then we can add the registers, else we 994 // need to bail 995 bool match = true; 996 if (num_dynamic_regs == num_common_regs) { 997 for (i = 0; match && i < num_dynamic_regs; ++i) { 998 // Make sure all register names match 999 if (m_regs[i].name && g_register_infos[i].name) { 1000 if (strcmp(m_regs[i].name, g_register_infos[i].name)) { 1001 match = false; 1002 break; 1003 } 1004 } 1005 1006 // Make sure all register byte sizes match 1007 if (m_regs[i].byte_size != g_register_infos[i].byte_size) { 1008 match = false; 1009 break; 1010 } 1011 } 1012 } else { 1013 // Wrong number of registers. 1014 match = false; 1015 } 1016 // If "match" is true, then we can add extra registers. 1017 if (match) { 1018 for (i = 0; i < num_composites; ++i) { 1019 const uint32_t first_primordial_reg = 1020 g_comp_register_infos[i].value_regs[0]; 1021 const char *reg_name = g_register_infos[first_primordial_reg].name; 1022 if (reg_name && reg_name[0]) { 1023 for (uint32_t j = 0; j < num_dynamic_regs; ++j) { 1024 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(j); 1025 // Find a matching primordial register info entry. 1026 if (reg_info && reg_info->name && 1027 ::strcasecmp(reg_info->name, reg_name) == 0) { 1028 // The name matches the existing primordial entry. Find and 1029 // assign the offset, and then add this composite register entry. 1030 g_comp_register_infos[i].byte_offset = reg_info->byte_offset; 1031 AddRegister(g_comp_register_infos[i], vfp_reg_set); 1032 } 1033 } 1034 } 1035 } 1036 } 1037 } 1038 } 1039