1 //===-- GDBRemoteRegisterContext.cpp --------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "GDBRemoteRegisterContext.h" 10 11 #include "lldb/Target/ExecutionContext.h" 12 #include "lldb/Target/Target.h" 13 #include "lldb/Utility/DataBufferHeap.h" 14 #include "lldb/Utility/DataExtractor.h" 15 #include "lldb/Utility/RegisterValue.h" 16 #include "lldb/Utility/Scalar.h" 17 #include "lldb/Utility/StreamString.h" 18 #include "ProcessGDBRemote.h" 19 #include "ProcessGDBRemoteLog.h" 20 #include "ThreadGDBRemote.h" 21 #include "Utility/ARM_DWARF_Registers.h" 22 #include "Utility/ARM_ehframe_Registers.h" 23 #include "lldb/Utility/StringExtractorGDBRemote.h" 24 25 #include <memory> 26 27 using namespace lldb; 28 using namespace lldb_private; 29 using namespace lldb_private::process_gdb_remote; 30 31 // GDBRemoteRegisterContext constructor 32 GDBRemoteRegisterContext::GDBRemoteRegisterContext( 33 ThreadGDBRemote &thread, uint32_t concrete_frame_idx, 34 GDBRemoteDynamicRegisterInfoSP reg_info_sp, bool read_all_at_once, 35 bool write_all_at_once) 36 : RegisterContext(thread, concrete_frame_idx), 37 m_reg_info_sp(std::move(reg_info_sp)), m_reg_valid(), m_reg_data(), 38 m_read_all_at_once(read_all_at_once), 39 m_write_all_at_once(write_all_at_once), m_gpacket_cached(false) { 40 // Resize our vector of bools to contain one bool for every register. We will 41 // use these boolean values to know when a register value is valid in 42 // m_reg_data. 43 m_reg_valid.resize(m_reg_info_sp->GetNumRegisters()); 44 45 // Make a heap based buffer that is big enough to store all registers 46 DataBufferSP reg_data_sp( 47 new DataBufferHeap(m_reg_info_sp->GetRegisterDataByteSize(), 0)); 48 m_reg_data.SetData(reg_data_sp); 49 m_reg_data.SetByteOrder(thread.GetProcess()->GetByteOrder()); 50 } 51 52 // Destructor 53 GDBRemoteRegisterContext::~GDBRemoteRegisterContext() = default; 54 55 void GDBRemoteRegisterContext::InvalidateAllRegisters() { 56 SetAllRegisterValid(false); 57 } 58 59 void GDBRemoteRegisterContext::SetAllRegisterValid(bool b) { 60 m_gpacket_cached = b; 61 std::vector<bool>::iterator pos, end = m_reg_valid.end(); 62 for (pos = m_reg_valid.begin(); pos != end; ++pos) 63 *pos = b; 64 } 65 66 size_t GDBRemoteRegisterContext::GetRegisterCount() { 67 return m_reg_info_sp->GetNumRegisters(); 68 } 69 70 const RegisterInfo * 71 GDBRemoteRegisterContext::GetRegisterInfoAtIndex(size_t reg) { 72 return m_reg_info_sp->GetRegisterInfoAtIndex(reg); 73 } 74 75 size_t GDBRemoteRegisterContext::GetRegisterSetCount() { 76 return m_reg_info_sp->GetNumRegisterSets(); 77 } 78 79 const RegisterSet *GDBRemoteRegisterContext::GetRegisterSet(size_t reg_set) { 80 return m_reg_info_sp->GetRegisterSet(reg_set); 81 } 82 83 bool GDBRemoteRegisterContext::ReadRegister(const RegisterInfo *reg_info, 84 RegisterValue &value) { 85 // Read the register 86 if (ReadRegisterBytes(reg_info)) { 87 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 88 if (m_reg_valid[reg] == false) 89 return false; 90 if (reg_info->value_regs && 91 reg_info->value_regs[0] != LLDB_INVALID_REGNUM && 92 reg_info->value_regs[1] != LLDB_INVALID_REGNUM) { 93 std::vector<char> combined_data; 94 uint32_t offset = 0; 95 for (int i = 0; reg_info->value_regs[i] != LLDB_INVALID_REGNUM; i++) { 96 const RegisterInfo *parent_reg = GetRegisterInfo( 97 eRegisterKindLLDB, reg_info->value_regs[i]); 98 if (!parent_reg) 99 return false; 100 combined_data.resize(offset + parent_reg->byte_size); 101 if (m_reg_data.CopyData(parent_reg->byte_offset, parent_reg->byte_size, 102 combined_data.data() + offset) != 103 parent_reg->byte_size) 104 return false; 105 offset += parent_reg->byte_size; 106 } 107 108 Status error; 109 return value.SetFromMemoryData( 110 reg_info, combined_data.data(), combined_data.size(), 111 m_reg_data.GetByteOrder(), error) == combined_data.size(); 112 } else { 113 const bool partial_data_ok = false; 114 Status error(value.SetValueFromData( 115 reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok)); 116 return error.Success(); 117 } 118 } 119 return false; 120 } 121 122 bool GDBRemoteRegisterContext::PrivateSetRegisterValue( 123 uint32_t reg, llvm::ArrayRef<uint8_t> data) { 124 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 125 if (reg_info == nullptr) 126 return false; 127 128 // Invalidate if needed 129 InvalidateIfNeeded(false); 130 131 const size_t reg_byte_size = reg_info->byte_size; 132 memcpy(const_cast<uint8_t *>( 133 m_reg_data.PeekData(reg_info->byte_offset, reg_byte_size)), 134 data.data(), std::min(data.size(), reg_byte_size)); 135 bool success = data.size() >= reg_byte_size; 136 if (success) { 137 SetRegisterIsValid(reg, true); 138 } else if (data.size() > 0) { 139 // Only set register is valid to false if we copied some bytes, else leave 140 // it as it was. 141 SetRegisterIsValid(reg, false); 142 } 143 return success; 144 } 145 146 bool GDBRemoteRegisterContext::PrivateSetRegisterValue(uint32_t reg, 147 uint64_t new_reg_val) { 148 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 149 if (reg_info == nullptr) 150 return false; 151 152 // Early in process startup, we can get a thread that has an invalid byte 153 // order because the process hasn't been completely set up yet (see the ctor 154 // where the byte order is setfrom the process). If that's the case, we 155 // can't set the value here. 156 if (m_reg_data.GetByteOrder() == eByteOrderInvalid) { 157 return false; 158 } 159 160 // Invalidate if needed 161 InvalidateIfNeeded(false); 162 163 DataBufferSP buffer_sp(new DataBufferHeap(&new_reg_val, sizeof(new_reg_val))); 164 DataExtractor data(buffer_sp, endian::InlHostByteOrder(), sizeof(void *)); 165 166 // If our register context and our register info disagree, which should never 167 // happen, don't overwrite past the end of the buffer. 168 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 169 return false; 170 171 // Grab a pointer to where we are going to put this register 172 uint8_t *dst = const_cast<uint8_t *>( 173 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 174 175 if (dst == nullptr) 176 return false; 177 178 if (data.CopyByteOrderedData(0, // src offset 179 reg_info->byte_size, // src length 180 dst, // dst 181 reg_info->byte_size, // dst length 182 m_reg_data.GetByteOrder())) // dst byte order 183 { 184 SetRegisterIsValid(reg, true); 185 return true; 186 } 187 return false; 188 } 189 190 // Helper function for GDBRemoteRegisterContext::ReadRegisterBytes(). 191 bool GDBRemoteRegisterContext::GetPrimordialRegister( 192 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 193 const uint32_t lldb_reg = reg_info->kinds[eRegisterKindLLDB]; 194 const uint32_t remote_reg = reg_info->kinds[eRegisterKindProcessPlugin]; 195 196 if (DataBufferSP buffer_sp = 197 gdb_comm.ReadRegister(m_thread.GetProtocolID(), remote_reg)) 198 return PrivateSetRegisterValue( 199 lldb_reg, llvm::ArrayRef<uint8_t>(buffer_sp->GetBytes(), 200 buffer_sp->GetByteSize())); 201 return false; 202 } 203 204 bool GDBRemoteRegisterContext::ReadRegisterBytes(const RegisterInfo *reg_info) { 205 ExecutionContext exe_ctx(CalculateThread()); 206 207 Process *process = exe_ctx.GetProcessPtr(); 208 Thread *thread = exe_ctx.GetThreadPtr(); 209 if (process == nullptr || thread == nullptr) 210 return false; 211 212 GDBRemoteCommunicationClient &gdb_comm( 213 ((ProcessGDBRemote *)process)->GetGDBRemote()); 214 215 InvalidateIfNeeded(false); 216 217 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 218 219 if (!GetRegisterIsValid(reg)) { 220 if (m_read_all_at_once && !m_gpacket_cached) { 221 if (DataBufferSP buffer_sp = 222 gdb_comm.ReadAllRegisters(m_thread.GetProtocolID())) { 223 memcpy(const_cast<uint8_t *>(m_reg_data.GetDataStart()), 224 buffer_sp->GetBytes(), 225 std::min(buffer_sp->GetByteSize(), m_reg_data.GetByteSize())); 226 if (buffer_sp->GetByteSize() >= m_reg_data.GetByteSize()) { 227 SetAllRegisterValid(true); 228 return true; 229 } else if (buffer_sp->GetByteSize() > 0) { 230 for (auto x : llvm::enumerate(m_reg_info_sp->registers())) { 231 const struct RegisterInfo ®info = x.value(); 232 m_reg_valid[x.index()] = 233 (reginfo.byte_offset + reginfo.byte_size <= 234 buffer_sp->GetByteSize()); 235 } 236 237 m_gpacket_cached = true; 238 if (GetRegisterIsValid(reg)) 239 return true; 240 } else { 241 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 242 GDBR_LOG_PACKETS)); 243 LLDB_LOGF( 244 log, 245 "error: GDBRemoteRegisterContext::ReadRegisterBytes tried " 246 "to read the " 247 "entire register context at once, expected at least %" PRId64 248 " bytes " 249 "but only got %" PRId64 " bytes.", 250 m_reg_data.GetByteSize(), buffer_sp->GetByteSize()); 251 return false; 252 } 253 } 254 } 255 if (reg_info->value_regs) { 256 // Process this composite register request by delegating to the 257 // constituent primordial registers. 258 259 // Index of the primordial register. 260 bool success = true; 261 for (uint32_t idx = 0; success; ++idx) { 262 const uint32_t prim_reg = reg_info->value_regs[idx]; 263 if (prim_reg == LLDB_INVALID_REGNUM) 264 break; 265 // We have a valid primordial register as our constituent. Grab the 266 // corresponding register info. 267 const RegisterInfo *prim_reg_info = 268 GetRegisterInfo(eRegisterKindLLDB, prim_reg); 269 if (prim_reg_info == nullptr) 270 success = false; 271 else { 272 // Read the containing register if it hasn't already been read 273 if (!GetRegisterIsValid(prim_reg)) 274 success = GetPrimordialRegister(prim_reg_info, gdb_comm); 275 } 276 } 277 278 if (success) { 279 // If we reach this point, all primordial register requests have 280 // succeeded. Validate this composite register. 281 SetRegisterIsValid(reg_info, true); 282 } 283 } else { 284 // Get each register individually 285 GetPrimordialRegister(reg_info, gdb_comm); 286 } 287 288 // Make sure we got a valid register value after reading it 289 if (!GetRegisterIsValid(reg)) 290 return false; 291 } 292 293 return true; 294 } 295 296 bool GDBRemoteRegisterContext::WriteRegister(const RegisterInfo *reg_info, 297 const RegisterValue &value) { 298 DataExtractor data; 299 if (value.GetData(data)) { 300 if (reg_info->value_regs && 301 reg_info->value_regs[0] != LLDB_INVALID_REGNUM && 302 reg_info->value_regs[1] != LLDB_INVALID_REGNUM) { 303 uint32_t combined_size = 0; 304 for (int i = 0; reg_info->value_regs[i] != LLDB_INVALID_REGNUM; i++) { 305 const RegisterInfo *parent_reg = GetRegisterInfo( 306 eRegisterKindLLDB, reg_info->value_regs[i]); 307 if (!parent_reg) 308 return false; 309 combined_size += parent_reg->byte_size; 310 } 311 312 if (data.GetByteSize() < combined_size) 313 return false; 314 315 uint32_t offset = 0; 316 for (int i = 0; reg_info->value_regs[i] != LLDB_INVALID_REGNUM; i++) { 317 const RegisterInfo *parent_reg = GetRegisterInfo( 318 eRegisterKindLLDB, reg_info->value_regs[i]); 319 assert(parent_reg); 320 321 DataExtractor parent_data{data, offset, parent_reg->byte_size}; 322 if (!WriteRegisterBytes(parent_reg, parent_data, 0)) 323 return false; 324 offset += parent_reg->byte_size; 325 } 326 assert(offset == combined_size); 327 return true; 328 } else 329 return WriteRegisterBytes(reg_info, data, 0); 330 } 331 return false; 332 } 333 334 // Helper function for GDBRemoteRegisterContext::WriteRegisterBytes(). 335 bool GDBRemoteRegisterContext::SetPrimordialRegister( 336 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 337 StreamString packet; 338 StringExtractorGDBRemote response; 339 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 340 // Invalidate just this register 341 SetRegisterIsValid(reg, false); 342 343 return gdb_comm.WriteRegister( 344 m_thread.GetProtocolID(), reg_info->kinds[eRegisterKindProcessPlugin], 345 {m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size), 346 reg_info->byte_size}); 347 } 348 349 bool GDBRemoteRegisterContext::WriteRegisterBytes(const RegisterInfo *reg_info, 350 DataExtractor &data, 351 uint32_t data_offset) { 352 ExecutionContext exe_ctx(CalculateThread()); 353 354 Process *process = exe_ctx.GetProcessPtr(); 355 Thread *thread = exe_ctx.GetThreadPtr(); 356 if (process == nullptr || thread == nullptr) 357 return false; 358 359 GDBRemoteCommunicationClient &gdb_comm( 360 ((ProcessGDBRemote *)process)->GetGDBRemote()); 361 362 assert(m_reg_data.GetByteSize() >= 363 reg_info->byte_offset + reg_info->byte_size); 364 365 // If our register context and our register info disagree, which should never 366 // happen, don't overwrite past the end of the buffer. 367 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 368 return false; 369 370 // Grab a pointer to where we are going to put this register 371 uint8_t *dst = const_cast<uint8_t *>( 372 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 373 374 if (dst == nullptr) 375 return false; 376 377 // Code below is specific to AArch64 target in SVE state 378 // If vector granule (vg) register is being written then thread's 379 // register context reconfiguration is triggered on success. 380 bool do_reconfigure_arm64_sve = false; 381 const ArchSpec &arch = process->GetTarget().GetArchitecture(); 382 if (arch.IsValid() && arch.GetTriple().isAArch64()) 383 if (strcmp(reg_info->name, "vg") == 0) 384 do_reconfigure_arm64_sve = true; 385 386 if (data.CopyByteOrderedData(data_offset, // src offset 387 reg_info->byte_size, // src length 388 dst, // dst 389 reg_info->byte_size, // dst length 390 m_reg_data.GetByteOrder())) // dst byte order 391 { 392 GDBRemoteClientBase::Lock lock(gdb_comm); 393 if (lock) { 394 if (m_write_all_at_once) { 395 // Invalidate all register values 396 InvalidateIfNeeded(true); 397 398 // Set all registers in one packet 399 if (gdb_comm.WriteAllRegisters( 400 m_thread.GetProtocolID(), 401 {m_reg_data.GetDataStart(), size_t(m_reg_data.GetByteSize())})) 402 403 { 404 SetAllRegisterValid(false); 405 406 if (do_reconfigure_arm64_sve) 407 AArch64SVEReconfigure(); 408 409 return true; 410 } 411 } else { 412 bool success = true; 413 414 if (reg_info->value_regs) { 415 // This register is part of another register. In this case we read 416 // the actual register data for any "value_regs", and once all that 417 // data is read, we will have enough data in our register context 418 // bytes for the value of this register 419 420 // Invalidate this composite register first. 421 422 for (uint32_t idx = 0; success; ++idx) { 423 const uint32_t reg = reg_info->value_regs[idx]; 424 if (reg == LLDB_INVALID_REGNUM) 425 break; 426 // We have a valid primordial register as our constituent. Grab the 427 // corresponding register info. 428 const RegisterInfo *value_reg_info = 429 GetRegisterInfo(eRegisterKindLLDB, reg); 430 if (value_reg_info == nullptr) 431 success = false; 432 else 433 success = SetPrimordialRegister(value_reg_info, gdb_comm); 434 } 435 } else { 436 // This is an actual register, write it 437 success = SetPrimordialRegister(reg_info, gdb_comm); 438 439 if (success && do_reconfigure_arm64_sve) 440 AArch64SVEReconfigure(); 441 } 442 443 // Check if writing this register will invalidate any other register 444 // values? If so, invalidate them 445 if (reg_info->invalidate_regs) { 446 for (uint32_t idx = 0, reg = reg_info->invalidate_regs[0]; 447 reg != LLDB_INVALID_REGNUM; 448 reg = reg_info->invalidate_regs[++idx]) 449 SetRegisterIsValid(ConvertRegisterKindToRegisterNumber( 450 eRegisterKindLLDB, reg), 451 false); 452 } 453 454 return success; 455 } 456 } else { 457 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 458 GDBR_LOG_PACKETS)); 459 if (log) { 460 if (log->GetVerbose()) { 461 StreamString strm; 462 gdb_comm.DumpHistory(strm); 463 LLDB_LOGF(log, 464 "error: failed to get packet sequence mutex, not sending " 465 "write register for \"%s\":\n%s", 466 reg_info->name, strm.GetData()); 467 } else 468 LLDB_LOGF(log, 469 "error: failed to get packet sequence mutex, not sending " 470 "write register for \"%s\"", 471 reg_info->name); 472 } 473 } 474 } 475 return false; 476 } 477 478 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 479 RegisterCheckpoint ®_checkpoint) { 480 ExecutionContext exe_ctx(CalculateThread()); 481 482 Process *process = exe_ctx.GetProcessPtr(); 483 Thread *thread = exe_ctx.GetThreadPtr(); 484 if (process == nullptr || thread == nullptr) 485 return false; 486 487 GDBRemoteCommunicationClient &gdb_comm( 488 ((ProcessGDBRemote *)process)->GetGDBRemote()); 489 490 uint32_t save_id = 0; 491 if (gdb_comm.SaveRegisterState(thread->GetProtocolID(), save_id)) { 492 reg_checkpoint.SetID(save_id); 493 reg_checkpoint.GetData().reset(); 494 return true; 495 } else { 496 reg_checkpoint.SetID(0); // Invalid save ID is zero 497 return ReadAllRegisterValues(reg_checkpoint.GetData()); 498 } 499 } 500 501 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 502 const RegisterCheckpoint ®_checkpoint) { 503 uint32_t save_id = reg_checkpoint.GetID(); 504 if (save_id != 0) { 505 ExecutionContext exe_ctx(CalculateThread()); 506 507 Process *process = exe_ctx.GetProcessPtr(); 508 Thread *thread = exe_ctx.GetThreadPtr(); 509 if (process == nullptr || thread == nullptr) 510 return false; 511 512 GDBRemoteCommunicationClient &gdb_comm( 513 ((ProcessGDBRemote *)process)->GetGDBRemote()); 514 515 return gdb_comm.RestoreRegisterState(m_thread.GetProtocolID(), save_id); 516 } else { 517 return WriteAllRegisterValues(reg_checkpoint.GetData()); 518 } 519 } 520 521 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 522 lldb::DataBufferSP &data_sp) { 523 ExecutionContext exe_ctx(CalculateThread()); 524 525 Process *process = exe_ctx.GetProcessPtr(); 526 Thread *thread = exe_ctx.GetThreadPtr(); 527 if (process == nullptr || thread == nullptr) 528 return false; 529 530 GDBRemoteCommunicationClient &gdb_comm( 531 ((ProcessGDBRemote *)process)->GetGDBRemote()); 532 533 const bool use_g_packet = 534 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 535 536 GDBRemoteClientBase::Lock lock(gdb_comm); 537 if (lock) { 538 if (gdb_comm.SyncThreadState(m_thread.GetProtocolID())) 539 InvalidateAllRegisters(); 540 541 if (use_g_packet && 542 (data_sp = gdb_comm.ReadAllRegisters(m_thread.GetProtocolID()))) 543 return true; 544 545 // We're going to read each register 546 // individually and store them as binary data in a buffer. 547 const RegisterInfo *reg_info; 548 549 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 550 i++) { 551 if (reg_info 552 ->value_regs) // skip registers that are slices of real registers 553 continue; 554 ReadRegisterBytes(reg_info); 555 // ReadRegisterBytes saves the contents of the register in to the 556 // m_reg_data buffer 557 } 558 data_sp = std::make_shared<DataBufferHeap>( 559 m_reg_data.GetDataStart(), m_reg_info_sp->GetRegisterDataByteSize()); 560 return true; 561 } else { 562 563 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 564 GDBR_LOG_PACKETS)); 565 if (log) { 566 if (log->GetVerbose()) { 567 StreamString strm; 568 gdb_comm.DumpHistory(strm); 569 LLDB_LOGF(log, 570 "error: failed to get packet sequence mutex, not sending " 571 "read all registers:\n%s", 572 strm.GetData()); 573 } else 574 LLDB_LOGF(log, 575 "error: failed to get packet sequence mutex, not sending " 576 "read all registers"); 577 } 578 } 579 580 data_sp.reset(); 581 return false; 582 } 583 584 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 585 const lldb::DataBufferSP &data_sp) { 586 if (!data_sp || data_sp->GetBytes() == nullptr || data_sp->GetByteSize() == 0) 587 return false; 588 589 ExecutionContext exe_ctx(CalculateThread()); 590 591 Process *process = exe_ctx.GetProcessPtr(); 592 Thread *thread = exe_ctx.GetThreadPtr(); 593 if (process == nullptr || thread == nullptr) 594 return false; 595 596 GDBRemoteCommunicationClient &gdb_comm( 597 ((ProcessGDBRemote *)process)->GetGDBRemote()); 598 599 const bool use_g_packet = 600 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 601 602 GDBRemoteClientBase::Lock lock(gdb_comm); 603 if (lock) { 604 // The data_sp contains the G response packet. 605 if (use_g_packet) { 606 if (gdb_comm.WriteAllRegisters( 607 m_thread.GetProtocolID(), 608 {data_sp->GetBytes(), size_t(data_sp->GetByteSize())})) 609 return true; 610 611 uint32_t num_restored = 0; 612 // We need to manually go through all of the registers and restore them 613 // manually 614 DataExtractor restore_data(data_sp, m_reg_data.GetByteOrder(), 615 m_reg_data.GetAddressByteSize()); 616 617 const RegisterInfo *reg_info; 618 619 // The g packet contents may either include the slice registers 620 // (registers defined in terms of other registers, e.g. eax is a subset 621 // of rax) or not. The slice registers should NOT be in the g packet, 622 // but some implementations may incorrectly include them. 623 // 624 // If the slice registers are included in the packet, we must step over 625 // the slice registers when parsing the packet -- relying on the 626 // RegisterInfo byte_offset field would be incorrect. If the slice 627 // registers are not included, then using the byte_offset values into the 628 // data buffer is the best way to find individual register values. 629 630 uint64_t size_including_slice_registers = 0; 631 uint64_t size_not_including_slice_registers = 0; 632 uint64_t size_by_highest_offset = 0; 633 634 for (uint32_t reg_idx = 0; 635 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; ++reg_idx) { 636 size_including_slice_registers += reg_info->byte_size; 637 if (reg_info->value_regs == nullptr) 638 size_not_including_slice_registers += reg_info->byte_size; 639 if (reg_info->byte_offset >= size_by_highest_offset) 640 size_by_highest_offset = reg_info->byte_offset + reg_info->byte_size; 641 } 642 643 bool use_byte_offset_into_buffer; 644 if (size_by_highest_offset == restore_data.GetByteSize()) { 645 // The size of the packet agrees with the highest offset: + size in the 646 // register file 647 use_byte_offset_into_buffer = true; 648 } else if (size_not_including_slice_registers == 649 restore_data.GetByteSize()) { 650 // The size of the packet is the same as concatenating all of the 651 // registers sequentially, skipping the slice registers 652 use_byte_offset_into_buffer = true; 653 } else if (size_including_slice_registers == restore_data.GetByteSize()) { 654 // The slice registers are present in the packet (when they shouldn't 655 // be). Don't try to use the RegisterInfo byte_offset into the 656 // restore_data, it will point to the wrong place. 657 use_byte_offset_into_buffer = false; 658 } else { 659 // None of our expected sizes match the actual g packet data we're 660 // looking at. The most conservative approach here is to use the 661 // running total byte offset. 662 use_byte_offset_into_buffer = false; 663 } 664 665 // In case our register definitions don't include the correct offsets, 666 // keep track of the size of each reg & compute offset based on that. 667 uint32_t running_byte_offset = 0; 668 for (uint32_t reg_idx = 0; 669 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; 670 ++reg_idx, running_byte_offset += reg_info->byte_size) { 671 // Skip composite aka slice registers (e.g. eax is a slice of rax). 672 if (reg_info->value_regs) 673 continue; 674 675 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 676 677 uint32_t register_offset; 678 if (use_byte_offset_into_buffer) { 679 register_offset = reg_info->byte_offset; 680 } else { 681 register_offset = running_byte_offset; 682 } 683 684 const uint32_t reg_byte_size = reg_info->byte_size; 685 686 const uint8_t *restore_src = 687 restore_data.PeekData(register_offset, reg_byte_size); 688 if (restore_src) { 689 SetRegisterIsValid(reg, false); 690 if (gdb_comm.WriteRegister( 691 m_thread.GetProtocolID(), 692 reg_info->kinds[eRegisterKindProcessPlugin], 693 {restore_src, reg_byte_size})) 694 ++num_restored; 695 } 696 } 697 return num_restored > 0; 698 } else { 699 // For the use_g_packet == false case, we're going to write each register 700 // individually. The data buffer is binary data in this case, instead of 701 // ascii characters. 702 703 bool arm64_debugserver = false; 704 if (m_thread.GetProcess().get()) { 705 const ArchSpec &arch = 706 m_thread.GetProcess()->GetTarget().GetArchitecture(); 707 if (arch.IsValid() && (arch.GetMachine() == llvm::Triple::aarch64 || 708 arch.GetMachine() == llvm::Triple::aarch64_32) && 709 arch.GetTriple().getVendor() == llvm::Triple::Apple && 710 arch.GetTriple().getOS() == llvm::Triple::IOS) { 711 arm64_debugserver = true; 712 } 713 } 714 uint32_t num_restored = 0; 715 const RegisterInfo *reg_info; 716 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 717 i++) { 718 if (reg_info->value_regs) // skip registers that are slices of real 719 // registers 720 continue; 721 // Skip the fpsr and fpcr floating point status/control register 722 // writing to work around a bug in an older version of debugserver that 723 // would lead to register context corruption when writing fpsr/fpcr. 724 if (arm64_debugserver && (strcmp(reg_info->name, "fpsr") == 0 || 725 strcmp(reg_info->name, "fpcr") == 0)) { 726 continue; 727 } 728 729 SetRegisterIsValid(reg_info, false); 730 if (gdb_comm.WriteRegister(m_thread.GetProtocolID(), 731 reg_info->kinds[eRegisterKindProcessPlugin], 732 {data_sp->GetBytes() + reg_info->byte_offset, 733 reg_info->byte_size})) 734 ++num_restored; 735 } 736 return num_restored > 0; 737 } 738 } else { 739 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 740 GDBR_LOG_PACKETS)); 741 if (log) { 742 if (log->GetVerbose()) { 743 StreamString strm; 744 gdb_comm.DumpHistory(strm); 745 LLDB_LOGF(log, 746 "error: failed to get packet sequence mutex, not sending " 747 "write all registers:\n%s", 748 strm.GetData()); 749 } else 750 LLDB_LOGF(log, 751 "error: failed to get packet sequence mutex, not sending " 752 "write all registers"); 753 } 754 } 755 return false; 756 } 757 758 uint32_t GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber( 759 lldb::RegisterKind kind, uint32_t num) { 760 return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num); 761 } 762 763 bool GDBRemoteRegisterContext::AArch64SVEReconfigure() { 764 if (!m_reg_info_sp) 765 return false; 766 767 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("vg"); 768 if (!reg_info) 769 return false; 770 771 uint64_t fail_value = LLDB_INVALID_ADDRESS; 772 uint32_t vg_reg_num = reg_info->kinds[eRegisterKindLLDB]; 773 uint64_t vg_reg_value = ReadRegisterAsUnsigned(vg_reg_num, fail_value); 774 775 if (vg_reg_value != fail_value && vg_reg_value <= 32) { 776 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("p0"); 777 if (!reg_info || vg_reg_value == reg_info->byte_size) 778 return false; 779 780 if (m_reg_info_sp->UpdateARM64SVERegistersInfos(vg_reg_value)) { 781 // Make a heap based buffer that is big enough to store all registers 782 m_reg_data.SetData(std::make_shared<DataBufferHeap>( 783 m_reg_info_sp->GetRegisterDataByteSize(), 0)); 784 m_reg_data.SetByteOrder(GetByteOrder()); 785 786 InvalidateAllRegisters(); 787 788 return true; 789 } 790 } 791 792 return false; 793 } 794 795 bool GDBRemoteDynamicRegisterInfo::UpdateARM64SVERegistersInfos(uint64_t vg) { 796 // SVE Z register size is vg x 8 bytes. 797 uint32_t z_reg_byte_size = vg * 8; 798 799 // SVE vector length has changed, accordingly set size of Z, P and FFR 800 // registers. Also invalidate register offsets it will be recalculated 801 // after SVE register size update. 802 for (auto ® : m_regs) { 803 if (reg.value_regs == nullptr) { 804 if (reg.name[0] == 'z' && isdigit(reg.name[1])) 805 reg.byte_size = z_reg_byte_size; 806 else if (reg.name[0] == 'p' && isdigit(reg.name[1])) 807 reg.byte_size = vg; 808 else if (strcmp(reg.name, "ffr") == 0) 809 reg.byte_size = vg; 810 } 811 reg.byte_offset = LLDB_INVALID_INDEX32; 812 } 813 814 // Re-calculate register offsets 815 ConfigureOffsets(); 816 return true; 817 } 818 819 void GDBRemoteDynamicRegisterInfo::HardcodeARMRegisters(bool from_scratch) { 820 // For Advanced SIMD and VFP register mapping. 821 static uint32_t g_d0_regs[] = {26, 27, LLDB_INVALID_REGNUM}; // (s0, s1) 822 static uint32_t g_d1_regs[] = {28, 29, LLDB_INVALID_REGNUM}; // (s2, s3) 823 static uint32_t g_d2_regs[] = {30, 31, LLDB_INVALID_REGNUM}; // (s4, s5) 824 static uint32_t g_d3_regs[] = {32, 33, LLDB_INVALID_REGNUM}; // (s6, s7) 825 static uint32_t g_d4_regs[] = {34, 35, LLDB_INVALID_REGNUM}; // (s8, s9) 826 static uint32_t g_d5_regs[] = {36, 37, LLDB_INVALID_REGNUM}; // (s10, s11) 827 static uint32_t g_d6_regs[] = {38, 39, LLDB_INVALID_REGNUM}; // (s12, s13) 828 static uint32_t g_d7_regs[] = {40, 41, LLDB_INVALID_REGNUM}; // (s14, s15) 829 static uint32_t g_d8_regs[] = {42, 43, LLDB_INVALID_REGNUM}; // (s16, s17) 830 static uint32_t g_d9_regs[] = {44, 45, LLDB_INVALID_REGNUM}; // (s18, s19) 831 static uint32_t g_d10_regs[] = {46, 47, LLDB_INVALID_REGNUM}; // (s20, s21) 832 static uint32_t g_d11_regs[] = {48, 49, LLDB_INVALID_REGNUM}; // (s22, s23) 833 static uint32_t g_d12_regs[] = {50, 51, LLDB_INVALID_REGNUM}; // (s24, s25) 834 static uint32_t g_d13_regs[] = {52, 53, LLDB_INVALID_REGNUM}; // (s26, s27) 835 static uint32_t g_d14_regs[] = {54, 55, LLDB_INVALID_REGNUM}; // (s28, s29) 836 static uint32_t g_d15_regs[] = {56, 57, LLDB_INVALID_REGNUM}; // (s30, s31) 837 static uint32_t g_q0_regs[] = { 838 26, 27, 28, 29, LLDB_INVALID_REGNUM}; // (d0, d1) -> (s0, s1, s2, s3) 839 static uint32_t g_q1_regs[] = { 840 30, 31, 32, 33, LLDB_INVALID_REGNUM}; // (d2, d3) -> (s4, s5, s6, s7) 841 static uint32_t g_q2_regs[] = { 842 34, 35, 36, 37, LLDB_INVALID_REGNUM}; // (d4, d5) -> (s8, s9, s10, s11) 843 static uint32_t g_q3_regs[] = { 844 38, 39, 40, 41, LLDB_INVALID_REGNUM}; // (d6, d7) -> (s12, s13, s14, s15) 845 static uint32_t g_q4_regs[] = { 846 42, 43, 44, 45, LLDB_INVALID_REGNUM}; // (d8, d9) -> (s16, s17, s18, s19) 847 static uint32_t g_q5_regs[] = { 848 46, 47, 48, 49, 849 LLDB_INVALID_REGNUM}; // (d10, d11) -> (s20, s21, s22, s23) 850 static uint32_t g_q6_regs[] = { 851 50, 51, 52, 53, 852 LLDB_INVALID_REGNUM}; // (d12, d13) -> (s24, s25, s26, s27) 853 static uint32_t g_q7_regs[] = { 854 54, 55, 56, 57, 855 LLDB_INVALID_REGNUM}; // (d14, d15) -> (s28, s29, s30, s31) 856 static uint32_t g_q8_regs[] = {59, 60, LLDB_INVALID_REGNUM}; // (d16, d17) 857 static uint32_t g_q9_regs[] = {61, 62, LLDB_INVALID_REGNUM}; // (d18, d19) 858 static uint32_t g_q10_regs[] = {63, 64, LLDB_INVALID_REGNUM}; // (d20, d21) 859 static uint32_t g_q11_regs[] = {65, 66, LLDB_INVALID_REGNUM}; // (d22, d23) 860 static uint32_t g_q12_regs[] = {67, 68, LLDB_INVALID_REGNUM}; // (d24, d25) 861 static uint32_t g_q13_regs[] = {69, 70, LLDB_INVALID_REGNUM}; // (d26, d27) 862 static uint32_t g_q14_regs[] = {71, 72, LLDB_INVALID_REGNUM}; // (d28, d29) 863 static uint32_t g_q15_regs[] = {73, 74, LLDB_INVALID_REGNUM}; // (d30, d31) 864 865 // This is our array of composite registers, with each element coming from 866 // the above register mappings. 867 static uint32_t *g_composites[] = { 868 g_d0_regs, g_d1_regs, g_d2_regs, g_d3_regs, g_d4_regs, g_d5_regs, 869 g_d6_regs, g_d7_regs, g_d8_regs, g_d9_regs, g_d10_regs, g_d11_regs, 870 g_d12_regs, g_d13_regs, g_d14_regs, g_d15_regs, g_q0_regs, g_q1_regs, 871 g_q2_regs, g_q3_regs, g_q4_regs, g_q5_regs, g_q6_regs, g_q7_regs, 872 g_q8_regs, g_q9_regs, g_q10_regs, g_q11_regs, g_q12_regs, g_q13_regs, 873 g_q14_regs, g_q15_regs}; 874 875 // clang-format off 876 static RegisterInfo g_register_infos[] = { 877 // NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS 878 // ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== =============== 879 { "r0", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr }, 880 { "r1", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr }, 881 { "r2", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr }, 882 { "r3", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr }, 883 { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr }, 884 { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr }, 885 { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr }, 886 { "r7", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr }, 887 { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr }, 888 { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr }, 889 { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr }, 890 { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr }, 891 { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr }, 892 { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr }, 893 { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr }, 894 { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr }, 895 { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr }, 896 { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr }, 897 { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr }, 898 { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr }, 899 { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr }, 900 { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr }, 901 { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr }, 902 { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr }, 903 { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr }, 904 { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr }, 905 { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr }, 906 { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr }, 907 { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr }, 908 { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr }, 909 { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr }, 910 { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr }, 911 { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr }, 912 { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr }, 913 { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr }, 914 { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr }, 915 { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr }, 916 { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr }, 917 { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr }, 918 { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr }, 919 { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr }, 920 { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr }, 921 { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr }, 922 { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr }, 923 { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr }, 924 { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr }, 925 { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr }, 926 { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr }, 927 { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr }, 928 { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr }, 929 { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr }, 930 { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr }, 931 { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr }, 932 { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr }, 933 { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr }, 934 { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr }, 935 { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr }, 936 { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr }, 937 { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr }, 938 { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr }, 939 { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr }, 940 { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr }, 941 { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr }, 942 { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr }, 943 { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr }, 944 { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr }, 945 { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr }, 946 { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr }, 947 { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr }, 948 { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr }, 949 { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr }, 950 { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr }, 951 { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr }, 952 { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr }, 953 { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr }, 954 { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr }, 955 { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr }, 956 { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr }, 957 { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr }, 958 { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr }, 959 { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr }, 960 { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr }, 961 { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr }, 962 { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr }, 963 { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr }, 964 { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr }, 965 { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr }, 966 { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr }, 967 { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr }, 968 { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr }, 969 { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr }, 970 { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr }, 971 { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr }, 972 { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr }, 973 { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr }, 974 { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr }, 975 { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr }, 976 { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr }, 977 { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr }, 978 { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr }, 979 { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr }, 980 { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr }, 981 { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr }, 982 { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr }, 983 { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr }, 984 { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr }, 985 { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr } 986 }; 987 // clang-format on 988 989 static const uint32_t num_registers = llvm::array_lengthof(g_register_infos); 990 static ConstString gpr_reg_set("General Purpose Registers"); 991 static ConstString sfp_reg_set("Software Floating Point Registers"); 992 static ConstString vfp_reg_set("Floating Point Registers"); 993 size_t i; 994 if (from_scratch) { 995 // Calculate the offsets of the registers 996 // Note that the layout of the "composite" registers (d0-d15 and q0-q15) 997 // which comes after the "primordial" registers is important. This enables 998 // us to calculate the offset of the composite register by using the offset 999 // of its first primordial register. For example, to calculate the offset 1000 // of q0, use s0's offset. 1001 if (g_register_infos[2].byte_offset == 0) { 1002 uint32_t byte_offset = 0; 1003 for (i = 0; i < num_registers; ++i) { 1004 // For primordial registers, increment the byte_offset by the byte_size 1005 // to arrive at the byte_offset for the next register. Otherwise, we 1006 // have a composite register whose offset can be calculated by 1007 // consulting the offset of its first primordial register. 1008 if (!g_register_infos[i].value_regs) { 1009 g_register_infos[i].byte_offset = byte_offset; 1010 byte_offset += g_register_infos[i].byte_size; 1011 } else { 1012 const uint32_t first_primordial_reg = 1013 g_register_infos[i].value_regs[0]; 1014 g_register_infos[i].byte_offset = 1015 g_register_infos[first_primordial_reg].byte_offset; 1016 } 1017 } 1018 } 1019 for (i = 0; i < num_registers; ++i) { 1020 if (i <= 15 || i == 25) 1021 AddRegister(g_register_infos[i], gpr_reg_set); 1022 else if (i <= 24) 1023 AddRegister(g_register_infos[i], sfp_reg_set); 1024 else 1025 AddRegister(g_register_infos[i], vfp_reg_set); 1026 } 1027 } else { 1028 // Add composite registers to our primordial registers, then. 1029 const size_t num_composites = llvm::array_lengthof(g_composites); 1030 const size_t num_dynamic_regs = GetNumRegisters(); 1031 const size_t num_common_regs = num_registers - num_composites; 1032 RegisterInfo *g_comp_register_infos = g_register_infos + num_common_regs; 1033 1034 // First we need to validate that all registers that we already have match 1035 // the non composite regs. If so, then we can add the registers, else we 1036 // need to bail 1037 bool match = true; 1038 if (num_dynamic_regs == num_common_regs) { 1039 for (i = 0; match && i < num_dynamic_regs; ++i) { 1040 // Make sure all register names match 1041 if (m_regs[i].name && g_register_infos[i].name) { 1042 if (strcmp(m_regs[i].name, g_register_infos[i].name)) { 1043 match = false; 1044 break; 1045 } 1046 } 1047 1048 // Make sure all register byte sizes match 1049 if (m_regs[i].byte_size != g_register_infos[i].byte_size) { 1050 match = false; 1051 break; 1052 } 1053 } 1054 } else { 1055 // Wrong number of registers. 1056 match = false; 1057 } 1058 // If "match" is true, then we can add extra registers. 1059 if (match) { 1060 for (i = 0; i < num_composites; ++i) { 1061 const uint32_t first_primordial_reg = 1062 g_comp_register_infos[i].value_regs[0]; 1063 const char *reg_name = g_register_infos[first_primordial_reg].name; 1064 if (reg_name && reg_name[0]) { 1065 for (uint32_t j = 0; j < num_dynamic_regs; ++j) { 1066 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(j); 1067 // Find a matching primordial register info entry. 1068 if (reg_info && reg_info->name && 1069 ::strcasecmp(reg_info->name, reg_name) == 0) { 1070 // The name matches the existing primordial entry. Find and 1071 // assign the offset, and then add this composite register entry. 1072 g_comp_register_infos[i].byte_offset = reg_info->byte_offset; 1073 AddRegister(g_comp_register_infos[i], vfp_reg_set); 1074 } 1075 } 1076 } 1077 } 1078 } 1079 } 1080 } 1081