1 // Check code generation 2 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 3 4 // Check same results after serialization round-trip 5 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -emit-pch -o %t %s 6 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -fopenmp-version=51 -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR 7 // expected-no-diagnostics 8 9 #ifndef HEADER 10 #define HEADER 11 12 // placeholder for loop body code. 13 extern "C" void body(...) {} 14 15 16 // IR-LABEL: @func( 17 // IR-NEXT: [[ENTRY:.*]]: 18 // IR-NEXT: %[[START_ADDR:.+]] = alloca i32, align 4 19 // IR-NEXT: %[[END_ADDR:.+]] = alloca i32, align 4 20 // IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32, align 4 21 // IR-NEXT: store i32 %[[START:.+]], i32* %[[START_ADDR]], align 4 22 // IR-NEXT: store i32 %[[END:.+]], i32* %[[END_ADDR]], align 4 23 // IR-NEXT: store i32 %[[STEP:.+]], i32* %[[STEP_ADDR]], align 4 24 // IR-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @2, i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* %[[END_ADDR]], i32* %[[STEP_ADDR]], i32* %[[START_ADDR]]) 25 // IR-NEXT: ret void 26 // IR-NEXT: } 27 extern "C" void func(int start, int end, int step) { 28 #pragma omp parallel for 29 #pragma omp unroll partial(7) 30 for (int i = start; i < end; i+=step) 31 body(start, end, step, i); 32 } 33 34 35 // IR-LABEL: @.omp_outlined.( 36 // IR-NEXT: [[ENTRY:.*]]: 37 // IR-NEXT: %[[DOTGLOBAL_TID__ADDR:.+]] = alloca i32*, align 8 38 // IR-NEXT: %[[DOTBOUND_TID__ADDR:.+]] = alloca i32*, align 8 39 // IR-NEXT: %[[END_ADDR:.+]] = alloca i32*, align 8 40 // IR-NEXT: %[[STEP_ADDR:.+]] = alloca i32*, align 8 41 // IR-NEXT: %[[START_ADDR:.+]] = alloca i32*, align 8 42 // IR-NEXT: %[[DOTOMP_IV:.+]] = alloca i32, align 4 43 // IR-NEXT: %[[TMP:.+]] = alloca i32, align 4 44 // IR-NEXT: %[[I:.+]] = alloca i32, align 4 45 // IR-NEXT: %[[DOTCAPTURE_EXPR_:.+]] = alloca i32, align 4 46 // IR-NEXT: %[[DOTCAPTURE_EXPR_1:.+]] = alloca i32, align 4 47 // IR-NEXT: %[[DOTCAPTURE_EXPR_2:.+]] = alloca i32, align 4 48 // IR-NEXT: %[[DOTCAPTURE_EXPR_3:.+]] = alloca i32, align 4 49 // IR-NEXT: %[[DOTCAPTURE_EXPR_6:.+]] = alloca i32, align 4 50 // IR-NEXT: %[[DOTCAPTURE_EXPR_8:.+]] = alloca i32, align 4 51 // IR-NEXT: %[[DOTUNROLLED_IV_I:.+]] = alloca i32, align 4 52 // IR-NEXT: %[[DOTOMP_LB:.+]] = alloca i32, align 4 53 // IR-NEXT: %[[DOTOMP_UB:.+]] = alloca i32, align 4 54 // IR-NEXT: %[[DOTOMP_STRIDE:.+]] = alloca i32, align 4 55 // IR-NEXT: %[[DOTOMP_IS_LAST:.+]] = alloca i32, align 4 56 // IR-NEXT: %[[DOTUNROLLED_IV_I12:.+]] = alloca i32, align 4 57 // IR-NEXT: %[[DOTUNROLL_INNER_IV_I:.+]] = alloca i32, align 4 58 // IR-NEXT: store i32* %[[DOTGLOBAL_TID_:.+]], i32** %[[DOTGLOBAL_TID__ADDR]], align 8 59 // IR-NEXT: store i32* %[[DOTBOUND_TID_:.+]], i32** %[[DOTBOUND_TID__ADDR]], align 8 60 // IR-NEXT: store i32* %[[END:.+]], i32** %[[END_ADDR]], align 8 61 // IR-NEXT: store i32* %[[STEP:.+]], i32** %[[STEP_ADDR]], align 8 62 // IR-NEXT: store i32* %[[START:.+]], i32** %[[START_ADDR]], align 8 63 // IR-NEXT: %[[TMP0:.+]] = load i32*, i32** %[[END_ADDR]], align 8 64 // IR-NEXT: %[[TMP1:.+]] = load i32*, i32** %[[STEP_ADDR]], align 8 65 // IR-NEXT: %[[TMP2:.+]] = load i32*, i32** %[[START_ADDR]], align 8 66 // IR-NEXT: %[[TMP3:.+]] = load i32, i32* %[[TMP2]], align 4 67 // IR-NEXT: store i32 %[[TMP3]], i32* %[[I]], align 4 68 // IR-NEXT: %[[TMP4:.+]] = load i32, i32* %[[TMP2]], align 4 69 // IR-NEXT: store i32 %[[TMP4]], i32* %[[DOTCAPTURE_EXPR_]], align 4 70 // IR-NEXT: %[[TMP5:.+]] = load i32, i32* %[[TMP0]], align 4 71 // IR-NEXT: store i32 %[[TMP5]], i32* %[[DOTCAPTURE_EXPR_1]], align 4 72 // IR-NEXT: %[[TMP6:.+]] = load i32, i32* %[[TMP1]], align 4 73 // IR-NEXT: store i32 %[[TMP6]], i32* %[[DOTCAPTURE_EXPR_2]], align 4 74 // IR-NEXT: %[[TMP7:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_1]], align 4 75 // IR-NEXT: %[[TMP8:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 76 // IR-NEXT: %[[SUB:.+]] = sub i32 %[[TMP7]], %[[TMP8]] 77 // IR-NEXT: %[[SUB4:.+]] = sub i32 %[[SUB]], 1 78 // IR-NEXT: %[[TMP9:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 79 // IR-NEXT: %[[ADD:.+]] = add i32 %[[SUB4]], %[[TMP9]] 80 // IR-NEXT: %[[TMP10:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 81 // IR-NEXT: %[[DIV:.+]] = udiv i32 %[[ADD]], %[[TMP10]] 82 // IR-NEXT: %[[SUB5:.+]] = sub i32 %[[DIV]], 1 83 // IR-NEXT: store i32 %[[SUB5]], i32* %[[DOTCAPTURE_EXPR_3]], align 4 84 // IR-NEXT: %[[TMP11:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 85 // IR-NEXT: %[[ADD7:.+]] = add i32 %[[TMP11]], 1 86 // IR-NEXT: store i32 %[[ADD7]], i32* %[[DOTCAPTURE_EXPR_6]], align 4 87 // IR-NEXT: %[[TMP12:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_6]], align 4 88 // IR-NEXT: %[[SUB9:.+]] = sub i32 %[[TMP12]], -6 89 // IR-NEXT: %[[DIV10:.+]] = udiv i32 %[[SUB9]], 7 90 // IR-NEXT: %[[SUB11:.+]] = sub i32 %[[DIV10]], 1 91 // IR-NEXT: store i32 %[[SUB11]], i32* %[[DOTCAPTURE_EXPR_8]], align 4 92 // IR-NEXT: store i32 0, i32* %[[DOTUNROLLED_IV_I]], align 4 93 // IR-NEXT: %[[TMP13:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_6]], align 4 94 // IR-NEXT: %[[CMP:.+]] = icmp ult i32 0, %[[TMP13]] 95 // IR-NEXT: br i1 %[[CMP]], label %[[OMP_PRECOND_THEN:.+]], label %[[OMP_PRECOND_END:.+]] 96 // IR-EMPTY: 97 // IR-NEXT: [[OMP_PRECOND_THEN]]: 98 // IR-NEXT: store i32 0, i32* %[[DOTOMP_LB]], align 4 99 // IR-NEXT: %[[TMP14:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 100 // IR-NEXT: store i32 %[[TMP14]], i32* %[[DOTOMP_UB]], align 4 101 // IR-NEXT: store i32 1, i32* %[[DOTOMP_STRIDE]], align 4 102 // IR-NEXT: store i32 0, i32* %[[DOTOMP_IS_LAST]], align 4 103 // IR-NEXT: %[[TMP15:.+]] = load i32*, i32** %[[DOTGLOBAL_TID__ADDR]], align 8 104 // IR-NEXT: %[[TMP16:.+]] = load i32, i32* %[[TMP15]], align 4 105 // IR-NEXT: call void @__kmpc_for_static_init_4u(%struct.ident_t* @1, i32 %[[TMP16]], i32 34, i32* %[[DOTOMP_IS_LAST]], i32* %[[DOTOMP_LB]], i32* %[[DOTOMP_UB]], i32* %[[DOTOMP_STRIDE]], i32 1, i32 1) 106 // IR-NEXT: %[[TMP17:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 107 // IR-NEXT: %[[TMP18:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 108 // IR-NEXT: %[[CMP13:.+]] = icmp ugt i32 %[[TMP17]], %[[TMP18]] 109 // IR-NEXT: br i1 %[[CMP13]], label %[[COND_TRUE:.+]], label %[[COND_FALSE:.+]] 110 // IR-EMPTY: 111 // IR-NEXT: [[COND_TRUE]]: 112 // IR-NEXT: %[[TMP19:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_8]], align 4 113 // IR-NEXT: br label %[[COND_END:.+]] 114 // IR-EMPTY: 115 // IR-NEXT: [[COND_FALSE]]: 116 // IR-NEXT: %[[TMP20:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 117 // IR-NEXT: br label %[[COND_END]] 118 // IR-EMPTY: 119 // IR-NEXT: [[COND_END]]: 120 // IR-NEXT: %[[COND:.+]] = phi i32 [ %[[TMP19]], %[[COND_TRUE]] ], [ %[[TMP20]], %[[COND_FALSE]] ] 121 // IR-NEXT: store i32 %[[COND]], i32* %[[DOTOMP_UB]], align 4 122 // IR-NEXT: %[[TMP21:.+]] = load i32, i32* %[[DOTOMP_LB]], align 4 123 // IR-NEXT: store i32 %[[TMP21]], i32* %[[DOTOMP_IV]], align 4 124 // IR-NEXT: br label %[[OMP_INNER_FOR_COND:.+]] 125 // IR-EMPTY: 126 // IR-NEXT: [[OMP_INNER_FOR_COND]]: 127 // IR-NEXT: %[[TMP22:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 128 // IR-NEXT: %[[TMP23:.+]] = load i32, i32* %[[DOTOMP_UB]], align 4 129 // IR-NEXT: %[[ADD14:.+]] = add i32 %[[TMP23]], 1 130 // IR-NEXT: %[[CMP15:.+]] = icmp ult i32 %[[TMP22]], %[[ADD14]] 131 // IR-NEXT: br i1 %[[CMP15]], label %[[OMP_INNER_FOR_BODY:.+]], label %[[OMP_INNER_FOR_END:.+]] 132 // IR-EMPTY: 133 // IR-NEXT: [[OMP_INNER_FOR_BODY]]: 134 // IR-NEXT: %[[TMP24:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 135 // IR-NEXT: %[[MUL:.+]] = mul i32 %[[TMP24]], 7 136 // IR-NEXT: %[[ADD16:.+]] = add i32 0, %[[MUL]] 137 // IR-NEXT: store i32 %[[ADD16]], i32* %[[DOTUNROLLED_IV_I12]], align 4 138 // IR-NEXT: %[[TMP25:.+]] = load i32, i32* %[[DOTUNROLLED_IV_I12]], align 4 139 // IR-NEXT: store i32 %[[TMP25]], i32* %[[DOTUNROLL_INNER_IV_I]], align 4 140 // IR-NEXT: br label %[[FOR_COND:.+]] 141 // IR-EMPTY: 142 // IR-NEXT: [[FOR_COND]]: 143 // IR-NEXT: %[[TMP26:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 144 // IR-NEXT: %[[TMP27:.+]] = load i32, i32* %[[DOTUNROLLED_IV_I12]], align 4 145 // IR-NEXT: %[[ADD17:.+]] = add i32 %[[TMP27]], 7 146 // IR-NEXT: %[[CMP18:.+]] = icmp ule i32 %[[TMP26]], %[[ADD17]] 147 // IR-NEXT: br i1 %[[CMP18]], label %[[LAND_RHS:.+]], label %[[LAND_END:.+]] 148 // IR-EMPTY: 149 // IR-NEXT: [[LAND_RHS]]: 150 // IR-NEXT: %[[TMP28:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 151 // IR-NEXT: %[[TMP29:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_3]], align 4 152 // IR-NEXT: %[[ADD19:.+]] = add i32 %[[TMP29]], 1 153 // IR-NEXT: %[[CMP20:.+]] = icmp ule i32 %[[TMP28]], %[[ADD19]] 154 // IR-NEXT: br label %[[LAND_END]] 155 // IR-EMPTY: 156 // IR-NEXT: [[LAND_END]]: 157 // IR-NEXT: %[[TMP30:.+]] = phi i1 [ false, %[[FOR_COND]] ], [ %[[CMP20]], %[[LAND_RHS]] ] 158 // IR-NEXT: br i1 %[[TMP30]], label %[[FOR_BODY:.+]], label %[[FOR_END:.+]] 159 // IR-EMPTY: 160 // IR-NEXT: [[FOR_BODY]]: 161 // IR-NEXT: %[[TMP31:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_]], align 4 162 // IR-NEXT: %[[TMP32:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 163 // IR-NEXT: %[[TMP33:.+]] = load i32, i32* %[[DOTCAPTURE_EXPR_2]], align 4 164 // IR-NEXT: %[[MUL21:.+]] = mul i32 %[[TMP32]], %[[TMP33]] 165 // IR-NEXT: %[[ADD22:.+]] = add i32 %[[TMP31]], %[[MUL21]] 166 // IR-NEXT: store i32 %[[ADD22]], i32* %[[I]], align 4 167 // IR-NEXT: %[[TMP34:.+]] = load i32, i32* %[[TMP2]], align 4 168 // IR-NEXT: %[[TMP35:.+]] = load i32, i32* %[[TMP0]], align 4 169 // IR-NEXT: %[[TMP36:.+]] = load i32, i32* %[[TMP1]], align 4 170 // IR-NEXT: %[[TMP37:.+]] = load i32, i32* %[[I]], align 4 171 // IR-NEXT: call void (...) @body(i32 %[[TMP34]], i32 %[[TMP35]], i32 %[[TMP36]], i32 %[[TMP37]]) 172 // IR-NEXT: br label %[[FOR_INC:.+]] 173 // IR-EMPTY: 174 // IR-NEXT: [[FOR_INC]]: 175 // IR-NEXT: %[[TMP38:.+]] = load i32, i32* %[[DOTUNROLL_INNER_IV_I]], align 4 176 // IR-NEXT: %[[INC:.+]] = add i32 %[[TMP38]], 1 177 // IR-NEXT: store i32 %[[INC]], i32* %[[DOTUNROLL_INNER_IV_I]], align 4 178 // IR-NEXT: br label %[[FOR_COND]], !llvm.loop ![[LOOP2:[0-9]+]] 179 // IR-EMPTY: 180 // IR-NEXT: [[FOR_END]]: 181 // IR-NEXT: br label %[[OMP_BODY_CONTINUE:.+]] 182 // IR-EMPTY: 183 // IR-NEXT: [[OMP_BODY_CONTINUE]]: 184 // IR-NEXT: br label %[[OMP_INNER_FOR_INC:.+]] 185 // IR-EMPTY: 186 // IR-NEXT: [[OMP_INNER_FOR_INC]]: 187 // IR-NEXT: %[[TMP39:.+]] = load i32, i32* %[[DOTOMP_IV]], align 4 188 // IR-NEXT: %[[ADD23:.+]] = add i32 %[[TMP39]], 1 189 // IR-NEXT: store i32 %[[ADD23]], i32* %[[DOTOMP_IV]], align 4 190 // IR-NEXT: br label %[[OMP_INNER_FOR_COND]] 191 // IR-EMPTY: 192 // IR-NEXT: [[OMP_INNER_FOR_END]]: 193 // IR-NEXT: br label %[[OMP_LOOP_EXIT:.+]] 194 // IR-EMPTY: 195 // IR-NEXT: [[OMP_LOOP_EXIT]]: 196 // IR-NEXT: %[[TMP40:.+]] = load i32*, i32** %[[DOTGLOBAL_TID__ADDR]], align 8 197 // IR-NEXT: %[[TMP41:.+]] = load i32, i32* %[[TMP40]], align 4 198 // IR-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @1, i32 %[[TMP41]]) 199 // IR-NEXT: br label %[[OMP_PRECOND_END]] 200 // IR-EMPTY: 201 // IR-NEXT: [[OMP_PRECOND_END]]: 202 // IR-NEXT: ret void 203 // IR-NEXT: } 204 205 #endif /* HEADER */ 206 207 208 // IR: ![[LOOP2]] = distinct !{![[LOOP2]], ![[LOOPPROP3:[0-9]+]], ![[LOOPPROP4:[0-9]+]]} 209 // IR: ![[LOOPPROP3]] = !{!"llvm.loop.mustprogress"} 210 // IR: ![[LOOPPROP4]] = !{!"llvm.loop.unroll.count", i32 7} 211