1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=50 -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=50 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK8 15 // expected-no-diagnostics 16 #ifndef HEADER 17 #define HEADER 18 19 int main(int argc, char **argv) { 20 21 22 23 24 25 #pragma omp parallel master taskloop simd priority(argc) safelen(8) 26 for (int i = 0; i < 10; ++i) 27 ; 28 29 30 31 #pragma omp parallel master taskloop simd nogroup grainsize(argc) simdlen(16) 32 for (int i = 0; i < 10; ++i) 33 ; 34 35 36 int i; 37 #pragma omp parallel master taskloop simd if(argc) shared(argc, argv) collapse(2) num_tasks(argc) lastprivate(i) aligned(argv:8) 38 for (i = 0; i < argc; ++i) 39 for (int j = argc; j < argv[argc][argc]; ++j) 40 ; 41 } 42 43 struct S { 44 int a; 45 S(int c) { 46 47 #pragma omp parallel master taskloop simd shared(c) num_tasks(4) final(c) 48 for (a = 0; a < c; ++a) 49 ; 50 } 51 } s(1); 52 53 54 55 #endif 56 // CHECK1-LABEL: define {{[^@]+}}@main 57 // CHECK1-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 58 // CHECK1-NEXT: entry: 59 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 60 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 61 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 62 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 63 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 64 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 65 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 66 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 67 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 68 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 69 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED7:%.*]] = alloca i64, align 8 70 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 71 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 72 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 73 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 74 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 75 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 76 // CHECK1-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 77 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 78 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 79 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 80 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 81 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 82 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 83 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 84 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]]) 85 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 86 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 87 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 88 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32* 89 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4 90 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8 91 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP6]]) 92 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 93 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 94 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 95 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_4]], align 1 96 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 97 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_5]], align 4 98 // CHECK1-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 99 // CHECK1-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP9]] to i1 100 // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED7]] to i8* 101 // CHECK1-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL6]] to i8 102 // CHECK1-NEXT: store i8 [[FROMBOOL9]], i8* [[CONV8]], align 1 103 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED7]], align 8 104 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 105 // CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED10]] to i32* 106 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV11]], align 4 107 // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED10]], align 8 108 // CHECK1-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 109 // CHECK1-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[TMP13]] to i1 110 // CHECK1-NEXT: br i1 [[TOBOOL12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 111 // CHECK1: omp_if.then: 112 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i8***, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) 113 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 114 // CHECK1: omp_if.else: 115 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 116 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 117 // CHECK1-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) #[[ATTR2:[0-9]+]] 118 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 119 // CHECK1-NEXT: br label [[OMP_IF_END]] 120 // CHECK1: omp_if.end: 121 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 122 // CHECK1-NEXT: ret i32 [[TMP14]] 123 // 124 // 125 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 126 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 127 // CHECK1-NEXT: entry: 128 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 129 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 130 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 131 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 132 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 133 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 134 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 135 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 136 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 137 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 138 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 139 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 140 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 141 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 142 // CHECK1: omp_if.then: 143 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 144 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 145 // CHECK1-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 146 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 147 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 148 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 4 149 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP8]] to i32* 150 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[TMP9]], align 8 151 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 152 // CHECK1-NEXT: store i64 0, i64* [[TMP10]], align 8 153 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 154 // CHECK1-NEXT: store i64 9, i64* [[TMP11]], align 8 155 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 156 // CHECK1-NEXT: store i64 1, i64* [[TMP12]], align 8 157 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 158 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i8* 159 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP14]], i8 0, i64 8, i1 false) 160 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]], align 8 161 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP10]], i64* [[TMP11]], i64 [[TMP15]], i32 1, i32 0, i64 0, i8* null) 162 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 163 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 164 // CHECK1-NEXT: br label [[OMP_IF_END]] 165 // CHECK1: omp_if.end: 166 // CHECK1-NEXT: ret void 167 // 168 // 169 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 170 // CHECK1-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 171 // CHECK1-NEXT: entry: 172 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 173 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 174 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 175 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 176 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 177 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 178 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 179 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 180 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 181 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 182 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 183 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 184 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 185 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 186 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 187 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 188 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 189 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 190 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 191 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 192 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 193 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 194 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 195 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 196 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 197 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 198 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 199 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 200 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 201 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 202 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 203 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 204 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 205 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 206 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 207 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 208 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 209 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 210 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 211 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 212 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 213 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 214 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 215 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 216 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 217 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 218 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 219 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 220 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 221 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 222 // CHECK1-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 223 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 224 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 225 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 226 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 227 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 228 // CHECK1: omp.inner.for.cond.i: 229 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 230 // CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 231 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 232 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 233 // CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 234 // CHECK1: omp.inner.for.body.i: 235 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 236 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 237 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 238 // CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 239 // CHECK1-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 240 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 241 // CHECK1: .omp_outlined..1.exit: 242 // CHECK1-NEXT: ret i32 0 243 // 244 // 245 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 246 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 247 // CHECK1-NEXT: entry: 248 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 249 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 250 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 251 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 252 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 253 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 254 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 255 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 256 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 257 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 258 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 259 // CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 260 // CHECK1-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 261 // CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 262 // CHECK1: omp_if.then: 263 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 264 // CHECK1-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 265 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1* 266 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0 267 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 268 // CHECK1-NEXT: store i64 0, i64* [[TMP8]], align 8 269 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 270 // CHECK1-NEXT: store i64 9, i64* [[TMP9]], align 8 271 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 272 // CHECK1-NEXT: store i64 1, i64* [[TMP10]], align 8 273 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 274 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i8* 275 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP12]], i8 0, i64 8, i1 false) 276 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8 277 // CHECK1-NEXT: [[TMP14:%.*]] = zext i32 [[TMP4]] to i64 278 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP8]], i64* [[TMP9]], i64 [[TMP13]], i32 1, i32 1, i64 [[TMP14]], i8* null) 279 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 280 // CHECK1-NEXT: br label [[OMP_IF_END]] 281 // CHECK1: omp_if.end: 282 // CHECK1-NEXT: ret void 283 // 284 // 285 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..4 286 // CHECK1-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.1* noalias [[TMP1:%.*]]) #[[ATTR4]] { 287 // CHECK1-NEXT: entry: 288 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 290 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 291 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 292 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 293 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 294 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 295 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 296 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 297 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 298 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 299 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 300 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 301 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 302 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.1*, align 8 303 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 304 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.1* [[TMP1]], %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 305 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 306 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.1*, %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 307 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP3]], i32 0, i32 0 308 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 309 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 310 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 311 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 312 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.1* [[TMP3]] to i8* 313 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 314 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 315 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 316 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 317 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 318 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 319 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 320 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 321 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 322 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 323 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 324 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 325 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 326 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 327 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 328 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 329 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 330 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 331 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 332 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 333 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 334 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 335 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 336 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 337 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 338 // CHECK1-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 339 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 340 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 341 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 342 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 343 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 344 // CHECK1: omp.inner.for.cond.i: 345 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 346 // CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 347 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 348 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 349 // CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 350 // CHECK1: omp.inner.for.body.i: 351 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 352 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 353 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 354 // CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 355 // CHECK1-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 356 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 357 // CHECK1: .omp_outlined..3.exit: 358 // CHECK1-NEXT: ret i32 0 359 // 360 // 361 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 362 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i8*** nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] { 363 // CHECK1-NEXT: entry: 364 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 365 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 366 // CHECK1-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 367 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 368 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8***, align 8 369 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 370 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 371 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 372 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 373 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 374 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 375 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 376 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4 377 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i64, align 8 378 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 379 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 380 // CHECK1-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 381 // CHECK1-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 382 // CHECK1-NEXT: store i8*** [[ARGV]], i8**** [[ARGV_ADDR]], align 8 383 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 384 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 385 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 386 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 387 // CHECK1-NEXT: [[TMP2:%.*]] = load i8***, i8**** [[ARGV_ADDR]], align 8 388 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 389 // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 390 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 391 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 392 // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 393 // CHECK1-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 394 // CHECK1-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 395 // CHECK1: omp_if.then: 396 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 0 397 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[TMP7]], align 8 398 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 1 399 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8 400 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2 401 // CHECK1-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8 402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 8 403 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 404 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP1]], align 4 405 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_5]], align 4 406 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 407 // CHECK1-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_6]], align 4 408 // CHECK1-NEXT: [[TMP13:%.*]] = load i8**, i8*** [[TMP2]], align 8 409 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP1]], align 4 410 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 411 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP13]], i64 [[IDXPROM]] 412 // CHECK1-NEXT: [[TMP15:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 413 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP1]], align 4 414 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 415 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP15]], i64 [[IDXPROM8]] 416 // CHECK1-NEXT: [[TMP17:%.*]] = load i8, i8* [[ARRAYIDX9]], align 1 417 // CHECK1-NEXT: [[CONV10:%.*]] = sext i8 [[TMP17]] to i32 418 // CHECK1-NEXT: store i32 [[CONV10]], i32* [[DOTCAPTURE_EXPR_7]], align 4 419 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 420 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP18]], 0 421 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 422 // CHECK1-NEXT: [[CONV12:%.*]] = sext i32 [[DIV]] to i64 423 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4 424 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 425 // CHECK1-NEXT: [[SUB13:%.*]] = sub i32 [[TMP19]], [[TMP20]] 426 // CHECK1-NEXT: [[SUB14:%.*]] = sub i32 [[SUB13]], 1 427 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB14]], 1 428 // CHECK1-NEXT: [[DIV15:%.*]] = udiv i32 [[ADD]], 1 429 // CHECK1-NEXT: [[CONV16:%.*]] = zext i32 [[DIV15]] to i64 430 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV12]], [[CONV16]] 431 // CHECK1-NEXT: [[SUB17:%.*]] = sub nsw i64 [[MUL]], 1 432 // CHECK1-NEXT: store i64 [[SUB17]], i64* [[DOTCAPTURE_EXPR_11]], align 8 433 // CHECK1-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 88, i64 24, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 434 // CHECK1-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.kmp_task_t_with_privates.3* 435 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 0 436 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 0 437 // CHECK1-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 438 // CHECK1-NEXT: [[TMP26:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8* 439 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP25]], i8* align 8 [[TMP26]], i64 24, i1 false) 440 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 1 441 // CHECK1-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 8 442 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP28]] to i1 443 // CHECK1-NEXT: [[TMP29:%.*]] = sext i1 [[TOBOOL]] to i32 444 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 5 445 // CHECK1-NEXT: store i64 0, i64* [[TMP30]], align 8 446 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 6 447 // CHECK1-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_11]], align 8 448 // CHECK1-NEXT: store i64 [[TMP32]], i64* [[TMP31]], align 8 449 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 7 450 // CHECK1-NEXT: store i64 1, i64* [[TMP33]], align 8 451 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 9 452 // CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i8* 453 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP35]], i8 0, i64 8, i1 false) 454 // CHECK1-NEXT: [[TMP36:%.*]] = load i64, i64* [[TMP33]], align 8 455 // CHECK1-NEXT: [[TMP37:%.*]] = zext i32 [[TMP10]] to i64 456 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP21]], i32 [[TMP29]], i64* [[TMP30]], i64* [[TMP31]], i64 [[TMP36]], i32 1, i32 2, i64 [[TMP37]], i8* bitcast (void (%struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3*, i32)* @.omp_task_dup. to i8*)) 457 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 458 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 459 // CHECK1-NEXT: br label [[OMP_IF_END]] 460 // CHECK1: omp_if.end: 461 // CHECK1-NEXT: ret void 462 // 463 // 464 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 465 // CHECK1-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i32** noalias [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 466 // CHECK1-NEXT: entry: 467 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 468 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 469 // CHECK1-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 470 // CHECK1-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 471 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 472 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 473 // CHECK1-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 474 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 475 // CHECK1-NEXT: ret void 476 // 477 // 478 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..7 479 // CHECK1-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias [[TMP1:%.*]]) #[[ATTR4]] { 480 // CHECK1-NEXT: entry: 481 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 482 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 483 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 484 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 485 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 486 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 487 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 488 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 489 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 490 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 491 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 492 // CHECK1-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 493 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 494 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 496 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 497 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 498 // CHECK1-NEXT: [[J_I:%.*]] = alloca i32, align 4 499 // CHECK1-NEXT: [[I14_I:%.*]] = alloca i32, align 4 500 // CHECK1-NEXT: [[J15_I:%.*]] = alloca i32, align 4 501 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 502 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 503 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 504 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 505 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 506 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 507 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 508 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 509 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 510 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 511 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 512 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 513 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 514 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 515 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 516 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 517 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 518 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 519 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 520 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 521 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 522 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 523 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 524 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 525 // CHECK1-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 526 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 527 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 528 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 529 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 530 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 531 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 532 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 533 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 534 // CHECK1-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 535 // CHECK1-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 536 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 537 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 538 // CHECK1-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 539 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 540 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 541 // CHECK1-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 542 // CHECK1-NEXT: [[TMP22:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 543 // CHECK1-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 544 // CHECK1-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 545 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 546 // CHECK1-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 547 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP22]], i32 0, i32 0 548 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 549 // CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 550 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 551 // CHECK1-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 552 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 553 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 554 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 555 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 556 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 557 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 558 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 559 // CHECK1-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 560 // CHECK1-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 561 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 562 // CHECK1-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 563 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 564 // CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 565 // CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 566 // CHECK1-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 567 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 568 // CHECK1-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 569 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 570 // CHECK1-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 571 // CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 572 // CHECK1-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 573 // CHECK1-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 574 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 575 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 576 // CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 577 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 578 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 579 // CHECK1-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 580 // CHECK1-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 581 // CHECK1-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 582 // CHECK1-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 583 // CHECK1-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 584 // CHECK1-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 585 // CHECK1-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 586 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 587 // CHECK1-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 588 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 589 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 590 // CHECK1-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 591 // CHECK1: land.lhs.true.i: 592 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 593 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 594 // CHECK1-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 595 // CHECK1-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 596 // CHECK1: taskloop.if.then.i: 597 // CHECK1-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 598 // CHECK1-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 599 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 600 // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 601 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 602 // CHECK1-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 603 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 604 // CHECK1: omp.inner.for.cond.i: 605 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 606 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 607 // CHECK1-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP58]], [[TMP59]] 608 // CHECK1-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 609 // CHECK1: omp.inner.for.body.i: 610 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 611 // CHECK1-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 612 // CHECK1-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 613 // CHECK1-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP61]], [[TMP62]] 614 // CHECK1-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 615 // CHECK1-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 616 // CHECK1-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP60]], [[CONV22_I]] 617 // CHECK1-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 618 // CHECK1-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 619 // CHECK1-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 620 // CHECK1-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP63]] to i64 621 // CHECK1-NEXT: [[TMP64:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 622 // CHECK1-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 623 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 624 // CHECK1-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 625 // CHECK1-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP66]], [[TMP67]] 626 // CHECK1-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 627 // CHECK1-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 628 // CHECK1-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP65]], [[CONV33_I]] 629 // CHECK1-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 630 // CHECK1-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 631 // CHECK1-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 632 // CHECK1-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 633 // CHECK1-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 634 // CHECK1-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 635 // CHECK1-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP64]], [[MUL41_I]] 636 // CHECK1-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 637 // CHECK1-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 638 // CHECK1-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 639 // CHECK1-NEXT: [[TMP70:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 640 // CHECK1-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP70]], 1 641 // CHECK1-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 642 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 643 // CHECK1: omp.inner.for.end.i: 644 // CHECK1-NEXT: br label [[TASKLOOP_IF_END_I]] 645 // CHECK1: taskloop.if.end.i: 646 // CHECK1-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 647 // CHECK1-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 648 // CHECK1-NEXT: br i1 [[TMP72]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 649 // CHECK1: .omp.lastprivate.then.i: 650 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 651 // CHECK1: .omp_outlined..6.exit: 652 // CHECK1-NEXT: ret i32 0 653 // 654 // 655 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_dup. 656 // CHECK1-SAME: (%struct.kmp_task_t_with_privates.3* [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR4]] { 657 // CHECK1-NEXT: entry: 658 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 659 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 660 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 661 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP0]], %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 662 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 663 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 664 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 665 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 666 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 667 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 668 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 669 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 670 // CHECK1-NEXT: ret void 671 // 672 // 673 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 674 // CHECK1-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 675 // CHECK1-NEXT: entry: 676 // CHECK1-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 677 // CHECK1-NEXT: ret void 678 // 679 // 680 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ei 681 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 682 // CHECK1-NEXT: entry: 683 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 684 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 685 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 686 // CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 687 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 688 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 689 // CHECK1-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 690 // CHECK1-NEXT: ret void 691 // 692 // 693 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei 694 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 695 // CHECK1-NEXT: entry: 696 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 697 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 698 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 699 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 700 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 701 // CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 702 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 703 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 704 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 705 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 706 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 707 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 708 // CHECK1-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP1]] to i1 709 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 710 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 711 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV]], align 1 712 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 713 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.S* [[THIS1]], i32* [[C_ADDR]], i64 [[TMP2]]) 714 // CHECK1-NEXT: ret void 715 // 716 // 717 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 718 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 719 // CHECK1-NEXT: entry: 720 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 721 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 722 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 723 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 724 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 725 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 726 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 727 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 728 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 729 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 731 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 732 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 733 // CHECK1-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 734 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 735 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 736 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C_ADDR]], align 8 737 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 738 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 739 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 740 // CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 741 // CHECK1-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0 742 // CHECK1-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 743 // CHECK1: omp_if.then: 744 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 0 745 // CHECK1-NEXT: store %struct.S* [[TMP0]], %struct.S** [[TMP6]], align 8 746 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1 747 // CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8 748 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 749 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8 750 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 751 // CHECK1-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8 752 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4 753 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_2]], align 4 754 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 755 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 756 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 757 // CHECK1-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 758 // CHECK1-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 759 // CHECK1-NEXT: [[TMP11:%.*]] = select i1 [[TOBOOL]], i32 2, i32 0 760 // CHECK1-NEXT: [[TMP12:%.*]] = or i32 [[TMP11]], 1 761 // CHECK1-NEXT: [[TMP13:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 [[TMP12]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.5*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 762 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.kmp_task_t_with_privates.5* 763 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP14]], i32 0, i32 0 764 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 0 765 // CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8 766 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast %struct.anon.4* [[AGG_CAPTURED]] to i8* 767 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 16, i1 false) 768 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 5 769 // CHECK1-NEXT: store i64 0, i64* [[TMP19]], align 8 770 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 6 771 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 772 // CHECK1-NEXT: [[CONV5:%.*]] = sext i32 [[TMP21]] to i64 773 // CHECK1-NEXT: store i64 [[CONV5]], i64* [[TMP20]], align 8 774 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 7 775 // CHECK1-NEXT: store i64 1, i64* [[TMP22]], align 8 776 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 9 777 // CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i8* 778 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP24]], i8 0, i64 8, i1 false) 779 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP22]], align 8 780 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i8* [[TMP13]], i32 1, i64* [[TMP19]], i64* [[TMP20]], i64 [[TMP25]], i32 1, i32 2, i64 4, i8* null) 781 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 782 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 783 // CHECK1-NEXT: br label [[OMP_IF_END]] 784 // CHECK1: omp_if.end: 785 // CHECK1-NEXT: ret void 786 // 787 // 788 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..10 789 // CHECK1-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.5* noalias [[TMP1:%.*]]) #[[ATTR4]] { 790 // CHECK1-NEXT: entry: 791 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 792 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 793 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 794 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 795 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 796 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 797 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 798 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 799 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 800 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 801 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.4*, align 8 802 // CHECK1-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 803 // CHECK1-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 804 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 805 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 806 // CHECK1-NEXT: [[A_I:%.*]] = alloca i32, align 4 807 // CHECK1-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 808 // CHECK1-NEXT: [[A5_I:%.*]] = alloca i32, align 4 809 // CHECK1-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 810 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 811 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 812 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.5*, align 8 813 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 814 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.5* [[TMP1]], %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 815 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 816 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.5*, %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 817 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP3]], i32 0, i32 0 818 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 819 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 820 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 821 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.4* 822 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.5* [[TMP3]] to i8* 823 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 824 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 825 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 826 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 827 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 828 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 829 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 830 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 831 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 832 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 833 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]]) 834 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]]) 835 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 836 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 837 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 838 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !62 839 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !62 840 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !62 841 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !62 842 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62 843 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 844 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !62 845 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !62 846 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !62 847 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !62 848 // CHECK1-NEXT: store %struct.anon.4* [[TMP8]], %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 849 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 850 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP20]], i32 0, i32 0 851 // CHECK1-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 852 // CHECK1-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !62 853 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 854 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 855 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 856 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 857 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 858 // CHECK1-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 859 // CHECK1-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !62 860 // CHECK1-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !62 861 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !62 862 // CHECK1-NEXT: store i32 0, i32* [[TMP27]], align 4 863 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 864 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 865 // CHECK1-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 866 // CHECK1: taskloop.if.then.i: 867 // CHECK1-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !62 868 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 869 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 870 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62 871 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 872 // CHECK1-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 874 // CHECK1: omp.inner.for.cond.i: 875 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 876 // CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 877 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !62, !llvm.access.group !63 878 // CHECK1-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 879 // CHECK1-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 880 // CHECK1: omp.inner.for.body.i: 881 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 882 // CHECK1-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !62, !llvm.access.group !63 883 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !63 884 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 885 // CHECK1-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 886 // CHECK1-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 887 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP64:![0-9]+]] 888 // CHECK1: omp.inner.for.end.i: 889 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 890 // CHECK1: .omp_outlined..9.exit: 891 // CHECK1-NEXT: ret i32 0 892 // 893 // 894 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 895 // CHECK1-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 896 // CHECK1-NEXT: entry: 897 // CHECK1-NEXT: call void @__cxx_global_var_init() 898 // CHECK1-NEXT: ret void 899 // 900 // 901 // CHECK2-LABEL: define {{[^@]+}}@main 902 // CHECK2-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 903 // CHECK2-NEXT: entry: 904 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 905 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 906 // CHECK2-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 907 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 908 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 909 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 910 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 911 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 912 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 913 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 914 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED7:%.*]] = alloca i64, align 8 915 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 916 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 917 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 918 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 919 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 920 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 921 // CHECK2-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 922 // CHECK2-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 923 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 924 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 925 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 926 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 927 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 928 // CHECK2-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 929 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]]) 930 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 931 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 932 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 933 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32* 934 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4 935 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8 936 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP6]]) 937 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 938 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 939 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 940 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_4]], align 1 941 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 942 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_5]], align 4 943 // CHECK2-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 944 // CHECK2-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP9]] to i1 945 // CHECK2-NEXT: [[CONV8:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED7]] to i8* 946 // CHECK2-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL6]] to i8 947 // CHECK2-NEXT: store i8 [[FROMBOOL9]], i8* [[CONV8]], align 1 948 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED7]], align 8 949 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 950 // CHECK2-NEXT: [[CONV11:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED10]] to i32* 951 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[CONV11]], align 4 952 // CHECK2-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED10]], align 8 953 // CHECK2-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 954 // CHECK2-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[TMP13]] to i1 955 // CHECK2-NEXT: br i1 [[TOBOOL12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 956 // CHECK2: omp_if.then: 957 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i8***, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) 958 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 959 // CHECK2: omp_if.else: 960 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 961 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 962 // CHECK2-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) #[[ATTR2:[0-9]+]] 963 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 964 // CHECK2-NEXT: br label [[OMP_IF_END]] 965 // CHECK2: omp_if.end: 966 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 967 // CHECK2-NEXT: ret i32 [[TMP14]] 968 // 969 // 970 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 971 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 972 // CHECK2-NEXT: entry: 973 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 974 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 975 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 976 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 977 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 978 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 979 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 980 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 981 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 982 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 983 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 984 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 985 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 986 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 987 // CHECK2: omp_if.then: 988 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 989 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 990 // CHECK2-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 991 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 992 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 993 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 4 994 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP8]] to i32* 995 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[TMP9]], align 8 996 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 997 // CHECK2-NEXT: store i64 0, i64* [[TMP10]], align 8 998 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 999 // CHECK2-NEXT: store i64 9, i64* [[TMP11]], align 8 1000 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 1001 // CHECK2-NEXT: store i64 1, i64* [[TMP12]], align 8 1002 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 1003 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i8* 1004 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP14]], i8 0, i64 8, i1 false) 1005 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]], align 8 1006 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP10]], i64* [[TMP11]], i64 [[TMP15]], i32 1, i32 0, i64 0, i8* null) 1007 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1008 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1009 // CHECK2-NEXT: br label [[OMP_IF_END]] 1010 // CHECK2: omp_if.end: 1011 // CHECK2-NEXT: ret void 1012 // 1013 // 1014 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry. 1015 // CHECK2-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1016 // CHECK2-NEXT: entry: 1017 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1018 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1019 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1020 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1021 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1022 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1023 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1024 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1025 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1026 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1027 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 1028 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1029 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1030 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1031 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 1032 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1033 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1034 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1035 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1036 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 1037 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1038 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1039 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1040 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 1041 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 1042 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1043 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1044 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1045 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1046 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1047 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1048 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1049 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1050 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1051 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1052 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 1053 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 1054 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 1055 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 1056 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 1057 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 1058 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 1059 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 1060 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 1061 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 1062 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1063 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1064 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 1065 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 1066 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 1067 // CHECK2-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1068 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1069 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1070 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1071 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1072 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1073 // CHECK2: omp.inner.for.cond.i: 1074 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1075 // CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1076 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1077 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1078 // CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 1079 // CHECK2: omp.inner.for.body.i: 1080 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1081 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 1082 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1083 // CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1084 // CHECK2-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1085 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 1086 // CHECK2: .omp_outlined..1.exit: 1087 // CHECK2-NEXT: ret i32 0 1088 // 1089 // 1090 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1091 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1092 // CHECK2-NEXT: entry: 1093 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1094 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1095 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1096 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 1097 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1098 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1099 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1100 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1101 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1102 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1103 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1104 // CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1105 // CHECK2-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1106 // CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1107 // CHECK2: omp_if.then: 1108 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 1109 // CHECK2-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 1110 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1* 1111 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0 1112 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 1113 // CHECK2-NEXT: store i64 0, i64* [[TMP8]], align 8 1114 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 1115 // CHECK2-NEXT: store i64 9, i64* [[TMP9]], align 8 1116 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 1117 // CHECK2-NEXT: store i64 1, i64* [[TMP10]], align 8 1118 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 1119 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i8* 1120 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP12]], i8 0, i64 8, i1 false) 1121 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8 1122 // CHECK2-NEXT: [[TMP14:%.*]] = zext i32 [[TMP4]] to i64 1123 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP8]], i64* [[TMP9]], i64 [[TMP13]], i32 1, i32 1, i64 [[TMP14]], i8* null) 1124 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1125 // CHECK2-NEXT: br label [[OMP_IF_END]] 1126 // CHECK2: omp_if.end: 1127 // CHECK2-NEXT: ret void 1128 // 1129 // 1130 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..4 1131 // CHECK2-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.1* noalias [[TMP1:%.*]]) #[[ATTR4]] { 1132 // CHECK2-NEXT: entry: 1133 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1134 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1135 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1136 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1137 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1138 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1139 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1140 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1141 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1142 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1143 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 1144 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1145 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1146 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1147 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.1*, align 8 1148 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1149 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.1* [[TMP1]], %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 1150 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1151 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.1*, %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 1152 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP3]], i32 0, i32 0 1153 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1154 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1155 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1156 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 1157 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.1* [[TMP3]] to i8* 1158 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1159 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1160 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1161 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1162 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1163 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1164 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1165 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1166 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1167 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1168 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 1169 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 1170 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 1171 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 1172 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 1173 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 1174 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 1175 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 1176 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 1177 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 1178 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 1179 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 1180 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 1181 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 1182 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 1183 // CHECK2-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 1184 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 1185 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 1186 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1187 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 1188 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1189 // CHECK2: omp.inner.for.cond.i: 1190 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1191 // CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1192 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 1193 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1194 // CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 1195 // CHECK2: omp.inner.for.body.i: 1196 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1197 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 1198 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1199 // CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1200 // CHECK2-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1201 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 1202 // CHECK2: .omp_outlined..3.exit: 1203 // CHECK2-NEXT: ret i32 0 1204 // 1205 // 1206 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1207 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i8*** nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] { 1208 // CHECK2-NEXT: entry: 1209 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1210 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1211 // CHECK2-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 1212 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 1213 // CHECK2-NEXT: [[ARGV_ADDR:%.*]] = alloca i8***, align 8 1214 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1215 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 1216 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 1217 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1218 // CHECK2-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 1219 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 1220 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 1221 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4 1222 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i64, align 8 1223 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1224 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1225 // CHECK2-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 1226 // CHECK2-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 1227 // CHECK2-NEXT: store i8*** [[ARGV]], i8**** [[ARGV_ADDR]], align 8 1228 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1229 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 1230 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 1231 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 1232 // CHECK2-NEXT: [[TMP2:%.*]] = load i8***, i8**** [[ARGV_ADDR]], align 8 1233 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 1234 // CHECK2-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 1235 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1236 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1237 // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1238 // CHECK2-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 1239 // CHECK2-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1240 // CHECK2: omp_if.then: 1241 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 0 1242 // CHECK2-NEXT: store i32* [[TMP0]], i32** [[TMP7]], align 8 1243 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 1 1244 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8 1245 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2 1246 // CHECK2-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8 1247 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[CONV3]], align 8 1248 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1249 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[TMP1]], align 4 1250 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_5]], align 4 1251 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP1]], align 4 1252 // CHECK2-NEXT: store i32 [[TMP12]], i32* [[DOTCAPTURE_EXPR_6]], align 4 1253 // CHECK2-NEXT: [[TMP13:%.*]] = load i8**, i8*** [[TMP2]], align 8 1254 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP1]], align 4 1255 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64 1256 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP13]], i64 [[IDXPROM]] 1257 // CHECK2-NEXT: [[TMP15:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 1258 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP1]], align 4 1259 // CHECK2-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP16]] to i64 1260 // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP15]], i64 [[IDXPROM8]] 1261 // CHECK2-NEXT: [[TMP17:%.*]] = load i8, i8* [[ARRAYIDX9]], align 1 1262 // CHECK2-NEXT: [[CONV10:%.*]] = sext i8 [[TMP17]] to i32 1263 // CHECK2-NEXT: store i32 [[CONV10]], i32* [[DOTCAPTURE_EXPR_7]], align 4 1264 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1265 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP18]], 0 1266 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1267 // CHECK2-NEXT: [[CONV12:%.*]] = sext i32 [[DIV]] to i64 1268 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4 1269 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 1270 // CHECK2-NEXT: [[SUB13:%.*]] = sub i32 [[TMP19]], [[TMP20]] 1271 // CHECK2-NEXT: [[SUB14:%.*]] = sub i32 [[SUB13]], 1 1272 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB14]], 1 1273 // CHECK2-NEXT: [[DIV15:%.*]] = udiv i32 [[ADD]], 1 1274 // CHECK2-NEXT: [[CONV16:%.*]] = zext i32 [[DIV15]] to i64 1275 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV12]], [[CONV16]] 1276 // CHECK2-NEXT: [[SUB17:%.*]] = sub nsw i64 [[MUL]], 1 1277 // CHECK2-NEXT: store i64 [[SUB17]], i64* [[DOTCAPTURE_EXPR_11]], align 8 1278 // CHECK2-NEXT: [[TMP21:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 88, i64 24, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 1279 // CHECK2-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to %struct.kmp_task_t_with_privates.3* 1280 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 0 1281 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 0 1282 // CHECK2-NEXT: [[TMP25:%.*]] = load i8*, i8** [[TMP24]], align 8 1283 // CHECK2-NEXT: [[TMP26:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8* 1284 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP25]], i8* align 8 [[TMP26]], i64 24, i1 false) 1285 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP22]], i32 0, i32 1 1286 // CHECK2-NEXT: [[TMP28:%.*]] = load i8, i8* [[CONV]], align 8 1287 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP28]] to i1 1288 // CHECK2-NEXT: [[TMP29:%.*]] = sext i1 [[TOBOOL]] to i32 1289 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 5 1290 // CHECK2-NEXT: store i64 0, i64* [[TMP30]], align 8 1291 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 6 1292 // CHECK2-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_11]], align 8 1293 // CHECK2-NEXT: store i64 [[TMP32]], i64* [[TMP31]], align 8 1294 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 7 1295 // CHECK2-NEXT: store i64 1, i64* [[TMP33]], align 8 1296 // CHECK2-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP23]], i32 0, i32 9 1297 // CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i8* 1298 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP35]], i8 0, i64 8, i1 false) 1299 // CHECK2-NEXT: [[TMP36:%.*]] = load i64, i64* [[TMP33]], align 8 1300 // CHECK2-NEXT: [[TMP37:%.*]] = zext i32 [[TMP10]] to i64 1301 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP21]], i32 [[TMP29]], i64* [[TMP30]], i64* [[TMP31]], i64 [[TMP36]], i32 1, i32 2, i64 [[TMP37]], i8* bitcast (void (%struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3*, i32)* @.omp_task_dup. to i8*)) 1302 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1303 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1304 // CHECK2-NEXT: br label [[OMP_IF_END]] 1305 // CHECK2: omp_if.end: 1306 // CHECK2-NEXT: ret void 1307 // 1308 // 1309 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_privates_map. 1310 // CHECK2-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i32** noalias [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 1311 // CHECK2-NEXT: entry: 1312 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 1313 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 1314 // CHECK2-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 1315 // CHECK2-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 1316 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 1317 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 1318 // CHECK2-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 1319 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 1320 // CHECK2-NEXT: ret void 1321 // 1322 // 1323 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..7 1324 // CHECK2-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias [[TMP1:%.*]]) #[[ATTR4]] { 1325 // CHECK2-NEXT: entry: 1326 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1327 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1328 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1329 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1330 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1331 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1332 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1333 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1334 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1335 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1336 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 1337 // CHECK2-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 1338 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 1339 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 1340 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 1341 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 1342 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1343 // CHECK2-NEXT: [[J_I:%.*]] = alloca i32, align 4 1344 // CHECK2-NEXT: [[I14_I:%.*]] = alloca i32, align 4 1345 // CHECK2-NEXT: [[J15_I:%.*]] = alloca i32, align 4 1346 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 1347 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1348 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 1349 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1350 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 1351 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1352 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 1353 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 1354 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1355 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1356 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1357 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 1358 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 1359 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 1360 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 1361 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1362 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1363 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1364 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1365 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1366 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 1367 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1368 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 1369 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1370 // CHECK2-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 1371 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 1372 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 1373 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 1374 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 1375 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 1376 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 1377 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 1378 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 1379 // CHECK2-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 1380 // CHECK2-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 1381 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 1382 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 1383 // CHECK2-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 1384 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 1385 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 1386 // CHECK2-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 1387 // CHECK2-NEXT: [[TMP22:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 1388 // CHECK2-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 1389 // CHECK2-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 1390 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 1391 // CHECK2-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 1392 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP22]], i32 0, i32 0 1393 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 1394 // CHECK2-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 1395 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 1396 // CHECK2-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 1397 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1398 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1399 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 1400 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 1401 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1402 // CHECK2-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1403 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 1404 // CHECK2-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 1405 // CHECK2-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 1406 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 1407 // CHECK2-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 1408 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 1409 // CHECK2-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 1410 // CHECK2-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 1411 // CHECK2-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 1412 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 1413 // CHECK2-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 1414 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 1415 // CHECK2-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 1416 // CHECK2-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 1417 // CHECK2-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 1418 // CHECK2-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 1419 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1420 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1421 // CHECK2-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 1422 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1423 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1424 // CHECK2-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 1425 // CHECK2-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 1426 // CHECK2-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 1427 // CHECK2-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 1428 // CHECK2-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 1429 // CHECK2-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 1430 // CHECK2-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 1431 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1432 // CHECK2-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 1433 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1434 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 1435 // CHECK2-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 1436 // CHECK2: land.lhs.true.i: 1437 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1438 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1439 // CHECK2-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 1440 // CHECK2-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 1441 // CHECK2: taskloop.if.then.i: 1442 // CHECK2-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 1443 // CHECK2-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 1444 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 1445 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 1446 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 1447 // CHECK2-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 1448 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1449 // CHECK2: omp.inner.for.cond.i: 1450 // CHECK2-NEXT: [[TMP58:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1451 // CHECK2-NEXT: [[TMP59:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 1452 // CHECK2-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP58]], [[TMP59]] 1453 // CHECK2-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 1454 // CHECK2: omp.inner.for.body.i: 1455 // CHECK2-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1456 // CHECK2-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1457 // CHECK2-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1458 // CHECK2-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP61]], [[TMP62]] 1459 // CHECK2-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 1460 // CHECK2-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 1461 // CHECK2-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP60]], [[CONV22_I]] 1462 // CHECK2-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 1463 // CHECK2-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 1464 // CHECK2-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1465 // CHECK2-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP63]] to i64 1466 // CHECK2-NEXT: [[TMP64:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1467 // CHECK2-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1468 // CHECK2-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1469 // CHECK2-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1470 // CHECK2-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP66]], [[TMP67]] 1471 // CHECK2-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 1472 // CHECK2-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 1473 // CHECK2-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP65]], [[CONV33_I]] 1474 // CHECK2-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1475 // CHECK2-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1476 // CHECK2-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 1477 // CHECK2-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 1478 // CHECK2-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 1479 // CHECK2-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 1480 // CHECK2-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP64]], [[MUL41_I]] 1481 // CHECK2-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 1482 // CHECK2-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 1483 // CHECK2-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 1484 // CHECK2-NEXT: [[TMP70:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1485 // CHECK2-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP70]], 1 1486 // CHECK2-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1487 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 1488 // CHECK2: omp.inner.for.end.i: 1489 // CHECK2-NEXT: br label [[TASKLOOP_IF_END_I]] 1490 // CHECK2: taskloop.if.end.i: 1491 // CHECK2-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 1492 // CHECK2-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 1493 // CHECK2-NEXT: br i1 [[TMP72]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 1494 // CHECK2: .omp.lastprivate.then.i: 1495 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 1496 // CHECK2: .omp_outlined..6.exit: 1497 // CHECK2-NEXT: ret i32 0 1498 // 1499 // 1500 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_dup. 1501 // CHECK2-SAME: (%struct.kmp_task_t_with_privates.3* [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR4]] { 1502 // CHECK2-NEXT: entry: 1503 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 1504 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 1505 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 1506 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP0]], %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 1507 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 1508 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 1509 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 1510 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 1511 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1512 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 1513 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 1514 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 1515 // CHECK2-NEXT: ret void 1516 // 1517 // 1518 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2Ei 1519 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 1520 // CHECK2-NEXT: entry: 1521 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1522 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 1523 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1524 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1525 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1526 // CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 1527 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1528 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 1529 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 1530 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1531 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1532 // CHECK2-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1533 // CHECK2-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP1]] to i1 1534 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 1535 // CHECK2-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 1536 // CHECK2-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV]], align 1 1537 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1538 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.S* [[THIS1]], i32* [[C_ADDR]], i64 [[TMP2]]) 1539 // CHECK2-NEXT: ret void 1540 // 1541 // 1542 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 1543 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1544 // CHECK2-NEXT: entry: 1545 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1546 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1547 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1548 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 1549 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1550 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 1551 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1552 // CHECK2-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 1553 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 1554 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1555 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1556 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1557 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1558 // CHECK2-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 1559 // CHECK2-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1560 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1561 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C_ADDR]], align 8 1562 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 1563 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1564 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 1565 // CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1566 // CHECK2-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0 1567 // CHECK2-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1568 // CHECK2: omp_if.then: 1569 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 0 1570 // CHECK2-NEXT: store %struct.S* [[TMP0]], %struct.S** [[TMP6]], align 8 1571 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1 1572 // CHECK2-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8 1573 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1574 // CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8 1575 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 1576 // CHECK2-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8 1577 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4 1578 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_2]], align 4 1579 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 1580 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 1581 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1582 // CHECK2-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 1583 // CHECK2-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1584 // CHECK2-NEXT: [[TMP11:%.*]] = select i1 [[TOBOOL]], i32 2, i32 0 1585 // CHECK2-NEXT: [[TMP12:%.*]] = or i32 [[TMP11]], 1 1586 // CHECK2-NEXT: [[TMP13:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 [[TMP12]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.5*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 1587 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.kmp_task_t_with_privates.5* 1588 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP14]], i32 0, i32 0 1589 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 0 1590 // CHECK2-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8 1591 // CHECK2-NEXT: [[TMP18:%.*]] = bitcast %struct.anon.4* [[AGG_CAPTURED]] to i8* 1592 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 16, i1 false) 1593 // CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 5 1594 // CHECK2-NEXT: store i64 0, i64* [[TMP19]], align 8 1595 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 6 1596 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1597 // CHECK2-NEXT: [[CONV5:%.*]] = sext i32 [[TMP21]] to i64 1598 // CHECK2-NEXT: store i64 [[CONV5]], i64* [[TMP20]], align 8 1599 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 7 1600 // CHECK2-NEXT: store i64 1, i64* [[TMP22]], align 8 1601 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 9 1602 // CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i8* 1603 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP24]], i8 0, i64 8, i1 false) 1604 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP22]], align 8 1605 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i8* [[TMP13]], i32 1, i64* [[TMP19]], i64* [[TMP20]], i64 [[TMP25]], i32 1, i32 2, i64 4, i8* null) 1606 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1607 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 1608 // CHECK2-NEXT: br label [[OMP_IF_END]] 1609 // CHECK2: omp_if.end: 1610 // CHECK2-NEXT: ret void 1611 // 1612 // 1613 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..10 1614 // CHECK2-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.5* noalias [[TMP1:%.*]]) #[[ATTR4]] { 1615 // CHECK2-NEXT: entry: 1616 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1617 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1618 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1619 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1620 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1621 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1622 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1623 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1624 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1625 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1626 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.4*, align 8 1627 // CHECK2-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 1628 // CHECK2-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 1629 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 1630 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 1631 // CHECK2-NEXT: [[A_I:%.*]] = alloca i32, align 4 1632 // CHECK2-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 1633 // CHECK2-NEXT: [[A5_I:%.*]] = alloca i32, align 4 1634 // CHECK2-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 1635 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1636 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1637 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.5*, align 8 1638 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1639 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.5* [[TMP1]], %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 1640 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1641 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.5*, %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 1642 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP3]], i32 0, i32 0 1643 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1644 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1645 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1646 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.4* 1647 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.5* [[TMP3]] to i8* 1648 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1649 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1650 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1651 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1652 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1653 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1654 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1655 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1656 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1657 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1658 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]]) 1659 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]]) 1660 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 1661 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 1662 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 1663 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !62 1664 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !62 1665 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !62 1666 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !62 1667 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62 1668 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 1669 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !62 1670 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !62 1671 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !62 1672 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !62 1673 // CHECK2-NEXT: store %struct.anon.4* [[TMP8]], %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 1674 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 1675 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP20]], i32 0, i32 0 1676 // CHECK2-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 1677 // CHECK2-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !62 1678 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 1679 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 1680 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1681 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1682 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1683 // CHECK2-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 1684 // CHECK2-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !62 1685 // CHECK2-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !62 1686 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !62 1687 // CHECK2-NEXT: store i32 0, i32* [[TMP27]], align 4 1688 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1689 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 1690 // CHECK2-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 1691 // CHECK2: taskloop.if.then.i: 1692 // CHECK2-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !62 1693 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 1694 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 1695 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62 1696 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 1697 // CHECK2-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 1698 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1699 // CHECK2: omp.inner.for.cond.i: 1700 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1701 // CHECK2-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 1702 // CHECK2-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !62, !llvm.access.group !63 1703 // CHECK2-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 1704 // CHECK2-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 1705 // CHECK2: omp.inner.for.body.i: 1706 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1707 // CHECK2-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !62, !llvm.access.group !63 1708 // CHECK2-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !63 1709 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1710 // CHECK2-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 1711 // CHECK2-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1712 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP64:![0-9]+]] 1713 // CHECK2: omp.inner.for.end.i: 1714 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 1715 // CHECK2: .omp_outlined..9.exit: 1716 // CHECK2-NEXT: ret i32 0 1717 // 1718 // 1719 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1Ei 1720 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 1721 // CHECK2-NEXT: entry: 1722 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1723 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 1724 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1725 // CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 1726 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1727 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 1728 // CHECK2-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 1729 // CHECK2-NEXT: ret void 1730 // 1731 // 1732 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init 1733 // CHECK2-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 1734 // CHECK2-NEXT: entry: 1735 // CHECK2-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 1736 // CHECK2-NEXT: ret void 1737 // 1738 // 1739 // CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 1740 // CHECK2-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 1741 // CHECK2-NEXT: entry: 1742 // CHECK2-NEXT: call void @__cxx_global_var_init() 1743 // CHECK2-NEXT: ret void 1744 // 1745 // 1746 // CHECK3-LABEL: define {{[^@]+}}@main 1747 // CHECK3-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1748 // CHECK3-NEXT: entry: 1749 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1750 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1751 // CHECK3-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1752 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1753 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 1754 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1755 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 1756 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1757 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 1758 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 1759 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED7:%.*]] = alloca i64, align 8 1760 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 1761 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1762 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1763 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1764 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1765 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1766 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1767 // CHECK3-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1768 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1769 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1770 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1771 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 1772 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 1773 // CHECK3-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 1774 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]]) 1775 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1776 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1777 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1778 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32* 1779 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4 1780 // CHECK3-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8 1781 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP6]]) 1782 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1783 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1784 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1785 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_4]], align 1 1786 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1787 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_5]], align 4 1788 // CHECK3-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 1789 // CHECK3-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP9]] to i1 1790 // CHECK3-NEXT: [[CONV8:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED7]] to i8* 1791 // CHECK3-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL6]] to i8 1792 // CHECK3-NEXT: store i8 [[FROMBOOL9]], i8* [[CONV8]], align 1 1793 // CHECK3-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED7]], align 8 1794 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1795 // CHECK3-NEXT: [[CONV11:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED10]] to i32* 1796 // CHECK3-NEXT: store i32 [[TMP11]], i32* [[CONV11]], align 4 1797 // CHECK3-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED10]], align 8 1798 // CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 1799 // CHECK3-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[TMP13]] to i1 1800 // CHECK3-NEXT: br i1 [[TOBOOL12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1801 // CHECK3: omp_if.then: 1802 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i8***, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) 1803 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1804 // CHECK3: omp_if.else: 1805 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 1806 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 1807 // CHECK3-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) #[[ATTR2:[0-9]+]] 1808 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 1809 // CHECK3-NEXT: br label [[OMP_IF_END]] 1810 // CHECK3: omp_if.end: 1811 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 1812 // CHECK3-NEXT: ret i32 [[TMP14]] 1813 // 1814 // 1815 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1816 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 1817 // CHECK3-NEXT: entry: 1818 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1819 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1820 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1821 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 1822 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1823 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1824 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1825 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1826 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1827 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1828 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1829 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1830 // CHECK3-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1831 // CHECK3-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1832 // CHECK3: omp_if.then: 1833 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1834 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 1835 // CHECK3-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 1836 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 1837 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 1838 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 4 1839 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP8]] to i32* 1840 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[TMP9]], align 8 1841 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 1842 // CHECK3-NEXT: store i64 0, i64* [[TMP10]], align 8 1843 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 1844 // CHECK3-NEXT: store i64 9, i64* [[TMP11]], align 8 1845 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 1846 // CHECK3-NEXT: store i64 1, i64* [[TMP12]], align 8 1847 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 1848 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i8* 1849 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP14]], i8 0, i64 8, i1 false) 1850 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]], align 8 1851 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP10]], i64* [[TMP11]], i64 [[TMP15]], i32 1, i32 0, i64 0, i8* null) 1852 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1853 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1854 // CHECK3-NEXT: br label [[OMP_IF_END]] 1855 // CHECK3: omp_if.end: 1856 // CHECK3-NEXT: ret void 1857 // 1858 // 1859 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry. 1860 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1861 // CHECK3-NEXT: entry: 1862 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1863 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1864 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1865 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1866 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1867 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1868 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1869 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1870 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1871 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1872 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 1873 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 1874 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1875 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1876 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 1877 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1878 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1879 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1880 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1881 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 1882 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1883 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1884 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1885 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 1886 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 1887 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1888 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1889 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1890 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1891 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1892 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1893 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1894 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1895 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1896 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1897 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 1898 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 1899 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 1900 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 1901 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 1902 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 1903 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 1904 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 1905 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 1906 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 1907 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1908 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1909 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 1910 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 1911 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 1912 // CHECK3-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1913 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1914 // CHECK3-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1915 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1916 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1917 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1918 // CHECK3: omp.inner.for.cond.i: 1919 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1920 // CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1921 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1922 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1923 // CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 1924 // CHECK3: omp.inner.for.body.i: 1925 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1926 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 1927 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1928 // CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1929 // CHECK3-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1930 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 1931 // CHECK3: .omp_outlined..1.exit: 1932 // CHECK3-NEXT: ret i32 0 1933 // 1934 // 1935 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1936 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 1937 // CHECK3-NEXT: entry: 1938 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1939 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1940 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 1941 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 1942 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1943 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1944 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1945 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 1946 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 1947 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1948 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 1949 // CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1950 // CHECK3-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 1951 // CHECK3-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1952 // CHECK3: omp_if.then: 1953 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 1954 // CHECK3-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 1955 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1* 1956 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0 1957 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 1958 // CHECK3-NEXT: store i64 0, i64* [[TMP8]], align 8 1959 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 1960 // CHECK3-NEXT: store i64 9, i64* [[TMP9]], align 8 1961 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 1962 // CHECK3-NEXT: store i64 1, i64* [[TMP10]], align 8 1963 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 1964 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i8* 1965 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP12]], i8 0, i64 8, i1 false) 1966 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8 1967 // CHECK3-NEXT: [[TMP14:%.*]] = zext i32 [[TMP4]] to i64 1968 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP8]], i64* [[TMP9]], i64 [[TMP13]], i32 1, i32 1, i64 [[TMP14]], i8* null) 1969 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 1970 // CHECK3-NEXT: br label [[OMP_IF_END]] 1971 // CHECK3: omp_if.end: 1972 // CHECK3-NEXT: ret void 1973 // 1974 // 1975 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..4 1976 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.1* noalias [[TMP1:%.*]]) #[[ATTR4]] { 1977 // CHECK3-NEXT: entry: 1978 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1979 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1980 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1981 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1982 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1983 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1984 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1985 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1986 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1987 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1988 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 1989 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 1990 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1991 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1992 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.1*, align 8 1993 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1994 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.1* [[TMP1]], %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 1995 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1996 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.1*, %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 1997 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP3]], i32 0, i32 0 1998 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1999 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2000 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2001 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 2002 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.1* [[TMP3]] to i8* 2003 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2004 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2005 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2006 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2007 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2008 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2009 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2010 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2011 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2012 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2013 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 2014 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 2015 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 2016 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 2017 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 2018 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 2019 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 2020 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 2021 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 2022 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 2023 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2024 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 2025 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 2026 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 2027 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 2028 // CHECK3-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2029 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2030 // CHECK3-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2031 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 2032 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 2033 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2034 // CHECK3: omp.inner.for.cond.i: 2035 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2036 // CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 2037 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 2038 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 2039 // CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 2040 // CHECK3: omp.inner.for.body.i: 2041 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2042 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 2043 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2044 // CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 2045 // CHECK3-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2046 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 2047 // CHECK3: .omp_outlined..3.exit: 2048 // CHECK3-NEXT: ret i32 0 2049 // 2050 // 2051 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 2052 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i8*** nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] { 2053 // CHECK3-NEXT: entry: 2054 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2055 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2056 // CHECK3-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2057 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 2058 // CHECK3-NEXT: [[ARGV_ADDR:%.*]] = alloca i8***, align 8 2059 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2060 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 2061 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 2062 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2063 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2064 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 2065 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 2066 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4 2067 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i64, align 8 2068 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2069 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2070 // CHECK3-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2071 // CHECK3-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 2072 // CHECK3-NEXT: store i8*** [[ARGV]], i8**** [[ARGV_ADDR]], align 8 2073 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2074 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 2075 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2076 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 2077 // CHECK3-NEXT: [[TMP2:%.*]] = load i8***, i8**** [[ARGV_ADDR]], align 8 2078 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 2079 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 2080 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2081 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2082 // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2083 // CHECK3-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 2084 // CHECK3-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2085 // CHECK3: omp_if.then: 2086 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 0 2087 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[TMP7]], align 8 2088 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 1 2089 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8 2090 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2 2091 // CHECK3-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8 2092 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 3 2093 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8 2094 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 2095 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2096 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[TMP10]], align 8 2097 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 8 2098 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2099 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP1]], align 4 2100 // CHECK3-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_5]], align 4 2101 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP1]], align 4 2102 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_6]], align 4 2103 // CHECK3-NEXT: [[TMP15:%.*]] = load i8**, i8*** [[TMP2]], align 8 2104 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP1]], align 4 2105 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 2106 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP15]], i64 [[IDXPROM]] 2107 // CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 2108 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP1]], align 4 2109 // CHECK3-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP18]] to i64 2110 // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 [[IDXPROM8]] 2111 // CHECK3-NEXT: [[TMP19:%.*]] = load i8, i8* [[ARRAYIDX9]], align 1 2112 // CHECK3-NEXT: [[CONV10:%.*]] = sext i8 [[TMP19]] to i32 2113 // CHECK3-NEXT: store i32 [[CONV10]], i32* [[DOTCAPTURE_EXPR_7]], align 4 2114 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 2115 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 2116 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2117 // CHECK3-NEXT: [[CONV12:%.*]] = sext i32 [[DIV]] to i64 2118 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4 2119 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 2120 // CHECK3-NEXT: [[SUB13:%.*]] = sub i32 [[TMP21]], [[TMP22]] 2121 // CHECK3-NEXT: [[SUB14:%.*]] = sub i32 [[SUB13]], 1 2122 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB14]], 1 2123 // CHECK3-NEXT: [[DIV15:%.*]] = udiv i32 [[ADD]], 1 2124 // CHECK3-NEXT: [[CONV16:%.*]] = zext i32 [[DIV15]] to i64 2125 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV12]], [[CONV16]] 2126 // CHECK3-NEXT: [[SUB17:%.*]] = sub nsw i64 [[MUL]], 1 2127 // CHECK3-NEXT: store i64 [[SUB17]], i64* [[DOTCAPTURE_EXPR_11]], align 8 2128 // CHECK3-NEXT: [[TMP23:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 88, i64 32, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 2129 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP23]] to %struct.kmp_task_t_with_privates.3* 2130 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 0 2131 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 0 2132 // CHECK3-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 8 2133 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8* 2134 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP27]], i8* align 8 [[TMP28]], i64 32, i1 false) 2135 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 1 2136 // CHECK3-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 8 2137 // CHECK3-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP30]] to i1 2138 // CHECK3-NEXT: [[TMP31:%.*]] = sext i1 [[TOBOOL18]] to i32 2139 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 5 2140 // CHECK3-NEXT: store i64 0, i64* [[TMP32]], align 8 2141 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 6 2142 // CHECK3-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_11]], align 8 2143 // CHECK3-NEXT: store i64 [[TMP34]], i64* [[TMP33]], align 8 2144 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 7 2145 // CHECK3-NEXT: store i64 1, i64* [[TMP35]], align 8 2146 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 9 2147 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i8* 2148 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP37]], i8 0, i64 8, i1 false) 2149 // CHECK3-NEXT: [[TMP38:%.*]] = load i64, i64* [[TMP35]], align 8 2150 // CHECK3-NEXT: [[TMP39:%.*]] = zext i32 [[TMP12]] to i64 2151 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP23]], i32 [[TMP31]], i64* [[TMP32]], i64* [[TMP33]], i64 [[TMP38]], i32 1, i32 2, i64 [[TMP39]], i8* bitcast (void (%struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3*, i32)* @.omp_task_dup. to i8*)) 2152 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2153 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2154 // CHECK3-NEXT: br label [[OMP_IF_END]] 2155 // CHECK3: omp_if.end: 2156 // CHECK3-NEXT: ret void 2157 // 2158 // 2159 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_privates_map. 2160 // CHECK3-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i32** noalias [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 2161 // CHECK3-NEXT: entry: 2162 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 2163 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 2164 // CHECK3-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 2165 // CHECK3-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 2166 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 2167 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 2168 // CHECK3-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 2169 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 2170 // CHECK3-NEXT: ret void 2171 // 2172 // 2173 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..7 2174 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias [[TMP1:%.*]]) #[[ATTR4]] { 2175 // CHECK3-NEXT: entry: 2176 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2177 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2178 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2179 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2180 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2181 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2182 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2183 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2184 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2185 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2186 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 2187 // CHECK3-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 2188 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 2189 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 2190 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 2191 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 2192 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 2193 // CHECK3-NEXT: [[J_I:%.*]] = alloca i32, align 4 2194 // CHECK3-NEXT: [[I14_I:%.*]] = alloca i32, align 4 2195 // CHECK3-NEXT: [[J15_I:%.*]] = alloca i32, align 4 2196 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 2197 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2198 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 2199 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2200 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 2201 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2202 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 2203 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 2204 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2205 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2206 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2207 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 2208 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 2209 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 2210 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 2211 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2212 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2213 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2214 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2215 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2216 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 2217 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2218 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 2219 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2220 // CHECK3-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 2221 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 2222 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 2223 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 2224 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 2225 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 2226 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 2227 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 2228 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 2229 // CHECK3-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 2230 // CHECK3-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 2231 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 2232 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 2233 // CHECK3-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 2234 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 2235 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 2236 // CHECK3-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 2237 // CHECK3-NEXT: [[TMP22:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 2238 // CHECK3-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 2239 // CHECK3-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 2240 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 2241 // CHECK3-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 2242 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP22]], i32 0, i32 0 2243 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 2244 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 2245 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 2246 // CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 2247 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2248 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2249 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 2250 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 2251 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2252 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2253 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 2254 // CHECK3-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 2255 // CHECK3-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 2256 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 2257 // CHECK3-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 2258 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 2259 // CHECK3-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 2260 // CHECK3-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 2261 // CHECK3-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 2262 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 2263 // CHECK3-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 2264 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 2265 // CHECK3-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 2266 // CHECK3-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 2267 // CHECK3-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 2268 // CHECK3-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 2269 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2270 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2271 // CHECK3-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 2272 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2273 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2274 // CHECK3-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 2275 // CHECK3-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 2276 // CHECK3-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 2277 // CHECK3-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 2278 // CHECK3-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 2279 // CHECK3-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 2280 // CHECK3-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 2281 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2282 // CHECK3-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 2283 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2284 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 2285 // CHECK3-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 2286 // CHECK3: land.lhs.true.i: 2287 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2288 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2289 // CHECK3-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 2290 // CHECK3-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 2291 // CHECK3: taskloop.if.then.i: 2292 // CHECK3-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 2293 // CHECK3-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2294 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 2295 // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 2296 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 2297 // CHECK3-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 2298 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 3 2299 // CHECK3-NEXT: [[TMP59:%.*]] = load i8, i8* [[TMP58]], align 1 2300 // CHECK3-NEXT: [[TOBOOL_I:%.*]] = trunc i8 [[TMP59]] to i1 2301 // CHECK3-NEXT: br i1 [[TOBOOL_I]], label [[OMP_IF_THEN_I:%.*]], label [[OMP_IF_ELSE_I:%.*]] 2302 // CHECK3: omp_if.then.i: 2303 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2304 // CHECK3: omp.inner.for.cond.i: 2305 // CHECK3-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2306 // CHECK3-NEXT: [[TMP61:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 2307 // CHECK3-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP60]], [[TMP61]] 2308 // CHECK3-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 2309 // CHECK3: omp.inner.for.body.i: 2310 // CHECK3-NEXT: [[TMP62:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2311 // CHECK3-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2312 // CHECK3-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2313 // CHECK3-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP63]], [[TMP64]] 2314 // CHECK3-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 2315 // CHECK3-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 2316 // CHECK3-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP62]], [[CONV22_I]] 2317 // CHECK3-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 2318 // CHECK3-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 2319 // CHECK3-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2320 // CHECK3-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP65]] to i64 2321 // CHECK3-NEXT: [[TMP66:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2322 // CHECK3-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2323 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2324 // CHECK3-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2325 // CHECK3-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 2326 // CHECK3-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 2327 // CHECK3-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 2328 // CHECK3-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP67]], [[CONV33_I]] 2329 // CHECK3-NEXT: [[TMP70:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2330 // CHECK3-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2331 // CHECK3-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP70]], [[TMP71]] 2332 // CHECK3-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 2333 // CHECK3-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 2334 // CHECK3-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 2335 // CHECK3-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP66]], [[MUL41_I]] 2336 // CHECK3-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 2337 // CHECK3-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 2338 // CHECK3-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 2339 // CHECK3-NEXT: [[TMP72:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2340 // CHECK3-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP72]], 1 2341 // CHECK3-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2342 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 2343 // CHECK3: omp.inner.for.end.i: 2344 // CHECK3-NEXT: br label [[OMP_IF_END_I:%.*]] 2345 // CHECK3: omp_if.else.i: 2346 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I:%.*]] 2347 // CHECK3: omp.inner.for.cond47.i: 2348 // CHECK3-NEXT: [[TMP73:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2349 // CHECK3-NEXT: [[TMP74:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 2350 // CHECK3-NEXT: [[CMP48_I:%.*]] = icmp ule i64 [[TMP73]], [[TMP74]] 2351 // CHECK3-NEXT: br i1 [[CMP48_I]], label [[OMP_INNER_FOR_BODY49_I:%.*]], label [[OMP_INNER_FOR_END82_I:%.*]] 2352 // CHECK3: omp.inner.for.body49.i: 2353 // CHECK3-NEXT: [[TMP75:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2354 // CHECK3-NEXT: [[TMP76:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2355 // CHECK3-NEXT: [[TMP77:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2356 // CHECK3-NEXT: [[SUB50_I:%.*]] = sub i32 [[TMP76]], [[TMP77]] 2357 // CHECK3-NEXT: [[SUB51_I:%.*]] = sub i32 [[SUB50_I]], 1 2358 // CHECK3-NEXT: [[CONV55_I:%.*]] = zext i32 [[SUB50_I]] to i64 2359 // CHECK3-NEXT: [[DIV56_I:%.*]] = sdiv i64 [[TMP75]], [[CONV55_I]] 2360 // CHECK3-NEXT: [[CONV59_I:%.*]] = trunc i64 [[DIV56_I]] to i32 2361 // CHECK3-NEXT: store i32 [[CONV59_I]], i32* [[I14_I]], align 4, !noalias !47 2362 // CHECK3-NEXT: [[TMP78:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2363 // CHECK3-NEXT: [[CONV60_I:%.*]] = sext i32 [[TMP78]] to i64 2364 // CHECK3-NEXT: [[TMP79:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2365 // CHECK3-NEXT: [[TMP80:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2366 // CHECK3-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2367 // CHECK3-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2368 // CHECK3-NEXT: [[SUB61_I:%.*]] = sub i32 [[TMP81]], [[TMP82]] 2369 // CHECK3-NEXT: [[SUB62_I:%.*]] = sub i32 [[SUB61_I]], 1 2370 // CHECK3-NEXT: [[CONV66_I:%.*]] = zext i32 [[SUB61_I]] to i64 2371 // CHECK3-NEXT: [[DIV67_I:%.*]] = sdiv i64 [[TMP80]], [[CONV66_I]] 2372 // CHECK3-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2373 // CHECK3-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2374 // CHECK3-NEXT: [[SUB68_I:%.*]] = sub i32 [[TMP83]], [[TMP84]] 2375 // CHECK3-NEXT: [[SUB69_I:%.*]] = sub i32 [[SUB68_I]], 1 2376 // CHECK3-NEXT: [[CONV73_I:%.*]] = zext i32 [[SUB68_I]] to i64 2377 // CHECK3-NEXT: [[MUL74_I:%.*]] = mul nsw i64 [[DIV67_I]], [[CONV73_I]] 2378 // CHECK3-NEXT: [[SUB75_I:%.*]] = sub nsw i64 [[TMP79]], [[MUL74_I]] 2379 // CHECK3-NEXT: [[ADD77_I:%.*]] = add nsw i64 [[CONV60_I]], [[SUB75_I]] 2380 // CHECK3-NEXT: [[CONV78_I:%.*]] = trunc i64 [[ADD77_I]] to i32 2381 // CHECK3-NEXT: store i32 [[CONV78_I]], i32* [[J15_I]], align 4, !noalias !47 2382 // CHECK3-NEXT: [[TMP85:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2383 // CHECK3-NEXT: [[ADD81_I:%.*]] = add nsw i64 [[TMP85]], 1 2384 // CHECK3-NEXT: store i64 [[ADD81_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2385 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I]], !llvm.loop [[LOOP51:![0-9]+]] 2386 // CHECK3: omp.inner.for.end82.i: 2387 // CHECK3-NEXT: br label [[OMP_IF_END_I]] 2388 // CHECK3: omp_if.end.i: 2389 // CHECK3-NEXT: br label [[TASKLOOP_IF_END_I]] 2390 // CHECK3: taskloop.if.end.i: 2391 // CHECK3-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 2392 // CHECK3-NEXT: [[TMP87:%.*]] = icmp ne i32 [[TMP86]], 0 2393 // CHECK3-NEXT: br i1 [[TMP87]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 2394 // CHECK3: .omp.lastprivate.then.i: 2395 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 2396 // CHECK3: .omp_outlined..6.exit: 2397 // CHECK3-NEXT: ret i32 0 2398 // 2399 // 2400 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_dup. 2401 // CHECK3-SAME: (%struct.kmp_task_t_with_privates.3* [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR4]] { 2402 // CHECK3-NEXT: entry: 2403 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 2404 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 2405 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 2406 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP0]], %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 2407 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 2408 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 2409 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 2410 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 2411 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2412 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 2413 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 2414 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 2415 // CHECK3-NEXT: ret void 2416 // 2417 // 2418 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init 2419 // CHECK3-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 2420 // CHECK3-NEXT: entry: 2421 // CHECK3-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 2422 // CHECK3-NEXT: ret void 2423 // 2424 // 2425 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1Ei 2426 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 2427 // CHECK3-NEXT: entry: 2428 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2429 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2430 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2431 // CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2432 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2433 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2434 // CHECK3-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 2435 // CHECK3-NEXT: ret void 2436 // 2437 // 2438 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2Ei 2439 // CHECK3-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 2440 // CHECK3-NEXT: entry: 2441 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2442 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2443 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2444 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2445 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2446 // CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2447 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2448 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2449 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 2450 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2451 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 2452 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 2453 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP1]] to i1 2454 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 2455 // CHECK3-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 2456 // CHECK3-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV]], align 1 2457 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2458 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.S* [[THIS1]], i32* [[C_ADDR]], i64 [[TMP2]]) 2459 // CHECK3-NEXT: ret void 2460 // 2461 // 2462 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8 2463 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2464 // CHECK3-NEXT: entry: 2465 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2466 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2467 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2468 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 2469 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2470 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 2471 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2472 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 2473 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 2474 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2475 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2476 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2477 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2478 // CHECK3-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 2479 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2480 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2481 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C_ADDR]], align 8 2482 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 2483 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2484 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 2485 // CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2486 // CHECK3-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0 2487 // CHECK3-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2488 // CHECK3: omp_if.then: 2489 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 0 2490 // CHECK3-NEXT: store %struct.S* [[TMP0]], %struct.S** [[TMP6]], align 8 2491 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1 2492 // CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8 2493 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2494 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8 2495 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 2496 // CHECK3-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8 2497 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4 2498 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_2]], align 4 2499 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 2500 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 2501 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2502 // CHECK3-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 2503 // CHECK3-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2504 // CHECK3-NEXT: [[TMP11:%.*]] = select i1 [[TOBOOL]], i32 2, i32 0 2505 // CHECK3-NEXT: [[TMP12:%.*]] = or i32 [[TMP11]], 1 2506 // CHECK3-NEXT: [[TMP13:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 [[TMP12]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.5*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 2507 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.kmp_task_t_with_privates.5* 2508 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP14]], i32 0, i32 0 2509 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 0 2510 // CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8 2511 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast %struct.anon.4* [[AGG_CAPTURED]] to i8* 2512 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 16, i1 false) 2513 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 5 2514 // CHECK3-NEXT: store i64 0, i64* [[TMP19]], align 8 2515 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 6 2516 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2517 // CHECK3-NEXT: [[CONV5:%.*]] = sext i32 [[TMP21]] to i64 2518 // CHECK3-NEXT: store i64 [[CONV5]], i64* [[TMP20]], align 8 2519 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 7 2520 // CHECK3-NEXT: store i64 1, i64* [[TMP22]], align 8 2521 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 9 2522 // CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i8* 2523 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP24]], i8 0, i64 8, i1 false) 2524 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP22]], align 8 2525 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i8* [[TMP13]], i32 1, i64* [[TMP19]], i64* [[TMP20]], i64 [[TMP25]], i32 1, i32 2, i64 4, i8* null) 2526 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2527 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 2528 // CHECK3-NEXT: br label [[OMP_IF_END]] 2529 // CHECK3: omp_if.end: 2530 // CHECK3-NEXT: ret void 2531 // 2532 // 2533 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..10 2534 // CHECK3-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.5* noalias [[TMP1:%.*]]) #[[ATTR4]] { 2535 // CHECK3-NEXT: entry: 2536 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2537 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2538 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2539 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2540 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2541 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2542 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2543 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2544 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2545 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2546 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.4*, align 8 2547 // CHECK3-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 2548 // CHECK3-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 2549 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 2550 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 2551 // CHECK3-NEXT: [[A_I:%.*]] = alloca i32, align 4 2552 // CHECK3-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 2553 // CHECK3-NEXT: [[A5_I:%.*]] = alloca i32, align 4 2554 // CHECK3-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 2555 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 2556 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2557 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.5*, align 8 2558 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2559 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.5* [[TMP1]], %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 2560 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2561 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.5*, %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 2562 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP3]], i32 0, i32 0 2563 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2564 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2565 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2566 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.4* 2567 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.5* [[TMP3]] to i8* 2568 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2569 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2570 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2571 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2572 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2573 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2574 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2575 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2576 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2577 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2578 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META53:![0-9]+]]) 2579 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 2580 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 2581 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 2582 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]]) 2583 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !64 2584 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !64 2585 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !64 2586 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !64 2587 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !64 2588 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 2589 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !64 2590 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !64 2591 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !64 2592 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !64 2593 // CHECK3-NEXT: store %struct.anon.4* [[TMP8]], %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 2594 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 2595 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP20]], i32 0, i32 0 2596 // CHECK3-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 2597 // CHECK3-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !64 2598 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 2599 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 2600 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2601 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2602 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2603 // CHECK3-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 2604 // CHECK3-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !64 2605 // CHECK3-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !64 2606 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !64 2607 // CHECK3-NEXT: store i32 0, i32* [[TMP27]], align 4 2608 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2609 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 2610 // CHECK3-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 2611 // CHECK3: taskloop.if.then.i: 2612 // CHECK3-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !64 2613 // CHECK3-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 2614 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 2615 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64 2616 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 2617 // CHECK3-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 2618 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2619 // CHECK3: omp.inner.for.cond.i: 2620 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2621 // CHECK3-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 2622 // CHECK3-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !64, !llvm.access.group !65 2623 // CHECK3-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 2624 // CHECK3-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 2625 // CHECK3: omp.inner.for.body.i: 2626 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2627 // CHECK3-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !64, !llvm.access.group !65 2628 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !65 2629 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2630 // CHECK3-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 2631 // CHECK3-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2632 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP66:![0-9]+]] 2633 // CHECK3: omp.inner.for.end.i: 2634 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 2635 // CHECK3: .omp_outlined..9.exit: 2636 // CHECK3-NEXT: ret i32 0 2637 // 2638 // 2639 // CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 2640 // CHECK3-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 2641 // CHECK3-NEXT: entry: 2642 // CHECK3-NEXT: call void @__cxx_global_var_init() 2643 // CHECK3-NEXT: ret void 2644 // 2645 // 2646 // CHECK4-LABEL: define {{[^@]+}}@main 2647 // CHECK4-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2648 // CHECK4-NEXT: entry: 2649 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2650 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2651 // CHECK4-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2652 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2653 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 2654 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2655 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8 2656 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2657 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i8, align 1 2658 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 2659 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED7:%.*]] = alloca i64, align 8 2660 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED10:%.*]] = alloca i64, align 8 2661 // CHECK4-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 2662 // CHECK4-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 2663 // CHECK4-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 2664 // CHECK4-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 2665 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 2666 // CHECK4-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2667 // CHECK4-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2668 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2669 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 2670 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2671 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 2672 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[CONV]], align 4 2673 // CHECK4-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 2674 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined. to void (i32*, i32*, ...)*), i64 [[TMP3]]) 2675 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2676 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2677 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2678 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED2]] to i32* 2679 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[CONV3]], align 4 2680 // CHECK4-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED2]], align 8 2681 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i64 [[TMP6]]) 2682 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2683 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2684 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2685 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_4]], align 1 2686 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2687 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_5]], align 4 2688 // CHECK4-NEXT: [[TMP9:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 2689 // CHECK4-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP9]] to i1 2690 // CHECK4-NEXT: [[CONV8:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED7]] to i8* 2691 // CHECK4-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[TOBOOL6]] to i8 2692 // CHECK4-NEXT: store i8 [[FROMBOOL9]], i8* [[CONV8]], align 1 2693 // CHECK4-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED7]], align 8 2694 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 2695 // CHECK4-NEXT: [[CONV11:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED10]] to i32* 2696 // CHECK4-NEXT: store i32 [[TMP11]], i32* [[CONV11]], align 4 2697 // CHECK4-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED10]], align 8 2698 // CHECK4-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_4]], align 1 2699 // CHECK4-NEXT: [[TOBOOL12:%.*]] = trunc i8 [[TMP13]] to i1 2700 // CHECK4-NEXT: br i1 [[TOBOOL12]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 2701 // CHECK4: omp_if.then: 2702 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i8***, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) 2703 // CHECK4-NEXT: br label [[OMP_IF_END:%.*]] 2704 // CHECK4: omp_if.else: 2705 // CHECK4-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 2706 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 2707 // CHECK4-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], i32* [[I]], i32* [[ARGC_ADDR]], i8*** [[ARGV_ADDR]], i64 [[TMP10]], i64 [[TMP12]]) #[[ATTR2:[0-9]+]] 2708 // CHECK4-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 2709 // CHECK4-NEXT: br label [[OMP_IF_END]] 2710 // CHECK4: omp_if.end: 2711 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[RETVAL]], align 4 2712 // CHECK4-NEXT: ret i32 [[TMP14]] 2713 // 2714 // 2715 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 2716 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { 2717 // CHECK4-NEXT: entry: 2718 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2719 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2720 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2721 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1 2722 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2723 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2724 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2725 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2726 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2727 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2728 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2729 // CHECK4-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2730 // CHECK4-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2731 // CHECK4-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2732 // CHECK4: omp_if.then: 2733 // CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2734 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 2735 // CHECK4-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 2736 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates* 2737 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP6]], i32 0, i32 0 2738 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 4 2739 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP8]] to i32* 2740 // CHECK4-NEXT: store i32 [[TMP4]], i32* [[TMP9]], align 8 2741 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 2742 // CHECK4-NEXT: store i64 0, i64* [[TMP10]], align 8 2743 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 2744 // CHECK4-NEXT: store i64 9, i64* [[TMP11]], align 8 2745 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 2746 // CHECK4-NEXT: store i64 1, i64* [[TMP12]], align 8 2747 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 2748 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i8* 2749 // CHECK4-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP14]], i8 0, i64 8, i1 false) 2750 // CHECK4-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP12]], align 8 2751 // CHECK4-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP10]], i64* [[TMP11]], i64 [[TMP15]], i32 1, i32 0, i64 0, i8* null) 2752 // CHECK4-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2753 // CHECK4-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2754 // CHECK4-NEXT: br label [[OMP_IF_END]] 2755 // CHECK4: omp_if.end: 2756 // CHECK4-NEXT: ret void 2757 // 2758 // 2759 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry. 2760 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 2761 // CHECK4-NEXT: entry: 2762 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2763 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2764 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2765 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2766 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2767 // CHECK4-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2768 // CHECK4-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2769 // CHECK4-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2770 // CHECK4-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2771 // CHECK4-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2772 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon*, align 8 2773 // CHECK4-NEXT: [[I_I:%.*]] = alloca i32, align 4 2774 // CHECK4-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 2775 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2776 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 2777 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2778 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 2779 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2780 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 2781 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 2782 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2783 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2784 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2785 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon* 2786 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 2787 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2788 // CHECK4-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2789 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2790 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2791 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2792 // CHECK4-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2793 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2794 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2795 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2796 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2797 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 2798 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 2799 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 2800 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 2801 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 2802 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 2803 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 2804 // CHECK4-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 2805 // CHECK4-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 2806 // CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 2807 // CHECK4-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 2808 // CHECK4-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 2809 // CHECK4-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 2810 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 2811 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 2812 // CHECK4-NEXT: store %struct.anon* [[TMP8]], %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 2813 // CHECK4-NEXT: [[TMP20:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 2814 // CHECK4-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 2815 // CHECK4-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 2816 // CHECK4-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 2817 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2818 // CHECK4: omp.inner.for.cond.i: 2819 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 2820 // CHECK4-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 2821 // CHECK4-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 2822 // CHECK4-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 2823 // CHECK4-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 2824 // CHECK4: omp.inner.for.body.i: 2825 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 2826 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 2827 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 2828 // CHECK4-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 2829 // CHECK4-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 2830 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 2831 // CHECK4: .omp_outlined..1.exit: 2832 // CHECK4-NEXT: ret i32 0 2833 // 2834 // 2835 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 2836 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 2837 // CHECK4-NEXT: entry: 2838 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2839 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2840 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2841 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 2842 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2843 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2844 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2845 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2846 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 2847 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2848 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 2849 // CHECK4-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2850 // CHECK4-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0 2851 // CHECK4-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2852 // CHECK4: omp_if.then: 2853 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[CONV]], align 8 2854 // CHECK4-NEXT: [[TMP5:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.1*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 2855 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8* [[TMP5]] to %struct.kmp_task_t_with_privates.1* 2856 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP6]], i32 0, i32 0 2857 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 5 2858 // CHECK4-NEXT: store i64 0, i64* [[TMP8]], align 8 2859 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 6 2860 // CHECK4-NEXT: store i64 9, i64* [[TMP9]], align 8 2861 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 7 2862 // CHECK4-NEXT: store i64 1, i64* [[TMP10]], align 8 2863 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP7]], i32 0, i32 9 2864 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to i8* 2865 // CHECK4-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP12]], i8 0, i64 8, i1 false) 2866 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP10]], align 8 2867 // CHECK4-NEXT: [[TMP14:%.*]] = zext i32 [[TMP4]] to i64 2868 // CHECK4-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i8* [[TMP5]], i32 1, i64* [[TMP8]], i64* [[TMP9]], i64 [[TMP13]], i32 1, i32 1, i64 [[TMP14]], i8* null) 2869 // CHECK4-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]) 2870 // CHECK4-NEXT: br label [[OMP_IF_END]] 2871 // CHECK4: omp_if.end: 2872 // CHECK4-NEXT: ret void 2873 // 2874 // 2875 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry..4 2876 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.1* noalias [[TMP1:%.*]]) #[[ATTR4]] { 2877 // CHECK4-NEXT: entry: 2878 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2879 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2880 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2881 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2882 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2883 // CHECK4-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2884 // CHECK4-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2885 // CHECK4-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2886 // CHECK4-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2887 // CHECK4-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2888 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 2889 // CHECK4-NEXT: [[I_I:%.*]] = alloca i32, align 4 2890 // CHECK4-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 2891 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2892 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.1*, align 8 2893 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2894 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates.1* [[TMP1]], %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 2895 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2896 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.1*, %struct.kmp_task_t_with_privates.1** [[DOTADDR1]], align 8 2897 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_1:%.*]], %struct.kmp_task_t_with_privates.1* [[TMP3]], i32 0, i32 0 2898 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2899 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2900 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2901 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 2902 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.1* [[TMP3]] to i8* 2903 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2904 // CHECK4-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2905 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2906 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2907 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2908 // CHECK4-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2909 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2910 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2911 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2912 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2913 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 2914 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 2915 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 2916 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 2917 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 2918 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 2919 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 2920 // CHECK4-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 2921 // CHECK4-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 2922 // CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 2923 // CHECK4-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2924 // CHECK4-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 2925 // CHECK4-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 2926 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 2927 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 2928 // CHECK4-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2929 // CHECK4-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2930 // CHECK4-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2931 // CHECK4-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 2932 // CHECK4-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 2933 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2934 // CHECK4: omp.inner.for.cond.i: 2935 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2936 // CHECK4-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 2937 // CHECK4-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 2938 // CHECK4-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 2939 // CHECK4-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 2940 // CHECK4: omp.inner.for.body.i: 2941 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2942 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 2943 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2944 // CHECK4-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 2945 // CHECK4-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2946 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 2947 // CHECK4: .omp_outlined..3.exit: 2948 // CHECK4-NEXT: ret i32 0 2949 // 2950 // 2951 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..5 2952 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[I:%.*]], i32* nonnull align 4 dereferenceable(4) [[ARGC:%.*]], i8*** nonnull align 8 dereferenceable(8) [[ARGV:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]], i64 [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1]] { 2953 // CHECK4-NEXT: entry: 2954 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2955 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2956 // CHECK4-NEXT: [[I_ADDR:%.*]] = alloca i32*, align 8 2957 // CHECK4-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8 2958 // CHECK4-NEXT: [[ARGV_ADDR:%.*]] = alloca i8***, align 8 2959 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 2960 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8 2961 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 8 2962 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2963 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2964 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 2965 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 2966 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4 2967 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i64, align 8 2968 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2969 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2970 // CHECK4-NEXT: store i32* [[I]], i32** [[I_ADDR]], align 8 2971 // CHECK4-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8 2972 // CHECK4-NEXT: store i8*** [[ARGV]], i8**** [[ARGV_ADDR]], align 8 2973 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 2974 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_1]], i64* [[DOTCAPTURE_EXPR__ADDR2]], align 8 2975 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[I_ADDR]], align 8 2976 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8 2977 // CHECK4-NEXT: [[TMP2:%.*]] = load i8***, i8**** [[ARGV_ADDR]], align 8 2978 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 2979 // CHECK4-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR2]] to i32* 2980 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2981 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2982 // CHECK4-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2983 // CHECK4-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 2984 // CHECK4-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2985 // CHECK4: omp_if.then: 2986 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 0 2987 // CHECK4-NEXT: store i32* [[TMP0]], i32** [[TMP7]], align 8 2988 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 1 2989 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP8]], align 8 2990 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 2 2991 // CHECK4-NEXT: store i8*** [[TMP2]], i8**** [[TMP9]], align 8 2992 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED]], i32 0, i32 3 2993 // CHECK4-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 8 2994 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1 2995 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2996 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[TMP10]], align 8 2997 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV3]], align 8 2998 // CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2999 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP1]], align 4 3000 // CHECK4-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_5]], align 4 3001 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP1]], align 4 3002 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_6]], align 4 3003 // CHECK4-NEXT: [[TMP15:%.*]] = load i8**, i8*** [[TMP2]], align 8 3004 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP1]], align 4 3005 // CHECK4-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 3006 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP15]], i64 [[IDXPROM]] 3007 // CHECK4-NEXT: [[TMP17:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3008 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP1]], align 4 3009 // CHECK4-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP18]] to i64 3010 // CHECK4-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP17]], i64 [[IDXPROM8]] 3011 // CHECK4-NEXT: [[TMP19:%.*]] = load i8, i8* [[ARRAYIDX9]], align 1 3012 // CHECK4-NEXT: [[CONV10:%.*]] = sext i8 [[TMP19]] to i32 3013 // CHECK4-NEXT: store i32 [[CONV10]], i32* [[DOTCAPTURE_EXPR_7]], align 4 3014 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 3015 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0 3016 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3017 // CHECK4-NEXT: [[CONV12:%.*]] = sext i32 [[DIV]] to i64 3018 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4 3019 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 3020 // CHECK4-NEXT: [[SUB13:%.*]] = sub i32 [[TMP21]], [[TMP22]] 3021 // CHECK4-NEXT: [[SUB14:%.*]] = sub i32 [[SUB13]], 1 3022 // CHECK4-NEXT: [[ADD:%.*]] = add i32 [[SUB14]], 1 3023 // CHECK4-NEXT: [[DIV15:%.*]] = udiv i32 [[ADD]], 1 3024 // CHECK4-NEXT: [[CONV16:%.*]] = zext i32 [[DIV15]] to i64 3025 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV12]], [[CONV16]] 3026 // CHECK4-NEXT: [[SUB17:%.*]] = sub nsw i64 [[MUL]], 1 3027 // CHECK4-NEXT: store i64 [[SUB17]], i64* [[DOTCAPTURE_EXPR_11]], align 8 3028 // CHECK4-NEXT: [[TMP23:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 88, i64 32, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 3029 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP23]] to %struct.kmp_task_t_with_privates.3* 3030 // CHECK4-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 0 3031 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 0 3032 // CHECK4-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 8 3033 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast %struct.anon.2* [[AGG_CAPTURED]] to i8* 3034 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP27]], i8* align 8 [[TMP28]], i64 32, i1 false) 3035 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP24]], i32 0, i32 1 3036 // CHECK4-NEXT: [[TMP30:%.*]] = load i8, i8* [[CONV]], align 8 3037 // CHECK4-NEXT: [[TOBOOL18:%.*]] = trunc i8 [[TMP30]] to i1 3038 // CHECK4-NEXT: [[TMP31:%.*]] = sext i1 [[TOBOOL18]] to i32 3039 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 5 3040 // CHECK4-NEXT: store i64 0, i64* [[TMP32]], align 8 3041 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 6 3042 // CHECK4-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_11]], align 8 3043 // CHECK4-NEXT: store i64 [[TMP34]], i64* [[TMP33]], align 8 3044 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 7 3045 // CHECK4-NEXT: store i64 1, i64* [[TMP35]], align 8 3046 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP25]], i32 0, i32 9 3047 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i8* 3048 // CHECK4-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP37]], i8 0, i64 8, i1 false) 3049 // CHECK4-NEXT: [[TMP38:%.*]] = load i64, i64* [[TMP35]], align 8 3050 // CHECK4-NEXT: [[TMP39:%.*]] = zext i32 [[TMP12]] to i64 3051 // CHECK4-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP23]], i32 [[TMP31]], i64* [[TMP32]], i64* [[TMP33]], i64 [[TMP38]], i32 1, i32 2, i64 [[TMP39]], i8* bitcast (void (%struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3*, i32)* @.omp_task_dup. to i8*)) 3052 // CHECK4-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3053 // CHECK4-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3054 // CHECK4-NEXT: br label [[OMP_IF_END]] 3055 // CHECK4: omp_if.end: 3056 // CHECK4-NEXT: ret void 3057 // 3058 // 3059 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_privates_map. 3060 // CHECK4-SAME: (%struct..kmp_privates.t* noalias [[TMP0:%.*]], i32** noalias [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 3061 // CHECK4-NEXT: entry: 3062 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 3063 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 3064 // CHECK4-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 3065 // CHECK4-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 3066 // CHECK4-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 3067 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 3068 // CHECK4-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 3069 // CHECK4-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 3070 // CHECK4-NEXT: ret void 3071 // 3072 // 3073 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry..7 3074 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias [[TMP1:%.*]]) #[[ATTR4]] { 3075 // CHECK4-NEXT: entry: 3076 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 3077 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 3078 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 3079 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 3080 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 3081 // CHECK4-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 3082 // CHECK4-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 3083 // CHECK4-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 3084 // CHECK4-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 3085 // CHECK4-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 3086 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 3087 // CHECK4-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 3088 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 3089 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 3090 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 3091 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 3092 // CHECK4-NEXT: [[I_I:%.*]] = alloca i32, align 4 3093 // CHECK4-NEXT: [[J_I:%.*]] = alloca i32, align 4 3094 // CHECK4-NEXT: [[I14_I:%.*]] = alloca i32, align 4 3095 // CHECK4-NEXT: [[J15_I:%.*]] = alloca i32, align 4 3096 // CHECK4-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 3097 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 3098 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 3099 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 3100 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 3101 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 3102 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 3103 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 3104 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 3105 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 3106 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3107 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 3108 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 3109 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 3110 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 3111 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 3112 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 3113 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 3114 // CHECK4-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 3115 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 3116 // CHECK4-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 3117 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 3118 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 3119 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 3120 // CHECK4-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 3121 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 3122 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 3123 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 3124 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 3125 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 3126 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 3127 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 3128 // CHECK4-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 3129 // CHECK4-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 3130 // CHECK4-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 3131 // CHECK4-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 3132 // CHECK4-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 3133 // CHECK4-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 3134 // CHECK4-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 3135 // CHECK4-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 3136 // CHECK4-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 3137 // CHECK4-NEXT: [[TMP22:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 3138 // CHECK4-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 3139 // CHECK4-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 3140 // CHECK4-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 3141 // CHECK4-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 3142 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_2:%.*]], %struct.anon.2* [[TMP22]], i32 0, i32 0 3143 // CHECK4-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 3144 // CHECK4-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 3145 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 3146 // CHECK4-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 3147 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 3148 // CHECK4-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 3149 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 3150 // CHECK4-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 3151 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 3152 // CHECK4-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3153 // CHECK4-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 3154 // CHECK4-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 3155 // CHECK4-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 3156 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 3157 // CHECK4-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 3158 // CHECK4-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 3159 // CHECK4-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 3160 // CHECK4-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 3161 // CHECK4-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 3162 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 3163 // CHECK4-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 3164 // CHECK4-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 3165 // CHECK4-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 3166 // CHECK4-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 3167 // CHECK4-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 3168 // CHECK4-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 3169 // CHECK4-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3170 // CHECK4-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 3171 // CHECK4-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 3172 // CHECK4-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3173 // CHECK4-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3174 // CHECK4-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 3175 // CHECK4-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 3176 // CHECK4-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 3177 // CHECK4-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 3178 // CHECK4-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 3179 // CHECK4-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 3180 // CHECK4-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 3181 // CHECK4-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3182 // CHECK4-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 3183 // CHECK4-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 3184 // CHECK4-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 3185 // CHECK4-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 3186 // CHECK4: land.lhs.true.i: 3187 // CHECK4-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3188 // CHECK4-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3189 // CHECK4-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 3190 // CHECK4-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 3191 // CHECK4: taskloop.if.then.i: 3192 // CHECK4-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 3193 // CHECK4-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3194 // CHECK4-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 1 3195 // CHECK4-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 3196 // CHECK4-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 2 3197 // CHECK4-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 3198 // CHECK4-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[TMP22]], i32 0, i32 3 3199 // CHECK4-NEXT: [[TMP59:%.*]] = load i8, i8* [[TMP58]], align 1 3200 // CHECK4-NEXT: [[TOBOOL_I:%.*]] = trunc i8 [[TMP59]] to i1 3201 // CHECK4-NEXT: br i1 [[TOBOOL_I]], label [[OMP_IF_THEN_I:%.*]], label [[OMP_IF_ELSE_I:%.*]] 3202 // CHECK4: omp_if.then.i: 3203 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 3204 // CHECK4: omp.inner.for.cond.i: 3205 // CHECK4-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3206 // CHECK4-NEXT: [[TMP61:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 3207 // CHECK4-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP60]], [[TMP61]] 3208 // CHECK4-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 3209 // CHECK4: omp.inner.for.body.i: 3210 // CHECK4-NEXT: [[TMP62:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3211 // CHECK4-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 3212 // CHECK4-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 3213 // CHECK4-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP63]], [[TMP64]] 3214 // CHECK4-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 3215 // CHECK4-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 3216 // CHECK4-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP62]], [[CONV22_I]] 3217 // CHECK4-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 3218 // CHECK4-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 3219 // CHECK4-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 3220 // CHECK4-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP65]] to i64 3221 // CHECK4-NEXT: [[TMP66:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3222 // CHECK4-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3223 // CHECK4-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 3224 // CHECK4-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 3225 // CHECK4-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 3226 // CHECK4-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 3227 // CHECK4-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 3228 // CHECK4-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP67]], [[CONV33_I]] 3229 // CHECK4-NEXT: [[TMP70:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 3230 // CHECK4-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 3231 // CHECK4-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP70]], [[TMP71]] 3232 // CHECK4-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 3233 // CHECK4-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 3234 // CHECK4-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 3235 // CHECK4-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP66]], [[MUL41_I]] 3236 // CHECK4-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 3237 // CHECK4-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 3238 // CHECK4-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 3239 // CHECK4-NEXT: [[TMP72:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3240 // CHECK4-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP72]], 1 3241 // CHECK4-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 3242 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 3243 // CHECK4: omp.inner.for.end.i: 3244 // CHECK4-NEXT: br label [[OMP_IF_END_I:%.*]] 3245 // CHECK4: omp_if.else.i: 3246 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND47_I:%.*]] 3247 // CHECK4: omp.inner.for.cond47.i: 3248 // CHECK4-NEXT: [[TMP73:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3249 // CHECK4-NEXT: [[TMP74:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 3250 // CHECK4-NEXT: [[CMP48_I:%.*]] = icmp ule i64 [[TMP73]], [[TMP74]] 3251 // CHECK4-NEXT: br i1 [[CMP48_I]], label [[OMP_INNER_FOR_BODY49_I:%.*]], label [[OMP_INNER_FOR_END82_I:%.*]] 3252 // CHECK4: omp.inner.for.body49.i: 3253 // CHECK4-NEXT: [[TMP75:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3254 // CHECK4-NEXT: [[TMP76:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3255 // CHECK4-NEXT: [[TMP77:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3256 // CHECK4-NEXT: [[SUB50_I:%.*]] = sub i32 [[TMP76]], [[TMP77]] 3257 // CHECK4-NEXT: [[SUB51_I:%.*]] = sub i32 [[SUB50_I]], 1 3258 // CHECK4-NEXT: [[CONV55_I:%.*]] = zext i32 [[SUB50_I]] to i64 3259 // CHECK4-NEXT: [[DIV56_I:%.*]] = sdiv i64 [[TMP75]], [[CONV55_I]] 3260 // CHECK4-NEXT: [[CONV59_I:%.*]] = trunc i64 [[DIV56_I]] to i32 3261 // CHECK4-NEXT: store i32 [[CONV59_I]], i32* [[I14_I]], align 4, !noalias !47 3262 // CHECK4-NEXT: [[TMP78:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3263 // CHECK4-NEXT: [[CONV60_I:%.*]] = sext i32 [[TMP78]] to i64 3264 // CHECK4-NEXT: [[TMP79:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3265 // CHECK4-NEXT: [[TMP80:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3266 // CHECK4-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3267 // CHECK4-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3268 // CHECK4-NEXT: [[SUB61_I:%.*]] = sub i32 [[TMP81]], [[TMP82]] 3269 // CHECK4-NEXT: [[SUB62_I:%.*]] = sub i32 [[SUB61_I]], 1 3270 // CHECK4-NEXT: [[CONV66_I:%.*]] = zext i32 [[SUB61_I]] to i64 3271 // CHECK4-NEXT: [[DIV67_I:%.*]] = sdiv i64 [[TMP80]], [[CONV66_I]] 3272 // CHECK4-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 3273 // CHECK4-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 3274 // CHECK4-NEXT: [[SUB68_I:%.*]] = sub i32 [[TMP83]], [[TMP84]] 3275 // CHECK4-NEXT: [[SUB69_I:%.*]] = sub i32 [[SUB68_I]], 1 3276 // CHECK4-NEXT: [[CONV73_I:%.*]] = zext i32 [[SUB68_I]] to i64 3277 // CHECK4-NEXT: [[MUL74_I:%.*]] = mul nsw i64 [[DIV67_I]], [[CONV73_I]] 3278 // CHECK4-NEXT: [[SUB75_I:%.*]] = sub nsw i64 [[TMP79]], [[MUL74_I]] 3279 // CHECK4-NEXT: [[ADD77_I:%.*]] = add nsw i64 [[CONV60_I]], [[SUB75_I]] 3280 // CHECK4-NEXT: [[CONV78_I:%.*]] = trunc i64 [[ADD77_I]] to i32 3281 // CHECK4-NEXT: store i32 [[CONV78_I]], i32* [[J15_I]], align 4, !noalias !47 3282 // CHECK4-NEXT: [[TMP85:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3283 // CHECK4-NEXT: [[ADD81_I:%.*]] = add nsw i64 [[TMP85]], 1 3284 // CHECK4-NEXT: store i64 [[ADD81_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 3285 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND47_I]], !llvm.loop [[LOOP51:![0-9]+]] 3286 // CHECK4: omp.inner.for.end82.i: 3287 // CHECK4-NEXT: br label [[OMP_IF_END_I]] 3288 // CHECK4: omp_if.end.i: 3289 // CHECK4-NEXT: br label [[TASKLOOP_IF_END_I]] 3290 // CHECK4: taskloop.if.end.i: 3291 // CHECK4-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 3292 // CHECK4-NEXT: [[TMP87:%.*]] = icmp ne i32 [[TMP86]], 0 3293 // CHECK4-NEXT: br i1 [[TMP87]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 3294 // CHECK4: .omp.lastprivate.then.i: 3295 // CHECK4-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 3296 // CHECK4: .omp_outlined..6.exit: 3297 // CHECK4-NEXT: ret i32 0 3298 // 3299 // 3300 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_dup. 3301 // CHECK4-SAME: (%struct.kmp_task_t_with_privates.3* [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP1:%.*]], i32 [[TMP2:%.*]]) #[[ATTR4]] { 3302 // CHECK4-NEXT: entry: 3303 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 3304 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 3305 // CHECK4-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 3306 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP0]], %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 3307 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 3308 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 3309 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR]], align 8 3310 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 3311 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 3312 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 3313 // CHECK4-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 3314 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 1 3315 // CHECK4-NEXT: ret void 3316 // 3317 // 3318 // CHECK4-LABEL: define {{[^@]+}}@__cxx_global_var_init 3319 // CHECK4-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3320 // CHECK4-NEXT: entry: 3321 // CHECK4-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 3322 // CHECK4-NEXT: ret void 3323 // 3324 // 3325 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC1Ei 3326 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 3327 // CHECK4-NEXT: entry: 3328 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3329 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3330 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3331 // CHECK4-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3332 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3333 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3334 // CHECK4-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3335 // CHECK4-NEXT: ret void 3336 // 3337 // 3338 // CHECK4-LABEL: define {{[^@]+}}@_ZN1SC2Ei 3339 // CHECK4-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 3340 // CHECK4-NEXT: entry: 3341 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3342 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3343 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3344 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 3345 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3346 // CHECK4-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3347 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3348 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3349 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 3350 // CHECK4-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3351 // CHECK4-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 3352 // CHECK4-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 3353 // CHECK4-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP1]] to i1 3354 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* 3355 // CHECK4-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 3356 // CHECK4-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV]], align 1 3357 // CHECK4-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 3358 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.S*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.S* [[THIS1]], i32* [[C_ADDR]], i64 [[TMP2]]) 3359 // CHECK4-NEXT: ret void 3360 // 3361 // 3362 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..8 3363 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.S* [[THIS:%.*]], i32* nonnull align 4 dereferenceable(4) [[C:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { 3364 // CHECK4-NEXT: entry: 3365 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3366 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3367 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3368 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8 3369 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 3370 // CHECK4-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 3371 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3372 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8 3373 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 3374 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3375 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3376 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3377 // CHECK4-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3378 // CHECK4-NEXT: store i32* [[C]], i32** [[C_ADDR]], align 8 3379 // CHECK4-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 3380 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3381 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[C_ADDR]], align 8 3382 // CHECK4-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* 3383 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3384 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 3385 // CHECK4-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3386 // CHECK4-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], 0 3387 // CHECK4-NEXT: br i1 [[TMP5]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 3388 // CHECK4: omp_if.then: 3389 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 0 3390 // CHECK4-NEXT: store %struct.S* [[TMP0]], %struct.S** [[TMP6]], align 8 3391 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[AGG_CAPTURED]], i32 0, i32 1 3392 // CHECK4-NEXT: store i32* [[TMP1]], i32** [[TMP7]], align 8 3393 // CHECK4-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3394 // CHECK4-NEXT: [[TMP8:%.*]] = load i8, i8* [[CONV]], align 8 3395 // CHECK4-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 3396 // CHECK4-NEXT: store i32* [[TMP]], i32** [[_TMP1]], align 8 3397 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP1]], align 4 3398 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTCAPTURE_EXPR_2]], align 4 3399 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 3400 // CHECK4-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP10]], 0 3401 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3402 // CHECK4-NEXT: [[SUB4:%.*]] = sub nsw i32 [[DIV]], 1 3403 // CHECK4-NEXT: store i32 [[SUB4]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3404 // CHECK4-NEXT: [[TMP11:%.*]] = select i1 [[TOBOOL]], i32 2, i32 0 3405 // CHECK4-NEXT: [[TMP12:%.*]] = or i32 [[TMP11]], 1 3406 // CHECK4-NEXT: [[TMP13:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i32 [[TMP12]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.5*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 3407 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to %struct.kmp_task_t_with_privates.5* 3408 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP14]], i32 0, i32 0 3409 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 0 3410 // CHECK4-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8 3411 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast %struct.anon.4* [[AGG_CAPTURED]] to i8* 3412 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 16, i1 false) 3413 // CHECK4-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 5 3414 // CHECK4-NEXT: store i64 0, i64* [[TMP19]], align 8 3415 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 6 3416 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3417 // CHECK4-NEXT: [[CONV5:%.*]] = sext i32 [[TMP21]] to i64 3418 // CHECK4-NEXT: store i64 [[CONV5]], i64* [[TMP20]], align 8 3419 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 7 3420 // CHECK4-NEXT: store i64 1, i64* [[TMP22]], align 8 3421 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP15]], i32 0, i32 9 3422 // CHECK4-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i8* 3423 // CHECK4-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP24]], i8 0, i64 8, i1 false) 3424 // CHECK4-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP22]], align 8 3425 // CHECK4-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]], i8* [[TMP13]], i32 1, i64* [[TMP19]], i64* [[TMP20]], i64 [[TMP25]], i32 1, i32 2, i64 4, i8* null) 3426 // CHECK4-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3427 // CHECK4-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]]) 3428 // CHECK4-NEXT: br label [[OMP_IF_END]] 3429 // CHECK4: omp_if.end: 3430 // CHECK4-NEXT: ret void 3431 // 3432 // 3433 // CHECK4-LABEL: define {{[^@]+}}@.omp_task_entry..10 3434 // CHECK4-SAME: (i32 [[TMP0:%.*]], %struct.kmp_task_t_with_privates.5* noalias [[TMP1:%.*]]) #[[ATTR4]] { 3435 // CHECK4-NEXT: entry: 3436 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 3437 // CHECK4-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 3438 // CHECK4-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 3439 // CHECK4-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 3440 // CHECK4-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 3441 // CHECK4-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 3442 // CHECK4-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 3443 // CHECK4-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 3444 // CHECK4-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 3445 // CHECK4-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 3446 // CHECK4-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.4*, align 8 3447 // CHECK4-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 3448 // CHECK4-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 3449 // CHECK4-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 3450 // CHECK4-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 3451 // CHECK4-NEXT: [[A_I:%.*]] = alloca i32, align 4 3452 // CHECK4-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 3453 // CHECK4-NEXT: [[A5_I:%.*]] = alloca i32, align 4 3454 // CHECK4-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 3455 // CHECK4-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 3456 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 3457 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.5*, align 8 3458 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 3459 // CHECK4-NEXT: store %struct.kmp_task_t_with_privates.5* [[TMP1]], %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 3460 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 3461 // CHECK4-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.5*, %struct.kmp_task_t_with_privates.5** [[DOTADDR1]], align 8 3462 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_5:%.*]], %struct.kmp_task_t_with_privates.5* [[TMP3]], i32 0, i32 0 3463 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 3464 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 3465 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3466 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.4* 3467 // CHECK4-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.5* [[TMP3]] to i8* 3468 // CHECK4-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 3469 // CHECK4-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 3470 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 3471 // CHECK4-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 3472 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 3473 // CHECK4-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 3474 // CHECK4-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 3475 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 3476 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 3477 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 3478 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META53:![0-9]+]]) 3479 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 3480 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 3481 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 3482 // CHECK4-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]]) 3483 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !64 3484 // CHECK4-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !64 3485 // CHECK4-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !64 3486 // CHECK4-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !64 3487 // CHECK4-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !64 3488 // CHECK4-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 3489 // CHECK4-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !64 3490 // CHECK4-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !64 3491 // CHECK4-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !64 3492 // CHECK4-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !64 3493 // CHECK4-NEXT: store %struct.anon.4* [[TMP8]], %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 3494 // CHECK4-NEXT: [[TMP20:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 3495 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP20]], i32 0, i32 0 3496 // CHECK4-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 3497 // CHECK4-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !64 3498 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 3499 // CHECK4-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 3500 // CHECK4-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 3501 // CHECK4-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 3502 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 3503 // CHECK4-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 3504 // CHECK4-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !64 3505 // CHECK4-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !64 3506 // CHECK4-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !64 3507 // CHECK4-NEXT: store i32 0, i32* [[TMP27]], align 4 3508 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 3509 // CHECK4-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 3510 // CHECK4-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 3511 // CHECK4: taskloop.if.then.i: 3512 // CHECK4-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !64 3513 // CHECK4-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 3514 // CHECK4-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 3515 // CHECK4-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64 3516 // CHECK4-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP20]], i32 0, i32 1 3517 // CHECK4-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 3518 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 3519 // CHECK4: omp.inner.for.cond.i: 3520 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 3521 // CHECK4-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 3522 // CHECK4-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !64, !llvm.access.group !65 3523 // CHECK4-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 3524 // CHECK4-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 3525 // CHECK4: omp.inner.for.body.i: 3526 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 3527 // CHECK4-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !64, !llvm.access.group !65 3528 // CHECK4-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !65 3529 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 3530 // CHECK4-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 3531 // CHECK4-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 3532 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP66:![0-9]+]] 3533 // CHECK4: omp.inner.for.end.i: 3534 // CHECK4-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 3535 // CHECK4: .omp_outlined..9.exit: 3536 // CHECK4-NEXT: ret i32 0 3537 // 3538 // 3539 // CHECK4-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 3540 // CHECK4-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3541 // CHECK4-NEXT: entry: 3542 // CHECK4-NEXT: call void @__cxx_global_var_init() 3543 // CHECK4-NEXT: ret void 3544 // 3545 // 3546 // CHECK5-LABEL: define {{[^@]+}}@main 3547 // CHECK5-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3548 // CHECK5-NEXT: entry: 3549 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3550 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3551 // CHECK5-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3552 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3553 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3554 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3555 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3556 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3557 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3558 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3559 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3560 // CHECK5-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 3561 // CHECK5-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 3562 // CHECK5-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 3563 // CHECK5-NEXT: [[I9:%.*]] = alloca i32, align 4 3564 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 3565 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 3566 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 3567 // CHECK5-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3568 // CHECK5-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 3569 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3570 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3571 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3572 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 3573 // CHECK5-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 3574 // CHECK5-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 3575 // CHECK5-NEXT: [[I42:%.*]] = alloca i32, align 4 3576 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4 3577 // CHECK5-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 3578 // CHECK5-NEXT: [[I46:%.*]] = alloca i32, align 4 3579 // CHECK5-NEXT: [[J47:%.*]] = alloca i32, align 4 3580 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 3581 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3582 // CHECK5-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3583 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3584 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 3585 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3586 // CHECK5-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 3587 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3588 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3589 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 3590 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3591 // CHECK5: omp.inner.for.cond: 3592 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3593 // CHECK5-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 3594 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3595 // CHECK5-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 3596 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3597 // CHECK5: omp.inner.for.body: 3598 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3599 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3600 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3601 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3602 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3603 // CHECK5: omp.body.continue: 3604 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3605 // CHECK5: omp.inner.for.inc: 3606 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3607 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 3608 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3609 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3610 // CHECK5: omp.inner.for.end: 3611 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4 3612 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3613 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3614 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 3615 // CHECK5-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 3616 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 3617 // CHECK5-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 3618 // CHECK5-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 3619 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 3620 // CHECK5: omp.inner.for.cond10: 3621 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3622 // CHECK5-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 3623 // CHECK5-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 3624 // CHECK5-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 3625 // CHECK5-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 3626 // CHECK5: omp.inner.for.body13: 3627 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3628 // CHECK5-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 3629 // CHECK5-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3630 // CHECK5-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 3631 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 3632 // CHECK5: omp.body.continue16: 3633 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 3634 // CHECK5: omp.inner.for.inc17: 3635 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3636 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 3637 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3638 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 3639 // CHECK5: omp.inner.for.end19: 3640 // CHECK5-NEXT: store i32 10, i32* [[I9]], align 4 3641 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3642 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3643 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3644 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 3645 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3646 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 3647 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3648 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3649 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3650 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 3651 // CHECK5-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3652 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3653 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3654 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 3655 // CHECK5-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3656 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3657 // CHECK5-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 3658 // CHECK5-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 3659 // CHECK5-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 3660 // CHECK5-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 3661 // CHECK5-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 3662 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3663 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 3664 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3665 // CHECK5-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 3666 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3667 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3668 // CHECK5-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 3669 // CHECK5-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 3670 // CHECK5-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 3671 // CHECK5-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 3672 // CHECK5-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 3673 // CHECK5-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 3674 // CHECK5-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 3675 // CHECK5-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 3676 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 3677 // CHECK5-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 3678 // CHECK5-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 3679 // CHECK5-NEXT: store i32 0, i32* [[I42]], align 4 3680 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3681 // CHECK5-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 3682 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3683 // CHECK5-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 3684 // CHECK5-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 3685 // CHECK5: land.lhs.true: 3686 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3687 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3688 // CHECK5-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 3689 // CHECK5-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 3690 // CHECK5: simd.if.then: 3691 // CHECK5-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 3692 // CHECK5-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 3693 // CHECK5-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3694 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 3695 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]] 3696 // CHECK5: omp.inner.for.cond48: 3697 // CHECK5-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3698 // CHECK5-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 3699 // CHECK5-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]] 3700 // CHECK5-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]] 3701 // CHECK5: omp.inner.for.body50: 3702 // CHECK5-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3703 // CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3704 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3705 // CHECK5-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]] 3706 // CHECK5-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1 3707 // CHECK5-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1 3708 // CHECK5-NEXT: [[DIV54:%.*]] = udiv i32 [[ADD53]], 1 3709 // CHECK5-NEXT: [[MUL55:%.*]] = mul i32 1, [[DIV54]] 3710 // CHECK5-NEXT: [[CONV56:%.*]] = zext i32 [[MUL55]] to i64 3711 // CHECK5-NEXT: [[DIV57:%.*]] = sdiv i64 [[TMP33]], [[CONV56]] 3712 // CHECK5-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1 3713 // CHECK5-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]] 3714 // CHECK5-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32 3715 // CHECK5-NEXT: store i32 [[CONV60]], i32* [[I46]], align 4, !llvm.access.group !9 3716 // CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3717 // CHECK5-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64 3718 // CHECK5-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3719 // CHECK5-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3720 // CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3721 // CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3722 // CHECK5-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]] 3723 // CHECK5-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1 3724 // CHECK5-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1 3725 // CHECK5-NEXT: [[DIV65:%.*]] = udiv i32 [[ADD64]], 1 3726 // CHECK5-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]] 3727 // CHECK5-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 3728 // CHECK5-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]] 3729 // CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3730 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3731 // CHECK5-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]] 3732 // CHECK5-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1 3733 // CHECK5-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1 3734 // CHECK5-NEXT: [[DIV72:%.*]] = udiv i32 [[ADD71]], 1 3735 // CHECK5-NEXT: [[MUL73:%.*]] = mul i32 1, [[DIV72]] 3736 // CHECK5-NEXT: [[CONV74:%.*]] = zext i32 [[MUL73]] to i64 3737 // CHECK5-NEXT: [[MUL75:%.*]] = mul nsw i64 [[DIV68]], [[CONV74]] 3738 // CHECK5-NEXT: [[SUB76:%.*]] = sub nsw i64 [[TMP37]], [[MUL75]] 3739 // CHECK5-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1 3740 // CHECK5-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]] 3741 // CHECK5-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32 3742 // CHECK5-NEXT: store i32 [[CONV79]], i32* [[J47]], align 4, !llvm.access.group !9 3743 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]] 3744 // CHECK5: omp.body.continue80: 3745 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]] 3746 // CHECK5: omp.inner.for.inc81: 3747 // CHECK5-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3748 // CHECK5-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1 3749 // CHECK5-NEXT: store i64 [[ADD82]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3750 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]] 3751 // CHECK5: omp.inner.for.end83: 3752 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3753 // CHECK5-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0 3754 // CHECK5-NEXT: [[DIV85:%.*]] = sdiv i32 [[SUB84]], 1 3755 // CHECK5-NEXT: [[MUL86:%.*]] = mul nsw i32 [[DIV85]], 1 3756 // CHECK5-NEXT: [[ADD87:%.*]] = add nsw i32 0, [[MUL86]] 3757 // CHECK5-NEXT: store i32 [[ADD87]], i32* [[I20]], align 4 3758 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3759 // CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3760 // CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3761 // CHECK5-NEXT: [[SUB88:%.*]] = sub i32 [[TMP46]], [[TMP47]] 3762 // CHECK5-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 3763 // CHECK5-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 3764 // CHECK5-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 3765 // CHECK5-NEXT: [[MUL92:%.*]] = mul i32 [[DIV91]], 1 3766 // CHECK5-NEXT: [[ADD93:%.*]] = add i32 [[TMP45]], [[MUL92]] 3767 // CHECK5-NEXT: store i32 [[ADD93]], i32* [[J47]], align 4 3768 // CHECK5-NEXT: br label [[SIMD_IF_END]] 3769 // CHECK5: simd.if.end: 3770 // CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4 3771 // CHECK5-NEXT: ret i32 [[TMP48]] 3772 // 3773 // 3774 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init 3775 // CHECK5-SAME: () #[[ATTR2:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3776 // CHECK5-NEXT: entry: 3777 // CHECK5-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 3778 // CHECK5-NEXT: ret void 3779 // 3780 // 3781 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1Ei 3782 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 { 3783 // CHECK5-NEXT: entry: 3784 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3785 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3786 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3787 // CHECK5-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3788 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3789 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3790 // CHECK5-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 3791 // CHECK5-NEXT: ret void 3792 // 3793 // 3794 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2Ei 3795 // CHECK5-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 3796 // CHECK5-NEXT: entry: 3797 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3798 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3799 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3800 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3801 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3802 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3803 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3804 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3805 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3806 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 3807 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 3808 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3809 // CHECK5-NEXT: [[A8:%.*]] = alloca i32, align 4 3810 // CHECK5-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 3811 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 3812 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3813 // CHECK5-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3814 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3815 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3816 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 3817 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3818 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 3819 // CHECK5-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 3820 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 3821 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3822 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3823 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 3824 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3825 // CHECK5-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 3826 // CHECK5-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3827 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3828 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3829 // CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 3830 // CHECK5-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 3831 // CHECK5-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 3832 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 3833 // CHECK5-NEXT: store i32 0, i32* [[TMP4]], align 4 3834 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3835 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3836 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3837 // CHECK5: simd.if.then: 3838 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3839 // CHECK5-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 3840 // CHECK5-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 3841 // CHECK5-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 3842 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3843 // CHECK5: omp.inner.for.cond: 3844 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3845 // CHECK5-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 3846 // CHECK5-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !12 3847 // CHECK5-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 3848 // CHECK5-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3849 // CHECK5: omp.inner.for.body: 3850 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3851 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3852 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3853 // CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !12 3854 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !12 3855 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3856 // CHECK5: omp.body.continue: 3857 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3858 // CHECK5: omp.inner.for.inc: 3859 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3860 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 3861 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3862 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3863 // CHECK5: omp.inner.for.end: 3864 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3865 // CHECK5-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 3866 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3867 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 3868 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 3869 // CHECK5-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 3870 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 3871 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 3872 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 3873 // CHECK5-NEXT: br label [[SIMD_IF_END]] 3874 // CHECK5: simd.if.end: 3875 // CHECK5-NEXT: ret void 3876 // 3877 // 3878 // CHECK5-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 3879 // CHECK5-SAME: () #[[ATTR2]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3880 // CHECK5-NEXT: entry: 3881 // CHECK5-NEXT: call void @__cxx_global_var_init() 3882 // CHECK5-NEXT: ret void 3883 // 3884 // 3885 // CHECK6-LABEL: define {{[^@]+}}@main 3886 // CHECK6-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3887 // CHECK6-NEXT: entry: 3888 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3889 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3890 // CHECK6-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3891 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3892 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3893 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3894 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3895 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3896 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3897 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3898 // CHECK6-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3899 // CHECK6-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 3900 // CHECK6-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 3901 // CHECK6-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 3902 // CHECK6-NEXT: [[I9:%.*]] = alloca i32, align 4 3903 // CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4 3904 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 3905 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 3906 // CHECK6-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3907 // CHECK6-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 3908 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3909 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3910 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3911 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 3912 // CHECK6-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 3913 // CHECK6-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 3914 // CHECK6-NEXT: [[I42:%.*]] = alloca i32, align 4 3915 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4 3916 // CHECK6-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 3917 // CHECK6-NEXT: [[I46:%.*]] = alloca i32, align 4 3918 // CHECK6-NEXT: [[J47:%.*]] = alloca i32, align 4 3919 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 3920 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3921 // CHECK6-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3922 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3923 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 3924 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3925 // CHECK6-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 3926 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3927 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3928 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 3929 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3930 // CHECK6: omp.inner.for.cond: 3931 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3932 // CHECK6-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 3933 // CHECK6-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3934 // CHECK6-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 3935 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3936 // CHECK6: omp.inner.for.body: 3937 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3938 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3939 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3940 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3941 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3942 // CHECK6: omp.body.continue: 3943 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3944 // CHECK6: omp.inner.for.inc: 3945 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3946 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 3947 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3948 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3949 // CHECK6: omp.inner.for.end: 3950 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4 3951 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3952 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3953 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 3954 // CHECK6-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 3955 // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 3956 // CHECK6-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 3957 // CHECK6-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 3958 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 3959 // CHECK6: omp.inner.for.cond10: 3960 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3961 // CHECK6-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 3962 // CHECK6-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 3963 // CHECK6-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 3964 // CHECK6-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 3965 // CHECK6: omp.inner.for.body13: 3966 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3967 // CHECK6-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 3968 // CHECK6-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3969 // CHECK6-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 3970 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 3971 // CHECK6: omp.body.continue16: 3972 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 3973 // CHECK6: omp.inner.for.inc17: 3974 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3975 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 3976 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3977 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 3978 // CHECK6: omp.inner.for.end19: 3979 // CHECK6-NEXT: store i32 10, i32* [[I9]], align 4 3980 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3981 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3982 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3983 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 3984 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3985 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 3986 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3987 // CHECK6-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3988 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3989 // CHECK6-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 3990 // CHECK6-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3991 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3992 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3993 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 3994 // CHECK6-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3995 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3996 // CHECK6-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 3997 // CHECK6-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 3998 // CHECK6-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 3999 // CHECK6-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 4000 // CHECK6-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 4001 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4002 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 4003 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4004 // CHECK6-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 4005 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4006 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4007 // CHECK6-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 4008 // CHECK6-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 4009 // CHECK6-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 4010 // CHECK6-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 4011 // CHECK6-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 4012 // CHECK6-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 4013 // CHECK6-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 4014 // CHECK6-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 4015 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 4016 // CHECK6-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 4017 // CHECK6-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 4018 // CHECK6-NEXT: store i32 0, i32* [[I42]], align 4 4019 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4020 // CHECK6-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 4021 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4022 // CHECK6-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 4023 // CHECK6-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 4024 // CHECK6: land.lhs.true: 4025 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4026 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4027 // CHECK6-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 4028 // CHECK6-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 4029 // CHECK6: simd.if.then: 4030 // CHECK6-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 4031 // CHECK6-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 4032 // CHECK6-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 4033 // CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 4034 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]] 4035 // CHECK6: omp.inner.for.cond48: 4036 // CHECK6-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4037 // CHECK6-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 4038 // CHECK6-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]] 4039 // CHECK6-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]] 4040 // CHECK6: omp.inner.for.body50: 4041 // CHECK6-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4042 // CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4043 // CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4044 // CHECK6-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]] 4045 // CHECK6-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1 4046 // CHECK6-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1 4047 // CHECK6-NEXT: [[DIV54:%.*]] = udiv i32 [[ADD53]], 1 4048 // CHECK6-NEXT: [[MUL55:%.*]] = mul i32 1, [[DIV54]] 4049 // CHECK6-NEXT: [[CONV56:%.*]] = zext i32 [[MUL55]] to i64 4050 // CHECK6-NEXT: [[DIV57:%.*]] = sdiv i64 [[TMP33]], [[CONV56]] 4051 // CHECK6-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1 4052 // CHECK6-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]] 4053 // CHECK6-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32 4054 // CHECK6-NEXT: store i32 [[CONV60]], i32* [[I46]], align 4, !llvm.access.group !9 4055 // CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4056 // CHECK6-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64 4057 // CHECK6-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4058 // CHECK6-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4059 // CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4060 // CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4061 // CHECK6-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]] 4062 // CHECK6-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1 4063 // CHECK6-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1 4064 // CHECK6-NEXT: [[DIV65:%.*]] = udiv i32 [[ADD64]], 1 4065 // CHECK6-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]] 4066 // CHECK6-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 4067 // CHECK6-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]] 4068 // CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4069 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4070 // CHECK6-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]] 4071 // CHECK6-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1 4072 // CHECK6-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1 4073 // CHECK6-NEXT: [[DIV72:%.*]] = udiv i32 [[ADD71]], 1 4074 // CHECK6-NEXT: [[MUL73:%.*]] = mul i32 1, [[DIV72]] 4075 // CHECK6-NEXT: [[CONV74:%.*]] = zext i32 [[MUL73]] to i64 4076 // CHECK6-NEXT: [[MUL75:%.*]] = mul nsw i64 [[DIV68]], [[CONV74]] 4077 // CHECK6-NEXT: [[SUB76:%.*]] = sub nsw i64 [[TMP37]], [[MUL75]] 4078 // CHECK6-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1 4079 // CHECK6-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]] 4080 // CHECK6-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32 4081 // CHECK6-NEXT: store i32 [[CONV79]], i32* [[J47]], align 4, !llvm.access.group !9 4082 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]] 4083 // CHECK6: omp.body.continue80: 4084 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]] 4085 // CHECK6: omp.inner.for.inc81: 4086 // CHECK6-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4087 // CHECK6-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1 4088 // CHECK6-NEXT: store i64 [[ADD82]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4089 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]] 4090 // CHECK6: omp.inner.for.end83: 4091 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4092 // CHECK6-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0 4093 // CHECK6-NEXT: [[DIV85:%.*]] = sdiv i32 [[SUB84]], 1 4094 // CHECK6-NEXT: [[MUL86:%.*]] = mul nsw i32 [[DIV85]], 1 4095 // CHECK6-NEXT: [[ADD87:%.*]] = add nsw i32 0, [[MUL86]] 4096 // CHECK6-NEXT: store i32 [[ADD87]], i32* [[I20]], align 4 4097 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4098 // CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4099 // CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4100 // CHECK6-NEXT: [[SUB88:%.*]] = sub i32 [[TMP46]], [[TMP47]] 4101 // CHECK6-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 4102 // CHECK6-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 4103 // CHECK6-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 4104 // CHECK6-NEXT: [[MUL92:%.*]] = mul i32 [[DIV91]], 1 4105 // CHECK6-NEXT: [[ADD93:%.*]] = add i32 [[TMP45]], [[MUL92]] 4106 // CHECK6-NEXT: store i32 [[ADD93]], i32* [[J47]], align 4 4107 // CHECK6-NEXT: br label [[SIMD_IF_END]] 4108 // CHECK6: simd.if.end: 4109 // CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4 4110 // CHECK6-NEXT: ret i32 [[TMP48]] 4111 // 4112 // 4113 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2Ei 4114 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 4115 // CHECK6-NEXT: entry: 4116 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4117 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4118 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4119 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4120 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4121 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4122 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 4123 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4124 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4125 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 4126 // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4127 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4128 // CHECK6-NEXT: [[A8:%.*]] = alloca i32, align 4 4129 // CHECK6-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 4130 // CHECK6-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 4131 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4132 // CHECK6-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4133 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4134 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4135 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 4136 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4137 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 4138 // CHECK6-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 4139 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 4140 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4141 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4142 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 4143 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4144 // CHECK6-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 4145 // CHECK6-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 4146 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4147 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 4148 // CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 4149 // CHECK6-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 4150 // CHECK6-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 4151 // CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 4152 // CHECK6-NEXT: store i32 0, i32* [[TMP4]], align 4 4153 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4154 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4155 // CHECK6-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4156 // CHECK6: simd.if.then: 4157 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4158 // CHECK6-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 4159 // CHECK6-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 4160 // CHECK6-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 4161 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4162 // CHECK6: omp.inner.for.cond: 4163 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4164 // CHECK6-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 4165 // CHECK6-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !12 4166 // CHECK6-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 4167 // CHECK6-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4168 // CHECK6: omp.inner.for.body: 4169 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4170 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4171 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4172 // CHECK6-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !12 4173 // CHECK6-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !12 4174 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4175 // CHECK6: omp.body.continue: 4176 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4177 // CHECK6: omp.inner.for.inc: 4178 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4179 // CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 4180 // CHECK6-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4181 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4182 // CHECK6: omp.inner.for.end: 4183 // CHECK6-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4184 // CHECK6-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 4185 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4186 // CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 4187 // CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 4188 // CHECK6-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 4189 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 4190 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 4191 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 4192 // CHECK6-NEXT: br label [[SIMD_IF_END]] 4193 // CHECK6: simd.if.end: 4194 // CHECK6-NEXT: ret void 4195 // 4196 // 4197 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1Ei 4198 // CHECK6-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 4199 // CHECK6-NEXT: entry: 4200 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4201 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4202 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4203 // CHECK6-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4204 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4205 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4206 // CHECK6-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4207 // CHECK6-NEXT: ret void 4208 // 4209 // 4210 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_var_init 4211 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4212 // CHECK6-NEXT: entry: 4213 // CHECK6-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 4214 // CHECK6-NEXT: ret void 4215 // 4216 // 4217 // CHECK6-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 4218 // CHECK6-SAME: () #[[ATTR3]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4219 // CHECK6-NEXT: entry: 4220 // CHECK6-NEXT: call void @__cxx_global_var_init() 4221 // CHECK6-NEXT: ret void 4222 // 4223 // 4224 // CHECK7-LABEL: define {{[^@]+}}@main 4225 // CHECK7-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4226 // CHECK7-NEXT: entry: 4227 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4228 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4229 // CHECK7-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4230 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4231 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4232 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4233 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4234 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4235 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 4236 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4237 // CHECK7-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4238 // CHECK7-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 4239 // CHECK7-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 4240 // CHECK7-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 4241 // CHECK7-NEXT: [[I9:%.*]] = alloca i32, align 4 4242 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 4243 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 4244 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 4245 // CHECK7-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 4246 // CHECK7-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 4247 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4248 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 4249 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 4250 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 4251 // CHECK7-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 4252 // CHECK7-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 4253 // CHECK7-NEXT: [[I42:%.*]] = alloca i32, align 4 4254 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4 4255 // CHECK7-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 4256 // CHECK7-NEXT: [[I46:%.*]] = alloca i32, align 4 4257 // CHECK7-NEXT: [[J47:%.*]] = alloca i32, align 4 4258 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 4259 // CHECK7-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4260 // CHECK7-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4261 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4262 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 4263 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4264 // CHECK7-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 4265 // CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4266 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4267 // CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 4268 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4269 // CHECK7: omp.inner.for.cond: 4270 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4271 // CHECK7-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 4272 // CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 4273 // CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 4274 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4275 // CHECK7: omp.inner.for.body: 4276 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4277 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4278 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4279 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4280 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4281 // CHECK7: omp.body.continue: 4282 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4283 // CHECK7: omp.inner.for.inc: 4284 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4285 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 4286 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4287 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4288 // CHECK7: omp.inner.for.end: 4289 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4 4290 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4291 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4292 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 4293 // CHECK7-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 4294 // CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 4295 // CHECK7-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 4296 // CHECK7-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 4297 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 4298 // CHECK7: omp.inner.for.cond10: 4299 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4300 // CHECK7-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 4301 // CHECK7-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 4302 // CHECK7-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 4303 // CHECK7-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 4304 // CHECK7: omp.inner.for.body13: 4305 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4306 // CHECK7-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 4307 // CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 4308 // CHECK7-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 4309 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 4310 // CHECK7: omp.body.continue16: 4311 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 4312 // CHECK7: omp.inner.for.inc17: 4313 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4314 // CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 4315 // CHECK7-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4316 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 4317 // CHECK7: omp.inner.for.end19: 4318 // CHECK7-NEXT: store i32 10, i32* [[I9]], align 4 4319 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4320 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 4321 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4322 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 4323 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4324 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 4325 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4326 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 4327 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4328 // CHECK7-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 4329 // CHECK7-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 4330 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4331 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 4332 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 4333 // CHECK7-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 4334 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4335 // CHECK7-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 4336 // CHECK7-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 4337 // CHECK7-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 4338 // CHECK7-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 4339 // CHECK7-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 4340 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4341 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 4342 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4343 // CHECK7-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 4344 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4345 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4346 // CHECK7-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 4347 // CHECK7-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 4348 // CHECK7-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 4349 // CHECK7-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 4350 // CHECK7-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 4351 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 4352 // CHECK7-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 4353 // CHECK7-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 4354 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 4355 // CHECK7-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 4356 // CHECK7-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 4357 // CHECK7-NEXT: store i32 0, i32* [[I42]], align 4 4358 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4359 // CHECK7-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 4360 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4361 // CHECK7-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 4362 // CHECK7-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 4363 // CHECK7: land.lhs.true: 4364 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4365 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4366 // CHECK7-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 4367 // CHECK7-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 4368 // CHECK7: simd.if.then: 4369 // CHECK7-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 4370 // CHECK7-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 4371 // CHECK7-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 4372 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 4373 // CHECK7-NEXT: [[TMP31:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_21]], align 1 4374 // CHECK7-NEXT: [[TOBOOL48:%.*]] = trunc i8 [[TMP31]] to i1 4375 // CHECK7-NEXT: br i1 [[TOBOOL48]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4376 // CHECK7: omp_if.then: 4377 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND49:%.*]] 4378 // CHECK7: omp.inner.for.cond49: 4379 // CHECK7-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4380 // CHECK7-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 4381 // CHECK7-NEXT: [[CMP50:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]] 4382 // CHECK7-NEXT: br i1 [[CMP50]], label [[OMP_INNER_FOR_BODY51:%.*]], label [[OMP_INNER_FOR_END84:%.*]] 4383 // CHECK7: omp.inner.for.body51: 4384 // CHECK7-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4385 // CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4386 // CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4387 // CHECK7-NEXT: [[SUB52:%.*]] = sub i32 [[TMP35]], [[TMP36]] 4388 // CHECK7-NEXT: [[SUB53:%.*]] = sub i32 [[SUB52]], 1 4389 // CHECK7-NEXT: [[ADD54:%.*]] = add i32 [[SUB53]], 1 4390 // CHECK7-NEXT: [[DIV55:%.*]] = udiv i32 [[ADD54]], 1 4391 // CHECK7-NEXT: [[MUL56:%.*]] = mul i32 1, [[DIV55]] 4392 // CHECK7-NEXT: [[CONV57:%.*]] = zext i32 [[MUL56]] to i64 4393 // CHECK7-NEXT: [[DIV58:%.*]] = sdiv i64 [[TMP34]], [[CONV57]] 4394 // CHECK7-NEXT: [[MUL59:%.*]] = mul nsw i64 [[DIV58]], 1 4395 // CHECK7-NEXT: [[ADD60:%.*]] = add nsw i64 0, [[MUL59]] 4396 // CHECK7-NEXT: [[CONV61:%.*]] = trunc i64 [[ADD60]] to i32 4397 // CHECK7-NEXT: store i32 [[CONV61]], i32* [[I46]], align 4, !llvm.access.group !9 4398 // CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4399 // CHECK7-NEXT: [[CONV62:%.*]] = sext i32 [[TMP37]] to i64 4400 // CHECK7-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4401 // CHECK7-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4402 // CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4403 // CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4404 // CHECK7-NEXT: [[SUB63:%.*]] = sub i32 [[TMP40]], [[TMP41]] 4405 // CHECK7-NEXT: [[SUB64:%.*]] = sub i32 [[SUB63]], 1 4406 // CHECK7-NEXT: [[ADD65:%.*]] = add i32 [[SUB64]], 1 4407 // CHECK7-NEXT: [[DIV66:%.*]] = udiv i32 [[ADD65]], 1 4408 // CHECK7-NEXT: [[MUL67:%.*]] = mul i32 1, [[DIV66]] 4409 // CHECK7-NEXT: [[CONV68:%.*]] = zext i32 [[MUL67]] to i64 4410 // CHECK7-NEXT: [[DIV69:%.*]] = sdiv i64 [[TMP39]], [[CONV68]] 4411 // CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4412 // CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4413 // CHECK7-NEXT: [[SUB70:%.*]] = sub i32 [[TMP42]], [[TMP43]] 4414 // CHECK7-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 4415 // CHECK7-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 4416 // CHECK7-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 4417 // CHECK7-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 4418 // CHECK7-NEXT: [[CONV75:%.*]] = zext i32 [[MUL74]] to i64 4419 // CHECK7-NEXT: [[MUL76:%.*]] = mul nsw i64 [[DIV69]], [[CONV75]] 4420 // CHECK7-NEXT: [[SUB77:%.*]] = sub nsw i64 [[TMP38]], [[MUL76]] 4421 // CHECK7-NEXT: [[MUL78:%.*]] = mul nsw i64 [[SUB77]], 1 4422 // CHECK7-NEXT: [[ADD79:%.*]] = add nsw i64 [[CONV62]], [[MUL78]] 4423 // CHECK7-NEXT: [[CONV80:%.*]] = trunc i64 [[ADD79]] to i32 4424 // CHECK7-NEXT: store i32 [[CONV80]], i32* [[J47]], align 4, !llvm.access.group !9 4425 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE81:%.*]] 4426 // CHECK7: omp.body.continue81: 4427 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC82:%.*]] 4428 // CHECK7: omp.inner.for.inc82: 4429 // CHECK7-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4430 // CHECK7-NEXT: [[ADD83:%.*]] = add nsw i64 [[TMP44]], 1 4431 // CHECK7-NEXT: store i64 [[ADD83]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4432 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND49]], !llvm.loop [[LOOP10:![0-9]+]] 4433 // CHECK7: omp.inner.for.end84: 4434 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]] 4435 // CHECK7: omp_if.else: 4436 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND85:%.*]] 4437 // CHECK7: omp.inner.for.cond85: 4438 // CHECK7-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4439 // CHECK7-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8 4440 // CHECK7-NEXT: [[CMP86:%.*]] = icmp ule i64 [[TMP45]], [[TMP46]] 4441 // CHECK7-NEXT: br i1 [[CMP86]], label [[OMP_INNER_FOR_BODY87:%.*]], label [[OMP_INNER_FOR_END120:%.*]] 4442 // CHECK7: omp.inner.for.body87: 4443 // CHECK7-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4444 // CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4445 // CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4446 // CHECK7-NEXT: [[SUB88:%.*]] = sub i32 [[TMP48]], [[TMP49]] 4447 // CHECK7-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 4448 // CHECK7-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 4449 // CHECK7-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 4450 // CHECK7-NEXT: [[MUL92:%.*]] = mul i32 1, [[DIV91]] 4451 // CHECK7-NEXT: [[CONV93:%.*]] = zext i32 [[MUL92]] to i64 4452 // CHECK7-NEXT: [[DIV94:%.*]] = sdiv i64 [[TMP47]], [[CONV93]] 4453 // CHECK7-NEXT: [[MUL95:%.*]] = mul nsw i64 [[DIV94]], 1 4454 // CHECK7-NEXT: [[ADD96:%.*]] = add nsw i64 0, [[MUL95]] 4455 // CHECK7-NEXT: [[CONV97:%.*]] = trunc i64 [[ADD96]] to i32 4456 // CHECK7-NEXT: store i32 [[CONV97]], i32* [[I46]], align 4 4457 // CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4458 // CHECK7-NEXT: [[CONV98:%.*]] = sext i32 [[TMP50]] to i64 4459 // CHECK7-NEXT: [[TMP51:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4460 // CHECK7-NEXT: [[TMP52:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4461 // CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4462 // CHECK7-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4463 // CHECK7-NEXT: [[SUB99:%.*]] = sub i32 [[TMP53]], [[TMP54]] 4464 // CHECK7-NEXT: [[SUB100:%.*]] = sub i32 [[SUB99]], 1 4465 // CHECK7-NEXT: [[ADD101:%.*]] = add i32 [[SUB100]], 1 4466 // CHECK7-NEXT: [[DIV102:%.*]] = udiv i32 [[ADD101]], 1 4467 // CHECK7-NEXT: [[MUL103:%.*]] = mul i32 1, [[DIV102]] 4468 // CHECK7-NEXT: [[CONV104:%.*]] = zext i32 [[MUL103]] to i64 4469 // CHECK7-NEXT: [[DIV105:%.*]] = sdiv i64 [[TMP52]], [[CONV104]] 4470 // CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4471 // CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4472 // CHECK7-NEXT: [[SUB106:%.*]] = sub i32 [[TMP55]], [[TMP56]] 4473 // CHECK7-NEXT: [[SUB107:%.*]] = sub i32 [[SUB106]], 1 4474 // CHECK7-NEXT: [[ADD108:%.*]] = add i32 [[SUB107]], 1 4475 // CHECK7-NEXT: [[DIV109:%.*]] = udiv i32 [[ADD108]], 1 4476 // CHECK7-NEXT: [[MUL110:%.*]] = mul i32 1, [[DIV109]] 4477 // CHECK7-NEXT: [[CONV111:%.*]] = zext i32 [[MUL110]] to i64 4478 // CHECK7-NEXT: [[MUL112:%.*]] = mul nsw i64 [[DIV105]], [[CONV111]] 4479 // CHECK7-NEXT: [[SUB113:%.*]] = sub nsw i64 [[TMP51]], [[MUL112]] 4480 // CHECK7-NEXT: [[MUL114:%.*]] = mul nsw i64 [[SUB113]], 1 4481 // CHECK7-NEXT: [[ADD115:%.*]] = add nsw i64 [[CONV98]], [[MUL114]] 4482 // CHECK7-NEXT: [[CONV116:%.*]] = trunc i64 [[ADD115]] to i32 4483 // CHECK7-NEXT: store i32 [[CONV116]], i32* [[J47]], align 4 4484 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE117:%.*]] 4485 // CHECK7: omp.body.continue117: 4486 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC118:%.*]] 4487 // CHECK7: omp.inner.for.inc118: 4488 // CHECK7-NEXT: [[TMP57:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4489 // CHECK7-NEXT: [[ADD119:%.*]] = add nsw i64 [[TMP57]], 1 4490 // CHECK7-NEXT: store i64 [[ADD119]], i64* [[DOTOMP_IV45]], align 8 4491 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND85]], !llvm.loop [[LOOP12:![0-9]+]] 4492 // CHECK7: omp.inner.for.end120: 4493 // CHECK7-NEXT: br label [[OMP_IF_END]] 4494 // CHECK7: omp_if.end: 4495 // CHECK7-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4496 // CHECK7-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP58]], 0 4497 // CHECK7-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 4498 // CHECK7-NEXT: [[MUL123:%.*]] = mul nsw i32 [[DIV122]], 1 4499 // CHECK7-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 4500 // CHECK7-NEXT: store i32 [[ADD124]], i32* [[I20]], align 4 4501 // CHECK7-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4502 // CHECK7-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4503 // CHECK7-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4504 // CHECK7-NEXT: [[SUB125:%.*]] = sub i32 [[TMP60]], [[TMP61]] 4505 // CHECK7-NEXT: [[SUB126:%.*]] = sub i32 [[SUB125]], 1 4506 // CHECK7-NEXT: [[ADD127:%.*]] = add i32 [[SUB126]], 1 4507 // CHECK7-NEXT: [[DIV128:%.*]] = udiv i32 [[ADD127]], 1 4508 // CHECK7-NEXT: [[MUL129:%.*]] = mul i32 [[DIV128]], 1 4509 // CHECK7-NEXT: [[ADD130:%.*]] = add i32 [[TMP59]], [[MUL129]] 4510 // CHECK7-NEXT: store i32 [[ADD130]], i32* [[J47]], align 4 4511 // CHECK7-NEXT: br label [[SIMD_IF_END]] 4512 // CHECK7: simd.if.end: 4513 // CHECK7-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4 4514 // CHECK7-NEXT: ret i32 [[TMP62]] 4515 // 4516 // 4517 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_var_init 4518 // CHECK7-SAME: () #[[ATTR2:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4519 // CHECK7-NEXT: entry: 4520 // CHECK7-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 4521 // CHECK7-NEXT: ret void 4522 // 4523 // 4524 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC1Ei 4525 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 { 4526 // CHECK7-NEXT: entry: 4527 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4528 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4529 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4530 // CHECK7-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4531 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4532 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4533 // CHECK7-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 4534 // CHECK7-NEXT: ret void 4535 // 4536 // 4537 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC2Ei 4538 // CHECK7-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 4539 // CHECK7-NEXT: entry: 4540 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4541 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4542 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4543 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 4544 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4545 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4546 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 4547 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4548 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4549 // CHECK7-NEXT: [[A:%.*]] = alloca i32, align 4 4550 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4551 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4552 // CHECK7-NEXT: [[A8:%.*]] = alloca i32, align 4 4553 // CHECK7-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 4554 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 4555 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4556 // CHECK7-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4557 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4558 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4559 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 4560 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4561 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 4562 // CHECK7-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 4563 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 4564 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4565 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4566 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 4567 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4568 // CHECK7-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 4569 // CHECK7-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 4570 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4571 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 4572 // CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 4573 // CHECK7-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 4574 // CHECK7-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 4575 // CHECK7-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 4576 // CHECK7-NEXT: store i32 0, i32* [[TMP4]], align 4 4577 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4578 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4579 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4580 // CHECK7: simd.if.then: 4581 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4582 // CHECK7-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 4583 // CHECK7-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 4584 // CHECK7-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 4585 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4586 // CHECK7: omp.inner.for.cond: 4587 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4588 // CHECK7-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 4589 // CHECK7-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !14 4590 // CHECK7-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 4591 // CHECK7-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4592 // CHECK7: omp.inner.for.body: 4593 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4594 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4595 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4596 // CHECK7-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !14 4597 // CHECK7-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !14 4598 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4599 // CHECK7: omp.body.continue: 4600 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4601 // CHECK7: omp.inner.for.inc: 4602 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4603 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 4604 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4605 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 4606 // CHECK7: omp.inner.for.end: 4607 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4608 // CHECK7-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 4609 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4610 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 4611 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 4612 // CHECK7-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 4613 // CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 4614 // CHECK7-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 4615 // CHECK7-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 4616 // CHECK7-NEXT: br label [[SIMD_IF_END]] 4617 // CHECK7: simd.if.end: 4618 // CHECK7-NEXT: ret void 4619 // 4620 // 4621 // CHECK7-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 4622 // CHECK7-SAME: () #[[ATTR2]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4623 // CHECK7-NEXT: entry: 4624 // CHECK7-NEXT: call void @__cxx_global_var_init() 4625 // CHECK7-NEXT: ret void 4626 // 4627 // 4628 // CHECK8-LABEL: define {{[^@]+}}@main 4629 // CHECK8-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 4630 // CHECK8-NEXT: entry: 4631 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 4632 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 4633 // CHECK8-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 4634 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4635 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 4636 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4637 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4638 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4639 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 4640 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4641 // CHECK8-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 4642 // CHECK8-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 4643 // CHECK8-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 4644 // CHECK8-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 4645 // CHECK8-NEXT: [[I9:%.*]] = alloca i32, align 4 4646 // CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4 4647 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 4648 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 4649 // CHECK8-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 4650 // CHECK8-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 4651 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 4652 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 4653 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 4654 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 4655 // CHECK8-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 4656 // CHECK8-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 4657 // CHECK8-NEXT: [[I42:%.*]] = alloca i32, align 4 4658 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4 4659 // CHECK8-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 4660 // CHECK8-NEXT: [[I46:%.*]] = alloca i32, align 4 4661 // CHECK8-NEXT: [[J47:%.*]] = alloca i32, align 4 4662 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 4663 // CHECK8-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 4664 // CHECK8-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 4665 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4666 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 4667 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4668 // CHECK8-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 4669 // CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4670 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4671 // CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 4672 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4673 // CHECK8: omp.inner.for.cond: 4674 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4675 // CHECK8-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 4676 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 4677 // CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 4678 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4679 // CHECK8: omp.inner.for.body: 4680 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4681 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 4682 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4683 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4684 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4685 // CHECK8: omp.body.continue: 4686 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4687 // CHECK8: omp.inner.for.inc: 4688 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4689 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 4690 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 4691 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 4692 // CHECK8: omp.inner.for.end: 4693 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4 4694 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4695 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4696 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 4697 // CHECK8-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 4698 // CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 4699 // CHECK8-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 4700 // CHECK8-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 4701 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 4702 // CHECK8: omp.inner.for.cond10: 4703 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4704 // CHECK8-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 4705 // CHECK8-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 4706 // CHECK8-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 4707 // CHECK8-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 4708 // CHECK8: omp.inner.for.body13: 4709 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4710 // CHECK8-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 4711 // CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 4712 // CHECK8-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 4713 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 4714 // CHECK8: omp.body.continue16: 4715 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 4716 // CHECK8: omp.inner.for.inc17: 4717 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4718 // CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 4719 // CHECK8-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 4720 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 4721 // CHECK8: omp.inner.for.end19: 4722 // CHECK8-NEXT: store i32 10, i32* [[I9]], align 4 4723 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4724 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 4725 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4726 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 4727 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4728 // CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 4729 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4730 // CHECK8-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 4731 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4732 // CHECK8-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 4733 // CHECK8-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 4734 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4735 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 4736 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 4737 // CHECK8-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 4738 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4739 // CHECK8-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 4740 // CHECK8-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 4741 // CHECK8-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 4742 // CHECK8-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 4743 // CHECK8-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 4744 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4745 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 4746 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4747 // CHECK8-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 4748 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4749 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4750 // CHECK8-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 4751 // CHECK8-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 4752 // CHECK8-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 4753 // CHECK8-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 4754 // CHECK8-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 4755 // CHECK8-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 4756 // CHECK8-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 4757 // CHECK8-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 4758 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 4759 // CHECK8-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 4760 // CHECK8-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 4761 // CHECK8-NEXT: store i32 0, i32* [[I42]], align 4 4762 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4763 // CHECK8-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 4764 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4765 // CHECK8-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 4766 // CHECK8-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 4767 // CHECK8: land.lhs.true: 4768 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4769 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4770 // CHECK8-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 4771 // CHECK8-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 4772 // CHECK8: simd.if.then: 4773 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 4774 // CHECK8-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 4775 // CHECK8-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 4776 // CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 4777 // CHECK8-NEXT: [[TMP31:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_21]], align 1 4778 // CHECK8-NEXT: [[TOBOOL48:%.*]] = trunc i8 [[TMP31]] to i1 4779 // CHECK8-NEXT: br i1 [[TOBOOL48]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 4780 // CHECK8: omp_if.then: 4781 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND49:%.*]] 4782 // CHECK8: omp.inner.for.cond49: 4783 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4784 // CHECK8-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 4785 // CHECK8-NEXT: [[CMP50:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]] 4786 // CHECK8-NEXT: br i1 [[CMP50]], label [[OMP_INNER_FOR_BODY51:%.*]], label [[OMP_INNER_FOR_END84:%.*]] 4787 // CHECK8: omp.inner.for.body51: 4788 // CHECK8-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4789 // CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4790 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4791 // CHECK8-NEXT: [[SUB52:%.*]] = sub i32 [[TMP35]], [[TMP36]] 4792 // CHECK8-NEXT: [[SUB53:%.*]] = sub i32 [[SUB52]], 1 4793 // CHECK8-NEXT: [[ADD54:%.*]] = add i32 [[SUB53]], 1 4794 // CHECK8-NEXT: [[DIV55:%.*]] = udiv i32 [[ADD54]], 1 4795 // CHECK8-NEXT: [[MUL56:%.*]] = mul i32 1, [[DIV55]] 4796 // CHECK8-NEXT: [[CONV57:%.*]] = zext i32 [[MUL56]] to i64 4797 // CHECK8-NEXT: [[DIV58:%.*]] = sdiv i64 [[TMP34]], [[CONV57]] 4798 // CHECK8-NEXT: [[MUL59:%.*]] = mul nsw i64 [[DIV58]], 1 4799 // CHECK8-NEXT: [[ADD60:%.*]] = add nsw i64 0, [[MUL59]] 4800 // CHECK8-NEXT: [[CONV61:%.*]] = trunc i64 [[ADD60]] to i32 4801 // CHECK8-NEXT: store i32 [[CONV61]], i32* [[I46]], align 4, !llvm.access.group !9 4802 // CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4803 // CHECK8-NEXT: [[CONV62:%.*]] = sext i32 [[TMP37]] to i64 4804 // CHECK8-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4805 // CHECK8-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4806 // CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4807 // CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4808 // CHECK8-NEXT: [[SUB63:%.*]] = sub i32 [[TMP40]], [[TMP41]] 4809 // CHECK8-NEXT: [[SUB64:%.*]] = sub i32 [[SUB63]], 1 4810 // CHECK8-NEXT: [[ADD65:%.*]] = add i32 [[SUB64]], 1 4811 // CHECK8-NEXT: [[DIV66:%.*]] = udiv i32 [[ADD65]], 1 4812 // CHECK8-NEXT: [[MUL67:%.*]] = mul i32 1, [[DIV66]] 4813 // CHECK8-NEXT: [[CONV68:%.*]] = zext i32 [[MUL67]] to i64 4814 // CHECK8-NEXT: [[DIV69:%.*]] = sdiv i64 [[TMP39]], [[CONV68]] 4815 // CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 4816 // CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 4817 // CHECK8-NEXT: [[SUB70:%.*]] = sub i32 [[TMP42]], [[TMP43]] 4818 // CHECK8-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 4819 // CHECK8-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 4820 // CHECK8-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 4821 // CHECK8-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 4822 // CHECK8-NEXT: [[CONV75:%.*]] = zext i32 [[MUL74]] to i64 4823 // CHECK8-NEXT: [[MUL76:%.*]] = mul nsw i64 [[DIV69]], [[CONV75]] 4824 // CHECK8-NEXT: [[SUB77:%.*]] = sub nsw i64 [[TMP38]], [[MUL76]] 4825 // CHECK8-NEXT: [[MUL78:%.*]] = mul nsw i64 [[SUB77]], 1 4826 // CHECK8-NEXT: [[ADD79:%.*]] = add nsw i64 [[CONV62]], [[MUL78]] 4827 // CHECK8-NEXT: [[CONV80:%.*]] = trunc i64 [[ADD79]] to i32 4828 // CHECK8-NEXT: store i32 [[CONV80]], i32* [[J47]], align 4, !llvm.access.group !9 4829 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE81:%.*]] 4830 // CHECK8: omp.body.continue81: 4831 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC82:%.*]] 4832 // CHECK8: omp.inner.for.inc82: 4833 // CHECK8-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4834 // CHECK8-NEXT: [[ADD83:%.*]] = add nsw i64 [[TMP44]], 1 4835 // CHECK8-NEXT: store i64 [[ADD83]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 4836 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND49]], !llvm.loop [[LOOP10:![0-9]+]] 4837 // CHECK8: omp.inner.for.end84: 4838 // CHECK8-NEXT: br label [[OMP_IF_END:%.*]] 4839 // CHECK8: omp_if.else: 4840 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND85:%.*]] 4841 // CHECK8: omp.inner.for.cond85: 4842 // CHECK8-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4843 // CHECK8-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8 4844 // CHECK8-NEXT: [[CMP86:%.*]] = icmp ule i64 [[TMP45]], [[TMP46]] 4845 // CHECK8-NEXT: br i1 [[CMP86]], label [[OMP_INNER_FOR_BODY87:%.*]], label [[OMP_INNER_FOR_END120:%.*]] 4846 // CHECK8: omp.inner.for.body87: 4847 // CHECK8-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4848 // CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4849 // CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4850 // CHECK8-NEXT: [[SUB88:%.*]] = sub i32 [[TMP48]], [[TMP49]] 4851 // CHECK8-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 4852 // CHECK8-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 4853 // CHECK8-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 4854 // CHECK8-NEXT: [[MUL92:%.*]] = mul i32 1, [[DIV91]] 4855 // CHECK8-NEXT: [[CONV93:%.*]] = zext i32 [[MUL92]] to i64 4856 // CHECK8-NEXT: [[DIV94:%.*]] = sdiv i64 [[TMP47]], [[CONV93]] 4857 // CHECK8-NEXT: [[MUL95:%.*]] = mul nsw i64 [[DIV94]], 1 4858 // CHECK8-NEXT: [[ADD96:%.*]] = add nsw i64 0, [[MUL95]] 4859 // CHECK8-NEXT: [[CONV97:%.*]] = trunc i64 [[ADD96]] to i32 4860 // CHECK8-NEXT: store i32 [[CONV97]], i32* [[I46]], align 4 4861 // CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4862 // CHECK8-NEXT: [[CONV98:%.*]] = sext i32 [[TMP50]] to i64 4863 // CHECK8-NEXT: [[TMP51:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4864 // CHECK8-NEXT: [[TMP52:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4865 // CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4866 // CHECK8-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4867 // CHECK8-NEXT: [[SUB99:%.*]] = sub i32 [[TMP53]], [[TMP54]] 4868 // CHECK8-NEXT: [[SUB100:%.*]] = sub i32 [[SUB99]], 1 4869 // CHECK8-NEXT: [[ADD101:%.*]] = add i32 [[SUB100]], 1 4870 // CHECK8-NEXT: [[DIV102:%.*]] = udiv i32 [[ADD101]], 1 4871 // CHECK8-NEXT: [[MUL103:%.*]] = mul i32 1, [[DIV102]] 4872 // CHECK8-NEXT: [[CONV104:%.*]] = zext i32 [[MUL103]] to i64 4873 // CHECK8-NEXT: [[DIV105:%.*]] = sdiv i64 [[TMP52]], [[CONV104]] 4874 // CHECK8-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4875 // CHECK8-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4876 // CHECK8-NEXT: [[SUB106:%.*]] = sub i32 [[TMP55]], [[TMP56]] 4877 // CHECK8-NEXT: [[SUB107:%.*]] = sub i32 [[SUB106]], 1 4878 // CHECK8-NEXT: [[ADD108:%.*]] = add i32 [[SUB107]], 1 4879 // CHECK8-NEXT: [[DIV109:%.*]] = udiv i32 [[ADD108]], 1 4880 // CHECK8-NEXT: [[MUL110:%.*]] = mul i32 1, [[DIV109]] 4881 // CHECK8-NEXT: [[CONV111:%.*]] = zext i32 [[MUL110]] to i64 4882 // CHECK8-NEXT: [[MUL112:%.*]] = mul nsw i64 [[DIV105]], [[CONV111]] 4883 // CHECK8-NEXT: [[SUB113:%.*]] = sub nsw i64 [[TMP51]], [[MUL112]] 4884 // CHECK8-NEXT: [[MUL114:%.*]] = mul nsw i64 [[SUB113]], 1 4885 // CHECK8-NEXT: [[ADD115:%.*]] = add nsw i64 [[CONV98]], [[MUL114]] 4886 // CHECK8-NEXT: [[CONV116:%.*]] = trunc i64 [[ADD115]] to i32 4887 // CHECK8-NEXT: store i32 [[CONV116]], i32* [[J47]], align 4 4888 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE117:%.*]] 4889 // CHECK8: omp.body.continue117: 4890 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC118:%.*]] 4891 // CHECK8: omp.inner.for.inc118: 4892 // CHECK8-NEXT: [[TMP57:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4893 // CHECK8-NEXT: [[ADD119:%.*]] = add nsw i64 [[TMP57]], 1 4894 // CHECK8-NEXT: store i64 [[ADD119]], i64* [[DOTOMP_IV45]], align 8 4895 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND85]], !llvm.loop [[LOOP12:![0-9]+]] 4896 // CHECK8: omp.inner.for.end120: 4897 // CHECK8-NEXT: br label [[OMP_IF_END]] 4898 // CHECK8: omp_if.end: 4899 // CHECK8-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4900 // CHECK8-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP58]], 0 4901 // CHECK8-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 4902 // CHECK8-NEXT: [[MUL123:%.*]] = mul nsw i32 [[DIV122]], 1 4903 // CHECK8-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 4904 // CHECK8-NEXT: store i32 [[ADD124]], i32* [[I20]], align 4 4905 // CHECK8-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4906 // CHECK8-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4907 // CHECK8-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4908 // CHECK8-NEXT: [[SUB125:%.*]] = sub i32 [[TMP60]], [[TMP61]] 4909 // CHECK8-NEXT: [[SUB126:%.*]] = sub i32 [[SUB125]], 1 4910 // CHECK8-NEXT: [[ADD127:%.*]] = add i32 [[SUB126]], 1 4911 // CHECK8-NEXT: [[DIV128:%.*]] = udiv i32 [[ADD127]], 1 4912 // CHECK8-NEXT: [[MUL129:%.*]] = mul i32 [[DIV128]], 1 4913 // CHECK8-NEXT: [[ADD130:%.*]] = add i32 [[TMP59]], [[MUL129]] 4914 // CHECK8-NEXT: store i32 [[ADD130]], i32* [[J47]], align 4 4915 // CHECK8-NEXT: br label [[SIMD_IF_END]] 4916 // CHECK8: simd.if.end: 4917 // CHECK8-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4 4918 // CHECK8-NEXT: ret i32 [[TMP62]] 4919 // 4920 // 4921 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC2Ei 4922 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 4923 // CHECK8-NEXT: entry: 4924 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4925 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4926 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4927 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 4928 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4929 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4930 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 4931 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4932 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4933 // CHECK8-NEXT: [[A:%.*]] = alloca i32, align 4 4934 // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4935 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4936 // CHECK8-NEXT: [[A8:%.*]] = alloca i32, align 4 4937 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 4938 // CHECK8-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 4939 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4940 // CHECK8-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4941 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4942 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4943 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 4944 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4945 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 4946 // CHECK8-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 4947 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 4948 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4949 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4950 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 4951 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4952 // CHECK8-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 4953 // CHECK8-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 4954 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4955 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 4956 // CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 4957 // CHECK8-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 4958 // CHECK8-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 4959 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 4960 // CHECK8-NEXT: store i32 0, i32* [[TMP4]], align 4 4961 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4962 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4963 // CHECK8-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4964 // CHECK8: simd.if.then: 4965 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4966 // CHECK8-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 4967 // CHECK8-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 4968 // CHECK8-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 4969 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4970 // CHECK8: omp.inner.for.cond: 4971 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4972 // CHECK8-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 4973 // CHECK8-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !14 4974 // CHECK8-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 4975 // CHECK8-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4976 // CHECK8: omp.inner.for.body: 4977 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4978 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4979 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4980 // CHECK8-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !14 4981 // CHECK8-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !14 4982 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4983 // CHECK8: omp.body.continue: 4984 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4985 // CHECK8: omp.inner.for.inc: 4986 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4987 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 4988 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4989 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 4990 // CHECK8: omp.inner.for.end: 4991 // CHECK8-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4992 // CHECK8-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 4993 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4994 // CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 4995 // CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 4996 // CHECK8-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 4997 // CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 4998 // CHECK8-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 4999 // CHECK8-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 5000 // CHECK8-NEXT: br label [[SIMD_IF_END]] 5001 // CHECK8: simd.if.end: 5002 // CHECK8-NEXT: ret void 5003 // 5004 // 5005 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC1Ei 5006 // CHECK8-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 [[C:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 5007 // CHECK8-NEXT: entry: 5008 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 5009 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 5010 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 5011 // CHECK8-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 5012 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 5013 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 5014 // CHECK8-NEXT: call void @_ZN1SC2Ei(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]], i32 [[TMP0]]) 5015 // CHECK8-NEXT: ret void 5016 // 5017 // 5018 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_var_init 5019 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 5020 // CHECK8-NEXT: entry: 5021 // CHECK8-NEXT: call void @_ZN1SC1Ei(%struct.S* nonnull align 4 dereferenceable(4) @s, i32 1) 5022 // CHECK8-NEXT: ret void 5023 // 5024 // 5025 // CHECK8-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 5026 // CHECK8-SAME: () #[[ATTR3]] section "__TEXT,__StaticInit,regular,pure_instructions" { 5027 // CHECK8-NEXT: entry: 5028 // CHECK8-NEXT: call void @__cxx_global_var_init() 5029 // CHECK8-NEXT: ret void 5030 // 5031