1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=50 -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 8 9 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=50 -x c++ -emit-llvm %s -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -emit-pch -o %t %s 14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -x c++ -triple x86_64-apple-darwin10 -include-pch %t -verify %s -emit-llvm -o - -femit-all-decls | FileCheck %s --check-prefix=CHECK8 15 // expected-no-diagnostics 16 #ifndef HEADER 17 #define HEADER 18 19 int main(int argc, char **argv) { 20 21 22 23 24 25 #pragma omp parallel master taskloop simd priority(argc) safelen(8) 26 for (int i = 0; i < 10; ++i) 27 ; 28 29 30 31 #pragma omp parallel master taskloop simd nogroup grainsize(argc) simdlen(16) 32 for (int i = 0; i < 10; ++i) 33 ; 34 35 36 int i; 37 #pragma omp parallel master taskloop simd if(argc) shared(argc, argv) collapse(2) num_tasks(argc) lastprivate(i) aligned(argv:8) 38 for (i = 0; i < argc; ++i) 39 for (int j = argc; j < argv[argc][argc]; ++j) 40 ; 41 } 42 43 struct S { 44 int a; 45 S(int c) { 46 47 #pragma omp parallel master taskloop simd shared(c) num_tasks(4) final(c) 48 for (a = 0; a < c; ++a) 49 ; 50 } 51 } s(1); 52 53 54 55 #endif 56 // CHECK1-LABEL: define {{[^@]+}}@main 57 // CHECK1-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 58 // CHECK1-NEXT: entry: 59 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 60 // CHECK1-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 61 // CHECK1-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 62 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 63 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 64 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 65 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_2:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 66 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 67 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i8, align 1 68 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 69 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_5:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 70 // CHECK1-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 71 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 72 // CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 73 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 74 // CHECK1-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 75 // CHECK1-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 76 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 77 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 78 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 79 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 80 // CHECK1-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 4 81 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 82 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 83 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 84 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]], i32 0, i32 0 85 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 86 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 87 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]]) 88 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 89 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 90 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 91 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_3]], align 1 92 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 93 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_4]], align 4 94 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 0 95 // CHECK1-NEXT: store i32* [[I]], i32** [[TMP9]], align 8 96 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 1 97 // CHECK1-NEXT: store i32* [[ARGC_ADDR]], i32** [[TMP10]], align 8 98 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 2 99 // CHECK1-NEXT: store i8*** [[ARGV_ADDR]], i8**** [[TMP11]], align 8 100 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 3 101 // CHECK1-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 102 // CHECK1-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP13]] to i1 103 // CHECK1-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[TOBOOL6]] to i8 104 // CHECK1-NEXT: store i8 [[FROMBOOL7]], i8* [[TMP12]], align 8 105 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 4 106 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 107 // CHECK1-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4 108 // CHECK1-NEXT: [[TMP16:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 109 // CHECK1-NEXT: [[TOBOOL8:%.*]] = trunc i8 [[TMP16]] to i1 110 // CHECK1-NEXT: br i1 [[TOBOOL8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 111 // CHECK1: omp_if.then: 112 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) 113 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]] 114 // CHECK1: omp_if.else: 115 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 116 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 117 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 118 // CHECK1-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) #[[ATTR2:[0-9]+]] 119 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 120 // CHECK1-NEXT: br label [[OMP_IF_END]] 121 // CHECK1: omp_if.end: 122 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 123 // CHECK1-NEXT: ret i32 [[TMP17]] 124 // 125 // 126 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 127 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 128 // CHECK1-NEXT: entry: 129 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 130 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 131 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 132 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 133 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 134 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 135 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 136 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 137 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 138 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 139 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 140 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 141 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 142 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 143 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 144 // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 145 // CHECK1-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 146 // CHECK1-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 147 // CHECK1: omp_if.then: 148 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 149 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 150 // CHECK1-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 151 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates* 152 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP9]], i32 0, i32 0 153 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 4 154 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP11]] to i32* 155 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[TMP12]], align 8 156 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 157 // CHECK1-NEXT: store i64 0, i64* [[TMP13]], align 8 158 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 159 // CHECK1-NEXT: store i64 9, i64* [[TMP14]], align 8 160 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 161 // CHECK1-NEXT: store i64 1, i64* [[TMP15]], align 8 162 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 163 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i8* 164 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP17]], i8 0, i64 8, i1 false) 165 // CHECK1-NEXT: [[TMP18:%.*]] = load i64, i64* [[TMP15]], align 8 166 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP13]], i64* [[TMP14]], i64 [[TMP18]], i32 1, i32 0, i64 0, i8* null) 167 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 168 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 169 // CHECK1-NEXT: br label [[OMP_IF_END]] 170 // CHECK1: omp_if.end: 171 // CHECK1-NEXT: ret void 172 // 173 // 174 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry. 175 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 176 // CHECK1-NEXT: entry: 177 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 178 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 179 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 180 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 181 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 182 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 183 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 184 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 185 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 186 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 187 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 188 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 189 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 190 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 191 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 192 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 193 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 194 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 195 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 196 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 197 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 198 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 199 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 200 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 201 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 202 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 203 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 204 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 205 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 206 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 207 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 208 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 209 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 210 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 211 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 212 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 213 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 214 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 215 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 216 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 217 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 218 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 219 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 220 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 221 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 222 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 223 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 224 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 225 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 226 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 227 // CHECK1-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 228 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 229 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 230 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 231 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 233 // CHECK1: omp.inner.for.cond.i: 234 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 235 // CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 236 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 237 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 238 // CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 239 // CHECK1: omp.inner.for.body.i: 240 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 241 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 242 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 243 // CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 244 // CHECK1-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 245 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 246 // CHECK1: .omp_outlined..1.exit: 247 // CHECK1-NEXT: ret i32 0 248 // 249 // 250 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 251 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 252 // CHECK1-NEXT: entry: 253 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 254 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 255 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 256 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 257 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 1 258 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 259 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 260 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 261 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 262 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 263 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 264 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 265 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 266 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 267 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 268 // CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 269 // CHECK1-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 270 // CHECK1-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 271 // CHECK1: omp_if.then: 272 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 273 // CHECK1-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 274 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates.3* 275 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP9]], i32 0, i32 0 276 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 277 // CHECK1-NEXT: store i64 0, i64* [[TMP11]], align 8 278 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 279 // CHECK1-NEXT: store i64 9, i64* [[TMP12]], align 8 280 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 281 // CHECK1-NEXT: store i64 1, i64* [[TMP13]], align 8 282 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 283 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i8* 284 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP15]], i8 0, i64 8, i1 false) 285 // CHECK1-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP13]], align 8 286 // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP7]] to i64 287 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP11]], i64* [[TMP12]], i64 [[TMP16]], i32 1, i32 1, i64 [[TMP17]], i8* null) 288 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 289 // CHECK1-NEXT: br label [[OMP_IF_END]] 290 // CHECK1: omp_if.end: 291 // CHECK1-NEXT: ret void 292 // 293 // 294 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..4 295 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 296 // CHECK1-NEXT: entry: 297 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 299 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 300 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 301 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 302 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 303 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 304 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 305 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 306 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 307 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 308 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 309 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 310 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 311 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 312 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 313 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 314 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 315 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 316 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 317 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 318 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 319 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 320 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 321 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 322 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 323 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 324 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 325 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 326 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 327 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 328 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 329 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 330 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 331 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 332 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 333 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 334 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 335 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 336 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 337 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 338 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 339 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 340 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 341 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 342 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 343 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 344 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 345 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 346 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 347 // CHECK1-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 348 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 349 // CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 350 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 351 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 352 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 353 // CHECK1: omp.inner.for.cond.i: 354 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 355 // CHECK1-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 356 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 357 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 358 // CHECK1-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 359 // CHECK1: omp.inner.for.body.i: 360 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 361 // CHECK1-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 362 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 363 // CHECK1-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 364 // CHECK1-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 365 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 366 // CHECK1: .omp_outlined..3.exit: 367 // CHECK1-NEXT: ret i32 0 368 // 369 // 370 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5 371 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 372 // CHECK1-NEXT: entry: 373 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 374 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 375 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 376 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 377 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 378 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 379 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 380 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 381 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 382 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 383 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 384 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 8 385 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 386 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 387 // CHECK1-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 388 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 389 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 390 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 391 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 392 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 393 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 394 // CHECK1-NEXT: [[TMP6:%.*]] = load i8***, i8**** [[TMP5]], align 8 395 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 396 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP7]], align 8 397 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 398 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 399 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 400 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 401 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 402 // CHECK1-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_1]], align 4 403 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 404 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 405 // CHECK1-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 406 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 407 // CHECK1-NEXT: br i1 [[TMP14]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 408 // CHECK1: omp_if.then: 409 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 0 410 // CHECK1-NEXT: store i32* [[TMP2]], i32** [[TMP15]], align 8 411 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 1 412 // CHECK1-NEXT: store i32* [[TMP4]], i32** [[TMP16]], align 8 413 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 2 414 // CHECK1-NEXT: store i8*** [[TMP6]], i8**** [[TMP17]], align 8 415 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 416 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 417 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP4]], align 4 418 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR_3]], align 4 419 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP4]], align 4 420 // CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR_4]], align 4 421 // CHECK1-NEXT: [[TMP21:%.*]] = load i8**, i8*** [[TMP6]], align 8 422 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP4]], align 4 423 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 424 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP21]], i64 [[IDXPROM]] 425 // CHECK1-NEXT: [[TMP23:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 426 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP4]], align 4 427 // CHECK1-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP24]] to i64 428 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 [[IDXPROM6]] 429 // CHECK1-NEXT: [[TMP25:%.*]] = load i8, i8* [[ARRAYIDX7]], align 1 430 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP25]] to i32 431 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTCAPTURE_EXPR_5]], align 4 432 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 433 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP26]], 0 434 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 435 // CHECK1-NEXT: [[CONV9:%.*]] = sext i32 [[DIV]] to i64 436 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 437 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 438 // CHECK1-NEXT: [[SUB10:%.*]] = sub i32 [[TMP27]], [[TMP28]] 439 // CHECK1-NEXT: [[SUB11:%.*]] = sub i32 [[SUB10]], 1 440 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB11]], 1 441 // CHECK1-NEXT: [[DIV12:%.*]] = udiv i32 [[ADD]], 1 442 // CHECK1-NEXT: [[CONV13:%.*]] = zext i32 [[DIV12]] to i64 443 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV9]], [[CONV13]] 444 // CHECK1-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL]], 1 445 // CHECK1-NEXT: store i64 [[SUB14]], i64* [[DOTCAPTURE_EXPR_8]], align 8 446 // CHECK1-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 1, i64 88, i64 24, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.6*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 447 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to %struct.kmp_task_t_with_privates.6* 448 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP30]], i32 0, i32 0 449 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 0 450 // CHECK1-NEXT: [[TMP33:%.*]] = load i8*, i8** [[TMP32]], align 8 451 // CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.anon.5* [[AGG_CAPTURED]] to i8* 452 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP33]], i8* align 8 [[TMP34]], i64 24, i1 false) 453 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP30]], i32 0, i32 1 454 // CHECK1-NEXT: [[TMP36:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 455 // CHECK1-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP36]] to i1 456 // CHECK1-NEXT: [[TMP37:%.*]] = sext i1 [[TOBOOL15]] to i32 457 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 5 458 // CHECK1-NEXT: store i64 0, i64* [[TMP38]], align 8 459 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 6 460 // CHECK1-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_8]], align 8 461 // CHECK1-NEXT: store i64 [[TMP40]], i64* [[TMP39]], align 8 462 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 7 463 // CHECK1-NEXT: store i64 1, i64* [[TMP41]], align 8 464 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 9 465 // CHECK1-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i8* 466 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP43]], i8 0, i64 8, i1 false) 467 // CHECK1-NEXT: [[TMP44:%.*]] = load i64, i64* [[TMP41]], align 8 468 // CHECK1-NEXT: [[TMP45:%.*]] = zext i32 [[TMP18]] to i64 469 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i8* [[TMP29]], i32 [[TMP37]], i64* [[TMP38]], i64* [[TMP39]], i64 [[TMP44]], i32 1, i32 2, i64 [[TMP45]], i8* bitcast (void (%struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6*, i32)* @.omp_task_dup. to i8*)) 470 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 471 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 472 // CHECK1-NEXT: br label [[OMP_IF_END]] 473 // CHECK1: omp_if.end: 474 // CHECK1-NEXT: ret void 475 // 476 // 477 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_privates_map. 478 // CHECK1-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i32** noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 479 // CHECK1-NEXT: entry: 480 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 481 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 482 // CHECK1-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 483 // CHECK1-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 484 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 485 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 486 // CHECK1-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 487 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 488 // CHECK1-NEXT: ret void 489 // 490 // 491 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..7 492 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 493 // CHECK1-NEXT: entry: 494 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 495 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 496 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 497 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 498 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 499 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 500 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 501 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 502 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 503 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 504 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.5*, align 8 505 // CHECK1-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 506 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 507 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 508 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 509 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 510 // CHECK1-NEXT: [[I_I:%.*]] = alloca i32, align 4 511 // CHECK1-NEXT: [[J_I:%.*]] = alloca i32, align 4 512 // CHECK1-NEXT: [[I14_I:%.*]] = alloca i32, align 4 513 // CHECK1-NEXT: [[J15_I:%.*]] = alloca i32, align 4 514 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 515 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 517 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 518 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 519 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 520 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 521 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 522 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 523 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 524 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 525 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.5* 526 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 527 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 528 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.6* [[TMP3]] to i8* 529 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 530 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 531 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 532 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 533 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 534 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 535 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 536 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 537 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 538 // CHECK1-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 539 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 540 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 541 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 542 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 543 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 544 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 545 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 546 // CHECK1-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 547 // CHECK1-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 548 // CHECK1-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 549 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 550 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 551 // CHECK1-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 552 // CHECK1-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 553 // CHECK1-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 554 // CHECK1-NEXT: store %struct.anon.5* [[TMP8]], %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 555 // CHECK1-NEXT: [[TMP22:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 556 // CHECK1-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 557 // CHECK1-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 558 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 559 // CHECK1-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 560 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP22]], i32 0, i32 0 561 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 562 // CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 563 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 564 // CHECK1-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 565 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 566 // CHECK1-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 567 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 568 // CHECK1-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 569 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 570 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 571 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 572 // CHECK1-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 573 // CHECK1-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 574 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 575 // CHECK1-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 576 // CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 577 // CHECK1-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 578 // CHECK1-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 579 // CHECK1-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 580 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 581 // CHECK1-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 582 // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 583 // CHECK1-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 584 // CHECK1-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 585 // CHECK1-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 586 // CHECK1-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 587 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 588 // CHECK1-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 589 // CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 590 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 591 // CHECK1-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 592 // CHECK1-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 593 // CHECK1-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 594 // CHECK1-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 595 // CHECK1-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 596 // CHECK1-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 597 // CHECK1-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 598 // CHECK1-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 599 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 600 // CHECK1-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 601 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 602 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 603 // CHECK1-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 604 // CHECK1: land.lhs.true.i: 605 // CHECK1-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 606 // CHECK1-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 607 // CHECK1-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 608 // CHECK1-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 609 // CHECK1: taskloop.if.then.i: 610 // CHECK1-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 611 // CHECK1-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 612 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 613 // CHECK1-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 614 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 615 // CHECK1-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 616 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 617 // CHECK1: omp.inner.for.cond.i: 618 // CHECK1-NEXT: [[TMP58:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 619 // CHECK1-NEXT: [[TMP59:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 620 // CHECK1-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP58]], [[TMP59]] 621 // CHECK1-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 622 // CHECK1: omp.inner.for.body.i: 623 // CHECK1-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 624 // CHECK1-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 625 // CHECK1-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 626 // CHECK1-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP61]], [[TMP62]] 627 // CHECK1-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 628 // CHECK1-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 629 // CHECK1-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP60]], [[CONV22_I]] 630 // CHECK1-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 631 // CHECK1-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 632 // CHECK1-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 633 // CHECK1-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP63]] to i64 634 // CHECK1-NEXT: [[TMP64:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 635 // CHECK1-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 636 // CHECK1-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 637 // CHECK1-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 638 // CHECK1-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP66]], [[TMP67]] 639 // CHECK1-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 640 // CHECK1-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 641 // CHECK1-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP65]], [[CONV33_I]] 642 // CHECK1-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 643 // CHECK1-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 644 // CHECK1-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 645 // CHECK1-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 646 // CHECK1-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 647 // CHECK1-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 648 // CHECK1-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP64]], [[MUL41_I]] 649 // CHECK1-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 650 // CHECK1-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 651 // CHECK1-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 652 // CHECK1-NEXT: [[TMP70:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 653 // CHECK1-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP70]], 1 654 // CHECK1-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 655 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 656 // CHECK1: omp.inner.for.end.i: 657 // CHECK1-NEXT: br label [[TASKLOOP_IF_END_I]] 658 // CHECK1: taskloop.if.end.i: 659 // CHECK1-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 660 // CHECK1-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 661 // CHECK1-NEXT: br i1 [[TMP72]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 662 // CHECK1: .omp.lastprivate.then.i: 663 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 664 // CHECK1: .omp_outlined..6.exit: 665 // CHECK1-NEXT: ret i32 0 666 // 667 // 668 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_dup. 669 // CHECK1-SAME: (%struct.kmp_task_t_with_privates.6* noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR4]] { 670 // CHECK1-NEXT: entry: 671 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 672 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 673 // CHECK1-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 674 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP0]], %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 675 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 676 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 677 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 678 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 679 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 680 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 681 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 682 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 683 // CHECK1-NEXT: ret void 684 // 685 // 686 // CHECK1-LABEL: define {{[^@]+}}@__cxx_global_var_init 687 // CHECK1-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 688 // CHECK1-NEXT: entry: 689 // CHECK1-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 690 // CHECK1-NEXT: ret void 691 // 692 // 693 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1Ei 694 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 695 // CHECK1-NEXT: entry: 696 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 697 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 698 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 699 // CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 700 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 701 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 702 // CHECK1-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 703 // CHECK1-NEXT: ret void 704 // 705 // 706 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2Ei 707 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 708 // CHECK1-NEXT: entry: 709 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 710 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 711 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 712 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 713 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 714 // CHECK1-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 715 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 716 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 717 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 718 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 719 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 720 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 721 // CHECK1-NEXT: store %struct.S* [[THIS1]], %struct.S** [[TMP1]], align 8 722 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 723 // CHECK1-NEXT: store i32* [[C_ADDR]], i32** [[TMP2]], align 8 724 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 725 // CHECK1-NEXT: [[TMP4:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 726 // CHECK1-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP4]] to i1 727 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 728 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[TMP3]], align 8 729 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 730 // CHECK1-NEXT: ret void 731 // 732 // 733 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8 734 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 735 // CHECK1-NEXT: entry: 736 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 737 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 738 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 739 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 740 // CHECK1-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_8:%.*]], align 8 741 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 742 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 743 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 744 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 745 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 746 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 747 // CHECK1-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 748 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 749 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 750 // CHECK1-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[TMP1]], align 8 751 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 752 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 753 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 754 // CHECK1-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 8 755 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1 756 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 757 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 758 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 759 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 760 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 761 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 762 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 763 // CHECK1: omp_if.then: 764 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[AGG_CAPTURED]], i32 0, i32 0 765 // CHECK1-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP11]], align 8 766 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[AGG_CAPTURED]], i32 0, i32 1 767 // CHECK1-NEXT: store i32* [[TMP4]], i32** [[TMP12]], align 8 768 // CHECK1-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 769 // CHECK1-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 770 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP13]] to i1 771 // CHECK1-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 772 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP4]], align 4 773 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_3]], align 4 774 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 775 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP15]], 0 776 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 777 // CHECK1-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 778 // CHECK1-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 779 // CHECK1-NEXT: [[TMP16:%.*]] = select i1 [[TOBOOL1]], i32 2, i32 0 780 // CHECK1-NEXT: [[TMP17:%.*]] = or i32 [[TMP16]], 1 781 // CHECK1-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 [[TMP17]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.9*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 782 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to %struct.kmp_task_t_with_privates.9* 783 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_9:%.*]], %struct.kmp_task_t_with_privates.9* [[TMP19]], i32 0, i32 0 784 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 0 785 // CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 786 // CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.anon.8* [[AGG_CAPTURED]] to i8* 787 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP22]], i8* align 8 [[TMP23]], i64 16, i1 false) 788 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 5 789 // CHECK1-NEXT: store i64 0, i64* [[TMP24]], align 8 790 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 6 791 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 792 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[TMP26]] to i64 793 // CHECK1-NEXT: store i64 [[CONV]], i64* [[TMP25]], align 8 794 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 7 795 // CHECK1-NEXT: store i64 1, i64* [[TMP27]], align 8 796 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 9 797 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i8* 798 // CHECK1-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP29]], i8 0, i64 8, i1 false) 799 // CHECK1-NEXT: [[TMP30:%.*]] = load i64, i64* [[TMP27]], align 8 800 // CHECK1-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i8* [[TMP18]], i32 1, i64* [[TMP24]], i64* [[TMP25]], i64 [[TMP30]], i32 1, i32 2, i64 4, i8* null) 801 // CHECK1-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 802 // CHECK1-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 803 // CHECK1-NEXT: br label [[OMP_IF_END]] 804 // CHECK1: omp_if.end: 805 // CHECK1-NEXT: ret void 806 // 807 // 808 // CHECK1-LABEL: define {{[^@]+}}@.omp_task_entry..10 809 // CHECK1-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.9* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 810 // CHECK1-NEXT: entry: 811 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 812 // CHECK1-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 813 // CHECK1-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 814 // CHECK1-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 815 // CHECK1-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 816 // CHECK1-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 817 // CHECK1-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 818 // CHECK1-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 819 // CHECK1-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 820 // CHECK1-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 821 // CHECK1-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.8*, align 8 822 // CHECK1-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 823 // CHECK1-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 824 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 825 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 826 // CHECK1-NEXT: [[A_I:%.*]] = alloca i32, align 4 827 // CHECK1-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 828 // CHECK1-NEXT: [[A5_I:%.*]] = alloca i32, align 4 829 // CHECK1-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 830 // CHECK1-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 831 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 832 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.9*, align 8 833 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 834 // CHECK1-NEXT: store %struct.kmp_task_t_with_privates.9* [[TMP1]], %struct.kmp_task_t_with_privates.9** [[DOTADDR1]], align 8 835 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 836 // CHECK1-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.9*, %struct.kmp_task_t_with_privates.9** [[DOTADDR1]], align 8 837 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_9:%.*]], %struct.kmp_task_t_with_privates.9* [[TMP3]], i32 0, i32 0 838 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 839 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 840 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 841 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.8* 842 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.9* [[TMP3]] to i8* 843 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 844 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 845 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 846 // CHECK1-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 847 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 848 // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 849 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 850 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 851 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 852 // CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 853 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]]) 854 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]]) 855 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 856 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 857 // CHECK1-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 858 // CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !62 859 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !62 860 // CHECK1-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !62 861 // CHECK1-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !62 862 // CHECK1-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62 863 // CHECK1-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 864 // CHECK1-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !62 865 // CHECK1-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !62 866 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !62 867 // CHECK1-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !62 868 // CHECK1-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 869 // CHECK1-NEXT: [[TMP20:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 870 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_8:%.*]], %struct.anon.8* [[TMP20]], i32 0, i32 0 871 // CHECK1-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 872 // CHECK1-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !62 873 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[TMP20]], i32 0, i32 1 874 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 875 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 876 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 877 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 878 // CHECK1-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 879 // CHECK1-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !62 880 // CHECK1-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !62 881 // CHECK1-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !62 882 // CHECK1-NEXT: store i32 0, i32* [[TMP27]], align 4 883 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 884 // CHECK1-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 885 // CHECK1-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 886 // CHECK1: taskloop.if.then.i: 887 // CHECK1-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !62 888 // CHECK1-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 889 // CHECK1-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 890 // CHECK1-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62 891 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[TMP20]], i32 0, i32 1 892 // CHECK1-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 893 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 894 // CHECK1: omp.inner.for.cond.i: 895 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 896 // CHECK1-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 897 // CHECK1-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !62, !llvm.access.group !63 898 // CHECK1-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 899 // CHECK1-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 900 // CHECK1: omp.inner.for.body.i: 901 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 902 // CHECK1-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !62, !llvm.access.group !63 903 // CHECK1-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !63 904 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 905 // CHECK1-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 906 // CHECK1-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 907 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP64:![0-9]+]] 908 // CHECK1: omp.inner.for.end.i: 909 // CHECK1-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 910 // CHECK1: .omp_outlined..9.exit: 911 // CHECK1-NEXT: ret i32 0 912 // 913 // 914 // CHECK1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 915 // CHECK1-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 916 // CHECK1-NEXT: entry: 917 // CHECK1-NEXT: call void @__cxx_global_var_init() 918 // CHECK1-NEXT: ret void 919 // 920 // 921 // CHECK2-LABEL: define {{[^@]+}}@main 922 // CHECK2-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 923 // CHECK2-NEXT: entry: 924 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 925 // CHECK2-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 926 // CHECK2-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 927 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 928 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 929 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 930 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_2:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 931 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 932 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i8, align 1 933 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 934 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_5:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 935 // CHECK2-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 936 // CHECK2-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 937 // CHECK2-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 938 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 939 // CHECK2-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 940 // CHECK2-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 941 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 942 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 943 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 944 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 945 // CHECK2-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 4 946 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 947 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 948 // CHECK2-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 949 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]], i32 0, i32 0 950 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 951 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 952 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]]) 953 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 954 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 955 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 956 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_3]], align 1 957 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 958 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_4]], align 4 959 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 0 960 // CHECK2-NEXT: store i32* [[I]], i32** [[TMP9]], align 8 961 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 1 962 // CHECK2-NEXT: store i32* [[ARGC_ADDR]], i32** [[TMP10]], align 8 963 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 2 964 // CHECK2-NEXT: store i8*** [[ARGV_ADDR]], i8**** [[TMP11]], align 8 965 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 3 966 // CHECK2-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 967 // CHECK2-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP13]] to i1 968 // CHECK2-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[TOBOOL6]] to i8 969 // CHECK2-NEXT: store i8 [[FROMBOOL7]], i8* [[TMP12]], align 8 970 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 4 971 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 972 // CHECK2-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4 973 // CHECK2-NEXT: [[TMP16:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 974 // CHECK2-NEXT: [[TOBOOL8:%.*]] = trunc i8 [[TMP16]] to i1 975 // CHECK2-NEXT: br i1 [[TOBOOL8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 976 // CHECK2: omp_if.then: 977 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) 978 // CHECK2-NEXT: br label [[OMP_IF_END:%.*]] 979 // CHECK2: omp_if.else: 980 // CHECK2-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 981 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 982 // CHECK2-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 983 // CHECK2-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) #[[ATTR2:[0-9]+]] 984 // CHECK2-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 985 // CHECK2-NEXT: br label [[OMP_IF_END]] 986 // CHECK2: omp_if.end: 987 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 988 // CHECK2-NEXT: ret i32 [[TMP17]] 989 // 990 // 991 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 992 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 993 // CHECK2-NEXT: entry: 994 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 995 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 996 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 997 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 998 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 999 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1000 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1001 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1002 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1003 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1004 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1005 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1006 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1007 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1008 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1009 // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1010 // CHECK2-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 1011 // CHECK2-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1012 // CHECK2: omp_if.then: 1013 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1014 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1015 // CHECK2-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 1016 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates* 1017 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP9]], i32 0, i32 0 1018 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 4 1019 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP11]] to i32* 1020 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[TMP12]], align 8 1021 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 1022 // CHECK2-NEXT: store i64 0, i64* [[TMP13]], align 8 1023 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 1024 // CHECK2-NEXT: store i64 9, i64* [[TMP14]], align 8 1025 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 1026 // CHECK2-NEXT: store i64 1, i64* [[TMP15]], align 8 1027 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 1028 // CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i8* 1029 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP17]], i8 0, i64 8, i1 false) 1030 // CHECK2-NEXT: [[TMP18:%.*]] = load i64, i64* [[TMP15]], align 8 1031 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP13]], i64* [[TMP14]], i64 [[TMP18]], i32 1, i32 0, i64 0, i8* null) 1032 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1033 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1034 // CHECK2-NEXT: br label [[OMP_IF_END]] 1035 // CHECK2: omp_if.end: 1036 // CHECK2-NEXT: ret void 1037 // 1038 // 1039 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry. 1040 // CHECK2-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1041 // CHECK2-NEXT: entry: 1042 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1043 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1044 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1045 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1046 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1047 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1048 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1049 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1050 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1051 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1052 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 1053 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1054 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1055 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1056 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 1057 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1058 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1059 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1060 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1061 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 1062 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1063 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1064 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1065 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 1066 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 1067 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1068 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1069 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1070 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1071 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1072 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1073 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1074 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1075 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1076 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1077 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 1078 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 1079 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 1080 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 1081 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 1082 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 1083 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 1084 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 1085 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 1086 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 1087 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1088 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1089 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 1090 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 1091 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 1092 // CHECK2-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1093 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1094 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1095 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1096 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1097 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1098 // CHECK2: omp.inner.for.cond.i: 1099 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1100 // CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1101 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1102 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1103 // CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 1104 // CHECK2: omp.inner.for.body.i: 1105 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1106 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 1107 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1108 // CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1109 // CHECK2-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1110 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 1111 // CHECK2: .omp_outlined..1.exit: 1112 // CHECK2-NEXT: ret i32 0 1113 // 1114 // 1115 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1116 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 1117 // CHECK2-NEXT: entry: 1118 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1119 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1120 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 1121 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1122 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 1 1123 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1124 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1125 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1126 // CHECK2-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1127 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1128 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1129 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1130 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1131 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1132 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1133 // CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1134 // CHECK2-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 1135 // CHECK2-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1136 // CHECK2: omp_if.then: 1137 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1138 // CHECK2-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 1139 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates.3* 1140 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP9]], i32 0, i32 0 1141 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 1142 // CHECK2-NEXT: store i64 0, i64* [[TMP11]], align 8 1143 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 1144 // CHECK2-NEXT: store i64 9, i64* [[TMP12]], align 8 1145 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 1146 // CHECK2-NEXT: store i64 1, i64* [[TMP13]], align 8 1147 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 1148 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i8* 1149 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP15]], i8 0, i64 8, i1 false) 1150 // CHECK2-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP13]], align 8 1151 // CHECK2-NEXT: [[TMP17:%.*]] = zext i32 [[TMP7]] to i64 1152 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP11]], i64* [[TMP12]], i64 [[TMP16]], i32 1, i32 1, i64 [[TMP17]], i8* null) 1153 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1154 // CHECK2-NEXT: br label [[OMP_IF_END]] 1155 // CHECK2: omp_if.end: 1156 // CHECK2-NEXT: ret void 1157 // 1158 // 1159 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..4 1160 // CHECK2-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 1161 // CHECK2-NEXT: entry: 1162 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1163 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1164 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1165 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1166 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1167 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1168 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1169 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1170 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1171 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1172 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 1173 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1174 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1175 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1176 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 1177 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1178 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 1179 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1180 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 1181 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 1182 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1183 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1184 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1185 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 1186 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 1187 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1188 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1189 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1190 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1191 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1192 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1193 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1194 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1195 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1196 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1197 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 1198 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 1199 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 1200 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 1201 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 1202 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 1203 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 1204 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 1205 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 1206 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 1207 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 1208 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 1209 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 1210 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 1211 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 1212 // CHECK2-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 1213 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 1214 // CHECK2-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 1215 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1216 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 1217 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1218 // CHECK2: omp.inner.for.cond.i: 1219 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1220 // CHECK2-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1221 // CHECK2-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 1222 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1223 // CHECK2-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 1224 // CHECK2: omp.inner.for.body.i: 1225 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1226 // CHECK2-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 1227 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1228 // CHECK2-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1229 // CHECK2-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 1230 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 1231 // CHECK2: .omp_outlined..3.exit: 1232 // CHECK2-NEXT: ret i32 0 1233 // 1234 // 1235 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..5 1236 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 1237 // CHECK2-NEXT: entry: 1238 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1239 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1240 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 1241 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1242 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1243 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 1244 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1245 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32, align 4 1246 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1247 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1248 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 1249 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_8:%.*]] = alloca i64, align 8 1250 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1251 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1252 // CHECK2-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 1253 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 1254 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 1255 // CHECK2-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 1256 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 1257 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 1258 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 1259 // CHECK2-NEXT: [[TMP6:%.*]] = load i8***, i8**** [[TMP5]], align 8 1260 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 1261 // CHECK2-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP7]], align 8 1262 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 1263 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1264 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1265 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 1266 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 1267 // CHECK2-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1268 // CHECK2-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1269 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1270 // CHECK2-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1271 // CHECK2-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 1272 // CHECK2-NEXT: br i1 [[TMP14]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1273 // CHECK2: omp_if.then: 1274 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 0 1275 // CHECK2-NEXT: store i32* [[TMP2]], i32** [[TMP15]], align 8 1276 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 1 1277 // CHECK2-NEXT: store i32* [[TMP4]], i32** [[TMP16]], align 8 1278 // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 2 1279 // CHECK2-NEXT: store i8*** [[TMP6]], i8**** [[TMP17]], align 8 1280 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1281 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1282 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP4]], align 4 1283 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1284 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP4]], align 4 1285 // CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1286 // CHECK2-NEXT: [[TMP21:%.*]] = load i8**, i8*** [[TMP6]], align 8 1287 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP4]], align 4 1288 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64 1289 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP21]], i64 [[IDXPROM]] 1290 // CHECK2-NEXT: [[TMP23:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 1291 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP4]], align 4 1292 // CHECK2-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP24]] to i64 1293 // CHECK2-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 [[IDXPROM6]] 1294 // CHECK2-NEXT: [[TMP25:%.*]] = load i8, i8* [[ARRAYIDX7]], align 1 1295 // CHECK2-NEXT: [[CONV:%.*]] = sext i8 [[TMP25]] to i32 1296 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTCAPTURE_EXPR_5]], align 4 1297 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1298 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP26]], 0 1299 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1300 // CHECK2-NEXT: [[CONV9:%.*]] = sext i32 [[DIV]] to i64 1301 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 1302 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1303 // CHECK2-NEXT: [[SUB10:%.*]] = sub i32 [[TMP27]], [[TMP28]] 1304 // CHECK2-NEXT: [[SUB11:%.*]] = sub i32 [[SUB10]], 1 1305 // CHECK2-NEXT: [[ADD:%.*]] = add i32 [[SUB11]], 1 1306 // CHECK2-NEXT: [[DIV12:%.*]] = udiv i32 [[ADD]], 1 1307 // CHECK2-NEXT: [[CONV13:%.*]] = zext i32 [[DIV12]] to i64 1308 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV9]], [[CONV13]] 1309 // CHECK2-NEXT: [[SUB14:%.*]] = sub nsw i64 [[MUL]], 1 1310 // CHECK2-NEXT: store i64 [[SUB14]], i64* [[DOTCAPTURE_EXPR_8]], align 8 1311 // CHECK2-NEXT: [[TMP29:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 1, i64 88, i64 24, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.6*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 1312 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to %struct.kmp_task_t_with_privates.6* 1313 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP30]], i32 0, i32 0 1314 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 0 1315 // CHECK2-NEXT: [[TMP33:%.*]] = load i8*, i8** [[TMP32]], align 8 1316 // CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.anon.5* [[AGG_CAPTURED]] to i8* 1317 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP33]], i8* align 8 [[TMP34]], i64 24, i1 false) 1318 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP30]], i32 0, i32 1 1319 // CHECK2-NEXT: [[TMP36:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1320 // CHECK2-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP36]] to i1 1321 // CHECK2-NEXT: [[TMP37:%.*]] = sext i1 [[TOBOOL15]] to i32 1322 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 5 1323 // CHECK2-NEXT: store i64 0, i64* [[TMP38]], align 8 1324 // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 6 1325 // CHECK2-NEXT: [[TMP40:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_8]], align 8 1326 // CHECK2-NEXT: store i64 [[TMP40]], i64* [[TMP39]], align 8 1327 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 7 1328 // CHECK2-NEXT: store i64 1, i64* [[TMP41]], align 8 1329 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP31]], i32 0, i32 9 1330 // CHECK2-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i8* 1331 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP43]], i8 0, i64 8, i1 false) 1332 // CHECK2-NEXT: [[TMP44:%.*]] = load i64, i64* [[TMP41]], align 8 1333 // CHECK2-NEXT: [[TMP45:%.*]] = zext i32 [[TMP18]] to i64 1334 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i8* [[TMP29]], i32 [[TMP37]], i64* [[TMP38]], i64* [[TMP39]], i64 [[TMP44]], i32 1, i32 2, i64 [[TMP45]], i8* bitcast (void (%struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6*, i32)* @.omp_task_dup. to i8*)) 1335 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1336 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 1337 // CHECK2-NEXT: br label [[OMP_IF_END]] 1338 // CHECK2: omp_if.end: 1339 // CHECK2-NEXT: ret void 1340 // 1341 // 1342 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_privates_map. 1343 // CHECK2-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i32** noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 1344 // CHECK2-NEXT: entry: 1345 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 1346 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 1347 // CHECK2-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 1348 // CHECK2-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 1349 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 1350 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 1351 // CHECK2-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 1352 // CHECK2-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 1353 // CHECK2-NEXT: ret void 1354 // 1355 // 1356 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..7 1357 // CHECK2-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 1358 // CHECK2-NEXT: entry: 1359 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1360 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1361 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1362 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1363 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1364 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1365 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1366 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1367 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1368 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1369 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.5*, align 8 1370 // CHECK2-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 1371 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 1372 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 1373 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 1374 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 1375 // CHECK2-NEXT: [[I_I:%.*]] = alloca i32, align 4 1376 // CHECK2-NEXT: [[J_I:%.*]] = alloca i32, align 4 1377 // CHECK2-NEXT: [[I14_I:%.*]] = alloca i32, align 4 1378 // CHECK2-NEXT: [[J15_I:%.*]] = alloca i32, align 4 1379 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 1380 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1381 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 1382 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1383 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 1384 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1385 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 1386 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 1387 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1388 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1389 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1390 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.5* 1391 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 1392 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 1393 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.6* [[TMP3]] to i8* 1394 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1395 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1396 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1397 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1398 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1399 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 1400 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1401 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 1402 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1403 // CHECK2-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 1404 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 1405 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 1406 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 1407 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 1408 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 1409 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 1410 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 1411 // CHECK2-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 1412 // CHECK2-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 1413 // CHECK2-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 1414 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 1415 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 1416 // CHECK2-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 1417 // CHECK2-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 1418 // CHECK2-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 1419 // CHECK2-NEXT: store %struct.anon.5* [[TMP8]], %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 1420 // CHECK2-NEXT: [[TMP22:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 1421 // CHECK2-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 1422 // CHECK2-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 1423 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 1424 // CHECK2-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 1425 // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP22]], i32 0, i32 0 1426 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 1427 // CHECK2-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 1428 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 1429 // CHECK2-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 1430 // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 1431 // CHECK2-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1432 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 1433 // CHECK2-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 1434 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 1435 // CHECK2-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1436 // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 1437 // CHECK2-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 1438 // CHECK2-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 1439 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 1440 // CHECK2-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 1441 // CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 1442 // CHECK2-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 1443 // CHECK2-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 1444 // CHECK2-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 1445 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 1446 // CHECK2-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 1447 // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 1448 // CHECK2-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 1449 // CHECK2-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 1450 // CHECK2-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 1451 // CHECK2-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 1452 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1453 // CHECK2-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1454 // CHECK2-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 1455 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1456 // CHECK2-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1457 // CHECK2-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 1458 // CHECK2-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 1459 // CHECK2-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 1460 // CHECK2-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 1461 // CHECK2-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 1462 // CHECK2-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 1463 // CHECK2-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 1464 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1465 // CHECK2-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 1466 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 1467 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 1468 // CHECK2-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 1469 // CHECK2: land.lhs.true.i: 1470 // CHECK2-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 1471 // CHECK2-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 1472 // CHECK2-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 1473 // CHECK2-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 1474 // CHECK2: taskloop.if.then.i: 1475 // CHECK2-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 1476 // CHECK2-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 1477 // CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 1478 // CHECK2-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 1479 // CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 1480 // CHECK2-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 1481 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1482 // CHECK2: omp.inner.for.cond.i: 1483 // CHECK2-NEXT: [[TMP58:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1484 // CHECK2-NEXT: [[TMP59:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 1485 // CHECK2-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP58]], [[TMP59]] 1486 // CHECK2-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 1487 // CHECK2: omp.inner.for.body.i: 1488 // CHECK2-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1489 // CHECK2-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1490 // CHECK2-NEXT: [[TMP62:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1491 // CHECK2-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP61]], [[TMP62]] 1492 // CHECK2-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 1493 // CHECK2-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 1494 // CHECK2-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP60]], [[CONV22_I]] 1495 // CHECK2-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 1496 // CHECK2-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 1497 // CHECK2-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1498 // CHECK2-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP63]] to i64 1499 // CHECK2-NEXT: [[TMP64:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1500 // CHECK2-NEXT: [[TMP65:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1501 // CHECK2-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1502 // CHECK2-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1503 // CHECK2-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP66]], [[TMP67]] 1504 // CHECK2-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 1505 // CHECK2-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 1506 // CHECK2-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP65]], [[CONV33_I]] 1507 // CHECK2-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 1508 // CHECK2-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 1509 // CHECK2-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 1510 // CHECK2-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 1511 // CHECK2-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 1512 // CHECK2-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 1513 // CHECK2-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP64]], [[MUL41_I]] 1514 // CHECK2-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 1515 // CHECK2-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 1516 // CHECK2-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 1517 // CHECK2-NEXT: [[TMP70:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1518 // CHECK2-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP70]], 1 1519 // CHECK2-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 1520 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 1521 // CHECK2: omp.inner.for.end.i: 1522 // CHECK2-NEXT: br label [[TASKLOOP_IF_END_I]] 1523 // CHECK2: taskloop.if.end.i: 1524 // CHECK2-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 1525 // CHECK2-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0 1526 // CHECK2-NEXT: br i1 [[TMP72]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 1527 // CHECK2: .omp.lastprivate.then.i: 1528 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 1529 // CHECK2: .omp_outlined..6.exit: 1530 // CHECK2-NEXT: ret i32 0 1531 // 1532 // 1533 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_dup. 1534 // CHECK2-SAME: (%struct.kmp_task_t_with_privates.6* noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR4]] { 1535 // CHECK2-NEXT: entry: 1536 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 1537 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 1538 // CHECK2-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 1539 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP0]], %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 1540 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 1541 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 1542 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 1543 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 1544 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1545 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 1546 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 1547 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 1548 // CHECK2-NEXT: ret void 1549 // 1550 // 1551 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC2Ei 1552 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 1553 // CHECK2-NEXT: entry: 1554 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1555 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 1556 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1557 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 1558 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1559 // CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 1560 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1561 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 1562 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 1563 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1564 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1565 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1566 // CHECK2-NEXT: store %struct.S* [[THIS1]], %struct.S** [[TMP1]], align 8 1567 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 1568 // CHECK2-NEXT: store i32* [[C_ADDR]], i32** [[TMP2]], align 8 1569 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 1570 // CHECK2-NEXT: [[TMP4:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1571 // CHECK2-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP4]] to i1 1572 // CHECK2-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 1573 // CHECK2-NEXT: store i8 [[FROMBOOL3]], i8* [[TMP3]], align 8 1574 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 1575 // CHECK2-NEXT: ret void 1576 // 1577 // 1578 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..8 1579 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 1580 // CHECK2-NEXT: entry: 1581 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1582 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1583 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 1584 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 1585 // CHECK2-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_8:%.*]], align 8 1586 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1587 // CHECK2-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 1588 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 1589 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1590 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1591 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1592 // CHECK2-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 1593 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 1594 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 1595 // CHECK2-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[TMP1]], align 8 1596 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 1597 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 1598 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 1599 // CHECK2-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 8 1600 // CHECK2-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1 1601 // CHECK2-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1602 // CHECK2-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 1603 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1604 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 1605 // CHECK2-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 1606 // CHECK2-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1607 // CHECK2-NEXT: br i1 [[TMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1608 // CHECK2: omp_if.then: 1609 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[AGG_CAPTURED]], i32 0, i32 0 1610 // CHECK2-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP11]], align 8 1611 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[AGG_CAPTURED]], i32 0, i32 1 1612 // CHECK2-NEXT: store i32* [[TMP4]], i32** [[TMP12]], align 8 1613 // CHECK2-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 1614 // CHECK2-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 1615 // CHECK2-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP13]] to i1 1616 // CHECK2-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 1617 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP4]], align 4 1618 // CHECK2-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_3]], align 4 1619 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 1620 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP15]], 0 1621 // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 1622 // CHECK2-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 1623 // CHECK2-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1624 // CHECK2-NEXT: [[TMP16:%.*]] = select i1 [[TOBOOL1]], i32 2, i32 0 1625 // CHECK2-NEXT: [[TMP17:%.*]] = or i32 [[TMP16]], 1 1626 // CHECK2-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 [[TMP17]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.9*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 1627 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to %struct.kmp_task_t_with_privates.9* 1628 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_9:%.*]], %struct.kmp_task_t_with_privates.9* [[TMP19]], i32 0, i32 0 1629 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 0 1630 // CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 1631 // CHECK2-NEXT: [[TMP23:%.*]] = bitcast %struct.anon.8* [[AGG_CAPTURED]] to i8* 1632 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP22]], i8* align 8 [[TMP23]], i64 16, i1 false) 1633 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 5 1634 // CHECK2-NEXT: store i64 0, i64* [[TMP24]], align 8 1635 // CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 6 1636 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1637 // CHECK2-NEXT: [[CONV:%.*]] = sext i32 [[TMP26]] to i64 1638 // CHECK2-NEXT: store i64 [[CONV]], i64* [[TMP25]], align 8 1639 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 7 1640 // CHECK2-NEXT: store i64 1, i64* [[TMP27]], align 8 1641 // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 9 1642 // CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i8* 1643 // CHECK2-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP29]], i8 0, i64 8, i1 false) 1644 // CHECK2-NEXT: [[TMP30:%.*]] = load i64, i64* [[TMP27]], align 8 1645 // CHECK2-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i8* [[TMP18]], i32 1, i64* [[TMP24]], i64* [[TMP25]], i64 [[TMP30]], i32 1, i32 2, i64 4, i8* null) 1646 // CHECK2-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 1647 // CHECK2-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 1648 // CHECK2-NEXT: br label [[OMP_IF_END]] 1649 // CHECK2: omp_if.end: 1650 // CHECK2-NEXT: ret void 1651 // 1652 // 1653 // CHECK2-LABEL: define {{[^@]+}}@.omp_task_entry..10 1654 // CHECK2-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.9* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 1655 // CHECK2-NEXT: entry: 1656 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1657 // CHECK2-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1658 // CHECK2-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1659 // CHECK2-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1660 // CHECK2-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1661 // CHECK2-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1662 // CHECK2-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1663 // CHECK2-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1664 // CHECK2-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1665 // CHECK2-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1666 // CHECK2-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.8*, align 8 1667 // CHECK2-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 1668 // CHECK2-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 1669 // CHECK2-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 1670 // CHECK2-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 1671 // CHECK2-NEXT: [[A_I:%.*]] = alloca i32, align 4 1672 // CHECK2-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 1673 // CHECK2-NEXT: [[A5_I:%.*]] = alloca i32, align 4 1674 // CHECK2-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 1675 // CHECK2-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1676 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1677 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.9*, align 8 1678 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1679 // CHECK2-NEXT: store %struct.kmp_task_t_with_privates.9* [[TMP1]], %struct.kmp_task_t_with_privates.9** [[DOTADDR1]], align 8 1680 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1681 // CHECK2-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.9*, %struct.kmp_task_t_with_privates.9** [[DOTADDR1]], align 8 1682 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_9:%.*]], %struct.kmp_task_t_with_privates.9* [[TMP3]], i32 0, i32 0 1683 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1684 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1685 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1686 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.8* 1687 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.9* [[TMP3]] to i8* 1688 // CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1689 // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1690 // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1691 // CHECK2-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1692 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1693 // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1694 // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1695 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1696 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1697 // CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1698 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META51:![0-9]+]]) 1699 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META54:![0-9]+]]) 1700 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 1701 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 1702 // CHECK2-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 1703 // CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !62 1704 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !62 1705 // CHECK2-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !62 1706 // CHECK2-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !62 1707 // CHECK2-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !62 1708 // CHECK2-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 1709 // CHECK2-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !62 1710 // CHECK2-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !62 1711 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !62 1712 // CHECK2-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !62 1713 // CHECK2-NEXT: store %struct.anon.8* [[TMP8]], %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 1714 // CHECK2-NEXT: [[TMP20:%.*]] = load %struct.anon.8*, %struct.anon.8** [[__CONTEXT_ADDR_I]], align 8, !noalias !62 1715 // CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_8:%.*]], %struct.anon.8* [[TMP20]], i32 0, i32 0 1716 // CHECK2-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 1717 // CHECK2-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !62 1718 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[TMP20]], i32 0, i32 1 1719 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 1720 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 1721 // CHECK2-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1722 // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1723 // CHECK2-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 1724 // CHECK2-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !62 1725 // CHECK2-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !62 1726 // CHECK2-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !62 1727 // CHECK2-NEXT: store i32 0, i32* [[TMP27]], align 4 1728 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !62 1729 // CHECK2-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 1730 // CHECK2-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 1731 // CHECK2: taskloop.if.then.i: 1732 // CHECK2-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !62 1733 // CHECK2-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !62 1734 // CHECK2-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 1735 // CHECK2-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62 1736 // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_8]], %struct.anon.8* [[TMP20]], i32 0, i32 1 1737 // CHECK2-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 1738 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1739 // CHECK2: omp.inner.for.cond.i: 1740 // CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1741 // CHECK2-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 1742 // CHECK2-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !62, !llvm.access.group !63 1743 // CHECK2-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 1744 // CHECK2-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 1745 // CHECK2: omp.inner.for.body.i: 1746 // CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1747 // CHECK2-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !62, !llvm.access.group !63 1748 // CHECK2-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !63 1749 // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1750 // CHECK2-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 1751 // CHECK2-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !62, !llvm.access.group !63 1752 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP64:![0-9]+]] 1753 // CHECK2: omp.inner.for.end.i: 1754 // CHECK2-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 1755 // CHECK2: .omp_outlined..9.exit: 1756 // CHECK2-NEXT: ret i32 0 1757 // 1758 // 1759 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SC1Ei 1760 // CHECK2-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 1761 // CHECK2-NEXT: entry: 1762 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 1763 // CHECK2-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 1764 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 1765 // CHECK2-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 1766 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 1767 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 1768 // CHECK2-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 1769 // CHECK2-NEXT: ret void 1770 // 1771 // 1772 // CHECK2-LABEL: define {{[^@]+}}@__cxx_global_var_init 1773 // CHECK2-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 1774 // CHECK2-NEXT: entry: 1775 // CHECK2-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 1776 // CHECK2-NEXT: ret void 1777 // 1778 // 1779 // CHECK2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 1780 // CHECK2-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 1781 // CHECK2-NEXT: entry: 1782 // CHECK2-NEXT: call void @__cxx_global_var_init() 1783 // CHECK2-NEXT: ret void 1784 // 1785 // 1786 // CHECK3-LABEL: define {{[^@]+}}@main 1787 // CHECK3-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 1788 // CHECK3-NEXT: entry: 1789 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1790 // CHECK3-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 1791 // CHECK3-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 1792 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1793 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 4 1794 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 1795 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_2:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 4 1796 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1797 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i8, align 1 1798 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 1799 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_5:%.*]] = alloca [[STRUCT_ANON_4:%.*]], align 8 1800 // CHECK3-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 1801 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4 1802 // CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]]) 1803 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1804 // CHECK3-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 1805 // CHECK3-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 1806 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1807 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 1808 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 1809 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1810 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[TMP2]], align 4 1811 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 1812 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1813 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_1]], align 4 1814 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]], i32 0, i32 0 1815 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 1816 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 4 1817 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_2]]) 1818 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1819 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1820 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 1821 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_3]], align 1 1822 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 1823 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTCAPTURE_EXPR_4]], align 4 1824 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 0 1825 // CHECK3-NEXT: store i32* [[I]], i32** [[TMP9]], align 8 1826 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 1 1827 // CHECK3-NEXT: store i32* [[ARGC_ADDR]], i32** [[TMP10]], align 8 1828 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 2 1829 // CHECK3-NEXT: store i8*** [[ARGV_ADDR]], i8**** [[TMP11]], align 8 1830 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 3 1831 // CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 1832 // CHECK3-NEXT: [[TOBOOL6:%.*]] = trunc i8 [[TMP13]] to i1 1833 // CHECK3-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[TOBOOL6]] to i8 1834 // CHECK3-NEXT: store i8 [[FROMBOOL7]], i8* [[TMP12]], align 8 1835 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]], i32 0, i32 4 1836 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 1837 // CHECK3-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4 1838 // CHECK3-NEXT: [[TMP16:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_3]], align 1 1839 // CHECK3-NEXT: [[TOBOOL8:%.*]] = trunc i8 [[TMP16]] to i1 1840 // CHECK3-NEXT: br i1 [[TOBOOL8]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 1841 // CHECK3: omp_if.then: 1842 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.4*)* @.omp_outlined..5 to void (i32*, i32*, ...)*), %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) 1843 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]] 1844 // CHECK3: omp_if.else: 1845 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 1846 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTTHREADID_TEMP_]], align 4 1847 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4 1848 // CHECK3-NEXT: call void @.omp_outlined..5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTBOUND_ZERO_ADDR]], %struct.anon.4* [[OMP_OUTLINED_ARG_AGG_5]]) #[[ATTR2:[0-9]+]] 1849 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]]) 1850 // CHECK3-NEXT: br label [[OMP_IF_END]] 1851 // CHECK3: omp_if.end: 1852 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[RETVAL]], align 4 1853 // CHECK3-NEXT: ret i32 [[TMP17]] 1854 // 1855 // 1856 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1857 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1:[0-9]+]] { 1858 // CHECK3-NEXT: entry: 1859 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1860 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1861 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 1862 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1863 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 1 1864 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1865 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1866 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1867 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 1868 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 1869 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 1870 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1871 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1872 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1873 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1874 // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1875 // CHECK3-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 1876 // CHECK3-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 1877 // CHECK3: omp_if.then: 1878 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1879 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 1880 // CHECK3-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 33, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates*)* @.omp_task_entry. to i32 (i32, i8*)*)) 1881 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates* 1882 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP9]], i32 0, i32 0 1883 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 4 1884 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast %union.kmp_cmplrdata_t* [[TMP11]] to i32* 1885 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[TMP12]], align 8 1886 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 1887 // CHECK3-NEXT: store i64 0, i64* [[TMP13]], align 8 1888 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 1889 // CHECK3-NEXT: store i64 9, i64* [[TMP14]], align 8 1890 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 1891 // CHECK3-NEXT: store i64 1, i64* [[TMP15]], align 8 1892 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 1893 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8** [[TMP16]] to i8* 1894 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP17]], i8 0, i64 8, i1 false) 1895 // CHECK3-NEXT: [[TMP18:%.*]] = load i64, i64* [[TMP15]], align 8 1896 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP13]], i64* [[TMP14]], i64 [[TMP18]], i32 1, i32 0, i64 0, i8* null) 1897 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1898 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1899 // CHECK3-NEXT: br label [[OMP_IF_END]] 1900 // CHECK3: omp_if.end: 1901 // CHECK3-NEXT: ret void 1902 // 1903 // 1904 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry. 1905 // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates* noalias noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 1906 // CHECK3-NEXT: entry: 1907 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 1908 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 1909 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 1910 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 1911 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 1912 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 1913 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 1914 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 1915 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 1916 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 1917 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.0*, align 8 1918 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 1919 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 1920 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 1921 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates*, align 8 1922 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 1923 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates* [[TMP1]], %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1924 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 1925 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates*, %struct.kmp_task_t_with_privates** [[DOTADDR1]], align 8 1926 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], %struct.kmp_task_t_with_privates* [[TMP3]], i32 0, i32 0 1927 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 1928 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 1929 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1930 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.0* 1931 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates* [[TMP3]] to i8* 1932 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 1933 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 1934 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 1935 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 1936 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 1937 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 1938 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 1939 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 1940 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 1941 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 1942 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]]) 1943 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]]) 1944 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]]) 1945 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]]) 1946 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]]) 1947 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14 1948 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !14 1949 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14 1950 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14 1951 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !14 1952 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1953 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1954 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !14 1955 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !14 1956 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14 1957 // CHECK3-NEXT: store %struct.anon.0* [[TMP8]], %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1958 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon.0*, %struct.anon.0** [[__CONTEXT_ADDR_I]], align 8, !noalias !14 1959 // CHECK3-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !14 1960 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 1961 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1962 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 1963 // CHECK3: omp.inner.for.cond.i: 1964 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1965 // CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 1966 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !14 1967 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 1968 // CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]] 1969 // CHECK3: omp.inner.for.body.i: 1970 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1971 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !14 1972 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1973 // CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 1974 // CHECK3-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !14 1975 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP15:![0-9]+]] 1976 // CHECK3: .omp_outlined..1.exit: 1977 // CHECK3-NEXT: ret i32 0 1978 // 1979 // 1980 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1981 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 1982 // CHECK3-NEXT: entry: 1983 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1984 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1985 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 1986 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 1987 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 1 1988 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1989 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1990 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1991 // CHECK3-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1992 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 1993 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 1994 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1995 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 1996 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1997 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1998 // CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1999 // CHECK3-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0 2000 // CHECK3-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2001 // CHECK3: omp_if.then: 2002 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 2003 // CHECK3-NEXT: [[TMP8:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i32 1, i64 80, i64 1, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.3*)* @.omp_task_entry..4 to i32 (i32, i8*)*)) 2004 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to %struct.kmp_task_t_with_privates.3* 2005 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP9]], i32 0, i32 0 2006 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 5 2007 // CHECK3-NEXT: store i64 0, i64* [[TMP11]], align 8 2008 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 6 2009 // CHECK3-NEXT: store i64 9, i64* [[TMP12]], align 8 2010 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 7 2011 // CHECK3-NEXT: store i64 1, i64* [[TMP13]], align 8 2012 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP10]], i32 0, i32 9 2013 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i8* 2014 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP15]], i8 0, i64 8, i1 false) 2015 // CHECK3-NEXT: [[TMP16:%.*]] = load i64, i64* [[TMP13]], align 8 2016 // CHECK3-NEXT: [[TMP17:%.*]] = zext i32 [[TMP7]] to i64 2017 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], i8* [[TMP8]], i32 1, i64* [[TMP11]], i64* [[TMP12]], i64 [[TMP16]], i32 1, i32 1, i64 [[TMP17]], i8* null) 2018 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2019 // CHECK3-NEXT: br label [[OMP_IF_END]] 2020 // CHECK3: omp_if.end: 2021 // CHECK3-NEXT: ret void 2022 // 2023 // 2024 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..4 2025 // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.3* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 2026 // CHECK3-NEXT: entry: 2027 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2028 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2029 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2030 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2031 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2032 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2033 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2034 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2035 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2036 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2037 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.2*, align 8 2038 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 2039 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 2040 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2041 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.3*, align 8 2042 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2043 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.3* [[TMP1]], %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 2044 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2045 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.3*, %struct.kmp_task_t_with_privates.3** [[DOTADDR1]], align 8 2046 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_3:%.*]], %struct.kmp_task_t_with_privates.3* [[TMP3]], i32 0, i32 0 2047 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2048 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2049 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2050 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.2* 2051 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.3* [[TMP3]] to i8* 2052 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2053 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2054 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2055 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2056 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2057 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2058 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2059 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2060 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2061 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2062 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]]) 2063 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META23:![0-9]+]]) 2064 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META25:![0-9]+]]) 2065 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META27:![0-9]+]]) 2066 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META29:![0-9]+]]) 2067 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !31 2068 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !31 2069 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !31 2070 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !31 2071 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !31 2072 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2073 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !31 2074 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !31 2075 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !31 2076 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !31 2077 // CHECK3-NEXT: store %struct.anon.2* [[TMP8]], %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2078 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon.2*, %struct.anon.2** [[__CONTEXT_ADDR_I]], align 8, !noalias !31 2079 // CHECK3-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !31 2080 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP21]] to i32 2081 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31 2082 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2083 // CHECK3: omp.inner.for.cond.i: 2084 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2085 // CHECK3-NEXT: [[CONV1_I:%.*]] = sext i32 [[TMP22]] to i64 2086 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !31, !llvm.access.group !32 2087 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV1_I]], [[TMP23]] 2088 // CHECK3-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__3_EXIT:%.*]] 2089 // CHECK3: omp.inner.for.body.i: 2090 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2091 // CHECK3-NEXT: store i32 [[TMP24]], i32* [[I_I]], align 4, !noalias !31, !llvm.access.group !32 2092 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2093 // CHECK3-NEXT: [[ADD2_I:%.*]] = add nsw i32 [[TMP25]], 1 2094 // CHECK3-NEXT: store i32 [[ADD2_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !31, !llvm.access.group !32 2095 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP33:![0-9]+]] 2096 // CHECK3: .omp_outlined..3.exit: 2097 // CHECK3-NEXT: ret i32 0 2098 // 2099 // 2100 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5 2101 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.4* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 2102 // CHECK3-NEXT: entry: 2103 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2104 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2105 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.4*, align 8 2106 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2107 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 2108 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_5:%.*]], align 8 2109 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2110 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2111 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i32, align 4 2112 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_6:%.*]] = alloca i32, align 4 2113 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_7:%.*]] = alloca i32, align 4 2114 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i64, align 8 2115 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2116 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2117 // CHECK3-NEXT: store %struct.anon.4* [[__CONTEXT]], %struct.anon.4** [[__CONTEXT_ADDR]], align 8 2118 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.4*, %struct.anon.4** [[__CONTEXT_ADDR]], align 8 2119 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_4:%.*]], %struct.anon.4* [[TMP0]], i32 0, i32 0 2120 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 2121 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 1 2122 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 2123 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 2 2124 // CHECK3-NEXT: [[TMP6:%.*]] = load i8***, i8**** [[TMP5]], align 8 2125 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 3 2126 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, i8* [[TMP7]], align 8 2127 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP8]] to i1 2128 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2129 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 2130 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANON_4]], %struct.anon.4* [[TMP0]], i32 0, i32 4 2131 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 2132 // CHECK3-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_1]], align 4 2133 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2134 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2135 // CHECK3-NEXT: [[TMP13:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2136 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0 2137 // CHECK3-NEXT: br i1 [[TMP14]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2138 // CHECK3: omp_if.then: 2139 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 0 2140 // CHECK3-NEXT: store i32* [[TMP2]], i32** [[TMP15]], align 8 2141 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 1 2142 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[TMP16]], align 8 2143 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 2 2144 // CHECK3-NEXT: store i8*** [[TMP6]], i8**** [[TMP17]], align 8 2145 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[AGG_CAPTURED]], i32 0, i32 3 2146 // CHECK3-NEXT: [[TMP19:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 2147 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP19]] to i1 2148 // CHECK3-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 2149 // CHECK3-NEXT: store i8 [[FROMBOOL3]], i8* [[TMP18]], align 8 2150 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 2151 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2152 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP4]], align 4 2153 // CHECK3-NEXT: store i32 [[TMP21]], i32* [[DOTCAPTURE_EXPR_5]], align 4 2154 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP4]], align 4 2155 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[DOTCAPTURE_EXPR_6]], align 4 2156 // CHECK3-NEXT: [[TMP23:%.*]] = load i8**, i8*** [[TMP6]], align 8 2157 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP4]], align 4 2158 // CHECK3-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 2159 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP23]], i64 [[IDXPROM]] 2160 // CHECK3-NEXT: [[TMP25:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 2161 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP4]], align 4 2162 // CHECK3-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP26]] to i64 2163 // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i8, i8* [[TMP25]], i64 [[IDXPROM8]] 2164 // CHECK3-NEXT: [[TMP27:%.*]] = load i8, i8* [[ARRAYIDX9]], align 1 2165 // CHECK3-NEXT: [[CONV:%.*]] = sext i8 [[TMP27]] to i32 2166 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTCAPTURE_EXPR_7]], align 4 2167 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_5]], align 4 2168 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 2169 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2170 // CHECK3-NEXT: [[CONV11:%.*]] = sext i32 [[DIV]] to i64 2171 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_7]], align 4 2172 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_6]], align 4 2173 // CHECK3-NEXT: [[SUB12:%.*]] = sub i32 [[TMP29]], [[TMP30]] 2174 // CHECK3-NEXT: [[SUB13:%.*]] = sub i32 [[SUB12]], 1 2175 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB13]], 1 2176 // CHECK3-NEXT: [[DIV14:%.*]] = udiv i32 [[ADD]], 1 2177 // CHECK3-NEXT: [[CONV15:%.*]] = zext i32 [[DIV14]] to i64 2178 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV11]], [[CONV15]] 2179 // CHECK3-NEXT: [[SUB16:%.*]] = sub nsw i64 [[MUL]], 1 2180 // CHECK3-NEXT: store i64 [[SUB16]], i64* [[DOTCAPTURE_EXPR_10]], align 8 2181 // CHECK3-NEXT: [[TMP31:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i32 1, i64 88, i64 32, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.6*)* @.omp_task_entry..7 to i32 (i32, i8*)*)) 2182 // CHECK3-NEXT: [[TMP32:%.*]] = bitcast i8* [[TMP31]] to %struct.kmp_task_t_with_privates.6* 2183 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP32]], i32 0, i32 0 2184 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP33]], i32 0, i32 0 2185 // CHECK3-NEXT: [[TMP35:%.*]] = load i8*, i8** [[TMP34]], align 8 2186 // CHECK3-NEXT: [[TMP36:%.*]] = bitcast %struct.anon.5* [[AGG_CAPTURED]] to i8* 2187 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 [[TMP36]], i64 32, i1 false) 2188 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP32]], i32 0, i32 1 2189 // CHECK3-NEXT: [[TMP38:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 2190 // CHECK3-NEXT: [[TOBOOL17:%.*]] = trunc i8 [[TMP38]] to i1 2191 // CHECK3-NEXT: [[TMP39:%.*]] = sext i1 [[TOBOOL17]] to i32 2192 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP33]], i32 0, i32 5 2193 // CHECK3-NEXT: store i64 0, i64* [[TMP40]], align 8 2194 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP33]], i32 0, i32 6 2195 // CHECK3-NEXT: [[TMP42:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_10]], align 8 2196 // CHECK3-NEXT: store i64 [[TMP42]], i64* [[TMP41]], align 8 2197 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP33]], i32 0, i32 7 2198 // CHECK3-NEXT: store i64 1, i64* [[TMP43]], align 8 2199 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP33]], i32 0, i32 9 2200 // CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i8* 2201 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP45]], i8 0, i64 8, i1 false) 2202 // CHECK3-NEXT: [[TMP46:%.*]] = load i64, i64* [[TMP43]], align 8 2203 // CHECK3-NEXT: [[TMP47:%.*]] = zext i32 [[TMP20]] to i64 2204 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]], i8* [[TMP31]], i32 [[TMP39]], i64* [[TMP40]], i64* [[TMP41]], i64 [[TMP46]], i32 1, i32 2, i64 [[TMP47]], i8* bitcast (void (%struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6*, i32)* @.omp_task_dup. to i8*)) 2205 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2206 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP12]]) 2207 // CHECK3-NEXT: br label [[OMP_IF_END]] 2208 // CHECK3: omp_if.end: 2209 // CHECK3-NEXT: ret void 2210 // 2211 // 2212 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_privates_map. 2213 // CHECK3-SAME: (%struct..kmp_privates.t* noalias noundef [[TMP0:%.*]], i32** noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] { 2214 // CHECK3-NEXT: entry: 2215 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct..kmp_privates.t*, align 8 2216 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i32**, align 8 2217 // CHECK3-NEXT: store %struct..kmp_privates.t* [[TMP0]], %struct..kmp_privates.t** [[DOTADDR]], align 8 2218 // CHECK3-NEXT: store i32** [[TMP1]], i32*** [[DOTADDR1]], align 8 2219 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct..kmp_privates.t*, %struct..kmp_privates.t** [[DOTADDR]], align 8 2220 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], %struct..kmp_privates.t* [[TMP2]], i32 0, i32 0 2221 // CHECK3-NEXT: [[TMP4:%.*]] = load i32**, i32*** [[DOTADDR1]], align 8 2222 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[TMP4]], align 8 2223 // CHECK3-NEXT: ret void 2224 // 2225 // 2226 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..7 2227 // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 2228 // CHECK3-NEXT: entry: 2229 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2230 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2231 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2232 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2233 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2234 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2235 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2236 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2237 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2238 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2239 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.5*, align 8 2240 // CHECK3-NEXT: [[DOTLASTPRIV_PTR_ADDR_I:%.*]] = alloca i32*, align 8 2241 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 2242 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 2243 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3_I:%.*]] = alloca i32, align 4 2244 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_6_I:%.*]] = alloca i64, align 8 2245 // CHECK3-NEXT: [[I_I:%.*]] = alloca i32, align 4 2246 // CHECK3-NEXT: [[J_I:%.*]] = alloca i32, align 4 2247 // CHECK3-NEXT: [[I14_I:%.*]] = alloca i32, align 4 2248 // CHECK3-NEXT: [[J15_I:%.*]] = alloca i32, align 4 2249 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i64, align 8 2250 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2251 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 2252 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2253 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 2254 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2255 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 2256 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 2257 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2258 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2259 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2260 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.5* 2261 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 2262 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast %struct..kmp_privates.t* [[TMP9]] to i8* 2263 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast %struct.kmp_task_t_with_privates.6* [[TMP3]] to i8* 2264 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2265 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2266 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2267 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2268 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2269 // CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP16]], align 8 2270 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2271 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 8 2272 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2273 // CHECK3-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8 2274 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META36:![0-9]+]]) 2275 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META39:![0-9]+]]) 2276 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META41:![0-9]+]]) 2277 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META43:![0-9]+]]) 2278 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META45:![0-9]+]]) 2279 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !47 2280 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !47 2281 // CHECK3-NEXT: store i8* [[TMP10]], i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 2282 // CHECK3-NEXT: store void (i8*, ...)* bitcast (void (%struct..kmp_privates.t*, i32**)* @.omp_task_privates_map. to void (i8*, ...)*), void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 2283 // CHECK3-NEXT: store i8* [[TMP11]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !47 2284 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 2285 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 2286 // CHECK3-NEXT: store i64 [[TMP17]], i64* [[DOTST__ADDR_I]], align 8, !noalias !47 2287 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 2288 // CHECK3-NEXT: store i8* [[TMP21]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !47 2289 // CHECK3-NEXT: store %struct.anon.5* [[TMP8]], %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 2290 // CHECK3-NEXT: [[TMP22:%.*]] = load %struct.anon.5*, %struct.anon.5** [[__CONTEXT_ADDR_I]], align 8, !noalias !47 2291 // CHECK3-NEXT: [[TMP23:%.*]] = load void (i8*, ...)*, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !47 2292 // CHECK3-NEXT: [[TMP24:%.*]] = load i8*, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !47 2293 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast void (i8*, ...)* [[TMP23]] to void (i8*, i32**)* 2294 // CHECK3-NEXT: call void [[TMP25]](i8* [[TMP24]], i32** [[DOTLASTPRIV_PTR_ADDR_I]]) #[[ATTR2]] 2295 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_ANON_5:%.*]], %struct.anon.5* [[TMP22]], i32 0, i32 0 2296 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP26]], align 8 2297 // CHECK3-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTLASTPRIV_PTR_ADDR_I]], align 8, !noalias !47 2298 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 2299 // CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[TMP29]], align 8 2300 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 2301 // CHECK3-NEXT: store i32 [[TMP31]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2302 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 2303 // CHECK3-NEXT: [[TMP33:%.*]] = load i32*, i32** [[TMP32]], align 8 2304 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4 2305 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2306 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 2307 // CHECK3-NEXT: [[TMP36:%.*]] = load i8***, i8**** [[TMP35]], align 8 2308 // CHECK3-NEXT: [[TMP37:%.*]] = load i8**, i8*** [[TMP36]], align 8 2309 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 2310 // CHECK3-NEXT: [[TMP39:%.*]] = load i32*, i32** [[TMP38]], align 8 2311 // CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[TMP39]], align 4 2312 // CHECK3-NEXT: [[IDXPROM_I:%.*]] = sext i32 [[TMP40]] to i64 2313 // CHECK3-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr inbounds i8*, i8** [[TMP37]], i64 [[IDXPROM_I]] 2314 // CHECK3-NEXT: [[TMP41:%.*]] = load i8*, i8** [[ARRAYIDX_I]], align 8 2315 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 2316 // CHECK3-NEXT: [[TMP43:%.*]] = load i32*, i32** [[TMP42]], align 8 2317 // CHECK3-NEXT: [[TMP44:%.*]] = load i32, i32* [[TMP43]], align 4 2318 // CHECK3-NEXT: [[IDXPROM4_I:%.*]] = sext i32 [[TMP44]] to i64 2319 // CHECK3-NEXT: [[ARRAYIDX5_I:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 [[IDXPROM4_I]] 2320 // CHECK3-NEXT: [[TMP45:%.*]] = load i8, i8* [[ARRAYIDX5_I]], align 1 2321 // CHECK3-NEXT: [[CONV_I:%.*]] = sext i8 [[TMP45]] to i32 2322 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2323 // CHECK3-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2324 // CHECK3-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP46]] to i64 2325 // CHECK3-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2326 // CHECK3-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2327 // CHECK3-NEXT: [[SUB8_I:%.*]] = sub i32 [[TMP47]], [[TMP48]] 2328 // CHECK3-NEXT: [[SUB9_I:%.*]] = sub i32 [[SUB8_I]], 1 2329 // CHECK3-NEXT: [[CONV11_I:%.*]] = zext i32 [[SUB8_I]] to i64 2330 // CHECK3-NEXT: [[MUL_I:%.*]] = mul nsw i64 [[CONV7_I]], [[CONV11_I]] 2331 // CHECK3-NEXT: [[SUB12_I:%.*]] = sub nsw i64 [[MUL_I]], 1 2332 // CHECK3-NEXT: store i64 [[SUB12_I]], i64* [[DOTCAPTURE_EXPR_6_I]], align 8, !noalias !47 2333 // CHECK3-NEXT: store i32 0, i32* [[I_I]], align 4, !noalias !47 2334 // CHECK3-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2335 // CHECK3-NEXT: store i32 [[TMP49]], i32* [[J_I]], align 4, !noalias !47 2336 // CHECK3-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !47 2337 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP50]] 2338 // CHECK3-NEXT: br i1 [[CMP_I]], label [[LAND_LHS_TRUE_I:%.*]], label [[TASKLOOP_IF_END_I:%.*]] 2339 // CHECK3: land.lhs.true.i: 2340 // CHECK3-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2341 // CHECK3-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2342 // CHECK3-NEXT: [[CMP13_I:%.*]] = icmp slt i32 [[TMP51]], [[TMP52]] 2343 // CHECK3-NEXT: br i1 [[CMP13_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[TASKLOOP_IF_END_I]] 2344 // CHECK3: taskloop.if.then.i: 2345 // CHECK3-NEXT: [[TMP53:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !47 2346 // CHECK3-NEXT: store i64 [[TMP53]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2347 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 1 2348 // CHECK3-NEXT: [[TMP55:%.*]] = load i32*, i32** [[TMP54]], align 8 2349 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 2 2350 // CHECK3-NEXT: [[TMP57:%.*]] = load i8***, i8**** [[TMP56]], align 8 2351 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANON_5]], %struct.anon.5* [[TMP22]], i32 0, i32 3 2352 // CHECK3-NEXT: [[TMP59:%.*]] = load i8, i8* [[TMP58]], align 1 2353 // CHECK3-NEXT: [[TOBOOL_I:%.*]] = trunc i8 [[TMP59]] to i1 2354 // CHECK3-NEXT: br i1 [[TOBOOL_I]], label [[OMP_IF_THEN_I:%.*]], label [[OMP_IF_ELSE_I:%.*]] 2355 // CHECK3: omp_if.then.i: 2356 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2357 // CHECK3: omp.inner.for.cond.i: 2358 // CHECK3-NEXT: [[TMP60:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2359 // CHECK3-NEXT: [[TMP61:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47, !llvm.access.group !48 2360 // CHECK3-NEXT: [[CMP16_I:%.*]] = icmp ule i64 [[TMP60]], [[TMP61]] 2361 // CHECK3-NEXT: br i1 [[CMP16_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 2362 // CHECK3: omp.inner.for.body.i: 2363 // CHECK3-NEXT: [[TMP62:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2364 // CHECK3-NEXT: [[TMP63:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2365 // CHECK3-NEXT: [[TMP64:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2366 // CHECK3-NEXT: [[SUB17_I:%.*]] = sub i32 [[TMP63]], [[TMP64]] 2367 // CHECK3-NEXT: [[SUB18_I:%.*]] = sub i32 [[SUB17_I]], 1 2368 // CHECK3-NEXT: [[CONV22_I:%.*]] = zext i32 [[SUB17_I]] to i64 2369 // CHECK3-NEXT: [[DIV23_I:%.*]] = sdiv i64 [[TMP62]], [[CONV22_I]] 2370 // CHECK3-NEXT: [[CONV26_I:%.*]] = trunc i64 [[DIV23_I]] to i32 2371 // CHECK3-NEXT: store i32 [[CONV26_I]], i32* [[I14_I]], align 4, !noalias !47, !llvm.access.group !48 2372 // CHECK3-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2373 // CHECK3-NEXT: [[CONV27_I:%.*]] = sext i32 [[TMP65]] to i64 2374 // CHECK3-NEXT: [[TMP66:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2375 // CHECK3-NEXT: [[TMP67:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2376 // CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2377 // CHECK3-NEXT: [[TMP69:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2378 // CHECK3-NEXT: [[SUB28_I:%.*]] = sub i32 [[TMP68]], [[TMP69]] 2379 // CHECK3-NEXT: [[SUB29_I:%.*]] = sub i32 [[SUB28_I]], 1 2380 // CHECK3-NEXT: [[CONV33_I:%.*]] = zext i32 [[SUB28_I]] to i64 2381 // CHECK3-NEXT: [[DIV34_I:%.*]] = sdiv i64 [[TMP67]], [[CONV33_I]] 2382 // CHECK3-NEXT: [[TMP70:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47, !llvm.access.group !48 2383 // CHECK3-NEXT: [[TMP71:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47, !llvm.access.group !48 2384 // CHECK3-NEXT: [[SUB35_I:%.*]] = sub i32 [[TMP70]], [[TMP71]] 2385 // CHECK3-NEXT: [[SUB36_I:%.*]] = sub i32 [[SUB35_I]], 1 2386 // CHECK3-NEXT: [[CONV40_I:%.*]] = zext i32 [[SUB35_I]] to i64 2387 // CHECK3-NEXT: [[MUL41_I:%.*]] = mul nsw i64 [[DIV34_I]], [[CONV40_I]] 2388 // CHECK3-NEXT: [[SUB42_I:%.*]] = sub nsw i64 [[TMP66]], [[MUL41_I]] 2389 // CHECK3-NEXT: [[ADD44_I:%.*]] = add nsw i64 [[CONV27_I]], [[SUB42_I]] 2390 // CHECK3-NEXT: [[CONV45_I:%.*]] = trunc i64 [[ADD44_I]] to i32 2391 // CHECK3-NEXT: store i32 [[CONV45_I]], i32* [[J15_I]], align 4, !noalias !47, !llvm.access.group !48 2392 // CHECK3-NEXT: [[TMP72:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2393 // CHECK3-NEXT: [[ADD46_I:%.*]] = add nsw i64 [[TMP72]], 1 2394 // CHECK3-NEXT: store i64 [[ADD46_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47, !llvm.access.group !48 2395 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP49:![0-9]+]] 2396 // CHECK3: omp.inner.for.end.i: 2397 // CHECK3-NEXT: br label [[OMP_IF_END_I:%.*]] 2398 // CHECK3: omp_if.else.i: 2399 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I:%.*]] 2400 // CHECK3: omp.inner.for.cond47.i: 2401 // CHECK3-NEXT: [[TMP73:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2402 // CHECK3-NEXT: [[TMP74:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !47 2403 // CHECK3-NEXT: [[CMP48_I:%.*]] = icmp ule i64 [[TMP73]], [[TMP74]] 2404 // CHECK3-NEXT: br i1 [[CMP48_I]], label [[OMP_INNER_FOR_BODY49_I:%.*]], label [[OMP_INNER_FOR_END82_I:%.*]] 2405 // CHECK3: omp.inner.for.body49.i: 2406 // CHECK3-NEXT: [[TMP75:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2407 // CHECK3-NEXT: [[TMP76:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2408 // CHECK3-NEXT: [[TMP77:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2409 // CHECK3-NEXT: [[SUB50_I:%.*]] = sub i32 [[TMP76]], [[TMP77]] 2410 // CHECK3-NEXT: [[SUB51_I:%.*]] = sub i32 [[SUB50_I]], 1 2411 // CHECK3-NEXT: [[CONV55_I:%.*]] = zext i32 [[SUB50_I]] to i64 2412 // CHECK3-NEXT: [[DIV56_I:%.*]] = sdiv i64 [[TMP75]], [[CONV55_I]] 2413 // CHECK3-NEXT: [[CONV59_I:%.*]] = trunc i64 [[DIV56_I]] to i32 2414 // CHECK3-NEXT: store i32 [[CONV59_I]], i32* [[I14_I]], align 4, !noalias !47 2415 // CHECK3-NEXT: [[TMP78:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2416 // CHECK3-NEXT: [[CONV60_I:%.*]] = sext i32 [[TMP78]] to i64 2417 // CHECK3-NEXT: [[TMP79:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2418 // CHECK3-NEXT: [[TMP80:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2419 // CHECK3-NEXT: [[TMP81:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2420 // CHECK3-NEXT: [[TMP82:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2421 // CHECK3-NEXT: [[SUB61_I:%.*]] = sub i32 [[TMP81]], [[TMP82]] 2422 // CHECK3-NEXT: [[SUB62_I:%.*]] = sub i32 [[SUB61_I]], 1 2423 // CHECK3-NEXT: [[CONV66_I:%.*]] = zext i32 [[SUB61_I]] to i64 2424 // CHECK3-NEXT: [[DIV67_I:%.*]] = sdiv i64 [[TMP80]], [[CONV66_I]] 2425 // CHECK3-NEXT: [[TMP83:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3_I]], align 4, !noalias !47 2426 // CHECK3-NEXT: [[TMP84:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !47 2427 // CHECK3-NEXT: [[SUB68_I:%.*]] = sub i32 [[TMP83]], [[TMP84]] 2428 // CHECK3-NEXT: [[SUB69_I:%.*]] = sub i32 [[SUB68_I]], 1 2429 // CHECK3-NEXT: [[CONV73_I:%.*]] = zext i32 [[SUB68_I]] to i64 2430 // CHECK3-NEXT: [[MUL74_I:%.*]] = mul nsw i64 [[DIV67_I]], [[CONV73_I]] 2431 // CHECK3-NEXT: [[SUB75_I:%.*]] = sub nsw i64 [[TMP79]], [[MUL74_I]] 2432 // CHECK3-NEXT: [[ADD77_I:%.*]] = add nsw i64 [[CONV60_I]], [[SUB75_I]] 2433 // CHECK3-NEXT: [[CONV78_I:%.*]] = trunc i64 [[ADD77_I]] to i32 2434 // CHECK3-NEXT: store i32 [[CONV78_I]], i32* [[J15_I]], align 4, !noalias !47 2435 // CHECK3-NEXT: [[TMP85:%.*]] = load i64, i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2436 // CHECK3-NEXT: [[ADD81_I:%.*]] = add nsw i64 [[TMP85]], 1 2437 // CHECK3-NEXT: store i64 [[ADD81_I]], i64* [[DOTOMP_IV_I]], align 8, !noalias !47 2438 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND47_I]], !llvm.loop [[LOOP51:![0-9]+]] 2439 // CHECK3: omp.inner.for.end82.i: 2440 // CHECK3-NEXT: br label [[OMP_IF_END_I]] 2441 // CHECK3: omp_if.end.i: 2442 // CHECK3-NEXT: br label [[TASKLOOP_IF_END_I]] 2443 // CHECK3: taskloop.if.end.i: 2444 // CHECK3-NEXT: [[TMP86:%.*]] = load i32, i32* [[DOTLITER__ADDR_I]], align 4, !noalias !47 2445 // CHECK3-NEXT: [[TMP87:%.*]] = icmp ne i32 [[TMP86]], 0 2446 // CHECK3-NEXT: br i1 [[TMP87]], label [[DOTOMP_LASTPRIVATE_THEN_I:%.*]], label [[DOTOMP_OUTLINED__6_EXIT:%.*]] 2447 // CHECK3: .omp.lastprivate.then.i: 2448 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__6_EXIT]] 2449 // CHECK3: .omp_outlined..6.exit: 2450 // CHECK3-NEXT: ret i32 0 2451 // 2452 // 2453 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_dup. 2454 // CHECK3-SAME: (%struct.kmp_task_t_with_privates.6* noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.6* noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR4]] { 2455 // CHECK3-NEXT: entry: 2456 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 2457 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.6*, align 8 2458 // CHECK3-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4 2459 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP0]], %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 2460 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.6* [[TMP1]], %struct.kmp_task_t_with_privates.6** [[DOTADDR1]], align 8 2461 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTADDR2]], align 4 2462 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.6*, %struct.kmp_task_t_with_privates.6** [[DOTADDR]], align 8 2463 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6:%.*]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 0 2464 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2465 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTADDR2]], align 4 2466 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[TMP5]], align 8 2467 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_6]], %struct.kmp_task_t_with_privates.6* [[TMP3]], i32 0, i32 1 2468 // CHECK3-NEXT: ret void 2469 // 2470 // 2471 // CHECK3-LABEL: define {{[^@]+}}@__cxx_global_var_init 2472 // CHECK3-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 2473 // CHECK3-NEXT: entry: 2474 // CHECK3-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 2475 // CHECK3-NEXT: ret void 2476 // 2477 // 2478 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC1Ei 2479 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 { 2480 // CHECK3-NEXT: entry: 2481 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2482 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2483 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2484 // CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2485 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2486 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2487 // CHECK3-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2488 // CHECK3-NEXT: ret void 2489 // 2490 // 2491 // CHECK3-LABEL: define {{[^@]+}}@_ZN1SC2Ei 2492 // CHECK3-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR8]] align 2 { 2493 // CHECK3-NEXT: entry: 2494 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2495 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2496 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2497 // CHECK3-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_7:%.*]], align 8 2498 // CHECK3-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2499 // CHECK3-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2500 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2501 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2502 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 2503 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2504 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 2505 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 2506 // CHECK3-NEXT: store %struct.S* [[THIS1]], %struct.S** [[TMP1]], align 8 2507 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 2508 // CHECK3-NEXT: store i32* [[C_ADDR]], i32** [[TMP2]], align 8 2509 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 2 2510 // CHECK3-NEXT: [[TMP4:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 2511 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP4]] to i1 2512 // CHECK3-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL2]] to i8 2513 // CHECK3-NEXT: store i8 [[FROMBOOL3]], i8* [[TMP3]], align 8 2514 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.7*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), %struct.anon.7* [[OMP_OUTLINED_ARG_AGG_]]) 2515 // CHECK3-NEXT: ret void 2516 // 2517 // 2518 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8 2519 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.7* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR1]] { 2520 // CHECK3-NEXT: entry: 2521 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2522 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2523 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.7*, align 8 2524 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2525 // CHECK3-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_9:%.*]], align 8 2526 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2527 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2528 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2529 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2530 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2531 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2532 // CHECK3-NEXT: store %struct.anon.7* [[__CONTEXT]], %struct.anon.7** [[__CONTEXT_ADDR]], align 8 2533 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon.7*, %struct.anon.7** [[__CONTEXT_ADDR]], align 8 2534 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_7:%.*]], %struct.anon.7* [[TMP0]], i32 0, i32 0 2535 // CHECK3-NEXT: [[TMP2:%.*]] = load %struct.S*, %struct.S** [[TMP1]], align 8 2536 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 1 2537 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 2538 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON_7]], %struct.anon.7* [[TMP0]], i32 0, i32 2 2539 // CHECK3-NEXT: [[TMP6:%.*]] = load i8, i8* [[TMP5]], align 8 2540 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP6]] to i1 2541 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2542 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 2543 // CHECK3-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2544 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 2545 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__kmpc_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 2546 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 2547 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]] 2548 // CHECK3: omp_if.then: 2549 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_9]], %struct.anon.9* [[AGG_CAPTURED]], i32 0, i32 0 2550 // CHECK3-NEXT: store %struct.S* [[TMP2]], %struct.S** [[TMP11]], align 8 2551 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_9]], %struct.anon.9* [[AGG_CAPTURED]], i32 0, i32 1 2552 // CHECK3-NEXT: store i32* [[TMP4]], i32** [[TMP12]], align 8 2553 // CHECK3-NEXT: call void @__kmpc_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 2554 // CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1 2555 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP13]] to i1 2556 // CHECK3-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 2557 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP4]], align 4 2558 // CHECK3-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2559 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2560 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP15]], 0 2561 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2562 // CHECK3-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 2563 // CHECK3-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2564 // CHECK3-NEXT: [[TMP16:%.*]] = select i1 [[TOBOOL1]], i32 2, i32 0 2565 // CHECK3-NEXT: [[TMP17:%.*]] = or i32 [[TMP16]], 1 2566 // CHECK3-NEXT: [[TMP18:%.*]] = call i8* @__kmpc_omp_task_alloc(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 [[TMP17]], i64 80, i64 16, i32 (i32, i8*)* bitcast (i32 (i32, %struct.kmp_task_t_with_privates.10*)* @.omp_task_entry..10 to i32 (i32, i8*)*)) 2567 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to %struct.kmp_task_t_with_privates.10* 2568 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_10:%.*]], %struct.kmp_task_t_with_privates.10* [[TMP19]], i32 0, i32 0 2569 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 0 2570 // CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8 2571 // CHECK3-NEXT: [[TMP23:%.*]] = bitcast %struct.anon.9* [[AGG_CAPTURED]] to i8* 2572 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP22]], i8* align 8 [[TMP23]], i64 16, i1 false) 2573 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 5 2574 // CHECK3-NEXT: store i64 0, i64* [[TMP24]], align 8 2575 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 6 2576 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2577 // CHECK3-NEXT: [[CONV:%.*]] = sext i32 [[TMP26]] to i64 2578 // CHECK3-NEXT: store i64 [[CONV]], i64* [[TMP25]], align 8 2579 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 7 2580 // CHECK3-NEXT: store i64 1, i64* [[TMP27]], align 8 2581 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP20]], i32 0, i32 9 2582 // CHECK3-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i8* 2583 // CHECK3-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP29]], i8 0, i64 8, i1 false) 2584 // CHECK3-NEXT: [[TMP30:%.*]] = load i64, i64* [[TMP27]], align 8 2585 // CHECK3-NEXT: call void @__kmpc_taskloop(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i8* [[TMP18]], i32 1, i64* [[TMP24]], i64* [[TMP25]], i64 [[TMP30]], i32 1, i32 2, i64 4, i8* null) 2586 // CHECK3-NEXT: call void @__kmpc_end_taskgroup(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 2587 // CHECK3-NEXT: call void @__kmpc_end_master(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 2588 // CHECK3-NEXT: br label [[OMP_IF_END]] 2589 // CHECK3: omp_if.end: 2590 // CHECK3-NEXT: ret void 2591 // 2592 // 2593 // CHECK3-LABEL: define {{[^@]+}}@.omp_task_entry..10 2594 // CHECK3-SAME: (i32 noundef [[TMP0:%.*]], %struct.kmp_task_t_with_privates.10* noalias noundef [[TMP1:%.*]]) #[[ATTR4]] { 2595 // CHECK3-NEXT: entry: 2596 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4 2597 // CHECK3-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca i32*, align 8 2598 // CHECK3-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca i8*, align 8 2599 // CHECK3-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca void (i8*, ...)*, align 8 2600 // CHECK3-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca i8*, align 8 2601 // CHECK3-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8 2602 // CHECK3-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8 2603 // CHECK3-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8 2604 // CHECK3-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4 2605 // CHECK3-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca i8*, align 8 2606 // CHECK3-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca %struct.anon.9*, align 8 2607 // CHECK3-NEXT: [[TMP_I:%.*]] = alloca i32, align 4 2608 // CHECK3-NEXT: [[TMP1_I:%.*]] = alloca i32*, align 8 2609 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__I:%.*]] = alloca i32, align 4 2610 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_2_I:%.*]] = alloca i32, align 4 2611 // CHECK3-NEXT: [[A_I:%.*]] = alloca i32, align 4 2612 // CHECK3-NEXT: [[TMP4_I:%.*]] = alloca i32*, align 8 2613 // CHECK3-NEXT: [[A5_I:%.*]] = alloca i32, align 4 2614 // CHECK3-NEXT: [[TMP6_I:%.*]] = alloca i32*, align 8 2615 // CHECK3-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4 2616 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4 2617 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca %struct.kmp_task_t_with_privates.10*, align 8 2618 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[DOTADDR]], align 4 2619 // CHECK3-NEXT: store %struct.kmp_task_t_with_privates.10* [[TMP1]], %struct.kmp_task_t_with_privates.10** [[DOTADDR1]], align 8 2620 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTADDR]], align 4 2621 // CHECK3-NEXT: [[TMP3:%.*]] = load %struct.kmp_task_t_with_privates.10*, %struct.kmp_task_t_with_privates.10** [[DOTADDR1]], align 8 2622 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_10:%.*]], %struct.kmp_task_t_with_privates.10* [[TMP3]], i32 0, i32 0 2623 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 2 2624 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 0 2625 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2626 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to %struct.anon.9* 2627 // CHECK3-NEXT: [[TMP9:%.*]] = bitcast %struct.kmp_task_t_with_privates.10* [[TMP3]] to i8* 2628 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 5 2629 // CHECK3-NEXT: [[TMP11:%.*]] = load i64, i64* [[TMP10]], align 8 2630 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 6 2631 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[TMP12]], align 8 2632 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 7 2633 // CHECK3-NEXT: [[TMP15:%.*]] = load i64, i64* [[TMP14]], align 8 2634 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 8 2635 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[TMP16]], align 8 2636 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], %struct.kmp_task_t* [[TMP4]], i32 0, i32 9 2637 // CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8 2638 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META53:![0-9]+]]) 2639 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META56:![0-9]+]]) 2640 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META58:![0-9]+]]) 2641 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META60:![0-9]+]]) 2642 // CHECK3-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META62:![0-9]+]]) 2643 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !64 2644 // CHECK3-NEXT: store i32* [[TMP5]], i32** [[DOTPART_ID__ADDR_I]], align 8, !noalias !64 2645 // CHECK3-NEXT: store i8* null, i8** [[DOTPRIVATES__ADDR_I]], align 8, !noalias !64 2646 // CHECK3-NEXT: store void (i8*, ...)* null, void (i8*, ...)** [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !64 2647 // CHECK3-NEXT: store i8* [[TMP9]], i8** [[DOTTASK_T__ADDR_I]], align 8, !noalias !64 2648 // CHECK3-NEXT: store i64 [[TMP11]], i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 2649 // CHECK3-NEXT: store i64 [[TMP13]], i64* [[DOTUB__ADDR_I]], align 8, !noalias !64 2650 // CHECK3-NEXT: store i64 [[TMP15]], i64* [[DOTST__ADDR_I]], align 8, !noalias !64 2651 // CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTLITER__ADDR_I]], align 4, !noalias !64 2652 // CHECK3-NEXT: store i8* [[TMP19]], i8** [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !64 2653 // CHECK3-NEXT: store %struct.anon.9* [[TMP8]], %struct.anon.9** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 2654 // CHECK3-NEXT: [[TMP20:%.*]] = load %struct.anon.9*, %struct.anon.9** [[__CONTEXT_ADDR_I]], align 8, !noalias !64 2655 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANON_9:%.*]], %struct.anon.9* [[TMP20]], i32 0, i32 0 2656 // CHECK3-NEXT: [[TMP22:%.*]] = load %struct.S*, %struct.S** [[TMP21]], align 8 2657 // CHECK3-NEXT: store i32* [[TMP_I]], i32** [[TMP1_I]], align 8, !noalias !64 2658 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_ANON_9]], %struct.anon.9* [[TMP20]], i32 0, i32 1 2659 // CHECK3-NEXT: [[TMP24:%.*]] = load i32*, i32** [[TMP23]], align 8 2660 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 2661 // CHECK3-NEXT: store i32 [[TMP25]], i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2662 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2663 // CHECK3-NEXT: [[SUB3_I:%.*]] = sub nsw i32 [[TMP26]], 1 2664 // CHECK3-NEXT: store i32 [[SUB3_I]], i32* [[DOTCAPTURE_EXPR_2_I]], align 4, !noalias !64 2665 // CHECK3-NEXT: store i32* [[A_I]], i32** [[TMP4_I]], align 8, !noalias !64 2666 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[TMP4_I]], align 8, !noalias !64 2667 // CHECK3-NEXT: store i32 0, i32* [[TMP27]], align 4 2668 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__I]], align 4, !noalias !64 2669 // CHECK3-NEXT: [[CMP_I:%.*]] = icmp slt i32 0, [[TMP28]] 2670 // CHECK3-NEXT: br i1 [[CMP_I]], label [[TASKLOOP_IF_THEN_I:%.*]], label [[DOTOMP_OUTLINED__9_EXIT:%.*]] 2671 // CHECK3: taskloop.if.then.i: 2672 // CHECK3-NEXT: store i32* [[A5_I]], i32** [[TMP6_I]], align 8, !noalias !64 2673 // CHECK3-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTLB__ADDR_I]], align 8, !noalias !64 2674 // CHECK3-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP29]] to i32 2675 // CHECK3-NEXT: store i32 [[CONV_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64 2676 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANON_9]], %struct.anon.9* [[TMP20]], i32 0, i32 1 2677 // CHECK3-NEXT: [[TMP31:%.*]] = load i32*, i32** [[TMP30]], align 8 2678 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]] 2679 // CHECK3: omp.inner.for.cond.i: 2680 // CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2681 // CHECK3-NEXT: [[CONV7_I:%.*]] = sext i32 [[TMP32]] to i64 2682 // CHECK3-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTUB__ADDR_I]], align 8, !noalias !64, !llvm.access.group !65 2683 // CHECK3-NEXT: [[CMP8_I:%.*]] = icmp ule i64 [[CONV7_I]], [[TMP33]] 2684 // CHECK3-NEXT: br i1 [[CMP8_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[OMP_INNER_FOR_END_I:%.*]] 2685 // CHECK3: omp.inner.for.body.i: 2686 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2687 // CHECK3-NEXT: [[TMP35:%.*]] = load i32*, i32** [[TMP6_I]], align 8, !noalias !64, !llvm.access.group !65 2688 // CHECK3-NEXT: store i32 [[TMP34]], i32* [[TMP35]], align 4, !llvm.access.group !65 2689 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2690 // CHECK3-NEXT: [[ADD9_I:%.*]] = add nsw i32 [[TMP36]], 1 2691 // CHECK3-NEXT: store i32 [[ADD9_I]], i32* [[DOTOMP_IV_I]], align 4, !noalias !64, !llvm.access.group !65 2692 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND_I]], !llvm.loop [[LOOP66:![0-9]+]] 2693 // CHECK3: omp.inner.for.end.i: 2694 // CHECK3-NEXT: br label [[DOTOMP_OUTLINED__9_EXIT]] 2695 // CHECK3: .omp_outlined..9.exit: 2696 // CHECK3-NEXT: ret i32 0 2697 // 2698 // 2699 // CHECK3-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 2700 // CHECK3-SAME: () #[[ATTR6]] section "__TEXT,__StaticInit,regular,pure_instructions" { 2701 // CHECK3-NEXT: entry: 2702 // CHECK3-NEXT: call void @__cxx_global_var_init() 2703 // CHECK3-NEXT: ret void 2704 // 2705 // 2706 // CHECK5-LABEL: define {{[^@]+}}@main 2707 // CHECK5-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 2708 // CHECK5-NEXT: entry: 2709 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2710 // CHECK5-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 2711 // CHECK5-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 2712 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 2713 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2714 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2715 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2716 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2717 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2718 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2719 // CHECK5-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 2720 // CHECK5-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 2721 // CHECK5-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 2722 // CHECK5-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 2723 // CHECK5-NEXT: [[I9:%.*]] = alloca i32, align 4 2724 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4 2725 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 2726 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 2727 // CHECK5-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 2728 // CHECK5-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 2729 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 2730 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 2731 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 2732 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 2733 // CHECK5-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 2734 // CHECK5-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 2735 // CHECK5-NEXT: [[I42:%.*]] = alloca i32, align 4 2736 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4 2737 // CHECK5-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 2738 // CHECK5-NEXT: [[I46:%.*]] = alloca i32, align 4 2739 // CHECK5-NEXT: [[J47:%.*]] = alloca i32, align 4 2740 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 2741 // CHECK5-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 2742 // CHECK5-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 2743 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2744 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 2745 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 2746 // CHECK5-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 2747 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 2748 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2749 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 2750 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2751 // CHECK5: omp.inner.for.cond: 2752 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2753 // CHECK5-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 2754 // CHECK5-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 2755 // CHECK5-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 2756 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2757 // CHECK5: omp.inner.for.body: 2758 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2759 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 2760 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2761 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2762 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2763 // CHECK5: omp.body.continue: 2764 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2765 // CHECK5: omp.inner.for.inc: 2766 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2767 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 2768 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2769 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2770 // CHECK5: omp.inner.for.end: 2771 // CHECK5-NEXT: store i32 10, i32* [[I]], align 4 2772 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2773 // CHECK5-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2774 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 2775 // CHECK5-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 2776 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 2777 // CHECK5-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 2778 // CHECK5-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 2779 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 2780 // CHECK5: omp.inner.for.cond10: 2781 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 2782 // CHECK5-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 2783 // CHECK5-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 2784 // CHECK5-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 2785 // CHECK5-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 2786 // CHECK5: omp.inner.for.body13: 2787 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 2788 // CHECK5-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 2789 // CHECK5-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 2790 // CHECK5-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 2791 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 2792 // CHECK5: omp.body.continue16: 2793 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 2794 // CHECK5: omp.inner.for.inc17: 2795 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 2796 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 2797 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 2798 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 2799 // CHECK5: omp.inner.for.end19: 2800 // CHECK5-NEXT: store i32 10, i32* [[I9]], align 4 2801 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2802 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 2803 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2804 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 2805 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2806 // CHECK5-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 2807 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2808 // CHECK5-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 2809 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2810 // CHECK5-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 2811 // CHECK5-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 2812 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2813 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 2814 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 2815 // CHECK5-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 2816 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 2817 // CHECK5-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 2818 // CHECK5-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 2819 // CHECK5-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 2820 // CHECK5-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 2821 // CHECK5-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 2822 // CHECK5-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2823 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 2824 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2825 // CHECK5-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 2826 // CHECK5-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 2827 // CHECK5-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2828 // CHECK5-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 2829 // CHECK5-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 2830 // CHECK5-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 2831 // CHECK5-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 2832 // CHECK5-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 2833 // CHECK5-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 2834 // CHECK5-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 2835 // CHECK5-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 2836 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 2837 // CHECK5-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 2838 // CHECK5-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 2839 // CHECK5-NEXT: store i32 0, i32* [[I42]], align 4 2840 // CHECK5-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2841 // CHECK5-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 2842 // CHECK5-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2843 // CHECK5-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 2844 // CHECK5-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 2845 // CHECK5: land.lhs.true: 2846 // CHECK5-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2847 // CHECK5-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 2848 // CHECK5-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 2849 // CHECK5-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 2850 // CHECK5: simd.if.then: 2851 // CHECK5-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 2852 // CHECK5-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 2853 // CHECK5-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 2854 // CHECK5-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 2855 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]] 2856 // CHECK5: omp.inner.for.cond48: 2857 // CHECK5-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2858 // CHECK5-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 2859 // CHECK5-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]] 2860 // CHECK5-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]] 2861 // CHECK5: omp.inner.for.body50: 2862 // CHECK5-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2863 // CHECK5-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 2864 // CHECK5-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 2865 // CHECK5-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]] 2866 // CHECK5-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1 2867 // CHECK5-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1 2868 // CHECK5-NEXT: [[DIV54:%.*]] = udiv i32 [[ADD53]], 1 2869 // CHECK5-NEXT: [[MUL55:%.*]] = mul i32 1, [[DIV54]] 2870 // CHECK5-NEXT: [[CONV56:%.*]] = zext i32 [[MUL55]] to i64 2871 // CHECK5-NEXT: [[DIV57:%.*]] = sdiv i64 [[TMP33]], [[CONV56]] 2872 // CHECK5-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1 2873 // CHECK5-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]] 2874 // CHECK5-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32 2875 // CHECK5-NEXT: store i32 [[CONV60]], i32* [[I46]], align 4, !llvm.access.group !9 2876 // CHECK5-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 2877 // CHECK5-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64 2878 // CHECK5-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2879 // CHECK5-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2880 // CHECK5-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 2881 // CHECK5-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 2882 // CHECK5-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]] 2883 // CHECK5-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1 2884 // CHECK5-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1 2885 // CHECK5-NEXT: [[DIV65:%.*]] = udiv i32 [[ADD64]], 1 2886 // CHECK5-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]] 2887 // CHECK5-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 2888 // CHECK5-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]] 2889 // CHECK5-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 2890 // CHECK5-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 2891 // CHECK5-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]] 2892 // CHECK5-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1 2893 // CHECK5-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1 2894 // CHECK5-NEXT: [[DIV72:%.*]] = udiv i32 [[ADD71]], 1 2895 // CHECK5-NEXT: [[MUL73:%.*]] = mul i32 1, [[DIV72]] 2896 // CHECK5-NEXT: [[CONV74:%.*]] = zext i32 [[MUL73]] to i64 2897 // CHECK5-NEXT: [[MUL75:%.*]] = mul nsw i64 [[DIV68]], [[CONV74]] 2898 // CHECK5-NEXT: [[SUB76:%.*]] = sub nsw i64 [[TMP37]], [[MUL75]] 2899 // CHECK5-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1 2900 // CHECK5-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]] 2901 // CHECK5-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32 2902 // CHECK5-NEXT: store i32 [[CONV79]], i32* [[J47]], align 4, !llvm.access.group !9 2903 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]] 2904 // CHECK5: omp.body.continue80: 2905 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]] 2906 // CHECK5: omp.inner.for.inc81: 2907 // CHECK5-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2908 // CHECK5-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1 2909 // CHECK5-NEXT: store i64 [[ADD82]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 2910 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]] 2911 // CHECK5: omp.inner.for.end83: 2912 // CHECK5-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 2913 // CHECK5-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0 2914 // CHECK5-NEXT: [[DIV85:%.*]] = sdiv i32 [[SUB84]], 1 2915 // CHECK5-NEXT: [[MUL86:%.*]] = mul nsw i32 [[DIV85]], 1 2916 // CHECK5-NEXT: [[ADD87:%.*]] = add nsw i32 0, [[MUL86]] 2917 // CHECK5-NEXT: store i32 [[ADD87]], i32* [[I20]], align 4 2918 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2919 // CHECK5-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 2920 // CHECK5-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 2921 // CHECK5-NEXT: [[SUB88:%.*]] = sub i32 [[TMP46]], [[TMP47]] 2922 // CHECK5-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 2923 // CHECK5-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 2924 // CHECK5-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 2925 // CHECK5-NEXT: [[MUL92:%.*]] = mul i32 [[DIV91]], 1 2926 // CHECK5-NEXT: [[ADD93:%.*]] = add i32 [[TMP45]], [[MUL92]] 2927 // CHECK5-NEXT: store i32 [[ADD93]], i32* [[J47]], align 4 2928 // CHECK5-NEXT: br label [[SIMD_IF_END]] 2929 // CHECK5: simd.if.end: 2930 // CHECK5-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4 2931 // CHECK5-NEXT: ret i32 [[TMP48]] 2932 // 2933 // 2934 // CHECK5-LABEL: define {{[^@]+}}@__cxx_global_var_init 2935 // CHECK5-SAME: () #[[ATTR2:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 2936 // CHECK5-NEXT: entry: 2937 // CHECK5-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 2938 // CHECK5-NEXT: ret void 2939 // 2940 // 2941 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1Ei 2942 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 { 2943 // CHECK5-NEXT: entry: 2944 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2945 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2946 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2947 // CHECK5-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2948 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2949 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2950 // CHECK5-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 2951 // CHECK5-NEXT: ret void 2952 // 2953 // 2954 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2Ei 2955 // CHECK5-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 2956 // CHECK5-NEXT: entry: 2957 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 2958 // CHECK5-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 2959 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 2960 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2961 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 2962 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 2963 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 2964 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 2965 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 2966 // CHECK5-NEXT: [[A:%.*]] = alloca i32, align 4 2967 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 2968 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2969 // CHECK5-NEXT: [[A8:%.*]] = alloca i32, align 4 2970 // CHECK5-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 2971 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 2972 // CHECK5-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 2973 // CHECK5-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 2974 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 2975 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 2976 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 2977 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 2978 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 2979 // CHECK5-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 2980 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 2981 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 2982 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2983 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 2984 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 2985 // CHECK5-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 2986 // CHECK5-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 2987 // CHECK5-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 2988 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 2989 // CHECK5-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 2990 // CHECK5-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 2991 // CHECK5-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 2992 // CHECK5-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 2993 // CHECK5-NEXT: store i32 0, i32* [[TMP4]], align 4 2994 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 2995 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 2996 // CHECK5-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 2997 // CHECK5: simd.if.then: 2998 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 2999 // CHECK5-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 3000 // CHECK5-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 3001 // CHECK5-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 3002 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3003 // CHECK5: omp.inner.for.cond: 3004 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3005 // CHECK5-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 3006 // CHECK5-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !12 3007 // CHECK5-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 3008 // CHECK5-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3009 // CHECK5: omp.inner.for.body: 3010 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3011 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3012 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3013 // CHECK5-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !12 3014 // CHECK5-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !12 3015 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3016 // CHECK5: omp.body.continue: 3017 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3018 // CHECK5: omp.inner.for.inc: 3019 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3020 // CHECK5-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 3021 // CHECK5-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3022 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3023 // CHECK5: omp.inner.for.end: 3024 // CHECK5-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3025 // CHECK5-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 3026 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3027 // CHECK5-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 3028 // CHECK5-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 3029 // CHECK5-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 3030 // CHECK5-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 3031 // CHECK5-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 3032 // CHECK5-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 3033 // CHECK5-NEXT: br label [[SIMD_IF_END]] 3034 // CHECK5: simd.if.end: 3035 // CHECK5-NEXT: ret void 3036 // 3037 // 3038 // CHECK5-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 3039 // CHECK5-SAME: () #[[ATTR2]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3040 // CHECK5-NEXT: entry: 3041 // CHECK5-NEXT: call void @__cxx_global_var_init() 3042 // CHECK5-NEXT: ret void 3043 // 3044 // 3045 // CHECK6-LABEL: define {{[^@]+}}@main 3046 // CHECK6-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3047 // CHECK6-NEXT: entry: 3048 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3049 // CHECK6-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3050 // CHECK6-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3051 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3052 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3053 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3054 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3055 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3056 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 3057 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3058 // CHECK6-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3059 // CHECK6-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 3060 // CHECK6-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 3061 // CHECK6-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 3062 // CHECK6-NEXT: [[I9:%.*]] = alloca i32, align 4 3063 // CHECK6-NEXT: [[I20:%.*]] = alloca i32, align 4 3064 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 3065 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 3066 // CHECK6-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3067 // CHECK6-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 3068 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3069 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3070 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3071 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 3072 // CHECK6-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 3073 // CHECK6-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 3074 // CHECK6-NEXT: [[I42:%.*]] = alloca i32, align 4 3075 // CHECK6-NEXT: [[J:%.*]] = alloca i32, align 4 3076 // CHECK6-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 3077 // CHECK6-NEXT: [[I46:%.*]] = alloca i32, align 4 3078 // CHECK6-NEXT: [[J47:%.*]] = alloca i32, align 4 3079 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 3080 // CHECK6-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3081 // CHECK6-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3082 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3083 // CHECK6-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 3084 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3085 // CHECK6-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 3086 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3087 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3088 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 3089 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3090 // CHECK6: omp.inner.for.cond: 3091 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3092 // CHECK6-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 3093 // CHECK6-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3094 // CHECK6-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 3095 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3096 // CHECK6: omp.inner.for.body: 3097 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3098 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3099 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3100 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3101 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3102 // CHECK6: omp.body.continue: 3103 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3104 // CHECK6: omp.inner.for.inc: 3105 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3106 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 3107 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3108 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3109 // CHECK6: omp.inner.for.end: 3110 // CHECK6-NEXT: store i32 10, i32* [[I]], align 4 3111 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3112 // CHECK6-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3113 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 3114 // CHECK6-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 3115 // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 3116 // CHECK6-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 3117 // CHECK6-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 3118 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 3119 // CHECK6: omp.inner.for.cond10: 3120 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3121 // CHECK6-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 3122 // CHECK6-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 3123 // CHECK6-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 3124 // CHECK6-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 3125 // CHECK6: omp.inner.for.body13: 3126 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3127 // CHECK6-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 3128 // CHECK6-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3129 // CHECK6-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 3130 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 3131 // CHECK6: omp.body.continue16: 3132 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 3133 // CHECK6: omp.inner.for.inc17: 3134 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3135 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 3136 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3137 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 3138 // CHECK6: omp.inner.for.end19: 3139 // CHECK6-NEXT: store i32 10, i32* [[I9]], align 4 3140 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3141 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3142 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3143 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 3144 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3145 // CHECK6-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 3146 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3147 // CHECK6-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3148 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3149 // CHECK6-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 3150 // CHECK6-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3151 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3152 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3153 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 3154 // CHECK6-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3155 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3156 // CHECK6-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 3157 // CHECK6-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 3158 // CHECK6-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 3159 // CHECK6-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 3160 // CHECK6-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 3161 // CHECK6-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3162 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 3163 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3164 // CHECK6-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 3165 // CHECK6-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3166 // CHECK6-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3167 // CHECK6-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 3168 // CHECK6-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 3169 // CHECK6-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 3170 // CHECK6-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 3171 // CHECK6-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 3172 // CHECK6-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 3173 // CHECK6-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 3174 // CHECK6-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 3175 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 3176 // CHECK6-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 3177 // CHECK6-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 3178 // CHECK6-NEXT: store i32 0, i32* [[I42]], align 4 3179 // CHECK6-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3180 // CHECK6-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 3181 // CHECK6-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3182 // CHECK6-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 3183 // CHECK6-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 3184 // CHECK6: land.lhs.true: 3185 // CHECK6-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3186 // CHECK6-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3187 // CHECK6-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 3188 // CHECK6-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 3189 // CHECK6: simd.if.then: 3190 // CHECK6-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 3191 // CHECK6-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 3192 // CHECK6-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3193 // CHECK6-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 3194 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48:%.*]] 3195 // CHECK6: omp.inner.for.cond48: 3196 // CHECK6-NEXT: [[TMP31:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3197 // CHECK6-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 3198 // CHECK6-NEXT: [[CMP49:%.*]] = icmp ule i64 [[TMP31]], [[TMP32]] 3199 // CHECK6-NEXT: br i1 [[CMP49]], label [[OMP_INNER_FOR_BODY50:%.*]], label [[OMP_INNER_FOR_END83:%.*]] 3200 // CHECK6: omp.inner.for.body50: 3201 // CHECK6-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3202 // CHECK6-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3203 // CHECK6-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3204 // CHECK6-NEXT: [[SUB51:%.*]] = sub i32 [[TMP34]], [[TMP35]] 3205 // CHECK6-NEXT: [[SUB52:%.*]] = sub i32 [[SUB51]], 1 3206 // CHECK6-NEXT: [[ADD53:%.*]] = add i32 [[SUB52]], 1 3207 // CHECK6-NEXT: [[DIV54:%.*]] = udiv i32 [[ADD53]], 1 3208 // CHECK6-NEXT: [[MUL55:%.*]] = mul i32 1, [[DIV54]] 3209 // CHECK6-NEXT: [[CONV56:%.*]] = zext i32 [[MUL55]] to i64 3210 // CHECK6-NEXT: [[DIV57:%.*]] = sdiv i64 [[TMP33]], [[CONV56]] 3211 // CHECK6-NEXT: [[MUL58:%.*]] = mul nsw i64 [[DIV57]], 1 3212 // CHECK6-NEXT: [[ADD59:%.*]] = add nsw i64 0, [[MUL58]] 3213 // CHECK6-NEXT: [[CONV60:%.*]] = trunc i64 [[ADD59]] to i32 3214 // CHECK6-NEXT: store i32 [[CONV60]], i32* [[I46]], align 4, !llvm.access.group !9 3215 // CHECK6-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3216 // CHECK6-NEXT: [[CONV61:%.*]] = sext i32 [[TMP36]] to i64 3217 // CHECK6-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3218 // CHECK6-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3219 // CHECK6-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3220 // CHECK6-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3221 // CHECK6-NEXT: [[SUB62:%.*]] = sub i32 [[TMP39]], [[TMP40]] 3222 // CHECK6-NEXT: [[SUB63:%.*]] = sub i32 [[SUB62]], 1 3223 // CHECK6-NEXT: [[ADD64:%.*]] = add i32 [[SUB63]], 1 3224 // CHECK6-NEXT: [[DIV65:%.*]] = udiv i32 [[ADD64]], 1 3225 // CHECK6-NEXT: [[MUL66:%.*]] = mul i32 1, [[DIV65]] 3226 // CHECK6-NEXT: [[CONV67:%.*]] = zext i32 [[MUL66]] to i64 3227 // CHECK6-NEXT: [[DIV68:%.*]] = sdiv i64 [[TMP38]], [[CONV67]] 3228 // CHECK6-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3229 // CHECK6-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3230 // CHECK6-NEXT: [[SUB69:%.*]] = sub i32 [[TMP41]], [[TMP42]] 3231 // CHECK6-NEXT: [[SUB70:%.*]] = sub i32 [[SUB69]], 1 3232 // CHECK6-NEXT: [[ADD71:%.*]] = add i32 [[SUB70]], 1 3233 // CHECK6-NEXT: [[DIV72:%.*]] = udiv i32 [[ADD71]], 1 3234 // CHECK6-NEXT: [[MUL73:%.*]] = mul i32 1, [[DIV72]] 3235 // CHECK6-NEXT: [[CONV74:%.*]] = zext i32 [[MUL73]] to i64 3236 // CHECK6-NEXT: [[MUL75:%.*]] = mul nsw i64 [[DIV68]], [[CONV74]] 3237 // CHECK6-NEXT: [[SUB76:%.*]] = sub nsw i64 [[TMP37]], [[MUL75]] 3238 // CHECK6-NEXT: [[MUL77:%.*]] = mul nsw i64 [[SUB76]], 1 3239 // CHECK6-NEXT: [[ADD78:%.*]] = add nsw i64 [[CONV61]], [[MUL77]] 3240 // CHECK6-NEXT: [[CONV79:%.*]] = trunc i64 [[ADD78]] to i32 3241 // CHECK6-NEXT: store i32 [[CONV79]], i32* [[J47]], align 4, !llvm.access.group !9 3242 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE80:%.*]] 3243 // CHECK6: omp.body.continue80: 3244 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC81:%.*]] 3245 // CHECK6: omp.inner.for.inc81: 3246 // CHECK6-NEXT: [[TMP43:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3247 // CHECK6-NEXT: [[ADD82:%.*]] = add nsw i64 [[TMP43]], 1 3248 // CHECK6-NEXT: store i64 [[ADD82]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3249 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND48]], !llvm.loop [[LOOP10:![0-9]+]] 3250 // CHECK6: omp.inner.for.end83: 3251 // CHECK6-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3252 // CHECK6-NEXT: [[SUB84:%.*]] = sub nsw i32 [[TMP44]], 0 3253 // CHECK6-NEXT: [[DIV85:%.*]] = sdiv i32 [[SUB84]], 1 3254 // CHECK6-NEXT: [[MUL86:%.*]] = mul nsw i32 [[DIV85]], 1 3255 // CHECK6-NEXT: [[ADD87:%.*]] = add nsw i32 0, [[MUL86]] 3256 // CHECK6-NEXT: store i32 [[ADD87]], i32* [[I20]], align 4 3257 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3258 // CHECK6-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3259 // CHECK6-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3260 // CHECK6-NEXT: [[SUB88:%.*]] = sub i32 [[TMP46]], [[TMP47]] 3261 // CHECK6-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 3262 // CHECK6-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 3263 // CHECK6-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 3264 // CHECK6-NEXT: [[MUL92:%.*]] = mul i32 [[DIV91]], 1 3265 // CHECK6-NEXT: [[ADD93:%.*]] = add i32 [[TMP45]], [[MUL92]] 3266 // CHECK6-NEXT: store i32 [[ADD93]], i32* [[J47]], align 4 3267 // CHECK6-NEXT: br label [[SIMD_IF_END]] 3268 // CHECK6: simd.if.end: 3269 // CHECK6-NEXT: [[TMP48:%.*]] = load i32, i32* [[RETVAL]], align 4 3270 // CHECK6-NEXT: ret i32 [[TMP48]] 3271 // 3272 // 3273 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC2Ei 3274 // CHECK6-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 3275 // CHECK6-NEXT: entry: 3276 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3277 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3278 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3279 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 3280 // CHECK6-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3281 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3282 // CHECK6-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3283 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3284 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3285 // CHECK6-NEXT: [[A:%.*]] = alloca i32, align 4 3286 // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 3287 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3288 // CHECK6-NEXT: [[A8:%.*]] = alloca i32, align 4 3289 // CHECK6-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 3290 // CHECK6-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 3291 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3292 // CHECK6-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3293 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3294 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3295 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 3296 // CHECK6-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3297 // CHECK6-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 3298 // CHECK6-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 3299 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 3300 // CHECK6-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3301 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3302 // CHECK6-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 3303 // CHECK6-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3304 // CHECK6-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 3305 // CHECK6-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3306 // CHECK6-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3307 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3308 // CHECK6-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 3309 // CHECK6-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 3310 // CHECK6-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 3311 // CHECK6-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 3312 // CHECK6-NEXT: store i32 0, i32* [[TMP4]], align 4 3313 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3314 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3315 // CHECK6-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3316 // CHECK6: simd.if.then: 3317 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3318 // CHECK6-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 3319 // CHECK6-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 3320 // CHECK6-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 3321 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3322 // CHECK6: omp.inner.for.cond: 3323 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3324 // CHECK6-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 3325 // CHECK6-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !12 3326 // CHECK6-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 3327 // CHECK6-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3328 // CHECK6: omp.inner.for.body: 3329 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3330 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3331 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3332 // CHECK6-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !12 3333 // CHECK6-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !12 3334 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3335 // CHECK6: omp.body.continue: 3336 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3337 // CHECK6: omp.inner.for.inc: 3338 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3339 // CHECK6-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 3340 // CHECK6-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 3341 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 3342 // CHECK6: omp.inner.for.end: 3343 // CHECK6-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3344 // CHECK6-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 3345 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3346 // CHECK6-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 3347 // CHECK6-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 3348 // CHECK6-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 3349 // CHECK6-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 3350 // CHECK6-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 3351 // CHECK6-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 3352 // CHECK6-NEXT: br label [[SIMD_IF_END]] 3353 // CHECK6: simd.if.end: 3354 // CHECK6-NEXT: ret void 3355 // 3356 // 3357 // CHECK6-LABEL: define {{[^@]+}}@_ZN1SC1Ei 3358 // CHECK6-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 3359 // CHECK6-NEXT: entry: 3360 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3361 // CHECK6-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3362 // CHECK6-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3363 // CHECK6-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3364 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3365 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3366 // CHECK6-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3367 // CHECK6-NEXT: ret void 3368 // 3369 // 3370 // CHECK6-LABEL: define {{[^@]+}}@__cxx_global_var_init 3371 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3372 // CHECK6-NEXT: entry: 3373 // CHECK6-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 3374 // CHECK6-NEXT: ret void 3375 // 3376 // 3377 // CHECK6-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 3378 // CHECK6-SAME: () #[[ATTR3]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3379 // CHECK6-NEXT: entry: 3380 // CHECK6-NEXT: call void @__cxx_global_var_init() 3381 // CHECK6-NEXT: ret void 3382 // 3383 // 3384 // CHECK7-LABEL: define {{[^@]+}}@main 3385 // CHECK7-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3386 // CHECK7-NEXT: entry: 3387 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3388 // CHECK7-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3389 // CHECK7-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3390 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3391 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3392 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3393 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3394 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3395 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3396 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3397 // CHECK7-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3398 // CHECK7-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 3399 // CHECK7-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 3400 // CHECK7-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 3401 // CHECK7-NEXT: [[I9:%.*]] = alloca i32, align 4 3402 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4 3403 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 3404 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 3405 // CHECK7-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3406 // CHECK7-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 3407 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3408 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3409 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3410 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 3411 // CHECK7-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 3412 // CHECK7-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 3413 // CHECK7-NEXT: [[I42:%.*]] = alloca i32, align 4 3414 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4 3415 // CHECK7-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 3416 // CHECK7-NEXT: [[I46:%.*]] = alloca i32, align 4 3417 // CHECK7-NEXT: [[J47:%.*]] = alloca i32, align 4 3418 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 3419 // CHECK7-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3420 // CHECK7-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3421 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3422 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 3423 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3424 // CHECK7-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 3425 // CHECK7-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3426 // CHECK7-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3427 // CHECK7-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 3428 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3429 // CHECK7: omp.inner.for.cond: 3430 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3431 // CHECK7-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 3432 // CHECK7-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3433 // CHECK7-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 3434 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3435 // CHECK7: omp.inner.for.body: 3436 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3437 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3438 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3439 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3440 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3441 // CHECK7: omp.body.continue: 3442 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3443 // CHECK7: omp.inner.for.inc: 3444 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3445 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 3446 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3447 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3448 // CHECK7: omp.inner.for.end: 3449 // CHECK7-NEXT: store i32 10, i32* [[I]], align 4 3450 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3451 // CHECK7-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3452 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 3453 // CHECK7-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 3454 // CHECK7-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 3455 // CHECK7-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 3456 // CHECK7-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 3457 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 3458 // CHECK7: omp.inner.for.cond10: 3459 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3460 // CHECK7-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 3461 // CHECK7-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 3462 // CHECK7-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 3463 // CHECK7-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 3464 // CHECK7: omp.inner.for.body13: 3465 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3466 // CHECK7-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 3467 // CHECK7-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3468 // CHECK7-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 3469 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 3470 // CHECK7: omp.body.continue16: 3471 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 3472 // CHECK7: omp.inner.for.inc17: 3473 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3474 // CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 3475 // CHECK7-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3476 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 3477 // CHECK7: omp.inner.for.end19: 3478 // CHECK7-NEXT: store i32 10, i32* [[I9]], align 4 3479 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3480 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3481 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3482 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 3483 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3484 // CHECK7-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 3485 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3486 // CHECK7-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3487 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3488 // CHECK7-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 3489 // CHECK7-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3490 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3491 // CHECK7-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3492 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 3493 // CHECK7-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3494 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3495 // CHECK7-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 3496 // CHECK7-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 3497 // CHECK7-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 3498 // CHECK7-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 3499 // CHECK7-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 3500 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3501 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 3502 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3503 // CHECK7-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 3504 // CHECK7-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3505 // CHECK7-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3506 // CHECK7-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 3507 // CHECK7-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 3508 // CHECK7-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 3509 // CHECK7-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 3510 // CHECK7-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 3511 // CHECK7-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 3512 // CHECK7-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 3513 // CHECK7-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 3514 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 3515 // CHECK7-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 3516 // CHECK7-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 3517 // CHECK7-NEXT: store i32 0, i32* [[I42]], align 4 3518 // CHECK7-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3519 // CHECK7-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 3520 // CHECK7-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3521 // CHECK7-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 3522 // CHECK7-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 3523 // CHECK7: land.lhs.true: 3524 // CHECK7-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3525 // CHECK7-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3526 // CHECK7-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 3527 // CHECK7-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 3528 // CHECK7: simd.if.then: 3529 // CHECK7-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 3530 // CHECK7-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 3531 // CHECK7-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3532 // CHECK7-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 3533 // CHECK7-NEXT: [[TMP31:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_21]], align 1 3534 // CHECK7-NEXT: [[TOBOOL48:%.*]] = trunc i8 [[TMP31]] to i1 3535 // CHECK7-NEXT: br i1 [[TOBOOL48]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3536 // CHECK7: omp_if.then: 3537 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND49:%.*]] 3538 // CHECK7: omp.inner.for.cond49: 3539 // CHECK7-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3540 // CHECK7-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 3541 // CHECK7-NEXT: [[CMP50:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]] 3542 // CHECK7-NEXT: br i1 [[CMP50]], label [[OMP_INNER_FOR_BODY51:%.*]], label [[OMP_INNER_FOR_END84:%.*]] 3543 // CHECK7: omp.inner.for.body51: 3544 // CHECK7-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3545 // CHECK7-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3546 // CHECK7-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3547 // CHECK7-NEXT: [[SUB52:%.*]] = sub i32 [[TMP35]], [[TMP36]] 3548 // CHECK7-NEXT: [[SUB53:%.*]] = sub i32 [[SUB52]], 1 3549 // CHECK7-NEXT: [[ADD54:%.*]] = add i32 [[SUB53]], 1 3550 // CHECK7-NEXT: [[DIV55:%.*]] = udiv i32 [[ADD54]], 1 3551 // CHECK7-NEXT: [[MUL56:%.*]] = mul i32 1, [[DIV55]] 3552 // CHECK7-NEXT: [[CONV57:%.*]] = zext i32 [[MUL56]] to i64 3553 // CHECK7-NEXT: [[DIV58:%.*]] = sdiv i64 [[TMP34]], [[CONV57]] 3554 // CHECK7-NEXT: [[MUL59:%.*]] = mul nsw i64 [[DIV58]], 1 3555 // CHECK7-NEXT: [[ADD60:%.*]] = add nsw i64 0, [[MUL59]] 3556 // CHECK7-NEXT: [[CONV61:%.*]] = trunc i64 [[ADD60]] to i32 3557 // CHECK7-NEXT: store i32 [[CONV61]], i32* [[I46]], align 4, !llvm.access.group !9 3558 // CHECK7-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3559 // CHECK7-NEXT: [[CONV62:%.*]] = sext i32 [[TMP37]] to i64 3560 // CHECK7-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3561 // CHECK7-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3562 // CHECK7-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3563 // CHECK7-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3564 // CHECK7-NEXT: [[SUB63:%.*]] = sub i32 [[TMP40]], [[TMP41]] 3565 // CHECK7-NEXT: [[SUB64:%.*]] = sub i32 [[SUB63]], 1 3566 // CHECK7-NEXT: [[ADD65:%.*]] = add i32 [[SUB64]], 1 3567 // CHECK7-NEXT: [[DIV66:%.*]] = udiv i32 [[ADD65]], 1 3568 // CHECK7-NEXT: [[MUL67:%.*]] = mul i32 1, [[DIV66]] 3569 // CHECK7-NEXT: [[CONV68:%.*]] = zext i32 [[MUL67]] to i64 3570 // CHECK7-NEXT: [[DIV69:%.*]] = sdiv i64 [[TMP39]], [[CONV68]] 3571 // CHECK7-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3572 // CHECK7-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3573 // CHECK7-NEXT: [[SUB70:%.*]] = sub i32 [[TMP42]], [[TMP43]] 3574 // CHECK7-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 3575 // CHECK7-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 3576 // CHECK7-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 3577 // CHECK7-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 3578 // CHECK7-NEXT: [[CONV75:%.*]] = zext i32 [[MUL74]] to i64 3579 // CHECK7-NEXT: [[MUL76:%.*]] = mul nsw i64 [[DIV69]], [[CONV75]] 3580 // CHECK7-NEXT: [[SUB77:%.*]] = sub nsw i64 [[TMP38]], [[MUL76]] 3581 // CHECK7-NEXT: [[MUL78:%.*]] = mul nsw i64 [[SUB77]], 1 3582 // CHECK7-NEXT: [[ADD79:%.*]] = add nsw i64 [[CONV62]], [[MUL78]] 3583 // CHECK7-NEXT: [[CONV80:%.*]] = trunc i64 [[ADD79]] to i32 3584 // CHECK7-NEXT: store i32 [[CONV80]], i32* [[J47]], align 4, !llvm.access.group !9 3585 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE81:%.*]] 3586 // CHECK7: omp.body.continue81: 3587 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC82:%.*]] 3588 // CHECK7: omp.inner.for.inc82: 3589 // CHECK7-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3590 // CHECK7-NEXT: [[ADD83:%.*]] = add nsw i64 [[TMP44]], 1 3591 // CHECK7-NEXT: store i64 [[ADD83]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3592 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND49]], !llvm.loop [[LOOP10:![0-9]+]] 3593 // CHECK7: omp.inner.for.end84: 3594 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]] 3595 // CHECK7: omp_if.else: 3596 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND85:%.*]] 3597 // CHECK7: omp.inner.for.cond85: 3598 // CHECK7-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 3599 // CHECK7-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8 3600 // CHECK7-NEXT: [[CMP86:%.*]] = icmp ule i64 [[TMP45]], [[TMP46]] 3601 // CHECK7-NEXT: br i1 [[CMP86]], label [[OMP_INNER_FOR_BODY87:%.*]], label [[OMP_INNER_FOR_END120:%.*]] 3602 // CHECK7: omp.inner.for.body87: 3603 // CHECK7-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 3604 // CHECK7-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3605 // CHECK7-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3606 // CHECK7-NEXT: [[SUB88:%.*]] = sub i32 [[TMP48]], [[TMP49]] 3607 // CHECK7-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 3608 // CHECK7-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 3609 // CHECK7-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 3610 // CHECK7-NEXT: [[MUL92:%.*]] = mul i32 1, [[DIV91]] 3611 // CHECK7-NEXT: [[CONV93:%.*]] = zext i32 [[MUL92]] to i64 3612 // CHECK7-NEXT: [[DIV94:%.*]] = sdiv i64 [[TMP47]], [[CONV93]] 3613 // CHECK7-NEXT: [[MUL95:%.*]] = mul nsw i64 [[DIV94]], 1 3614 // CHECK7-NEXT: [[ADD96:%.*]] = add nsw i64 0, [[MUL95]] 3615 // CHECK7-NEXT: [[CONV97:%.*]] = trunc i64 [[ADD96]] to i32 3616 // CHECK7-NEXT: store i32 [[CONV97]], i32* [[I46]], align 4 3617 // CHECK7-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3618 // CHECK7-NEXT: [[CONV98:%.*]] = sext i32 [[TMP50]] to i64 3619 // CHECK7-NEXT: [[TMP51:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 3620 // CHECK7-NEXT: [[TMP52:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 3621 // CHECK7-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3622 // CHECK7-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3623 // CHECK7-NEXT: [[SUB99:%.*]] = sub i32 [[TMP53]], [[TMP54]] 3624 // CHECK7-NEXT: [[SUB100:%.*]] = sub i32 [[SUB99]], 1 3625 // CHECK7-NEXT: [[ADD101:%.*]] = add i32 [[SUB100]], 1 3626 // CHECK7-NEXT: [[DIV102:%.*]] = udiv i32 [[ADD101]], 1 3627 // CHECK7-NEXT: [[MUL103:%.*]] = mul i32 1, [[DIV102]] 3628 // CHECK7-NEXT: [[CONV104:%.*]] = zext i32 [[MUL103]] to i64 3629 // CHECK7-NEXT: [[DIV105:%.*]] = sdiv i64 [[TMP52]], [[CONV104]] 3630 // CHECK7-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3631 // CHECK7-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3632 // CHECK7-NEXT: [[SUB106:%.*]] = sub i32 [[TMP55]], [[TMP56]] 3633 // CHECK7-NEXT: [[SUB107:%.*]] = sub i32 [[SUB106]], 1 3634 // CHECK7-NEXT: [[ADD108:%.*]] = add i32 [[SUB107]], 1 3635 // CHECK7-NEXT: [[DIV109:%.*]] = udiv i32 [[ADD108]], 1 3636 // CHECK7-NEXT: [[MUL110:%.*]] = mul i32 1, [[DIV109]] 3637 // CHECK7-NEXT: [[CONV111:%.*]] = zext i32 [[MUL110]] to i64 3638 // CHECK7-NEXT: [[MUL112:%.*]] = mul nsw i64 [[DIV105]], [[CONV111]] 3639 // CHECK7-NEXT: [[SUB113:%.*]] = sub nsw i64 [[TMP51]], [[MUL112]] 3640 // CHECK7-NEXT: [[MUL114:%.*]] = mul nsw i64 [[SUB113]], 1 3641 // CHECK7-NEXT: [[ADD115:%.*]] = add nsw i64 [[CONV98]], [[MUL114]] 3642 // CHECK7-NEXT: [[CONV116:%.*]] = trunc i64 [[ADD115]] to i32 3643 // CHECK7-NEXT: store i32 [[CONV116]], i32* [[J47]], align 4 3644 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE117:%.*]] 3645 // CHECK7: omp.body.continue117: 3646 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC118:%.*]] 3647 // CHECK7: omp.inner.for.inc118: 3648 // CHECK7-NEXT: [[TMP57:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 3649 // CHECK7-NEXT: [[ADD119:%.*]] = add nsw i64 [[TMP57]], 1 3650 // CHECK7-NEXT: store i64 [[ADD119]], i64* [[DOTOMP_IV45]], align 8 3651 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND85]], !llvm.loop [[LOOP12:![0-9]+]] 3652 // CHECK7: omp.inner.for.end120: 3653 // CHECK7-NEXT: br label [[OMP_IF_END]] 3654 // CHECK7: omp_if.end: 3655 // CHECK7-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3656 // CHECK7-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP58]], 0 3657 // CHECK7-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 3658 // CHECK7-NEXT: [[MUL123:%.*]] = mul nsw i32 [[DIV122]], 1 3659 // CHECK7-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 3660 // CHECK7-NEXT: store i32 [[ADD124]], i32* [[I20]], align 4 3661 // CHECK7-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3662 // CHECK7-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3663 // CHECK7-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3664 // CHECK7-NEXT: [[SUB125:%.*]] = sub i32 [[TMP60]], [[TMP61]] 3665 // CHECK7-NEXT: [[SUB126:%.*]] = sub i32 [[SUB125]], 1 3666 // CHECK7-NEXT: [[ADD127:%.*]] = add i32 [[SUB126]], 1 3667 // CHECK7-NEXT: [[DIV128:%.*]] = udiv i32 [[ADD127]], 1 3668 // CHECK7-NEXT: [[MUL129:%.*]] = mul i32 [[DIV128]], 1 3669 // CHECK7-NEXT: [[ADD130:%.*]] = add i32 [[TMP59]], [[MUL129]] 3670 // CHECK7-NEXT: store i32 [[ADD130]], i32* [[J47]], align 4 3671 // CHECK7-NEXT: br label [[SIMD_IF_END]] 3672 // CHECK7: simd.if.end: 3673 // CHECK7-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4 3674 // CHECK7-NEXT: ret i32 [[TMP62]] 3675 // 3676 // 3677 // CHECK7-LABEL: define {{[^@]+}}@__cxx_global_var_init 3678 // CHECK7-SAME: () #[[ATTR2:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3679 // CHECK7-NEXT: entry: 3680 // CHECK7-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 3681 // CHECK7-NEXT: ret void 3682 // 3683 // 3684 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC1Ei 3685 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR3:[0-9]+]] align 2 { 3686 // CHECK7-NEXT: entry: 3687 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3688 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3689 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3690 // CHECK7-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3691 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3692 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3693 // CHECK7-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 3694 // CHECK7-NEXT: ret void 3695 // 3696 // 3697 // CHECK7-LABEL: define {{[^@]+}}@_ZN1SC2Ei 3698 // CHECK7-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR3]] align 2 { 3699 // CHECK7-NEXT: entry: 3700 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 3701 // CHECK7-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 3702 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 3703 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3704 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 3705 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3706 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 3707 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3708 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3709 // CHECK7-NEXT: [[A:%.*]] = alloca i32, align 4 3710 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 3711 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3712 // CHECK7-NEXT: [[A8:%.*]] = alloca i32, align 4 3713 // CHECK7-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 3714 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 3715 // CHECK7-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 3716 // CHECK7-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 3717 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 3718 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 3719 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 3720 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3721 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 3722 // CHECK7-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 3723 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 3724 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3725 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3726 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 3727 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3728 // CHECK7-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 3729 // CHECK7-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 3730 // CHECK7-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3731 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 3732 // CHECK7-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 3733 // CHECK7-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 3734 // CHECK7-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 3735 // CHECK7-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 3736 // CHECK7-NEXT: store i32 0, i32* [[TMP4]], align 4 3737 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3738 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 3739 // CHECK7-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 3740 // CHECK7: simd.if.then: 3741 // CHECK7-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3742 // CHECK7-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 3743 // CHECK7-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 3744 // CHECK7-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 3745 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3746 // CHECK7: omp.inner.for.cond: 3747 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3748 // CHECK7-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 3749 // CHECK7-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !14 3750 // CHECK7-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 3751 // CHECK7-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3752 // CHECK7: omp.inner.for.body: 3753 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3754 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 3755 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3756 // CHECK7-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !14 3757 // CHECK7-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !14 3758 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3759 // CHECK7: omp.body.continue: 3760 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3761 // CHECK7: omp.inner.for.inc: 3762 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3763 // CHECK7-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 3764 // CHECK7-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3765 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3766 // CHECK7: omp.inner.for.end: 3767 // CHECK7-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 3768 // CHECK7-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 3769 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 3770 // CHECK7-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 3771 // CHECK7-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 3772 // CHECK7-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 3773 // CHECK7-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 3774 // CHECK7-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 3775 // CHECK7-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 3776 // CHECK7-NEXT: br label [[SIMD_IF_END]] 3777 // CHECK7: simd.if.end: 3778 // CHECK7-NEXT: ret void 3779 // 3780 // 3781 // CHECK7-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 3782 // CHECK7-SAME: () #[[ATTR2]] section "__TEXT,__StaticInit,regular,pure_instructions" { 3783 // CHECK7-NEXT: entry: 3784 // CHECK7-NEXT: call void @__cxx_global_var_init() 3785 // CHECK7-NEXT: ret void 3786 // 3787 // 3788 // CHECK8-LABEL: define {{[^@]+}}@main 3789 // CHECK8-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3790 // CHECK8-NEXT: entry: 3791 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3792 // CHECK8-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3793 // CHECK8-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3794 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3795 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 3796 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 3797 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 3798 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3799 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 3800 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 3801 // CHECK8-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 3802 // CHECK8-NEXT: [[DOTOMP_LB5:%.*]] = alloca i64, align 8 3803 // CHECK8-NEXT: [[DOTOMP_UB6:%.*]] = alloca i64, align 8 3804 // CHECK8-NEXT: [[DOTOMP_IV7:%.*]] = alloca i32, align 4 3805 // CHECK8-NEXT: [[I9:%.*]] = alloca i32, align 4 3806 // CHECK8-NEXT: [[I20:%.*]] = alloca i32, align 4 3807 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_21:%.*]] = alloca i8, align 1 3808 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4 3809 // CHECK8-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 3810 // CHECK8-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 3811 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4 3812 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3813 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3814 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_31:%.*]] = alloca i64, align 8 3815 // CHECK8-NEXT: [[DOTOMP_LB40:%.*]] = alloca i64, align 8 3816 // CHECK8-NEXT: [[DOTOMP_UB41:%.*]] = alloca i64, align 8 3817 // CHECK8-NEXT: [[I42:%.*]] = alloca i32, align 4 3818 // CHECK8-NEXT: [[J:%.*]] = alloca i32, align 4 3819 // CHECK8-NEXT: [[DOTOMP_IV45:%.*]] = alloca i64, align 8 3820 // CHECK8-NEXT: [[I46:%.*]] = alloca i32, align 4 3821 // CHECK8-NEXT: [[J47:%.*]] = alloca i32, align 4 3822 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 3823 // CHECK8-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3824 // CHECK8-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3825 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3826 // CHECK8-NEXT: store i32 [[TMP0]], i32* [[DOTCAPTURE_EXPR_]], align 4 3827 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 3828 // CHECK8-NEXT: store i64 9, i64* [[DOTOMP_UB]], align 8 3829 // CHECK8-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 3830 // CHECK8-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 3831 // CHECK8-NEXT: store i32 [[CONV]], i32* [[DOTOMP_IV]], align 4 3832 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3833 // CHECK8: omp.inner.for.cond: 3834 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3835 // CHECK8-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64 3836 // CHECK8-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8 3837 // CHECK8-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV1]], [[TMP3]] 3838 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3839 // CHECK8: omp.inner.for.body: 3840 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3841 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1 3842 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3843 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3844 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3845 // CHECK8: omp.body.continue: 3846 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3847 // CHECK8: omp.inner.for.inc: 3848 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3849 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1 3850 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3851 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 3852 // CHECK8: omp.inner.for.end: 3853 // CHECK8-NEXT: store i32 10, i32* [[I]], align 4 3854 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3855 // CHECK8-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_3]], align 4 3856 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB5]], align 8 3857 // CHECK8-NEXT: store i64 9, i64* [[DOTOMP_UB6]], align 8 3858 // CHECK8-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTOMP_LB5]], align 8 3859 // CHECK8-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP7]] to i32 3860 // CHECK8-NEXT: store i32 [[CONV8]], i32* [[DOTOMP_IV7]], align 4 3861 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]] 3862 // CHECK8: omp.inner.for.cond10: 3863 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3864 // CHECK8-NEXT: [[CONV11:%.*]] = sext i32 [[TMP8]] to i64 3865 // CHECK8-NEXT: [[TMP9:%.*]] = load i64, i64* [[DOTOMP_UB6]], align 8, !llvm.access.group !5 3866 // CHECK8-NEXT: [[CMP12:%.*]] = icmp ule i64 [[CONV11]], [[TMP9]] 3867 // CHECK8-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY13:%.*]], label [[OMP_INNER_FOR_END19:%.*]] 3868 // CHECK8: omp.inner.for.body13: 3869 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3870 // CHECK8-NEXT: [[MUL14:%.*]] = mul nsw i32 [[TMP10]], 1 3871 // CHECK8-NEXT: [[ADD15:%.*]] = add nsw i32 0, [[MUL14]] 3872 // CHECK8-NEXT: store i32 [[ADD15]], i32* [[I9]], align 4, !llvm.access.group !5 3873 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE16:%.*]] 3874 // CHECK8: omp.body.continue16: 3875 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC17:%.*]] 3876 // CHECK8: omp.inner.for.inc17: 3877 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3878 // CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1 3879 // CHECK8-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV7]], align 4, !llvm.access.group !5 3880 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]] 3881 // CHECK8: omp.inner.for.end19: 3882 // CHECK8-NEXT: store i32 10, i32* [[I9]], align 4 3883 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3884 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0 3885 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 3886 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_21]], align 1 3887 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3888 // CHECK8-NEXT: store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_22]], align 4 3889 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3890 // CHECK8-NEXT: store i32 [[TMP14]], i32* [[DOTCAPTURE_EXPR_25]], align 4 3891 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3892 // CHECK8-NEXT: store i32 [[TMP15]], i32* [[DOTCAPTURE_EXPR_26]], align 4 3893 // CHECK8-NEXT: [[TMP16:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3894 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3895 // CHECK8-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64 3896 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8*, i8** [[TMP16]], i64 [[IDXPROM]] 3897 // CHECK8-NEXT: [[TMP18:%.*]] = load i8*, i8** [[ARRAYIDX]], align 8 3898 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 3899 // CHECK8-NEXT: [[IDXPROM28:%.*]] = sext i32 [[TMP19]] to i64 3900 // CHECK8-NEXT: [[ARRAYIDX29:%.*]] = getelementptr inbounds i8, i8* [[TMP18]], i64 [[IDXPROM28]] 3901 // CHECK8-NEXT: [[TMP20:%.*]] = load i8, i8* [[ARRAYIDX29]], align 1 3902 // CHECK8-NEXT: [[CONV30:%.*]] = sext i8 [[TMP20]] to i32 3903 // CHECK8-NEXT: store i32 [[CONV30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 3904 // CHECK8-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3905 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP21]], 0 3906 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3907 // CHECK8-NEXT: [[CONV32:%.*]] = sext i32 [[DIV]] to i64 3908 // CHECK8-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3909 // CHECK8-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3910 // CHECK8-NEXT: [[SUB33:%.*]] = sub i32 [[TMP22]], [[TMP23]] 3911 // CHECK8-NEXT: [[SUB34:%.*]] = sub i32 [[SUB33]], 1 3912 // CHECK8-NEXT: [[ADD35:%.*]] = add i32 [[SUB34]], 1 3913 // CHECK8-NEXT: [[DIV36:%.*]] = udiv i32 [[ADD35]], 1 3914 // CHECK8-NEXT: [[CONV37:%.*]] = zext i32 [[DIV36]] to i64 3915 // CHECK8-NEXT: [[MUL38:%.*]] = mul nsw i64 [[CONV32]], [[CONV37]] 3916 // CHECK8-NEXT: [[SUB39:%.*]] = sub nsw i64 [[MUL38]], 1 3917 // CHECK8-NEXT: store i64 [[SUB39]], i64* [[DOTCAPTURE_EXPR_31]], align 8 3918 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB40]], align 8 3919 // CHECK8-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_31]], align 8 3920 // CHECK8-NEXT: store i64 [[TMP24]], i64* [[DOTOMP_UB41]], align 8 3921 // CHECK8-NEXT: store i32 0, i32* [[I42]], align 4 3922 // CHECK8-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3923 // CHECK8-NEXT: store i32 [[TMP25]], i32* [[J]], align 4 3924 // CHECK8-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 3925 // CHECK8-NEXT: [[CMP43:%.*]] = icmp slt i32 0, [[TMP26]] 3926 // CHECK8-NEXT: br i1 [[CMP43]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]] 3927 // CHECK8: land.lhs.true: 3928 // CHECK8-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 3929 // CHECK8-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 3930 // CHECK8-NEXT: [[CMP44:%.*]] = icmp slt i32 [[TMP27]], [[TMP28]] 3931 // CHECK8-NEXT: br i1 [[CMP44]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]] 3932 // CHECK8: simd.if.then: 3933 // CHECK8-NEXT: [[TMP29:%.*]] = load i64, i64* [[DOTOMP_LB40]], align 8 3934 // CHECK8-NEXT: store i64 [[TMP29]], i64* [[DOTOMP_IV45]], align 8 3935 // CHECK8-NEXT: [[TMP30:%.*]] = load i8**, i8*** [[ARGV_ADDR]], align 8 3936 // CHECK8-NEXT: call void @llvm.assume(i1 true) [ "align"(i8** [[TMP30]], i64 8) ] 3937 // CHECK8-NEXT: [[TMP31:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_21]], align 1 3938 // CHECK8-NEXT: [[TOBOOL48:%.*]] = trunc i8 [[TMP31]] to i1 3939 // CHECK8-NEXT: br i1 [[TOBOOL48]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] 3940 // CHECK8: omp_if.then: 3941 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND49:%.*]] 3942 // CHECK8: omp.inner.for.cond49: 3943 // CHECK8-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3944 // CHECK8-NEXT: [[TMP33:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8, !llvm.access.group !9 3945 // CHECK8-NEXT: [[CMP50:%.*]] = icmp ule i64 [[TMP32]], [[TMP33]] 3946 // CHECK8-NEXT: br i1 [[CMP50]], label [[OMP_INNER_FOR_BODY51:%.*]], label [[OMP_INNER_FOR_END84:%.*]] 3947 // CHECK8: omp.inner.for.body51: 3948 // CHECK8-NEXT: [[TMP34:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3949 // CHECK8-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3950 // CHECK8-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3951 // CHECK8-NEXT: [[SUB52:%.*]] = sub i32 [[TMP35]], [[TMP36]] 3952 // CHECK8-NEXT: [[SUB53:%.*]] = sub i32 [[SUB52]], 1 3953 // CHECK8-NEXT: [[ADD54:%.*]] = add i32 [[SUB53]], 1 3954 // CHECK8-NEXT: [[DIV55:%.*]] = udiv i32 [[ADD54]], 1 3955 // CHECK8-NEXT: [[MUL56:%.*]] = mul i32 1, [[DIV55]] 3956 // CHECK8-NEXT: [[CONV57:%.*]] = zext i32 [[MUL56]] to i64 3957 // CHECK8-NEXT: [[DIV58:%.*]] = sdiv i64 [[TMP34]], [[CONV57]] 3958 // CHECK8-NEXT: [[MUL59:%.*]] = mul nsw i64 [[DIV58]], 1 3959 // CHECK8-NEXT: [[ADD60:%.*]] = add nsw i64 0, [[MUL59]] 3960 // CHECK8-NEXT: [[CONV61:%.*]] = trunc i64 [[ADD60]] to i32 3961 // CHECK8-NEXT: store i32 [[CONV61]], i32* [[I46]], align 4, !llvm.access.group !9 3962 // CHECK8-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3963 // CHECK8-NEXT: [[CONV62:%.*]] = sext i32 [[TMP37]] to i64 3964 // CHECK8-NEXT: [[TMP38:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3965 // CHECK8-NEXT: [[TMP39:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3966 // CHECK8-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3967 // CHECK8-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3968 // CHECK8-NEXT: [[SUB63:%.*]] = sub i32 [[TMP40]], [[TMP41]] 3969 // CHECK8-NEXT: [[SUB64:%.*]] = sub i32 [[SUB63]], 1 3970 // CHECK8-NEXT: [[ADD65:%.*]] = add i32 [[SUB64]], 1 3971 // CHECK8-NEXT: [[DIV66:%.*]] = udiv i32 [[ADD65]], 1 3972 // CHECK8-NEXT: [[MUL67:%.*]] = mul i32 1, [[DIV66]] 3973 // CHECK8-NEXT: [[CONV68:%.*]] = zext i32 [[MUL67]] to i64 3974 // CHECK8-NEXT: [[DIV69:%.*]] = sdiv i64 [[TMP39]], [[CONV68]] 3975 // CHECK8-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4, !llvm.access.group !9 3976 // CHECK8-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4, !llvm.access.group !9 3977 // CHECK8-NEXT: [[SUB70:%.*]] = sub i32 [[TMP42]], [[TMP43]] 3978 // CHECK8-NEXT: [[SUB71:%.*]] = sub i32 [[SUB70]], 1 3979 // CHECK8-NEXT: [[ADD72:%.*]] = add i32 [[SUB71]], 1 3980 // CHECK8-NEXT: [[DIV73:%.*]] = udiv i32 [[ADD72]], 1 3981 // CHECK8-NEXT: [[MUL74:%.*]] = mul i32 1, [[DIV73]] 3982 // CHECK8-NEXT: [[CONV75:%.*]] = zext i32 [[MUL74]] to i64 3983 // CHECK8-NEXT: [[MUL76:%.*]] = mul nsw i64 [[DIV69]], [[CONV75]] 3984 // CHECK8-NEXT: [[SUB77:%.*]] = sub nsw i64 [[TMP38]], [[MUL76]] 3985 // CHECK8-NEXT: [[MUL78:%.*]] = mul nsw i64 [[SUB77]], 1 3986 // CHECK8-NEXT: [[ADD79:%.*]] = add nsw i64 [[CONV62]], [[MUL78]] 3987 // CHECK8-NEXT: [[CONV80:%.*]] = trunc i64 [[ADD79]] to i32 3988 // CHECK8-NEXT: store i32 [[CONV80]], i32* [[J47]], align 4, !llvm.access.group !9 3989 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE81:%.*]] 3990 // CHECK8: omp.body.continue81: 3991 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC82:%.*]] 3992 // CHECK8: omp.inner.for.inc82: 3993 // CHECK8-NEXT: [[TMP44:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3994 // CHECK8-NEXT: [[ADD83:%.*]] = add nsw i64 [[TMP44]], 1 3995 // CHECK8-NEXT: store i64 [[ADD83]], i64* [[DOTOMP_IV45]], align 8, !llvm.access.group !9 3996 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND49]], !llvm.loop [[LOOP10:![0-9]+]] 3997 // CHECK8: omp.inner.for.end84: 3998 // CHECK8-NEXT: br label [[OMP_IF_END:%.*]] 3999 // CHECK8: omp_if.else: 4000 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND85:%.*]] 4001 // CHECK8: omp.inner.for.cond85: 4002 // CHECK8-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4003 // CHECK8-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTOMP_UB41]], align 8 4004 // CHECK8-NEXT: [[CMP86:%.*]] = icmp ule i64 [[TMP45]], [[TMP46]] 4005 // CHECK8-NEXT: br i1 [[CMP86]], label [[OMP_INNER_FOR_BODY87:%.*]], label [[OMP_INNER_FOR_END120:%.*]] 4006 // CHECK8: omp.inner.for.body87: 4007 // CHECK8-NEXT: [[TMP47:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4008 // CHECK8-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4009 // CHECK8-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4010 // CHECK8-NEXT: [[SUB88:%.*]] = sub i32 [[TMP48]], [[TMP49]] 4011 // CHECK8-NEXT: [[SUB89:%.*]] = sub i32 [[SUB88]], 1 4012 // CHECK8-NEXT: [[ADD90:%.*]] = add i32 [[SUB89]], 1 4013 // CHECK8-NEXT: [[DIV91:%.*]] = udiv i32 [[ADD90]], 1 4014 // CHECK8-NEXT: [[MUL92:%.*]] = mul i32 1, [[DIV91]] 4015 // CHECK8-NEXT: [[CONV93:%.*]] = zext i32 [[MUL92]] to i64 4016 // CHECK8-NEXT: [[DIV94:%.*]] = sdiv i64 [[TMP47]], [[CONV93]] 4017 // CHECK8-NEXT: [[MUL95:%.*]] = mul nsw i64 [[DIV94]], 1 4018 // CHECK8-NEXT: [[ADD96:%.*]] = add nsw i64 0, [[MUL95]] 4019 // CHECK8-NEXT: [[CONV97:%.*]] = trunc i64 [[ADD96]] to i32 4020 // CHECK8-NEXT: store i32 [[CONV97]], i32* [[I46]], align 4 4021 // CHECK8-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4022 // CHECK8-NEXT: [[CONV98:%.*]] = sext i32 [[TMP50]] to i64 4023 // CHECK8-NEXT: [[TMP51:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4024 // CHECK8-NEXT: [[TMP52:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4025 // CHECK8-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4026 // CHECK8-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4027 // CHECK8-NEXT: [[SUB99:%.*]] = sub i32 [[TMP53]], [[TMP54]] 4028 // CHECK8-NEXT: [[SUB100:%.*]] = sub i32 [[SUB99]], 1 4029 // CHECK8-NEXT: [[ADD101:%.*]] = add i32 [[SUB100]], 1 4030 // CHECK8-NEXT: [[DIV102:%.*]] = udiv i32 [[ADD101]], 1 4031 // CHECK8-NEXT: [[MUL103:%.*]] = mul i32 1, [[DIV102]] 4032 // CHECK8-NEXT: [[CONV104:%.*]] = zext i32 [[MUL103]] to i64 4033 // CHECK8-NEXT: [[DIV105:%.*]] = sdiv i64 [[TMP52]], [[CONV104]] 4034 // CHECK8-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4035 // CHECK8-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4036 // CHECK8-NEXT: [[SUB106:%.*]] = sub i32 [[TMP55]], [[TMP56]] 4037 // CHECK8-NEXT: [[SUB107:%.*]] = sub i32 [[SUB106]], 1 4038 // CHECK8-NEXT: [[ADD108:%.*]] = add i32 [[SUB107]], 1 4039 // CHECK8-NEXT: [[DIV109:%.*]] = udiv i32 [[ADD108]], 1 4040 // CHECK8-NEXT: [[MUL110:%.*]] = mul i32 1, [[DIV109]] 4041 // CHECK8-NEXT: [[CONV111:%.*]] = zext i32 [[MUL110]] to i64 4042 // CHECK8-NEXT: [[MUL112:%.*]] = mul nsw i64 [[DIV105]], [[CONV111]] 4043 // CHECK8-NEXT: [[SUB113:%.*]] = sub nsw i64 [[TMP51]], [[MUL112]] 4044 // CHECK8-NEXT: [[MUL114:%.*]] = mul nsw i64 [[SUB113]], 1 4045 // CHECK8-NEXT: [[ADD115:%.*]] = add nsw i64 [[CONV98]], [[MUL114]] 4046 // CHECK8-NEXT: [[CONV116:%.*]] = trunc i64 [[ADD115]] to i32 4047 // CHECK8-NEXT: store i32 [[CONV116]], i32* [[J47]], align 4 4048 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE117:%.*]] 4049 // CHECK8: omp.body.continue117: 4050 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC118:%.*]] 4051 // CHECK8: omp.inner.for.inc118: 4052 // CHECK8-NEXT: [[TMP57:%.*]] = load i64, i64* [[DOTOMP_IV45]], align 8 4053 // CHECK8-NEXT: [[ADD119:%.*]] = add nsw i64 [[TMP57]], 1 4054 // CHECK8-NEXT: store i64 [[ADD119]], i64* [[DOTOMP_IV45]], align 8 4055 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND85]], !llvm.loop [[LOOP12:![0-9]+]] 4056 // CHECK8: omp.inner.for.end120: 4057 // CHECK8-NEXT: br label [[OMP_IF_END]] 4058 // CHECK8: omp_if.end: 4059 // CHECK8-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4 4060 // CHECK8-NEXT: [[SUB121:%.*]] = sub nsw i32 [[TMP58]], 0 4061 // CHECK8-NEXT: [[DIV122:%.*]] = sdiv i32 [[SUB121]], 1 4062 // CHECK8-NEXT: [[MUL123:%.*]] = mul nsw i32 [[DIV122]], 1 4063 // CHECK8-NEXT: [[ADD124:%.*]] = add nsw i32 0, [[MUL123]] 4064 // CHECK8-NEXT: store i32 [[ADD124]], i32* [[I20]], align 4 4065 // CHECK8-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4066 // CHECK8-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4067 // CHECK8-NEXT: [[TMP61:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4068 // CHECK8-NEXT: [[SUB125:%.*]] = sub i32 [[TMP60]], [[TMP61]] 4069 // CHECK8-NEXT: [[SUB126:%.*]] = sub i32 [[SUB125]], 1 4070 // CHECK8-NEXT: [[ADD127:%.*]] = add i32 [[SUB126]], 1 4071 // CHECK8-NEXT: [[DIV128:%.*]] = udiv i32 [[ADD127]], 1 4072 // CHECK8-NEXT: [[MUL129:%.*]] = mul i32 [[DIV128]], 1 4073 // CHECK8-NEXT: [[ADD130:%.*]] = add i32 [[TMP59]], [[MUL129]] 4074 // CHECK8-NEXT: store i32 [[ADD130]], i32* [[J47]], align 4 4075 // CHECK8-NEXT: br label [[SIMD_IF_END]] 4076 // CHECK8: simd.if.end: 4077 // CHECK8-NEXT: [[TMP62:%.*]] = load i32, i32* [[RETVAL]], align 4 4078 // CHECK8-NEXT: ret i32 [[TMP62]] 4079 // 4080 // 4081 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC2Ei 4082 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 { 4083 // CHECK8-NEXT: entry: 4084 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4085 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4086 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1 4087 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 4088 // CHECK8-NEXT: [[_TMP2:%.*]] = alloca i32*, align 8 4089 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4 4090 // CHECK8-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4 4091 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8 4092 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8 4093 // CHECK8-NEXT: [[A:%.*]] = alloca i32, align 4 4094 // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32*, align 8 4095 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4096 // CHECK8-NEXT: [[A8:%.*]] = alloca i32, align 4 4097 // CHECK8-NEXT: [[_TMP9:%.*]] = alloca i32*, align 8 4098 // CHECK8-NEXT: [[_TMP14:%.*]] = alloca i32*, align 8 4099 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4100 // CHECK8-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4101 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4102 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4103 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 4104 // CHECK8-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 4105 // CHECK8-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1 4106 // CHECK8-NEXT: store i32* [[TMP]], i32** [[_TMP2]], align 8 4107 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[C_ADDR]], align 4 4108 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_3]], align 4 4109 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4110 // CHECK8-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0 4111 // CHECK8-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4112 // CHECK8-NEXT: [[SUB5:%.*]] = sub nsw i32 [[DIV]], 1 4113 // CHECK8-NEXT: store i32 [[SUB5]], i32* [[DOTCAPTURE_EXPR_4]], align 4 4114 // CHECK8-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8 4115 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4 4116 // CHECK8-NEXT: [[CONV:%.*]] = sext i32 [[TMP3]] to i64 4117 // CHECK8-NEXT: store i64 [[CONV]], i64* [[DOTOMP_UB]], align 8 4118 // CHECK8-NEXT: store i32* [[A]], i32** [[_TMP6]], align 8 4119 // CHECK8-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP6]], align 8 4120 // CHECK8-NEXT: store i32 0, i32* [[TMP4]], align 4 4121 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4122 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4123 // CHECK8-NEXT: br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]] 4124 // CHECK8: simd.if.then: 4125 // CHECK8-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8 4126 // CHECK8-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP6]] to i32 4127 // CHECK8-NEXT: store i32 [[CONV7]], i32* [[DOTOMP_IV]], align 4 4128 // CHECK8-NEXT: store i32* [[A8]], i32** [[_TMP9]], align 8 4129 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4130 // CHECK8: omp.inner.for.cond: 4131 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4132 // CHECK8-NEXT: [[CONV10:%.*]] = sext i32 [[TMP7]] to i64 4133 // CHECK8-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !14 4134 // CHECK8-NEXT: [[CMP11:%.*]] = icmp ule i64 [[CONV10]], [[TMP8]] 4135 // CHECK8-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4136 // CHECK8: omp.inner.for.body: 4137 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4138 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 4139 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4140 // CHECK8-NEXT: [[TMP10:%.*]] = load i32*, i32** [[_TMP9]], align 8, !llvm.access.group !14 4141 // CHECK8-NEXT: store i32 [[ADD]], i32* [[TMP10]], align 4, !llvm.access.group !14 4142 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4143 // CHECK8: omp.body.continue: 4144 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4145 // CHECK8: omp.inner.for.inc: 4146 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4147 // CHECK8-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP11]], 1 4148 // CHECK8-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 4149 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 4150 // CHECK8: omp.inner.for.end: 4151 // CHECK8-NEXT: [[A13:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 4152 // CHECK8-NEXT: store i32* [[A13]], i32** [[_TMP14]], align 8 4153 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 4154 // CHECK8-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP12]], 0 4155 // CHECK8-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 4156 // CHECK8-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 4157 // CHECK8-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] 4158 // CHECK8-NEXT: [[TMP13:%.*]] = load i32*, i32** [[_TMP14]], align 8 4159 // CHECK8-NEXT: store i32 [[ADD18]], i32* [[TMP13]], align 4 4160 // CHECK8-NEXT: br label [[SIMD_IF_END]] 4161 // CHECK8: simd.if.end: 4162 // CHECK8-NEXT: ret void 4163 // 4164 // 4165 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SC1Ei 4166 // CHECK8-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[C:%.*]]) unnamed_addr #[[ATTR2]] align 2 { 4167 // CHECK8-NEXT: entry: 4168 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 4169 // CHECK8-NEXT: [[C_ADDR:%.*]] = alloca i32, align 4 4170 // CHECK8-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 4171 // CHECK8-NEXT: store i32 [[C]], i32* [[C_ADDR]], align 4 4172 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 4173 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[C_ADDR]], align 4 4174 // CHECK8-NEXT: call void @_ZN1SC2Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]]) 4175 // CHECK8-NEXT: ret void 4176 // 4177 // 4178 // CHECK8-LABEL: define {{[^@]+}}@__cxx_global_var_init 4179 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4180 // CHECK8-NEXT: entry: 4181 // CHECK8-NEXT: call void @_ZN1SC1Ei(%struct.S* noundef nonnull align 4 dereferenceable(4) @s, i32 noundef 1) 4182 // CHECK8-NEXT: ret void 4183 // 4184 // 4185 // CHECK8-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_parallel_master_taskloop_simd_codegen.cpp 4186 // CHECK8-SAME: () #[[ATTR3]] section "__TEXT,__StaticInit,regular,pure_instructions" { 4187 // CHECK8-NEXT: entry: 4188 // CHECK8-NEXT: call void @__cxx_global_var_init() 4189 // CHECK8-NEXT: ret void 4190 // 4191