1 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s 2 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 3 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s 4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck %s --check-prefix=TERM_DEBUG 5 6 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck --check-prefix SIMD-ONLY0 %s 7 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s 8 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s 9 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s 10 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} 11 // expected-no-diagnostics 12 #ifndef HEADER 13 #define HEADER 14 15 long long get_val() { return 0; } 16 double *g_ptr; 17 18 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* {{.+}}, float* {{.+}}, float* {{.+}}, float* {{.+}}) 19 void simple(float *a, float *b, float *c, float *d) { 20 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 21 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val 22 // CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]] 23 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 24 // CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]] 25 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 26 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 27 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 28 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 29 // CHECK: store i32 -1, i32* [[A:%.+]], 30 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 31 // CHECK: store i32 -1, i32* [[R:%[^,]+]], 32 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 33 #pragma omp parallel for simd 34 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) 35 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 36 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5 37 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 38 // CHECK: [[TRUE]]: 39 // CHECK: br label %[[SWITCH:[^,]+]] 40 // CHECK: [[FALSE]]: 41 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 42 // CHECK: br label %[[SWITCH]] 43 // CHECK: [[SWITCH]]: 44 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 45 // CHECK: store i32 [[UP]], i32* [[UB]], 46 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 47 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]], 48 49 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 50 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] 51 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] 52 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]] 53 for (int i = 3; i < 32; i += 5) { 54 // CHECK: [[SIMPLE_LOOP1_BODY]]: 55 // Start of body: calculate i from IV: 56 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]] 57 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5 58 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]] 59 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 60 // ... loop body ... 61 // End of body: store into a[i]: 62 // CHECK: store float [[RESULT:%.+]], float* 63 a[i] = b[i] * c[i] * d[i]; 64 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]] 65 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 66 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] 67 // br label %{{.+}}, !llvm.loop !{{.+}} 68 } 69 // CHECK: [[SIMPLE_LOOP1_END]]: 70 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 71 72 long long k = get_val(); 73 74 #pragma omp parallel for simd linear(k : 3) schedule(dynamic) 75 // CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR:%[^,]+]] 76 // CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]] 77 78 // CHECK: call void @__kmpc_dispatch_init_4(%ident_t* {{.+}}, i32 %{{.+}}, i32 35, i32 0, i32 8, i32 1, i32 1) 79 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}}) 80 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0 81 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]] 82 // CHECK: [[CONT]]: 83 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 84 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]], 85 86 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]] 87 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 88 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]] 89 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]] 90 for (int i = 10; i > 1; i--) { 91 // CHECK: [[SIMPLE_LOOP2_BODY]]: 92 // Start of body: calculate i from IV: 93 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 94 // FIXME: It is interesting, why the following "mul 1" was not constant folded? 95 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1 96 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]] 97 // CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 98 // 99 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 100 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 101 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3 102 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64 103 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]] 104 // Update of the privatized version of linear variable! 105 // CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]] 106 a[k]++; 107 k = k + 3; 108 // CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 109 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1 110 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]] 111 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]] 112 } 113 // CHECK: [[SIMPLE_LOOP2_END]]: 114 // 115 // Update linear vars after loop, as the loop was operating on a private version. 116 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]] 117 // CHECK-NEXT: [[LIN_ADD2:%.+]] = add nsw i64 [[LIN0_2]], 27 118 // CHECK-NEXT: store i64 [[LIN_ADD2]], i64* %{{.+}} 119 120 int lin = 12; 121 #pragma omp parallel for simd linear(lin : get_val()), linear(g_ptr) 122 123 // CHECK: alloca i32, 124 // Init linear private var. 125 // CHECK: [[LIN_VAR:%.+]] = load i32*, i32** % 126 // CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]] 127 // CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]] 128 // Remember linear step. 129 // CHECK: [[CALL_VAL:%.+]] = invoke 130 // CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]] 131 132 // CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:%.+]], 133 // CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]] 134 135 // CHECK: call void @__kmpc_for_static_init_8u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) 136 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 137 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3 138 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 139 // CHECK: [[TRUE]]: 140 // CHECK: br label %[[SWITCH:[^,]+]] 141 // CHECK: [[FALSE]]: 142 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 143 // CHECK: br label %[[SWITCH]] 144 // CHECK: [[SWITCH]]: 145 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 146 // CHECK: store i64 [[UP]], i64* [[UB]], 147 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], 148 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]], 149 150 // CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]] 151 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]] 152 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]] 153 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]] 154 for (unsigned long long it = 2000; it >= 600; it-=400) { 155 // CHECK: [[SIMPLE_LOOP3_BODY]]: 156 // Start of body: calculate it from IV: 157 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]] 158 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400 159 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]] 160 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* {{.+}} 161 // 162 // Linear start and step are used to calculate current value of the linear variable. 163 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]] 164 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]] 165 // CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]] 166 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]] 167 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]] 168 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1 169 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]] 170 // CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]] 171 *g_ptr++ = 0.0; 172 // CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]] 173 // CHECK: store double{{.*}}[[GEP_VAL]] 174 a[it + lin]++; 175 // CHECK: [[FLT_INC:%.+]] = fadd float 176 // CHECK-NEXT: store float [[FLT_INC]], 177 // CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]] 178 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1 179 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]] 180 } 181 // CHECK: [[SIMPLE_LOOP3_END]]: 182 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 183 // 184 // Linear start and step are used to calculate final value of the linear variables. 185 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]] 186 // CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]] 187 // CHECK: store i32 {{.+}}, i32* [[LIN_VAR]], 188 // CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]] 189 // CHECK: store double* {{.*}}[[GLIN_VAR]] 190 191 #pragma omp parallel for simd 192 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) 193 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 194 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3 195 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 196 // CHECK: [[TRUE]]: 197 // CHECK: br label %[[SWITCH:[^,]+]] 198 // CHECK: [[FALSE]]: 199 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 200 // CHECK: br label %[[SWITCH]] 201 // CHECK: [[SWITCH]]: 202 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 203 // CHECK: store i32 [[UP]], i32* [[UB]], 204 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 205 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]], 206 207 // CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]] 208 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] 209 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]] 210 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]] 211 for (short it = 6; it <= 20; it-=-4) { 212 // CHECK: [[SIMPLE_LOOP4_BODY]]: 213 // Start of body: calculate it from IV: 214 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]] 215 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4 216 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]] 217 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16 218 // CHECK-NEXT: store i16 [[LC_IT_3]], i16* 219 220 // CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]] 221 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1 222 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]] 223 } 224 // CHECK: [[SIMPLE_LOOP4_END]]: 225 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 226 227 #pragma omp parallel for simd 228 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) 229 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 230 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25 231 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 232 // CHECK: [[TRUE]]: 233 // CHECK: br label %[[SWITCH:[^,]+]] 234 // CHECK: [[FALSE]]: 235 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 236 // CHECK: br label %[[SWITCH]] 237 // CHECK: [[SWITCH]]: 238 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 239 // CHECK: store i32 [[UP]], i32* [[UB]], 240 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 241 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]], 242 243 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]] 244 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] 245 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]] 246 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]] 247 for (unsigned char it = 'z'; it >= 'a'; it+=-1) { 248 // CHECK: [[SIMPLE_LOOP5_BODY]]: 249 // Start of body: calculate it from IV: 250 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]] 251 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1 252 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]] 253 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8 254 // CHECK-NEXT: store i8 [[LC_IT_2]], i8* {{.+}}, 255 256 // CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]] 257 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1 258 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]] 259 } 260 // CHECK: [[SIMPLE_LOOP5_END]]: 261 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 262 263 // CHECK-NOT: mul i32 %{{.+}}, 10 264 #pragma omp parallel for simd 265 for (unsigned i=100; i<10; i+=10) { 266 } 267 268 int A; 269 { 270 A = -1; 271 #pragma omp parallel for simd lastprivate(A) 272 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) 273 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 274 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6 275 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 276 // CHECK: [[TRUE]]: 277 // CHECK: br label %[[SWITCH:[^,]+]] 278 // CHECK: [[FALSE]]: 279 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 280 // CHECK: br label %[[SWITCH]] 281 // CHECK: [[SWITCH]]: 282 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 283 // CHECK: store i64 [[UP]], i64* [[UB]], 284 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], 285 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]], 286 287 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]] 288 // CHECK: [[SIMD_LOOP7_COND]]: 289 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]] 290 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] 291 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]] 292 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]] 293 for (long long i = -10; i < 10; i += 3) { 294 // CHECK: [[SIMPLE_LOOP7_BODY]]: 295 // Start of body: calculate i from IV: 296 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]] 297 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3 298 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]] 299 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]], 300 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]] 301 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32 302 // CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]], 303 A = i; 304 // CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]] 305 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1 306 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]] 307 } 308 // CHECK: [[SIMPLE_LOOP7_END]]: 309 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 310 // CHECK: load i32, i32* 311 // CHECK: icmp ne i32 %{{.+}}, 0 312 // CHECK: br i1 %{{.+}}, label 313 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]], 314 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}}, 315 // CHECK-NEXT: br label 316 } 317 int R; 318 { 319 R = -1; 320 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]], 321 #pragma omp parallel for simd reduction(*:R) 322 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) 323 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 324 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6 325 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 326 // CHECK: [[TRUE]]: 327 // CHECK: br label %[[SWITCH:[^,]+]] 328 // CHECK: [[FALSE]]: 329 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 330 // CHECK: br label %[[SWITCH]] 331 // CHECK: [[SWITCH]]: 332 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 333 // CHECK: store i64 [[UP]], i64* [[UB]], 334 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], 335 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]], 336 337 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]] 338 // CHECK: [[SIMD_LOOP8_COND]]: 339 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]] 340 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] 341 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]] 342 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]] 343 for (long long i = -10; i < 10; i += 3) { 344 // CHECK: [[SIMPLE_LOOP8_BODY]]: 345 // Start of body: calculate i from IV: 346 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]] 347 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3 348 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]] 349 // CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]], 350 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]] 351 // CHECK: store i32 %{{.+}}, i32* [[R_PRIV]], 352 R *= i; 353 // CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]] 354 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1 355 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]] 356 } 357 // CHECK: [[SIMPLE_LOOP8_END]]: 358 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 359 // CHECK: call i32 @__kmpc_reduce_nowait( 360 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]], 361 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]] 362 // CHECK-NEXT: store i32 [[RED]], i32* %{{.+}}, 363 // CHECK-NEXT: call void @__kmpc_end_reduce_nowait( 364 } 365 } 366 367 template <class T, unsigned K> T tfoo(T a) { return a + K; } 368 369 template <typename T, unsigned N> 370 int templ1(T a, T *z) { 371 #pragma omp parallel for simd collapse(N) 372 for (int i = 0; i < N * 2; i++) { 373 for (long long j = 0; j < (N + N + N + N); j += 2) { 374 z[i + j] = a + tfoo<T, N>(i + j); 375 } 376 } 377 return 0; 378 } 379 380 // Instatiation templ1<float,2> 381 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}}) 382 // CHECK: call void (%ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call( 383 void inst_templ1() { 384 float a; 385 float z[100]; 386 templ1<float,2> (a, z); 387 } 388 389 390 typedef int MyIdx; 391 392 class IterDouble { 393 double *Ptr; 394 public: 395 IterDouble operator++ () const { 396 IterDouble n; 397 n.Ptr = Ptr + 1; 398 return n; 399 } 400 bool operator < (const IterDouble &that) const { 401 return Ptr < that.Ptr; 402 } 403 double & operator *() const { 404 return *Ptr; 405 } 406 MyIdx operator - (const IterDouble &that) const { 407 return (MyIdx) (Ptr - that.Ptr); 408 } 409 IterDouble operator + (int Delta) { 410 IterDouble re; 411 re.Ptr = Ptr + Delta; 412 return re; 413 } 414 415 ///~IterDouble() {} 416 }; 417 418 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}} 419 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) { 420 // 421 // Calculate number of iterations before the loop body. 422 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}} 423 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1 424 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1 425 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1 426 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1 427 // CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}} 428 #pragma omp parallel for simd 429 430 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) 431 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 432 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]], 433 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]] 434 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 435 // CHECK: [[TRUE]]: 436 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]], 437 // CHECK: br label %[[SWITCH:[^,]+]] 438 // CHECK: [[FALSE]]: 439 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 440 // CHECK: br label %[[SWITCH]] 441 // CHECK: [[SWITCH]]: 442 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 443 // CHECK: store i32 [[UP]], i32* [[UB]], 444 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 445 // CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]], 446 447 // CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]] 448 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]] 449 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] 450 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]] 451 for (IterDouble i = ia; i < ib; ++i) { 452 // CHECK: [[IT_BODY]]: 453 // Start of body: calculate i from index: 454 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]] 455 // Call of operator+ (i, IV). 456 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}} 457 // ... loop body ... 458 *i = *ic * 0.5; 459 // Float multiply and save result. 460 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01 461 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}} 462 // CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]] 463 ++ic; 464 // 465 // CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]] 466 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 467 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] 468 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]] 469 } 470 // CHECK: [[IT_END]]: 471 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 472 // CHECK: ret void 473 } 474 475 476 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}} 477 void collapsed(float *a, float *b, float *c, float *d) { 478 int i; // outer loop counter 479 unsigned j; // middle loop couter, leads to unsigned icmp in loop header. 480 // k declared in the loop init below 481 short l; // inner loop counter 482 // CHECK: call void @__kmpc_for_static_init_4u(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) 483 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 484 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119 485 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 486 // CHECK: [[TRUE]]: 487 // CHECK: br label %[[SWITCH:[^,]+]] 488 // CHECK: [[FALSE]]: 489 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], 490 // CHECK: br label %[[SWITCH]] 491 // CHECK: [[SWITCH]]: 492 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 493 // CHECK: store i32 [[UP]], i32* [[UB]], 494 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], 495 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]], 496 // 497 #pragma omp parallel for simd collapse(4) 498 499 // CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] 500 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] 501 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]] 502 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]] 503 for (i = 1; i < 3; i++) // 2 iterations 504 for (j = 2u; j < 5u; j++) //3 iterations 505 for (int k = 3; k <= 6; k++) // 4 iterations 506 for (l = 4; l < 9; ++l) // 5 iterations 507 { 508 // CHECK: [[COLL1_BODY]]: 509 // Start of body: calculate i from index: 510 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]] 511 // Calculation of the loop counters values. 512 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60 513 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1 514 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]] 515 // CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] 516 // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]] 517 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2]], 20 518 // CHECK-NEXT: [[CALC_J_2:%.+]] = urem i32 [[CALC_J_1]], 3 519 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1 520 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]] 521 // CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]] 522 // CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]] 523 // CHECK-NEXT: [[CALC_K_1:%.+]] = udiv i32 [[IV1_3]], 5 524 // CHECK-NEXT: [[CALC_K_2:%.+]] = urem i32 [[CALC_K_1]], 4 525 // CHECK-NEXT: [[CALC_K_2_MUL1:%.+]] = mul i32 [[CALC_K_2]], 1 526 // CHECK-NEXT: [[CALC_K_3:%.+]] = add i32 3, [[CALC_K_2_MUL1]] 527 // CHECK-NEXT: store i32 [[CALC_K_3]], i32* [[LC_K:.+]] 528 // CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]] 529 // CHECK-NEXT: [[CALC_L_1:%.+]] = urem i32 [[IV1_4]], 5 530 // CHECK-NEXT: [[CALC_L_1_MUL1:%.+]] = mul i32 [[CALC_L_1]], 1 531 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[CALC_L_1_MUL1]] 532 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16 533 // CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]] 534 // ... loop body ... 535 // End of body: store into a[i]: 536 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]] 537 float res = b[j] * c[k]; 538 a[i] = res * d[l]; 539 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]] 540 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1 541 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]] 542 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]] 543 // CHECK: [[COLL1_END]]: 544 } 545 // i,j,l are updated; k is not updated. 546 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 547 // CHECK: store i32 3, i32* [[I:%[^,]+]] 548 // CHECK: store i32 5, i32* [[I:%[^,]+]] 549 // CHECK: store i16 9, i16* [[I:%[^,]+]] 550 // CHECK: ret void 551 } 552 553 extern char foo(); 554 extern double globalfloat; 555 556 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}} 557 void widened(float *a, float *b, float *c, float *d) { 558 int i; // outer loop counter 559 short j; // inner loop counter 560 globalfloat = 1.0; 561 int localint = 1; 562 // CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]] 563 // Counter is widened to 64 bits. 564 // CHECK: [[MUL:%.+]] = mul nsw i64 2, %{{.+}} 565 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1 566 // CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]], 567 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) 568 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 569 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]], 570 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]] 571 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 572 // CHECK: [[TRUE]]: 573 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]], 574 // CHECK: br label %[[SWITCH:[^,]+]] 575 // CHECK: [[FALSE]]: 576 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 577 // CHECK: br label %[[SWITCH]] 578 // CHECK: [[SWITCH]]: 579 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 580 // CHECK: store i64 [[UP]], i64* [[UB]], 581 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], 582 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]], 583 // 584 #pragma omp parallel for simd collapse(2) private(globalfloat, localint) 585 586 // CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] 587 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]] 588 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]] 589 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]] 590 for (i = 1; i < 3; i++) // 2 iterations 591 for (j = 0; j < foo(); j++) // foo() iterations 592 { 593 // CHECK: [[WIDE1_BODY]]: 594 // Start of body: calculate i from index: 595 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]] 596 // Calculation of the loop counters values... 597 // CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]] 598 // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]] 599 // CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]] 600 // ... loop body ... 601 // 602 // Here we expect store into private double var, not global 603 // CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]] 604 globalfloat = (float)j/i; 605 float res = b[j] * c[j]; 606 // Store into a[i]: 607 // CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]] 608 a[i] = res * d[i]; 609 // Then there's a store into private var localint: 610 // CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]] 611 localint = (int)j; 612 // CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]] 613 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1 614 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]] 615 // 616 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]] 617 // CHECK: [[WIDE1_END]]: 618 } 619 // i,j are updated. 620 // CHECK: store i32 3, i32* [[I:%[^,]+]] 621 // CHECK: store i16 622 // 623 // Here we expect store into original localint, not its privatized version. 624 // CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]] 625 localint = (int)j; 626 // CHECK: ret void 627 } 628 629 // CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) 630 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 631 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15 632 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] 633 // CHECK: [[TRUE]]: 634 // CHECK: br label %[[SWITCH:[^,]+]] 635 // CHECK: [[FALSE]]: 636 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], 637 // CHECK: br label %[[SWITCH]] 638 // CHECK: [[SWITCH]]: 639 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] 640 // CHECK: store i64 [[UP]], i64* [[UB]], 641 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], 642 // CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]], 643 644 // ... 645 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]] 646 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] 647 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]] 648 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]] 649 // CHECK: [[T1_BODY]]: 650 // Loop counters i and j updates: 651 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]] 652 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4 653 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1 654 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]] 655 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32 656 // CHECK-NEXT: store i32 [[I_2]], i32* 657 // CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]] 658 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4 659 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2 660 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]] 661 // CHECK-NEXT: store i64 [[J_2_ADD0]], i64* 662 // simd.for.inc: 663 // CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]] 664 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1 665 // CHECK-NEXT: store i64 [[INC]], i64* 666 // CHECK-NEXT: br label {{%.+}} 667 // CHECK: [[T1_END]]: 668 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}}) 669 // CHECK: ret void 670 // 671 // TERM_DEBUG-LABEL: bar 672 int bar() {return 0;}; 673 674 // TERM_DEBUG-LABEL: parallel_simd 675 void parallel_simd(float *a) { 676 #pragma omp parallel for simd 677 // TERM_DEBUG-NOT: __kmpc_global_thread_num 678 // TERM_DEBUG: invoke i32 {{.*}}bar{{.*}}() 679 // TERM_DEBUG: unwind label %[[TERM_LPAD:.+]], 680 // TERM_DEBUG-NOT: __kmpc_global_thread_num 681 // TERM_DEBUG: [[TERM_LPAD]] 682 // TERM_DEBUG: call void @__clang_call_terminate 683 // TERM_DEBUG: unreachable 684 for (unsigned i = 131071; i <= 2147483647; i += 127) 685 a[i] += bar(); 686 } 687 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]], 688 // TERM_DEBUG-NOT: line: 0, 689 #endif // HEADER 690 691