1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 template <class T> 18 struct S { 19 T f; 20 S(T a) : f(a) {} 21 S() : f() {} 22 S<T> &operator=(const S<T> &); 23 operator T() { return T(); } 24 ~S() {} 25 }; 26 27 volatile int g = 1212; 28 float f; 29 char cnt; 30 31 template <typename T> 32 T tmain() { 33 S<T> test; 34 T *pvar = &test.f; 35 T lvar = T(); 36 #pragma omp parallel for linear(pvar, lvar) 37 for (int i = 0; i < 2; ++i) { 38 ++pvar, ++lvar; 39 } 40 return T(); 41 } 42 43 int main() { 44 #ifdef LAMBDA 45 [&]() { 46 #pragma omp parallel for linear(g:5) 47 for (int i = 0; i < 2; ++i) { 48 g += 5; 49 [&]() { 50 g = 2; 51 }(); 52 } 53 }(); 54 return 0; 55 #elif defined(BLOCKS) 56 ^{ 57 #pragma omp parallel for linear(g:5) 58 for (int i = 0; i < 2; ++i) { 59 g += 5; 60 g = 1; 61 ^{ 62 g = 2; 63 }(); 64 } 65 }(); 66 return 0; 67 #else 68 S<float> test; 69 float *pvar = &test.f; 70 long long lvar = 0; 71 #pragma omp parallel for linear(pvar, lvar : 3) 72 for (int i = 0; i < 2; ++i) { 73 pvar += 3, lvar += 3; 74 } 75 return tmain<int>(); 76 #endif 77 } 78 79 80 81 82 // Check for default initialization. 83 84 85 86 // Check for default initialization. 87 #endif 88 89 // CHECK1-LABEL: define {{[^@]+}}@main 90 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 91 // CHECK1-NEXT: entry: 92 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 93 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 94 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 95 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 96 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 97 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 98 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 99 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 100 // CHECK1-NEXT: store float* [[F]], float** [[PVAR]], align 8 101 // CHECK1-NEXT: store i64 0, i64* [[LVAR]], align 8 102 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 103 // CHECK1-NEXT: store float** [[PVAR]], float*** [[TMP0]], align 8 104 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 105 // CHECK1-NEXT: store i64* [[LVAR]], i64** [[TMP1]], align 8 106 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 107 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v() 108 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 109 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 110 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 111 // CHECK1-NEXT: ret i32 [[TMP2]] 112 // 113 // 114 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 115 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 116 // CHECK1-NEXT: entry: 117 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 118 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 119 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 120 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 121 // CHECK1-NEXT: ret void 122 // 123 // 124 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 125 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 126 // CHECK1-NEXT: entry: 127 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 128 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 129 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 130 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 131 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 132 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 133 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 134 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 135 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 136 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 137 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 138 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 139 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 140 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 141 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 142 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 143 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 144 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 145 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP2:%.*]] = load float**, float*** [[TMP1]], align 8 147 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 148 // CHECK1-NEXT: [[TMP4:%.*]] = load i64*, i64** [[TMP3]], align 8 149 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[TMP2]], align 8 150 // CHECK1-NEXT: store float* [[TMP5]], float** [[DOTLINEAR_START]], align 8 151 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 8 152 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[DOTLINEAR_START1]], align 8 153 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 154 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 155 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 156 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 157 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 158 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 159 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]]) 160 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 161 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 162 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 163 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 164 // CHECK1: cond.true: 165 // CHECK1-NEXT: br label [[COND_END:%.*]] 166 // CHECK1: cond.false: 167 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: br label [[COND_END]] 169 // CHECK1: cond.end: 170 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 171 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 172 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 173 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 174 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 175 // CHECK1: omp.inner.for.cond: 176 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 177 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 179 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 180 // CHECK1: omp.inner.for.body: 181 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 182 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 183 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 184 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 185 // CHECK1-NEXT: [[TMP15:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 186 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 187 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 3 188 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 189 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP15]], i64 [[IDX_EXT]] 190 // CHECK1-NEXT: store float* [[ADD_PTR]], float** [[PVAR]], align 8 191 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 192 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 193 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 3 194 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL4]] to i64 195 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i64 [[TMP17]], [[CONV]] 196 // CHECK1-NEXT: store i64 [[ADD5]], i64* [[LVAR]], align 8 197 // CHECK1-NEXT: [[TMP19:%.*]] = load float*, float** [[PVAR]], align 8 198 // CHECK1-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds float, float* [[TMP19]], i64 3 199 // CHECK1-NEXT: store float* [[ADD_PTR6]], float** [[PVAR]], align 8 200 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, i64* [[LVAR]], align 8 201 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP20]], 3 202 // CHECK1-NEXT: store i64 [[ADD7]], i64* [[LVAR]], align 8 203 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 204 // CHECK1: omp.body.continue: 205 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 206 // CHECK1: omp.inner.for.inc: 207 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 208 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 209 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 210 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 211 // CHECK1: omp.inner.for.end: 212 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 213 // CHECK1: omp.loop.exit: 214 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 215 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 216 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 217 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 218 // CHECK1: .omp.linear.pu: 219 // CHECK1-NEXT: [[TMP24:%.*]] = load float*, float** [[PVAR]], align 8 220 // CHECK1-NEXT: store float* [[TMP24]], float** [[TMP2]], align 8 221 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[LVAR]], align 8 222 // CHECK1-NEXT: store i64 [[TMP25]], i64* [[TMP4]], align 8 223 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 224 // CHECK1: .omp.linear.pu.done: 225 // CHECK1-NEXT: ret void 226 // 227 // 228 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 229 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 230 // CHECK1-NEXT: entry: 231 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 232 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 233 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32, align 4 234 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 235 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) 236 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 237 // CHECK1-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 238 // CHECK1-NEXT: store i32 0, i32* [[LVAR]], align 4 239 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 240 // CHECK1-NEXT: store i32** [[PVAR]], i32*** [[TMP0]], align 8 241 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 242 // CHECK1-NEXT: store i32* [[LVAR]], i32** [[TMP1]], align 8 243 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 244 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 245 // CHECK1-NEXT: ret i32 0 246 // 247 // 248 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 249 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 250 // CHECK1-NEXT: entry: 251 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 252 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 253 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 254 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 255 // CHECK1-NEXT: ret void 256 // 257 // 258 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 259 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 260 // CHECK1-NEXT: entry: 261 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 262 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 263 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 264 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 265 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 266 // CHECK1-NEXT: ret void 267 // 268 // 269 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 270 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 271 // CHECK1-NEXT: entry: 272 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 273 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 274 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 275 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) 276 // CHECK1-NEXT: ret void 277 // 278 // 279 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 280 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2]] { 281 // CHECK1-NEXT: entry: 282 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 283 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 284 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 285 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 286 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 287 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 288 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 290 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 293 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 295 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 297 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 298 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 299 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 300 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 301 // CHECK1-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[TMP1]], align 8 302 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 303 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 304 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP2]], align 8 305 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTLINEAR_START]], align 8 306 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4 307 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START1]], align 4 308 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 309 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 310 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 311 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 312 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 313 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 314 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 315 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 316 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 317 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 318 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 319 // CHECK1: cond.true: 320 // CHECK1-NEXT: br label [[COND_END:%.*]] 321 // CHECK1: cond.false: 322 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 323 // CHECK1-NEXT: br label [[COND_END]] 324 // CHECK1: cond.end: 325 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 326 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 327 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 328 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 329 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 330 // CHECK1: omp.inner.for.cond: 331 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 332 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 333 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 334 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 335 // CHECK1: omp.inner.for.body: 336 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 337 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 338 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 339 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 340 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 341 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 342 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 1 343 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 344 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDX_EXT]] 345 // CHECK1-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR]], align 8 346 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4 347 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 348 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 1 349 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[MUL4]] 350 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[LVAR]], align 4 351 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[PVAR]], align 8 352 // CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i32 1 353 // CHECK1-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR]], align 8 354 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[LVAR]], align 4 355 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 356 // CHECK1-NEXT: store i32 [[INC]], i32* [[LVAR]], align 4 357 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 358 // CHECK1: omp.body.continue: 359 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 360 // CHECK1: omp.inner.for.inc: 361 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 362 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 363 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 364 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 365 // CHECK1: omp.inner.for.end: 366 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 367 // CHECK1: omp.loop.exit: 368 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 369 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 370 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 371 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 372 // CHECK1: .omp.linear.pu: 373 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[PVAR]], align 8 374 // CHECK1-NEXT: store i32* [[TMP24]], i32** [[TMP2]], align 8 375 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[LVAR]], align 4 376 // CHECK1-NEXT: store i32 [[TMP25]], i32* [[TMP4]], align 4 377 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 378 // CHECK1: .omp.linear.pu.done: 379 // CHECK1-NEXT: ret void 380 // 381 // 382 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 383 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 384 // CHECK1-NEXT: entry: 385 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 386 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 387 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 388 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 389 // CHECK1-NEXT: ret void 390 // 391 // 392 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 393 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 394 // CHECK1-NEXT: entry: 395 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 396 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 397 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 398 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 399 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 400 // CHECK1-NEXT: ret void 401 // 402 // 403 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 404 // CHECK1-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 405 // CHECK1-NEXT: entry: 406 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 407 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 408 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 409 // CHECK1-NEXT: ret void 410 // 411 // 412 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 413 // CHECK1-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 414 // CHECK1-NEXT: entry: 415 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 416 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 417 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 418 // CHECK1-NEXT: ret void 419 // 420 // 421 // CHECK3-LABEL: define {{[^@]+}}@main 422 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 423 // CHECK3-NEXT: entry: 424 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 425 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 426 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 427 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]]) 428 // CHECK3-NEXT: ret i32 0 429 // 430 // 431 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 432 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 433 // CHECK3-NEXT: entry: 434 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 435 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 436 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 437 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 438 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 439 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 440 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 441 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 442 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 443 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 444 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 445 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 4 446 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 447 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 448 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 449 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 450 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 451 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 452 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 453 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 454 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 455 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 456 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 457 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 458 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 459 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 460 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 461 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 462 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 463 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 464 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 465 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 466 // CHECK3: cond.true: 467 // CHECK3-NEXT: br label [[COND_END:%.*]] 468 // CHECK3: cond.false: 469 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK3-NEXT: br label [[COND_END]] 471 // CHECK3: cond.end: 472 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 473 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 474 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 475 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 476 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 477 // CHECK3: omp.inner.for.cond: 478 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 479 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 480 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 481 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 482 // CHECK3: omp.inner.for.body: 483 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 484 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 485 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 486 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 487 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 488 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 489 // CHECK3-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP13]], 5 490 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[MUL2]] 491 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[G]], align 4 492 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[G]], align 4 493 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 5 494 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[G]], align 4 495 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 496 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP15]], align 8 497 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]) 498 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 499 // CHECK3: omp.body.continue: 500 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 501 // CHECK3: omp.inner.for.inc: 502 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 503 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 504 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 505 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 506 // CHECK3: omp.inner.for.end: 507 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 508 // CHECK3: omp.loop.exit: 509 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 510 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 511 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 512 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 513 // CHECK3: .omp.linear.pu: 514 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[G]], align 4 515 // CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP2]], align 4 516 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 517 // CHECK3: .omp.linear.pu.done: 518 // CHECK3-NEXT: ret void 519 // 520 // 521 // CHECK4-LABEL: define {{[^@]+}}@main 522 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 523 // CHECK4-NEXT: entry: 524 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 525 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 526 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 527 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 528 // CHECK4-NEXT: call void [[TMP1]](i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 529 // CHECK4-NEXT: ret i32 0 530 // 531 // 532 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 533 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] { 534 // CHECK4-NEXT: entry: 535 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 536 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 537 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 538 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 539 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 540 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 541 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 542 // CHECK4-NEXT: store i32* @g, i32** [[TMP0]], align 8 543 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 544 // CHECK4-NEXT: ret void 545 // 546 // 547 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 548 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.anon* noalias noundef [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 549 // CHECK4-NEXT: entry: 550 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 551 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 552 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 553 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 554 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 555 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 556 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 557 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 558 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 559 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 560 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 561 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4 562 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8 563 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 564 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 565 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 566 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 567 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 568 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 569 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 570 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 571 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 572 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 573 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 574 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 575 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 576 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 577 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 578 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 579 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 580 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 581 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 582 // CHECK4: cond.true: 583 // CHECK4-NEXT: br label [[COND_END:%.*]] 584 // CHECK4: cond.false: 585 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 586 // CHECK4-NEXT: br label [[COND_END]] 587 // CHECK4: cond.end: 588 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 589 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 590 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 591 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 592 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 593 // CHECK4: omp.inner.for.cond: 594 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 595 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 596 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 597 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 598 // CHECK4: omp.inner.for.body: 599 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 600 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 601 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 602 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 603 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 604 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 605 // CHECK4-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP13]], 5 606 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[MUL2]] 607 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[G]], align 4 608 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[G]], align 4 609 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 5 610 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[G]], align 4 611 // CHECK4-NEXT: store i32 1, i32* [[G]], align 4 612 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0 613 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 614 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1 615 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 616 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2 617 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 618 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3 619 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 620 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4 621 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 622 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 623 // CHECK4-NEXT: [[TMP15:%.*]] = load volatile i32, i32* [[G]], align 4 624 // CHECK4-NEXT: store volatile i32 [[TMP15]], i32* [[BLOCK_CAPTURED]], align 8 625 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()* 626 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP16]] to %struct.__block_literal_generic* 627 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 628 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 629 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP17]], align 8 630 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to void (i8*)* 631 // CHECK4-NEXT: call void [[TMP20]](i8* noundef [[TMP18]]) 632 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 633 // CHECK4: omp.body.continue: 634 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 635 // CHECK4: omp.inner.for.inc: 636 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 637 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 638 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 639 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 640 // CHECK4: omp.inner.for.end: 641 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 642 // CHECK4: omp.loop.exit: 643 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 644 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 645 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 646 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 647 // CHECK4: .omp.linear.pu: 648 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[G]], align 4 649 // CHECK4-NEXT: store i32 [[TMP24]], i32* [[TMP2]], align 4 650 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 651 // CHECK4: .omp.linear.pu.done: 652 // CHECK4-NEXT: ret void 653 // 654 // 655 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 656 // CHECK4-SAME: (i8* noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 657 // CHECK4-NEXT: entry: 658 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 659 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8 660 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 661 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* 662 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8 663 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 664 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8 665 // CHECK4-NEXT: ret void 666 // 667