1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4 7 8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s 10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 13 // expected-no-diagnostics 14 #ifndef HEADER 15 #define HEADER 16 17 template <class T> 18 struct S { 19 T f; 20 S(T a) : f(a) {} 21 S() : f() {} 22 S<T> &operator=(const S<T> &); 23 operator T() { return T(); } 24 ~S() {} 25 }; 26 27 volatile int g = 1212; 28 float f; 29 char cnt; 30 31 template <typename T> 32 T tmain() { 33 S<T> test; 34 T *pvar = &test.f; 35 T lvar = T(); 36 #pragma omp parallel for linear(pvar, lvar) 37 for (int i = 0; i < 2; ++i) { 38 ++pvar, ++lvar; 39 } 40 return T(); 41 } 42 43 int main() { 44 #ifdef LAMBDA 45 [&]() { 46 #pragma omp parallel for linear(g:5) 47 for (int i = 0; i < 2; ++i) { 48 g += 5; 49 [&]() { 50 g = 2; 51 }(); 52 } 53 }(); 54 return 0; 55 #elif defined(BLOCKS) 56 ^{ 57 #pragma omp parallel for linear(g:5) 58 for (int i = 0; i < 2; ++i) { 59 g += 5; 60 g = 1; 61 ^{ 62 g = 2; 63 }(); 64 } 65 }(); 66 return 0; 67 #else 68 S<float> test; 69 float *pvar = &test.f; 70 long long lvar = 0; 71 #pragma omp parallel for linear(pvar, lvar : 3) 72 for (int i = 0; i < 2; ++i) { 73 pvar += 3, lvar += 3; 74 } 75 return tmain<int>(); 76 #endif 77 } 78 79 80 81 82 // Check for default initialization. 83 84 85 86 // Check for default initialization. 87 #endif 88 89 // CHECK1-LABEL: define {{[^@]+}}@main 90 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 91 // CHECK1-NEXT: entry: 92 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 93 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 94 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 95 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 96 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 97 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 98 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 99 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 100 // CHECK1-NEXT: store float* [[F]], float** [[PVAR]], align 8 101 // CHECK1-NEXT: store i64 0, i64* [[LVAR]], align 8 102 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 103 // CHECK1-NEXT: store float** [[PVAR]], float*** [[TMP0]], align 8 104 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 105 // CHECK1-NEXT: store i64* [[LVAR]], i64** [[TMP1]], align 8 106 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 107 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 108 // CHECK1-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 109 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 110 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 111 // CHECK1-NEXT: ret i32 [[TMP2]] 112 // 113 // 114 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 115 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 116 // CHECK1-NEXT: entry: 117 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 118 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 119 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 120 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 121 // CHECK1-NEXT: ret void 122 // 123 // 124 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 125 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 126 // CHECK1-NEXT: entry: 127 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 128 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 129 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 130 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 131 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 132 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 133 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 134 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 135 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 136 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 137 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 138 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 139 // CHECK1-NEXT: [[PVAR:%.*]] = alloca float*, align 8 140 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8 141 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 142 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 143 // CHECK1-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 144 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 145 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 146 // CHECK1-NEXT: [[TMP2:%.*]] = load float**, float*** [[TMP1]], align 8 147 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 148 // CHECK1-NEXT: [[TMP4:%.*]] = load i64*, i64** [[TMP3]], align 8 149 // CHECK1-NEXT: [[TMP5:%.*]] = load float*, float** [[TMP2]], align 8 150 // CHECK1-NEXT: store float* [[TMP5]], float** [[DOTLINEAR_START]], align 8 151 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 8 152 // CHECK1-NEXT: store i64 [[TMP6]], i64* [[DOTLINEAR_START1]], align 8 153 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 154 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 155 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 156 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 157 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 158 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 159 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]]) 160 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 161 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 162 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 163 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 164 // CHECK1: cond.true: 165 // CHECK1-NEXT: br label [[COND_END:%.*]] 166 // CHECK1: cond.false: 167 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 168 // CHECK1-NEXT: br label [[COND_END]] 169 // CHECK1: cond.end: 170 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 171 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 172 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 173 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 174 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 175 // CHECK1: omp.inner.for.cond: 176 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 177 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 178 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 179 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 180 // CHECK1: omp.inner.for.body: 181 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 182 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 183 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 184 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 185 // CHECK1-NEXT: [[TMP15:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 186 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 187 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 3 188 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 189 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP15]], i64 [[IDX_EXT]] 190 // CHECK1-NEXT: store float* [[ADD_PTR]], float** [[PVAR]], align 8 191 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 192 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 193 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 3 194 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL4]] to i64 195 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i64 [[TMP17]], [[CONV]] 196 // CHECK1-NEXT: store i64 [[ADD5]], i64* [[LVAR]], align 8 197 // CHECK1-NEXT: [[TMP19:%.*]] = load float*, float** [[PVAR]], align 8 198 // CHECK1-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds float, float* [[TMP19]], i64 3 199 // CHECK1-NEXT: store float* [[ADD_PTR6]], float** [[PVAR]], align 8 200 // CHECK1-NEXT: [[TMP20:%.*]] = load i64, i64* [[LVAR]], align 8 201 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP20]], 3 202 // CHECK1-NEXT: store i64 [[ADD7]], i64* [[LVAR]], align 8 203 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 204 // CHECK1: omp.body.continue: 205 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 206 // CHECK1: omp.inner.for.inc: 207 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 208 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 209 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 210 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 211 // CHECK1: omp.inner.for.end: 212 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 213 // CHECK1: omp.loop.exit: 214 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 215 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 216 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 217 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 218 // CHECK1: .omp.linear.pu: 219 // CHECK1-NEXT: [[TMP24:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 220 // CHECK1-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds float, float* [[TMP24]], i64 6 221 // CHECK1-NEXT: store float* [[ADD_PTR9]], float** [[TMP2]], align 8 222 // CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 223 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i64 [[TMP25]], 6 224 // CHECK1-NEXT: store i64 [[ADD10]], i64* [[TMP4]], align 8 225 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 226 // CHECK1: .omp.linear.pu.done: 227 // CHECK1-NEXT: ret void 228 // 229 // 230 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 231 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] { 232 // CHECK1-NEXT: entry: 233 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 234 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 235 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32, align 4 236 // CHECK1-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 237 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 238 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 239 // CHECK1-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 240 // CHECK1-NEXT: store i32 0, i32* [[LVAR]], align 4 241 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 242 // CHECK1-NEXT: store i32** [[PVAR]], i32*** [[TMP0]], align 8 243 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 244 // CHECK1-NEXT: store i32* [[LVAR]], i32** [[TMP1]], align 8 245 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 246 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 247 // CHECK1-NEXT: ret i32 0 248 // 249 // 250 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 251 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 252 // CHECK1-NEXT: entry: 253 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 254 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 255 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 256 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 257 // CHECK1-NEXT: ret void 258 // 259 // 260 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 261 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 262 // CHECK1-NEXT: entry: 263 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 264 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 265 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 266 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 267 // CHECK1-NEXT: store float 0.000000e+00, float* [[F]], align 4 268 // CHECK1-NEXT: ret void 269 // 270 // 271 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 272 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 273 // CHECK1-NEXT: entry: 274 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 275 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 276 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 277 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 278 // CHECK1-NEXT: ret void 279 // 280 // 281 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 282 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 283 // CHECK1-NEXT: entry: 284 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 285 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 286 // CHECK1-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 287 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 288 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 289 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 290 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i32, align 4 291 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 292 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 293 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 294 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 295 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 296 // CHECK1-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 297 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i32, align 4 298 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 299 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 300 // CHECK1-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 301 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 302 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 303 // CHECK1-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[TMP1]], align 8 304 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 305 // CHECK1-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 306 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP2]], align 8 307 // CHECK1-NEXT: store i32* [[TMP5]], i32** [[DOTLINEAR_START]], align 8 308 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4 309 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START1]], align 4 310 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 311 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 312 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 313 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 314 // CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 315 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 316 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 317 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 318 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 319 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 320 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 321 // CHECK1: cond.true: 322 // CHECK1-NEXT: br label [[COND_END:%.*]] 323 // CHECK1: cond.false: 324 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 325 // CHECK1-NEXT: br label [[COND_END]] 326 // CHECK1: cond.end: 327 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 328 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 329 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 330 // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 331 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 332 // CHECK1: omp.inner.for.cond: 333 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 334 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 335 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 336 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 337 // CHECK1: omp.inner.for.body: 338 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 339 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 340 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 341 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 342 // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 343 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 344 // CHECK1-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 1 345 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 346 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDX_EXT]] 347 // CHECK1-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR]], align 8 348 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4 349 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 350 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 1 351 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[MUL4]] 352 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[LVAR]], align 4 353 // CHECK1-NEXT: [[TMP19:%.*]] = load i32*, i32** [[PVAR]], align 8 354 // CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i32 1 355 // CHECK1-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR]], align 8 356 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[LVAR]], align 4 357 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 358 // CHECK1-NEXT: store i32 [[INC]], i32* [[LVAR]], align 4 359 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 360 // CHECK1: omp.body.continue: 361 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 362 // CHECK1: omp.inner.for.inc: 363 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 364 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 365 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 366 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 367 // CHECK1: omp.inner.for.end: 368 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 369 // CHECK1: omp.loop.exit: 370 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 371 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 372 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 373 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 374 // CHECK1: .omp.linear.pu: 375 // CHECK1-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 376 // CHECK1-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 2 377 // CHECK1-NEXT: store i32* [[ADD_PTR7]], i32** [[TMP2]], align 8 378 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4 379 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], 2 380 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[TMP4]], align 4 381 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 382 // CHECK1: .omp.linear.pu.done: 383 // CHECK1-NEXT: ret void 384 // 385 // 386 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 387 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 388 // CHECK1-NEXT: entry: 389 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 390 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 391 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 392 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 393 // CHECK1-NEXT: ret void 394 // 395 // 396 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 397 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 398 // CHECK1-NEXT: entry: 399 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 400 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 401 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 402 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 403 // CHECK1-NEXT: store i32 0, i32* [[F]], align 4 404 // CHECK1-NEXT: ret void 405 // 406 // 407 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 408 // CHECK1-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 409 // CHECK1-NEXT: entry: 410 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 411 // CHECK1-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 412 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 413 // CHECK1-NEXT: ret void 414 // 415 // 416 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 417 // CHECK1-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 418 // CHECK1-NEXT: entry: 419 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 420 // CHECK1-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 421 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 422 // CHECK1-NEXT: ret void 423 // 424 // 425 // CHECK2-LABEL: define {{[^@]+}}@main 426 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 427 // CHECK2-NEXT: entry: 428 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 429 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4 430 // CHECK2-NEXT: [[PVAR:%.*]] = alloca float*, align 8 431 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i64, align 8 432 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 433 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 434 // CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) 435 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TEST]], i32 0, i32 0 436 // CHECK2-NEXT: store float* [[F]], float** [[PVAR]], align 8 437 // CHECK2-NEXT: store i64 0, i64* [[LVAR]], align 8 438 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 439 // CHECK2-NEXT: store float** [[PVAR]], float*** [[TMP0]], align 8 440 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 441 // CHECK2-NEXT: store i64* [[LVAR]], i64** [[TMP1]], align 8 442 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 443 // CHECK2-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 444 // CHECK2-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 445 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]] 446 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[RETVAL]], align 4 447 // CHECK2-NEXT: ret i32 [[TMP2]] 448 // 449 // 450 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev 451 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 { 452 // CHECK2-NEXT: entry: 453 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 454 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 455 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 456 // CHECK2-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) 457 // CHECK2-NEXT: ret void 458 // 459 // 460 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 461 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 462 // CHECK2-NEXT: entry: 463 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 464 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 465 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 466 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 467 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 468 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca float*, align 8 469 // CHECK2-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8 470 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 471 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 472 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 473 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 474 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 475 // CHECK2-NEXT: [[PVAR:%.*]] = alloca float*, align 8 476 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i64, align 8 477 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 478 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 479 // CHECK2-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 480 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 481 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 482 // CHECK2-NEXT: [[TMP2:%.*]] = load float**, float*** [[TMP1]], align 8 483 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[TMP0]], i32 0, i32 1 484 // CHECK2-NEXT: [[TMP4:%.*]] = load i64*, i64** [[TMP3]], align 8 485 // CHECK2-NEXT: [[TMP5:%.*]] = load float*, float** [[TMP2]], align 8 486 // CHECK2-NEXT: store float* [[TMP5]], float** [[DOTLINEAR_START]], align 8 487 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[TMP4]], align 8 488 // CHECK2-NEXT: store i64 [[TMP6]], i64* [[DOTLINEAR_START1]], align 8 489 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 490 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 491 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 492 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 493 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 494 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 495 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]]) 496 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 497 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 498 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 499 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 500 // CHECK2: cond.true: 501 // CHECK2-NEXT: br label [[COND_END:%.*]] 502 // CHECK2: cond.false: 503 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 504 // CHECK2-NEXT: br label [[COND_END]] 505 // CHECK2: cond.end: 506 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 507 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 508 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 509 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 510 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 511 // CHECK2: omp.inner.for.cond: 512 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 513 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 514 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 515 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 516 // CHECK2: omp.inner.for.body: 517 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 518 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 519 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 520 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 521 // CHECK2-NEXT: [[TMP15:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 522 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 523 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 3 524 // CHECK2-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 525 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[TMP15]], i64 [[IDX_EXT]] 526 // CHECK2-NEXT: store float* [[ADD_PTR]], float** [[PVAR]], align 8 527 // CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 528 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 529 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 3 530 // CHECK2-NEXT: [[CONV:%.*]] = sext i32 [[MUL4]] to i64 531 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i64 [[TMP17]], [[CONV]] 532 // CHECK2-NEXT: store i64 [[ADD5]], i64* [[LVAR]], align 8 533 // CHECK2-NEXT: [[TMP19:%.*]] = load float*, float** [[PVAR]], align 8 534 // CHECK2-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds float, float* [[TMP19]], i64 3 535 // CHECK2-NEXT: store float* [[ADD_PTR6]], float** [[PVAR]], align 8 536 // CHECK2-NEXT: [[TMP20:%.*]] = load i64, i64* [[LVAR]], align 8 537 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i64 [[TMP20]], 3 538 // CHECK2-NEXT: store i64 [[ADD7]], i64* [[LVAR]], align 8 539 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 540 // CHECK2: omp.body.continue: 541 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 542 // CHECK2: omp.inner.for.inc: 543 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 544 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1 545 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 546 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 547 // CHECK2: omp.inner.for.end: 548 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 549 // CHECK2: omp.loop.exit: 550 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 551 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 552 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 553 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 554 // CHECK2: .omp.linear.pu: 555 // CHECK2-NEXT: [[TMP24:%.*]] = load float*, float** [[DOTLINEAR_START]], align 8 556 // CHECK2-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds float, float* [[TMP24]], i64 6 557 // CHECK2-NEXT: store float* [[ADD_PTR9]], float** [[TMP2]], align 8 558 // CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTLINEAR_START1]], align 8 559 // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i64 [[TMP25]], 6 560 // CHECK2-NEXT: store i64 [[ADD10]], i64* [[TMP4]], align 8 561 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 562 // CHECK2: .omp.linear.pu.done: 563 // CHECK2-NEXT: ret void 564 // 565 // 566 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 567 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] { 568 // CHECK2-NEXT: entry: 569 // CHECK2-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4 570 // CHECK2-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 571 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i32, align 4 572 // CHECK2-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8 573 // CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) 574 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[TEST]], i32 0, i32 0 575 // CHECK2-NEXT: store i32* [[F]], i32** [[PVAR]], align 8 576 // CHECK2-NEXT: store i32 0, i32* [[LVAR]], align 4 577 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 578 // CHECK2-NEXT: store i32** [[PVAR]], i32*** [[TMP0]], align 8 579 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 1 580 // CHECK2-NEXT: store i32* [[LVAR]], i32** [[TMP1]], align 8 581 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon.1*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.anon.1* [[OMP_OUTLINED_ARG_AGG_]]) 582 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]] 583 // CHECK2-NEXT: ret i32 0 584 // 585 // 586 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev 587 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 588 // CHECK2-NEXT: entry: 589 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 590 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 591 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 592 // CHECK2-NEXT: call void @_ZN1SIfED2Ev(%struct.S* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 593 // CHECK2-NEXT: ret void 594 // 595 // 596 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev 597 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 598 // CHECK2-NEXT: entry: 599 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 600 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 601 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 602 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0 603 // CHECK2-NEXT: store float 0.000000e+00, float* [[F]], align 4 604 // CHECK2-NEXT: ret void 605 // 606 // 607 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev 608 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 609 // CHECK2-NEXT: entry: 610 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 611 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 612 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 613 // CHECK2-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) 614 // CHECK2-NEXT: ret void 615 // 616 // 617 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 618 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon.1* noalias [[__CONTEXT:%.*]]) #[[ATTR2]] { 619 // CHECK2-NEXT: entry: 620 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 621 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 622 // CHECK2-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon.1*, align 8 623 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 624 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 625 // CHECK2-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32*, align 8 626 // CHECK2-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i32, align 4 627 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 628 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 629 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 630 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 631 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 632 // CHECK2-NEXT: [[PVAR:%.*]] = alloca i32*, align 8 633 // CHECK2-NEXT: [[LVAR:%.*]] = alloca i32, align 4 634 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 635 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 636 // CHECK2-NEXT: store %struct.anon.1* [[__CONTEXT]], %struct.anon.1** [[__CONTEXT_ADDR]], align 8 637 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.anon.1*, %struct.anon.1** [[__CONTEXT_ADDR]], align 8 638 // CHECK2-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], %struct.anon.1* [[TMP0]], i32 0, i32 0 639 // CHECK2-NEXT: [[TMP2:%.*]] = load i32**, i32*** [[TMP1]], align 8 640 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[TMP0]], i32 0, i32 1 641 // CHECK2-NEXT: [[TMP4:%.*]] = load i32*, i32** [[TMP3]], align 8 642 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[TMP2]], align 8 643 // CHECK2-NEXT: store i32* [[TMP5]], i32** [[DOTLINEAR_START]], align 8 644 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP4]], align 4 645 // CHECK2-NEXT: store i32 [[TMP6]], i32* [[DOTLINEAR_START1]], align 4 646 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 647 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 648 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 649 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 650 // CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 651 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 652 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]]) 653 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 654 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 655 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1 656 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 657 // CHECK2: cond.true: 658 // CHECK2-NEXT: br label [[COND_END:%.*]] 659 // CHECK2: cond.false: 660 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 661 // CHECK2-NEXT: br label [[COND_END]] 662 // CHECK2: cond.end: 663 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ] 664 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 665 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 666 // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 667 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 668 // CHECK2: omp.inner.for.cond: 669 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 670 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 671 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 672 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 673 // CHECK2: omp.inner.for.body: 674 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 675 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 676 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 677 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 678 // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 679 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 680 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[TMP16]], 1 681 // CHECK2-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL3]] to i64 682 // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDX_EXT]] 683 // CHECK2-NEXT: store i32* [[ADD_PTR]], i32** [[PVAR]], align 8 684 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4 685 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 686 // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP18]], 1 687 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP17]], [[MUL4]] 688 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[LVAR]], align 4 689 // CHECK2-NEXT: [[TMP19:%.*]] = load i32*, i32** [[PVAR]], align 8 690 // CHECK2-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds i32, i32* [[TMP19]], i32 1 691 // CHECK2-NEXT: store i32* [[INCDEC_PTR]], i32** [[PVAR]], align 8 692 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[LVAR]], align 4 693 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1 694 // CHECK2-NEXT: store i32 [[INC]], i32* [[LVAR]], align 4 695 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 696 // CHECK2: omp.body.continue: 697 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 698 // CHECK2: omp.inner.for.inc: 699 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 700 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 701 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 702 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 703 // CHECK2: omp.inner.for.end: 704 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 705 // CHECK2: omp.loop.exit: 706 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP8]]) 707 // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 708 // CHECK2-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 709 // CHECK2-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 710 // CHECK2: .omp.linear.pu: 711 // CHECK2-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTLINEAR_START]], align 8 712 // CHECK2-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds i32, i32* [[TMP24]], i64 2 713 // CHECK2-NEXT: store i32* [[ADD_PTR7]], i32** [[TMP2]], align 8 714 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTLINEAR_START1]], align 4 715 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP25]], 2 716 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[TMP4]], align 4 717 // CHECK2-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 718 // CHECK2: .omp.linear.pu.done: 719 // CHECK2-NEXT: ret void 720 // 721 // 722 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev 723 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 724 // CHECK2-NEXT: entry: 725 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 726 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 727 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 728 // CHECK2-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]] 729 // CHECK2-NEXT: ret void 730 // 731 // 732 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev 733 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 734 // CHECK2-NEXT: entry: 735 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 736 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 737 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 738 // CHECK2-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0 739 // CHECK2-NEXT: store i32 0, i32* [[F]], align 4 740 // CHECK2-NEXT: ret void 741 // 742 // 743 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev 744 // CHECK2-SAME: (%struct.S.0* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 745 // CHECK2-NEXT: entry: 746 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8 747 // CHECK2-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8 748 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8 749 // CHECK2-NEXT: ret void 750 // 751 // 752 // CHECK2-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev 753 // CHECK2-SAME: (%struct.S* nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 { 754 // CHECK2-NEXT: entry: 755 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8 756 // CHECK2-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8 757 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8 758 // CHECK2-NEXT: ret void 759 // 760 // 761 // CHECK3-LABEL: define {{[^@]+}}@main 762 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 763 // CHECK3-NEXT: entry: 764 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 765 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 766 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 767 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 768 // CHECK3-NEXT: ret i32 0 769 // 770 // 771 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 772 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR2:[0-9]+]] { 773 // CHECK3-NEXT: entry: 774 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 775 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 776 // CHECK3-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 777 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 778 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 779 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 780 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 781 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 782 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 783 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 784 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 785 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 4 786 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 787 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 788 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 789 // CHECK3-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 790 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 791 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 792 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 793 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 794 // CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 795 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 796 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 797 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 798 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 799 // CHECK3-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 800 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 801 // CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 802 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 803 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 804 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 805 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 806 // CHECK3: cond.true: 807 // CHECK3-NEXT: br label [[COND_END:%.*]] 808 // CHECK3: cond.false: 809 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 810 // CHECK3-NEXT: br label [[COND_END]] 811 // CHECK3: cond.end: 812 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 813 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 814 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 815 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 816 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 817 // CHECK3: omp.inner.for.cond: 818 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 819 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 820 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 821 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 822 // CHECK3: omp.inner.for.body: 823 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 824 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 825 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 826 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 827 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 828 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 829 // CHECK3-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP13]], 5 830 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[MUL2]] 831 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[G]], align 4 832 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[G]], align 4 833 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 5 834 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[G]], align 4 835 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 836 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP15]], align 8 837 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 838 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 839 // CHECK3: omp.body.continue: 840 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 841 // CHECK3: omp.inner.for.inc: 842 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 843 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1 844 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 845 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 846 // CHECK3: omp.inner.for.end: 847 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 848 // CHECK3: omp.loop.exit: 849 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 850 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 851 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 852 // CHECK3-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 853 // CHECK3: .omp.linear.pu: 854 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 855 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], 10 856 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[TMP2]], align 4 857 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 858 // CHECK3: .omp.linear.pu.done: 859 // CHECK3-NEXT: ret void 860 // 861 // 862 // CHECK4-LABEL: define {{[^@]+}}@main 863 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] { 864 // CHECK4-NEXT: entry: 865 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 866 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 867 // CHECK4-NEXT: [[TMP0:%.*]] = load i8*, i8** getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to %struct.__block_literal_generic*), i32 0, i32 3), align 8 868 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to void (i8*)* 869 // CHECK4-NEXT: call void [[TMP1]](i8* bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global to i8*)) 870 // CHECK4-NEXT: ret i32 0 871 // 872 // 873 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke 874 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] { 875 // CHECK4-NEXT: entry: 876 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 877 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>*, align 8 878 // CHECK4-NEXT: [[OMP_OUTLINED_ARG_AGG_:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8 879 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 880 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* 881 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor* }>** [[BLOCK_ADDR]], align 8 882 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[OMP_OUTLINED_ARG_AGG_]], i32 0, i32 0 883 // CHECK4-NEXT: store i32* @g, i32** [[TMP0]], align 8 884 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.anon*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.anon* [[OMP_OUTLINED_ARG_AGG_]]) 885 // CHECK4-NEXT: ret void 886 // 887 // 888 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 889 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.anon* noalias [[__CONTEXT:%.*]]) #[[ATTR3:[0-9]+]] { 890 // CHECK4-NEXT: entry: 891 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 892 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 893 // CHECK4-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca %struct.anon*, align 8 894 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 895 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 896 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4 897 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 898 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 899 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 900 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 901 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 902 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4 903 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, align 8 904 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 905 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 906 // CHECK4-NEXT: store %struct.anon* [[__CONTEXT]], %struct.anon** [[__CONTEXT_ADDR]], align 8 907 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.anon*, %struct.anon** [[__CONTEXT_ADDR]], align 8 908 // CHECK4-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], %struct.anon* [[TMP0]], i32 0, i32 0 909 // CHECK4-NEXT: [[TMP2:%.*]] = load i32*, i32** [[TMP1]], align 8 910 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 911 // CHECK4-NEXT: store i32 [[TMP3]], i32* [[DOTLINEAR_START]], align 4 912 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 913 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 914 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 915 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 916 // CHECK4-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 917 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 918 // CHECK4-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP5]]) 919 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 920 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 921 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1 922 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 923 // CHECK4: cond.true: 924 // CHECK4-NEXT: br label [[COND_END:%.*]] 925 // CHECK4: cond.false: 926 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 927 // CHECK4-NEXT: br label [[COND_END]] 928 // CHECK4: cond.end: 929 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ] 930 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 931 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 932 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 933 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 934 // CHECK4: omp.inner.for.cond: 935 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 936 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 937 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 938 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 939 // CHECK4: omp.inner.for.body: 940 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 941 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 942 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 943 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 944 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 945 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 946 // CHECK4-NEXT: [[MUL2:%.*]] = mul nsw i32 [[TMP13]], 5 947 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[MUL2]] 948 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[G]], align 4 949 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[G]], align 4 950 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP14]], 5 951 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[G]], align 4 952 // CHECK4-NEXT: store i32 1, i32* [[G]], align 4 953 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 0 954 // CHECK4-NEXT: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** [[BLOCK_ISA]], align 8 955 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 1 956 // CHECK4-NEXT: store i32 1073741824, i32* [[BLOCK_FLAGS]], align 8 957 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 2 958 // CHECK4-NEXT: store i32 0, i32* [[BLOCK_RESERVED]], align 4 959 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 3 960 // CHECK4-NEXT: store i8* bitcast (void (i8*)* @g_block_invoke to i8*), i8** [[BLOCK_INVOKE]], align 8 961 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 4 962 // CHECK4-NEXT: store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8* }* @__block_descriptor_tmp.1 to %struct.__block_descriptor*), %struct.__block_descriptor** [[BLOCK_DESCRIPTOR]], align 8 963 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 964 // CHECK4-NEXT: [[TMP15:%.*]] = load volatile i32, i32* [[G]], align 4 965 // CHECK4-NEXT: store volatile i32 [[TMP15]], i32* [[BLOCK_CAPTURED]], align 8 966 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]] to void ()* 967 // CHECK4-NEXT: [[BLOCK_LITERAL:%.*]] = bitcast void ()* [[TMP16]] to %struct.__block_literal_generic* 968 // CHECK4-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], %struct.__block_literal_generic* [[BLOCK_LITERAL]], i32 0, i32 3 969 // CHECK4-NEXT: [[TMP18:%.*]] = bitcast %struct.__block_literal_generic* [[BLOCK_LITERAL]] to i8* 970 // CHECK4-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP17]], align 8 971 // CHECK4-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to void (i8*)* 972 // CHECK4-NEXT: call void [[TMP20]](i8* [[TMP18]]) 973 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 974 // CHECK4: omp.body.continue: 975 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 976 // CHECK4: omp.inner.for.inc: 977 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 978 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 979 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 980 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 981 // CHECK4: omp.inner.for.end: 982 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 983 // CHECK4: omp.loop.exit: 984 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]]) 985 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 986 // CHECK4-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 987 // CHECK4-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]] 988 // CHECK4: .omp.linear.pu: 989 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTLINEAR_START]], align 4 990 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], 10 991 // CHECK4-NEXT: store i32 [[ADD6]], i32* [[TMP2]], align 4 992 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]] 993 // CHECK4: .omp.linear.pu.done: 994 // CHECK4-NEXT: ret void 995 // 996 // 997 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke 998 // CHECK4-SAME: (i8* [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] { 999 // CHECK4-NEXT: entry: 1000 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca i8*, align 8 1001 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>*, align 8 1002 // CHECK4-NEXT: store i8* [[DOTBLOCK_DESCRIPTOR]], i8** [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8 1003 // CHECK4-NEXT: [[BLOCK:%.*]] = bitcast i8* [[DOTBLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* 1004 // CHECK4-NEXT: store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>** [[BLOCK_ADDR]], align 8 1005 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* [[BLOCK]], i32 0, i32 5 1006 // CHECK4-NEXT: store i32 2, i32* [[BLOCK_CAPTURE_ADDR]], align 8 1007 // CHECK4-NEXT: ret void 1008 // 1009