xref: /llvm-project/clang/test/CodeGen/inline-asm-intel.c (revision adc402bf3d0565ac2bc7efbdd05f0d846e818041)
1ae98182cSNico Weber // REQUIRES: x86-registered-target
2ae98182cSNico Weber 
3ae98182cSNico Weber /// Accept intel inline asm but write it out as att:
4a11d27f4SNico Weber // RUN: %clang_cc1 -triple i386-unknown-linux -mllvm -x86-asm-syntax=att -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=ATT %s
5a11d27f4SNico Weber // RUN: %clang_cc1 -triple x86_64-unknown-linux -mllvm -x86-asm-syntax=att -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=ATT %s
6ae98182cSNico Weber 
7ae98182cSNico Weber /// Accept intel inline asm and write it out as intel:
8a11d27f4SNico Weber // RUN: %clang_cc1 -triple i386-unknown-linux -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck  --check-prefix=INTEL %s
9a11d27f4SNico Weber // RUN: %clang_cc1 -triple x86_64-unknown-linux -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck  --check-prefix=INTEL %s
10ae98182cSNico Weber 
11b1ad813bSNico Weber /// Check MS compat mode (_MSC_VER defined). The driver always picks intel
12b1ad813bSNico Weber /// output in that mode, so test only that.
13b1ad813bSNico Weber // RUN: %clang_cc1 -triple i386-pc-win32 -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 | FileCheck  --check-prefix=INTEL %s
14b1ad813bSNico Weber // RUN: %clang_cc1 -triple x86_64-pc-win32 -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 | FileCheck  --check-prefix=INTEL %s
15ae98182cSNico Weber 
16ae98182cSNico Weber // Test that intrinsics headers still work with -masm=intel.
17ae98182cSNico Weber #ifdef _MSC_VER
18ae98182cSNico Weber #include <intrin.h>
19ae98182cSNico Weber #else
20ae98182cSNico Weber #include <x86intrin.h>
21ae98182cSNico Weber #endif
22ae98182cSNico Weber 
f(void)23*adc402bfSAaron Ballman void f(void) {
24ae98182cSNico Weber   // Intrinsic headers contain macros and inline functions.
25ae98182cSNico Weber   // Inline assembly in both are checked only when they are
26ae98182cSNico Weber   // referenced, so reference a few intrinsics here.
27ae98182cSNico Weber   __SSC_MARK(4);
28ae98182cSNico Weber   int a;
29ae98182cSNico Weber   _hreset(a);
30ae98182cSNico Weber   _pconfig_u32(0, (void*)0);
31ae98182cSNico Weber 
32ae98182cSNico Weber   _encls_u32(0, (void*)0);
33ae98182cSNico Weber   _enclu_u32(0, (void*)0);
34ae98182cSNico Weber   _enclv_u32(0, (void*)0);
35ae98182cSNico Weber #ifdef _MSC_VER
36ae98182cSNico Weber   __movsb((void*)0, (void*)0, 0);
37ae98182cSNico Weber   __movsd((void*)0, (void*)0, 0);
38ae98182cSNico Weber   __movsw((void*)0, (void*)0, 0);
39ae98182cSNico Weber   __stosb((void*)0, 0, 0);
40ae98182cSNico Weber   __stosd((void*)0, 0, 0);
41ae98182cSNico Weber   __stosw((void*)0, 0, 0);
42ae98182cSNico Weber #ifdef __x86_64__
43ae98182cSNico Weber   __movsq((void*)0, (void*)0, 0);
44ae98182cSNico Weber   __stosq((void*)0, 0, 0);
45ae98182cSNico Weber #endif
46ae98182cSNico Weber   __cpuid((void*)0, 0);
47ae98182cSNico Weber   __cpuidex((void*)0, 0, 0);
48ae98182cSNico Weber   __halt();
49ae98182cSNico Weber   __nop();
50ae98182cSNico Weber   __readmsr(0);
51ae98182cSNico Weber   __readcr3();
52ae98182cSNico Weber   __writecr3(0);
53ae98182cSNico Weber 
54ae98182cSNico Weber   _InterlockedExchange_HLEAcquire((void*)0, 0);
55ae98182cSNico Weber   _InterlockedExchange_HLERelease((void*)0, 0);
56ae98182cSNico Weber   _InterlockedCompareExchange_HLEAcquire((void*)0, 0, 0);
57ae98182cSNico Weber   _InterlockedCompareExchange_HLERelease((void*)0, 0, 0);
58ae98182cSNico Weber #ifdef __x86_64__
59ae98182cSNico Weber   _InterlockedExchange64_HLEAcquire((void*)0, 0);
60ae98182cSNico Weber   _InterlockedExchange64_HLERelease((void*)0, 0);
61ae98182cSNico Weber   _InterlockedCompareExchange64_HLEAcquire((void*)0, 0, 0);
62ae98182cSNico Weber   _InterlockedCompareExchange64_HLERelease((void*)0, 0, 0);
63ae98182cSNico Weber #endif
64ae98182cSNico Weber #endif
65ae98182cSNico Weber 
66ae98182cSNico Weber 
67ae98182cSNico Weber   __asm__("mov eax, ebx");
68ae98182cSNico Weber   // ATT: movl %ebx, %eax
69ae98182cSNico Weber   // INTEL: mov eax, ebx
70ae98182cSNico Weber 
71ae98182cSNico Weber   // Explicitly overriding asm style per block works:
72ae98182cSNico Weber   __asm__(".att_syntax\nmovl %ebx, %eax");
73ae98182cSNico Weber   // ATT: movl %ebx, %eax
74ae98182cSNico Weber   // INTEL: mov eax, ebx
75ae98182cSNico Weber 
76ae98182cSNico Weber   // The .att_syntax was only scoped to the previous statement.
77ae98182cSNico Weber   // (This is different from gcc, where `.att_syntax` is in
78ae98182cSNico Weber   // effect from that point on, so portable code would want an
79ae98182cSNico Weber   // explicit `.intel_syntax noprefix\n` at the start of this string).
80ae98182cSNico Weber   __asm__("mov eax, ebx");
81ae98182cSNico Weber   // ATT: movl %ebx, %eax
82ae98182cSNico Weber   // INTEL: mov eax, ebx
83ae98182cSNico Weber }
84ae98182cSNico Weber 
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