1e6217573SM. Zeeshan Siddiqui // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
2*c5de4dd1SFangrui Song // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -target-feature +fullbf16 -emit-llvm %s -o - | FileCheck %s
3*c5de4dd1SFangrui Song // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck -check-prefix=CHECK-NBF16 %s
4e6217573SM. Zeeshan Siddiqui
5e6217573SM. Zeeshan Siddiqui // CHECK-LABEL: define dso_local void @_Z11test_scalarDF16bDF16b
6e6217573SM. Zeeshan Siddiqui // CHECK-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
7e6217573SM. Zeeshan Siddiqui // CHECK: [[A_ADDR:%.*]] = alloca bfloat, align 2
8e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[B_ADDR:%.*]] = alloca bfloat, align 2
9e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[C:%.*]] = alloca bfloat, align 2
10e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
11e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[B]], ptr [[B_ADDR]], align 2
12e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
13e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP1:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
14e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[ADD:%.*]] = fadd bfloat [[TMP0]], [[TMP1]]
15e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[ADD]], ptr [[C]], align 2
16e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP2:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
17e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP3:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
18e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[SUB:%.*]] = fsub bfloat [[TMP2]], [[TMP3]]
19e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[SUB]], ptr [[C]], align 2
20e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP4:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
21e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP5:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
22e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[MUL:%.*]] = fmul bfloat [[TMP4]], [[TMP5]]
23e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[MUL]], ptr [[C]], align 2
24e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP6:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
25e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP7:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
26e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[DIV:%.*]] = fdiv bfloat [[TMP6]], [[TMP7]]
27e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store bfloat [[DIV]], ptr [[C]], align 2
28e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: ret void
29e6217573SM. Zeeshan Siddiqui //
30e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-LABEL: define dso_local void @_Z11test_scalarDF16bDF16b
31e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-SAME: (bfloat noundef [[A:%.*]], bfloat noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
32e6217573SM. Zeeshan Siddiqui // CHECK-NBF16: [[A_ADDR:%.*]] = alloca bfloat, align 2
33e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[B_ADDR:%.*]] = alloca bfloat, align 2
34e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[C:%.*]] = alloca bfloat, align 2
35e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[A]], ptr [[A_ADDR]], align 2
36e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[B]], ptr [[B_ADDR]], align 2
37e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
38e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT:%.*]] = fpext bfloat [[TMP0]] to float
39e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP1:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
40e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT1:%.*]] = fpext bfloat [[TMP1]] to float
41e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[ADD:%.*]] = fadd float [[EXT]], [[EXT1]]
42e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION:%.*]] = fptrunc float [[ADD]] to bfloat
43e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[UNPROMOTION]], ptr [[C]], align 2
44e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP2:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
45e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT2:%.*]] = fpext bfloat [[TMP2]] to float
46e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP3:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
47e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT3:%.*]] = fpext bfloat [[TMP3]] to float
48e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[SUB:%.*]] = fsub float [[EXT2]], [[EXT3]]
49e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION4:%.*]] = fptrunc float [[SUB]] to bfloat
50e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[UNPROMOTION4]], ptr [[C]], align 2
51e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP4:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
52e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT5:%.*]] = fpext bfloat [[TMP4]] to float
53e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP5:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
54e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT6:%.*]] = fpext bfloat [[TMP5]] to float
55e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[MUL:%.*]] = fmul float [[EXT5]], [[EXT6]]
56e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION7:%.*]] = fptrunc float [[MUL]] to bfloat
57e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[UNPROMOTION7]], ptr [[C]], align 2
58e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP6:%.*]] = load bfloat, ptr [[A_ADDR]], align 2
59e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT8:%.*]] = fpext bfloat [[TMP6]] to float
60e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP7:%.*]] = load bfloat, ptr [[B_ADDR]], align 2
61e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT9:%.*]] = fpext bfloat [[TMP7]] to float
62e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[DIV:%.*]] = fdiv float [[EXT8]], [[EXT9]]
63e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION10:%.*]] = fptrunc float [[DIV]] to bfloat
64e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store bfloat [[UNPROMOTION10]], ptr [[C]], align 2
65e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: ret void
66e6217573SM. Zeeshan Siddiqui //
test_scalar(__bf16 a,__bf16 b)67e6217573SM. Zeeshan Siddiqui void test_scalar(__bf16 a, __bf16 b) {
68e6217573SM. Zeeshan Siddiqui __bf16 c;
69e6217573SM. Zeeshan Siddiqui c = a + b;
70e6217573SM. Zeeshan Siddiqui c = a - b;
71e6217573SM. Zeeshan Siddiqui c = a * b;
72e6217573SM. Zeeshan Siddiqui c = a / b;
73e6217573SM. Zeeshan Siddiqui }
74e6217573SM. Zeeshan Siddiqui
75e6217573SM. Zeeshan Siddiqui typedef __bf16 v8bfloat16 __attribute__((__vector_size__(16)));
76e6217573SM. Zeeshan Siddiqui
77e6217573SM. Zeeshan Siddiqui // CHECK-LABEL: define dso_local void @_Z11test_vectorDv8_DF16bS_
78e6217573SM. Zeeshan Siddiqui // CHECK-SAME: (<8 x bfloat> noundef [[A:%.*]], <8 x bfloat> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
79e6217573SM. Zeeshan Siddiqui // CHECK: [[A_ADDR:%.*]] = alloca <8 x bfloat>, align 16
80e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x bfloat>, align 16
81e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[C:%.*]] = alloca <8 x bfloat>, align 16
82e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[A]], ptr [[A_ADDR]], align 16
83e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[B]], ptr [[B_ADDR]], align 16
84e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
85e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
86e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[ADD:%.*]] = fadd <8 x bfloat> [[TMP0]], [[TMP1]]
87e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[ADD]], ptr [[C]], align 16
88e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP2:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
89e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP3:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
90e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[SUB:%.*]] = fsub <8 x bfloat> [[TMP2]], [[TMP3]]
91e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[SUB]], ptr [[C]], align 16
92e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP4:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
93e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP5:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
94e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[MUL:%.*]] = fmul <8 x bfloat> [[TMP4]], [[TMP5]]
95e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[MUL]], ptr [[C]], align 16
96e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP6:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
97e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[TMP7:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
98e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: [[DIV:%.*]] = fdiv <8 x bfloat> [[TMP6]], [[TMP7]]
99e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: store <8 x bfloat> [[DIV]], ptr [[C]], align 16
100e6217573SM. Zeeshan Siddiqui // CHECK-NEXT: ret void
101e6217573SM. Zeeshan Siddiqui //
102e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-LABEL: define dso_local void @_Z11test_vectorDv8_DF16bS_
103e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-SAME: (<8 x bfloat> noundef [[A:%.*]], <8 x bfloat> noundef [[B:%.*]]) #[[ATTR0:[0-9]+]] {
104e6217573SM. Zeeshan Siddiqui // CHECK-NBF16: [[A_ADDR:%.*]] = alloca <8 x bfloat>, align 16
105e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[B_ADDR:%.*]] = alloca <8 x bfloat>, align 16
106e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[C:%.*]] = alloca <8 x bfloat>, align 16
107e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[A]], ptr [[A_ADDR]], align 16
108e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[B]], ptr [[B_ADDR]], align 16
109e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
110e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT:%.*]] = fpext <8 x bfloat> [[TMP0]] to <8 x float>
111e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
112e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT1:%.*]] = fpext <8 x bfloat> [[TMP1]] to <8 x float>
113e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[ADD:%.*]] = fadd <8 x float> [[EXT]], [[EXT1]]
114e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION:%.*]] = fptrunc <8 x float> [[ADD]] to <8 x bfloat>
115e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[UNPROMOTION]], ptr [[C]], align 16
116e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP2:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
117e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT2:%.*]] = fpext <8 x bfloat> [[TMP2]] to <8 x float>
118e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP3:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
119e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT3:%.*]] = fpext <8 x bfloat> [[TMP3]] to <8 x float>
120e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[SUB:%.*]] = fsub <8 x float> [[EXT2]], [[EXT3]]
121e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION4:%.*]] = fptrunc <8 x float> [[SUB]] to <8 x bfloat>
122e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[UNPROMOTION4]], ptr [[C]], align 16
123e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP4:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
124e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT5:%.*]] = fpext <8 x bfloat> [[TMP4]] to <8 x float>
125e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP5:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
126e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT6:%.*]] = fpext <8 x bfloat> [[TMP5]] to <8 x float>
127e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[MUL:%.*]] = fmul <8 x float> [[EXT5]], [[EXT6]]
128e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION7:%.*]] = fptrunc <8 x float> [[MUL]] to <8 x bfloat>
129e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[UNPROMOTION7]], ptr [[C]], align 16
130e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP6:%.*]] = load <8 x bfloat>, ptr [[A_ADDR]], align 16
131e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT8:%.*]] = fpext <8 x bfloat> [[TMP6]] to <8 x float>
132e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[TMP7:%.*]] = load <8 x bfloat>, ptr [[B_ADDR]], align 16
133e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[EXT9:%.*]] = fpext <8 x bfloat> [[TMP7]] to <8 x float>
134e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[DIV:%.*]] = fdiv <8 x float> [[EXT8]], [[EXT9]]
135e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: [[UNPROMOTION10:%.*]] = fptrunc <8 x float> [[DIV]] to <8 x bfloat>
136e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: store <8 x bfloat> [[UNPROMOTION10]], ptr [[C]], align 16
137e6217573SM. Zeeshan Siddiqui // CHECK-NBF16-NEXT: ret void
138e6217573SM. Zeeshan Siddiqui //
test_vector(v8bfloat16 a,v8bfloat16 b)139e6217573SM. Zeeshan Siddiqui void test_vector(v8bfloat16 a, v8bfloat16 b) {
140e6217573SM. Zeeshan Siddiqui v8bfloat16 c;
141e6217573SM. Zeeshan Siddiqui c = a + b;
142e6217573SM. Zeeshan Siddiqui c = a - b;
143e6217573SM. Zeeshan Siddiqui c = a * b;
144e6217573SM. Zeeshan Siddiqui c = a / b;
145e6217573SM. Zeeshan Siddiqui }
146