1 // RUN: %clang_cc1 -triple riscv32 -O2 -emit-llvm %s -o - \ 2 // RUN: | FileCheck %s 3 // RUN: %clang_cc1 -triple riscv64 -O2 -emit-llvm %s -o - \ 4 // RUN: | FileCheck %s 5 6 // Test RISC-V specific inline assembly constraints. 7 8 void test_I() { 9 // CHECK-LABEL: define{{.*}} void @test_I() 10 // CHECK: call void asm sideeffect "", "I"(i32 2047) 11 asm volatile ("" :: "I"(2047)); 12 // CHECK: call void asm sideeffect "", "I"(i32 -2048) 13 asm volatile ("" :: "I"(-2048)); 14 } 15 16 void test_J() { 17 // CHECK-LABEL: define{{.*}} void @test_J() 18 // CHECK: call void asm sideeffect "", "J"(i32 0) 19 asm volatile ("" :: "J"(0)); 20 } 21 22 void test_K() { 23 // CHECK-LABEL: define{{.*}} void @test_K() 24 // CHECK: call void asm sideeffect "", "K"(i32 31) 25 asm volatile ("" :: "K"(31)); 26 // CHECK: call void asm sideeffect "", "K"(i32 0) 27 asm volatile ("" :: "K"(0)); 28 } 29 30 float f; 31 double d; 32 void test_f() { 33 // CHECK-LABEL: define{{.*}} void @test_f() 34 // CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load float, float* @f 35 // CHECK: call void asm sideeffect "", "f"(float [[FLT_ARG]]) 36 asm volatile ("" :: "f"(f)); 37 // CHECK: [[FLT_ARG:%[a-zA-Z_0-9]+]] = load double, double* @d 38 // CHECK: call void asm sideeffect "", "f"(double [[FLT_ARG]]) 39 asm volatile ("" :: "f"(d)); 40 } 41 42 void test_A(int *p) { 43 // CHECK-LABEL: define{{.*}} void @test_A(i32* %p) 44 // CHECK: call void asm sideeffect "", "*A"(i32* %p) 45 asm volatile("" :: "A"(*p)); 46 } 47 48 void test_S() { 49 // CHECK-LABEL: define{{.*}} void @test_S() 50 // CHECK: call void asm sideeffect "", "S"(float* nonnull @f) 51 asm volatile("" :: "S"(&f)); 52 } 53