xref: /inferno-os/os/js/superio.c (revision 556f8a312ed1b20f8ff25c104928646828e8b05c)
1 #include "u.h"
2 #include "../port/lib.h"
3 #include "mem.h"
4 #include "dat.h"
5 #include "fns.h"
6 #include "io.h"
7 
8 
9 enum
10 {
11 	 /* superio configuration registers */
12 	SioFER =	0x0,		/* function enable register */
13 	SioFAR =	0x1,		/* function address register */
14 	SioPTR =	0x2,		/* power and test egister */
15 	SioFCR =	0x3,		/* function control register */
16 	SioPCR =	0x4,		/* printer control register */
17 	SioKRR =	0x5,		/* keyboard and RTC control register */
18 	SioPMC =	0x6,		/* power mgmt control register */
19 	SioTUP =	0x7,		/* tape uart and parallel register */
20 	SioSID =	0x8,		/* SuperIO ID register */
21 	SioASC =	0x9,		/* Advanced SIO Config register */
22 	SioCS0CF0 =	0xA,		/* Chip select 0 config register 0 */
23 	SioCS0CF1 =	0xB,		/* Chip select 0 config register 1 */
24 	SioCS1CF0 =	0xC,		/* Chip select 1 config register 0 */
25 	SioCS1CF1 = 	0xD,		/* Chip select 1 config register 1 */
26 
27 	 /* FER bits */
28 	PPTEnable = 	1<<0,
29 	EnableUART1 = 	1<<1,
30 	EnableUART2 = 	1<<2,
31 	FDCEnable = 	1<<3,
32 	FDC4 =	 	1<<4,
33 	FDC2ndAddr = 	1<<5,
34 	IDEEnable = 	1<<6,
35 	IDE2ndAddr = 	1<<7,
36 
37 	 /* FAR bits */
38 	PPTAddr =	3<<0,
39 	UART1Addr = 	3<<2,
40 	UART2Addr =	3<<4,
41 	SelectCom3n4 = 	3<<6,
42 
43 	 /* PTR bits */
44 	PWDN = 		1<<0,
45 	ClkPWDN = 	1<<1,
46 	PWDNSelect = 	1<<2,
47 	IRQSelect = 	1<<3,
48 	UART1Test = 	1<<4,
49 	UART2Test = 	1<<5,
50 	LockConfig = 	1<<6,
51 	XtndPPTSelect =	1<<7,
52 
53 	 /* FCR bits */
54 	MediaSense =	1<<0,
55 	DatRateSelect =	1<<0,
56 	IDENTSelect = 	1<<1,
57 	PPTFloat = 	1<<3,
58 	LogicalDrvXcg =	1<<4,	/* logical drive exchange */
59 	EnaZeroWait = 	1<<5,	/* zero wait state enable *.
60 
61 	 /* PCR bits */
62 	EPPEnable =	1<<0,
63 	EPPVersionSel =	1<<1,
64 	ECPEnable = 	1<<2,
65 	ECPClkFreeze = 	1<<3,
66 	PPTIntPolar = 	1<<5,
67 	PPTIntIOCtl = 	1<<6,
68 	RTCRamMask =	1<<7,
69 
70 	 /* KRR bits */
71 	KBCEnable =	1<<0,
72 	KBCSpeedCtl = 	1<<1,
73 	EnaProgAccess =	1<<2,
74 	RTCEnable = 	1<<3,
75 	RTCClkTst = 	1<<4,
76 	RAMSEL = 	1<<5,
77 	EnaChipSelect =	1<<6,
78 	KBCClkSource =	1<<7,
79 
80 	 /* PMC bits */
81 	IDETriStCtl =	1<<0,
82 	FDCTriStCtl = 	1<<1,
83 	UARTTriStCtl = 	1<<2,
84 	SelectiveLock =	1<<5,
85 	PPTriStEna = 	1<<6,
86 
87 	 /* TUP bits */
88 	EPPToutIntEna =	1<<2,
89 
90 	 /* SID bits are just data values */
91 
92 	 /* ASC bits */
93 	IRQ5Select = 	1<<0,
94 	DRATE0Select =	1<<0,
95 	DRV2Select = 	1<<1,
96 	DR23Select = 	1<<1,
97 	EnhancedTDR = 	1<<2,
98 	ECPCnfgABit3 = 	1<<5,
99 	SystemOpMode0 =	1<<6,
100 	SystemOpMode1 =	1<<7,
101 
102 	 /* CS0CF0 bits are LA0-LA7 */
103 	 /* CS1CF0 bits are LA0-LA7 */
104 	 /* CSxCF1 bits (x=0,1) */
105 	HA8 =		1<<0,
106 	HA9 = 		1<<1,
107 	HA10 = 		1<<2,
108 	EnaCSWr = 	1<<4,
109 	EnaCSRd =	1<<5,
110 	CSAdrDcode =	1<<6,	/* enable full addr decode */
111 	CSSelectPin =	1<<7,	/* CS/CS0 and SYSCLK/CS1 select pin */
112 };
113 
114 typedef struct SuperIO SuperIO;
115 
116 struct SuperIO
117 {
118 	ulong va;
119 	uchar *index;	/* superio index register */
120 	uchar *data;	/* superio data register */
121 
122 	uchar *mkctl;	/* superio mouse/kbd control register */
123 	uchar *mkdata;	/* superio mouse/kbd data register */
124 };
125 
126 
127 static SuperIO sio;
128 
129 static void printstatus(uchar status);
130 
131 void
132 superioinit(ulong va, uchar *sindex, uchar *sdata, uchar *mkctl, uchar *mkdata)
133 {
134 	sio.va = va;
135 
136 	sio.index = sindex;
137 	sio.data = sdata;
138 
139 	sio.mkctl = mkctl;
140 	sio.mkdata = mkdata;
141 }
142 
143 
144 ulong
145 superiova(void)
146 {
147 	return sio.va;
148 }
149 
150 enum
151 {
152 	OBF =		1<<0,
153 	IBF =		1<<1,
154 	SysFlag =	1<<2,
155 	LastWrWasCmd = 	1<<3,
156 	KbdEnabled =	1<<4,
157 	FromMouse = 	1<<5,
158 	Timeout = 	1<<6,
159 	ParityError = 	1<<7
160 };
161 
162 uchar
163 superio_readctl(void)
164 {
165 	return *sio.mkctl;
166 }
167 
168 uchar
169 superio_readdata(void)
170 {
171 	return *sio.mkdata;
172 }
173 
174 void
175 superio_writectl(uchar val)
176 {
177 	*sio.mkctl = val;
178 }
179 
180 void
181 superio_writedata(uchar val)
182 {
183 	*sio.mkdata = val;
184 }
185 
186 
187 static  void
188 printstatus(uchar status)
189 {
190 	print("0x%2.2ux = <",status);
191 	if(status & OBF) print("OBF|");
192 	if(status & IBF) print("IBF|");
193 	if(status & SysFlag) print("SysFlag|");
194 	if(status & LastWrWasCmd) print("LastWrWasCmd|");
195 	if(status & KbdEnabled) print("KbdEnabled|");
196 	if(status & FromMouse) print("FromMouse|");
197 	if(status & Timeout) print("Timeout|");
198 	if(status & ParityError) print("ParityErr|");
199 	print(">");
200 }
201 
202 void
203 testit()
204 {
205 	uchar status;
206 	uchar val;
207 
208 	for(;;) {
209 		status = *sio.mkctl;
210 		if(status&OBF) {
211 			printstatus(status);
212 			val = *sio.mkdata;
213 			print(", data = 0x%2.2ux\n",val);
214 		}
215 	}
216 }
217