1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011-2012 Stefan Bethke. 5 * Copyright (c) 2012 Adrian Chadd. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/errno.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/socket.h> 39 #include <sys/sockio.h> 40 #include <sys/sysctl.h> 41 #include <sys/systm.h> 42 43 #include <net/if.h> 44 #include <net/if_var.h> 45 #include <net/if_arp.h> 46 #include <net/ethernet.h> 47 #include <net/if_dl.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 51 #include <machine/bus.h> 52 #include <dev/iicbus/iic.h> 53 #include <dev/iicbus/iiconf.h> 54 #include <dev/iicbus/iicbus.h> 55 #include <dev/mii/mii.h> 56 #include <dev/mii/miivar.h> 57 #include <dev/mdio/mdio.h> 58 59 #include <dev/etherswitch/etherswitch.h> 60 61 #include <dev/etherswitch/arswitch/arswitchreg.h> 62 #include <dev/etherswitch/arswitch/arswitchvar.h> 63 #include <dev/etherswitch/arswitch/arswitch_reg.h> 64 #include <dev/etherswitch/arswitch/arswitch_phy.h> 65 #include <dev/etherswitch/arswitch/arswitch_vlans.h> 66 67 #include <dev/etherswitch/arswitch/arswitch_8216.h> 68 #include <dev/etherswitch/arswitch/arswitch_8226.h> 69 #include <dev/etherswitch/arswitch/arswitch_8316.h> 70 #include <dev/etherswitch/arswitch/arswitch_8327.h> 71 72 #include "mdio_if.h" 73 #include "miibus_if.h" 74 #include "etherswitch_if.h" 75 76 /* Map ETHERSWITCH_PORT_LED_* to Atheros pattern codes */ 77 static int led_pattern_table[] = { 78 [ETHERSWITCH_PORT_LED_DEFAULT] = 0x3, 79 [ETHERSWITCH_PORT_LED_ON] = 0x2, 80 [ETHERSWITCH_PORT_LED_OFF] = 0x0, 81 [ETHERSWITCH_PORT_LED_BLINK] = 0x1 82 }; 83 84 static inline int arswitch_portforphy(int phy); 85 static void arswitch_tick(void *arg); 86 static int arswitch_ifmedia_upd(if_t); 87 static void arswitch_ifmedia_sts(if_t, struct ifmediareq *); 88 static int ar8xxx_port_vlan_setup(struct arswitch_softc *sc, 89 etherswitch_port_t *p); 90 static int ar8xxx_port_vlan_get(struct arswitch_softc *sc, 91 etherswitch_port_t *p); 92 static int arswitch_setled(struct arswitch_softc *sc, int phy, int led, 93 int style); 94 95 static int 96 arswitch_probe(device_t dev) 97 { 98 struct arswitch_softc *sc; 99 uint32_t id; 100 char *chipname, desc[256]; 101 102 sc = device_get_softc(dev); 103 bzero(sc, sizeof(*sc)); 104 sc->page = -1; 105 106 /* AR8xxx probe */ 107 id = arswitch_readreg(dev, AR8X16_REG_MASK_CTRL); 108 sc->chip_rev = (id & AR8X16_MASK_CTRL_REV_MASK); 109 sc->chip_ver = (id & AR8X16_MASK_CTRL_VER_MASK) >> AR8X16_MASK_CTRL_VER_SHIFT; 110 switch (id & (AR8X16_MASK_CTRL_VER_MASK | AR8X16_MASK_CTRL_REV_MASK)) { 111 case 0x0101: 112 chipname = "AR8216"; 113 sc->sc_switchtype = AR8X16_SWITCH_AR8216; 114 break; 115 case 0x0201: 116 chipname = "AR8226"; 117 sc->sc_switchtype = AR8X16_SWITCH_AR8226; 118 break; 119 /* 0x0301 - AR8236 */ 120 case 0x1000: 121 case 0x1001: 122 chipname = "AR8316"; 123 sc->sc_switchtype = AR8X16_SWITCH_AR8316; 124 break; 125 case 0x1202: 126 case 0x1204: 127 chipname = "AR8327"; 128 sc->sc_switchtype = AR8X16_SWITCH_AR8327; 129 sc->mii_lo_first = 1; 130 break; 131 default: 132 chipname = NULL; 133 } 134 135 DPRINTF(sc, ARSWITCH_DBG_ANY, "chipname=%s, id=%08x\n", chipname, id); 136 if (chipname != NULL) { 137 snprintf(desc, sizeof(desc), 138 "Atheros %s Ethernet Switch (ver %d rev %d)", 139 chipname, 140 sc->chip_ver, 141 sc->chip_rev); 142 device_set_desc_copy(dev, desc); 143 return (BUS_PROBE_DEFAULT); 144 } 145 return (ENXIO); 146 } 147 148 static int 149 arswitch_attach_phys(struct arswitch_softc *sc) 150 { 151 int phy, err = 0; 152 char name[IFNAMSIZ]; 153 154 /* PHYs need an interface, so we generate a dummy one */ 155 snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(sc->sc_dev)); 156 for (phy = 0; phy < sc->numphys; phy++) { 157 sc->ifp[phy] = if_alloc(IFT_ETHER); 158 if (sc->ifp[phy] == NULL) { 159 device_printf(sc->sc_dev, "couldn't allocate ifnet structure\n"); 160 err = ENOMEM; 161 break; 162 } 163 164 if_setsoftc(sc->ifp[phy], sc); 165 if_setflagbits(sc->ifp[phy], IFF_UP | IFF_BROADCAST | 166 IFF_DRV_RUNNING | IFF_SIMPLEX, 0); 167 sc->ifname[phy] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK); 168 bcopy(name, sc->ifname[phy], strlen(name)+1); 169 if_initname(sc->ifp[phy], sc->ifname[phy], 170 arswitch_portforphy(phy)); 171 err = mii_attach(sc->sc_dev, &sc->miibus[phy], sc->ifp[phy], 172 arswitch_ifmedia_upd, arswitch_ifmedia_sts, \ 173 BMSR_DEFCAPMASK, phy, MII_OFFSET_ANY, 0); 174 #if 0 175 DPRINTF(sc->sc_dev, "%s attached to pseudo interface %s\n", 176 device_get_nameunit(sc->miibus[phy]), 177 sc->ifp[phy]->if_xname); 178 #endif 179 if (err != 0) { 180 device_printf(sc->sc_dev, 181 "attaching PHY %d failed\n", 182 phy); 183 return (err); 184 } 185 186 if (AR8X16_IS_SWITCH(sc, AR8327)) { 187 int led; 188 char ledname[IFNAMSIZ+4]; 189 190 for (led = 0; led < 3; led++) { 191 sprintf(ledname, "%s%dled%d", name, 192 arswitch_portforphy(phy), led+1); 193 sc->dev_led[phy][led].sc = sc; 194 sc->dev_led[phy][led].phy = phy; 195 sc->dev_led[phy][led].lednum = led; 196 } 197 } 198 } 199 return (0); 200 } 201 202 static int 203 arswitch_reset(device_t dev) 204 { 205 206 arswitch_writereg(dev, AR8X16_REG_MASK_CTRL, 207 AR8X16_MASK_CTRL_SOFT_RESET); 208 DELAY(1000); 209 if (arswitch_readreg(dev, AR8X16_REG_MASK_CTRL) & 210 AR8X16_MASK_CTRL_SOFT_RESET) { 211 device_printf(dev, "unable to reset switch\n"); 212 return (-1); 213 } 214 return (0); 215 } 216 217 static int 218 arswitch_set_vlan_mode(struct arswitch_softc *sc, uint32_t mode) 219 { 220 221 /* Check for invalid modes. */ 222 if ((mode & sc->info.es_vlan_caps) != mode) 223 return (EINVAL); 224 225 switch (mode) { 226 case ETHERSWITCH_VLAN_DOT1Q: 227 sc->vlan_mode = ETHERSWITCH_VLAN_DOT1Q; 228 break; 229 case ETHERSWITCH_VLAN_PORT: 230 sc->vlan_mode = ETHERSWITCH_VLAN_PORT; 231 break; 232 default: 233 sc->vlan_mode = 0; 234 } 235 236 /* Reset VLANs. */ 237 sc->hal.arswitch_vlan_init_hw(sc); 238 239 return (0); 240 } 241 242 static void 243 ar8xxx_port_init(struct arswitch_softc *sc, int port) 244 { 245 246 /* Port0 - CPU */ 247 if (port == AR8X16_PORT_CPU) { 248 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(0), 249 (AR8X16_IS_SWITCH(sc, AR8216) ? 250 AR8X16_PORT_STS_SPEED_100 : AR8X16_PORT_STS_SPEED_1000) | 251 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_RXFLOW) | 252 (AR8X16_IS_SWITCH(sc, AR8216) ? 0 : AR8X16_PORT_STS_TXFLOW) | 253 AR8X16_PORT_STS_RXMAC | 254 AR8X16_PORT_STS_TXMAC | 255 AR8X16_PORT_STS_DUPLEX); 256 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0), 257 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(0)) & 258 ~AR8X16_PORT_CTRL_HEADER); 259 } else { 260 /* Set ports to auto negotiation. */ 261 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_STS(port), 262 AR8X16_PORT_STS_LINK_AUTO); 263 arswitch_writereg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port), 264 arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(port)) & 265 ~AR8X16_PORT_CTRL_HEADER); 266 } 267 } 268 269 static int 270 ar8xxx_atu_wait_ready(struct arswitch_softc *sc) 271 { 272 int ret; 273 274 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 275 276 ret = arswitch_waitreg(sc->sc_dev, 277 AR8216_REG_ATU, 278 AR8216_ATU_ACTIVE, 279 0, 280 1000); 281 282 return (ret); 283 } 284 285 /* 286 * Flush all ATU entries. 287 */ 288 static int 289 ar8xxx_atu_flush(struct arswitch_softc *sc) 290 { 291 int ret; 292 293 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 294 295 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing all ports\n", __func__); 296 297 ret = ar8xxx_atu_wait_ready(sc); 298 if (ret) 299 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__); 300 301 if (!ret) 302 arswitch_writereg(sc->sc_dev, 303 AR8216_REG_ATU, 304 AR8216_ATU_OP_FLUSH | AR8216_ATU_ACTIVE); 305 306 return (ret); 307 } 308 309 /* 310 * Flush ATU entries for a single port. 311 */ 312 static int 313 ar8xxx_atu_flush_port(struct arswitch_softc *sc, int port) 314 { 315 int ret, val; 316 317 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: flushing port %d\n", __func__, 318 port); 319 320 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 321 322 /* Flush unicast entries on port */ 323 val = AR8216_ATU_OP_FLUSH_UNICAST; 324 325 /* TODO: bit 4 indicates whether to flush dynamic (0) or static (1) */ 326 327 /* Which port */ 328 val |= SM(port, AR8216_ATU_PORT_NUM); 329 330 ret = ar8xxx_atu_wait_ready(sc); 331 if (ret) 332 device_printf(sc->sc_dev, "%s: waitreg failed\n", __func__); 333 334 if (!ret) 335 arswitch_writereg(sc->sc_dev, 336 AR8216_REG_ATU, 337 val | AR8216_ATU_ACTIVE); 338 339 return (ret); 340 } 341 342 /* 343 * XXX TODO: flush a single MAC address. 344 */ 345 346 /* 347 * Fetch a single entry from the ATU. 348 */ 349 static int 350 ar8xxx_atu_fetch_table(struct arswitch_softc *sc, etherswitch_atu_entry_t *e, 351 int atu_fetch_op) 352 { 353 uint32_t ret0, ret1, ret2, val; 354 355 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 356 357 switch (atu_fetch_op) { 358 case 0: 359 /* Initialise things for the first fetch */ 360 361 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: initializing\n", __func__); 362 (void) ar8xxx_atu_wait_ready(sc); 363 364 arswitch_writereg(sc->sc_dev, 365 AR8216_REG_ATU, AR8216_ATU_OP_GET_NEXT); 366 arswitch_writereg(sc->sc_dev, 367 AR8216_REG_ATU_DATA, 0); 368 arswitch_writereg(sc->sc_dev, 369 AR8216_REG_ATU_CTRL2, 0); 370 371 return (0); 372 case 1: 373 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: reading next\n", __func__); 374 /* 375 * Attempt to read the next address entry; don't modify what 376 * is there in AT_ADDR{4,5} as its used for the next fetch 377 */ 378 (void) ar8xxx_atu_wait_ready(sc); 379 380 /* Begin the next read event; not modifying anything */ 381 val = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU); 382 val |= AR8216_ATU_ACTIVE; 383 arswitch_writereg(sc->sc_dev, AR8216_REG_ATU, val); 384 385 /* Wait for it to complete */ 386 (void) ar8xxx_atu_wait_ready(sc); 387 388 /* Fetch the ethernet address and ATU status */ 389 ret0 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU); 390 ret1 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_DATA); 391 ret2 = arswitch_readreg(sc->sc_dev, AR8216_REG_ATU_CTRL2); 392 393 /* If the status is zero, then we're done */ 394 if (MS(ret2, AR8216_ATU_CTRL2_AT_STATUS) == 0) 395 return (-1); 396 397 /* MAC address */ 398 e->es_macaddr[5] = MS(ret0, AR8216_ATU_ADDR5); 399 e->es_macaddr[4] = MS(ret0, AR8216_ATU_ADDR4); 400 e->es_macaddr[3] = MS(ret1, AR8216_ATU_ADDR3); 401 e->es_macaddr[2] = MS(ret1, AR8216_ATU_ADDR2); 402 e->es_macaddr[1] = MS(ret1, AR8216_ATU_ADDR1); 403 e->es_macaddr[0] = MS(ret1, AR8216_ATU_ADDR0); 404 405 /* Bitmask of ports this entry is for */ 406 e->es_portmask = MS(ret2, AR8216_ATU_CTRL2_DESPORT); 407 408 /* TODO: other flags that are interesting */ 409 410 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: MAC %6D portmask 0x%08x\n", 411 __func__, 412 e->es_macaddr, ":", e->es_portmask); 413 return (0); 414 default: 415 return (-1); 416 } 417 return (-1); 418 } 419 420 /* 421 * Configure aging register defaults. 422 */ 423 static int 424 ar8xxx_atu_learn_default(struct arswitch_softc *sc) 425 { 426 int ret; 427 uint32_t val; 428 429 DPRINTF(sc, ARSWITCH_DBG_ATU, "%s: resetting learning\n", __func__); 430 431 /* 432 * For now, configure the aging defaults: 433 * 434 * + ARP_EN - enable "acknowledgement" of ARP frames - they are 435 * forwarded to the CPU port 436 * + LEARN_CHANGE_EN - hash table violations when learning MAC addresses 437 * will force an entry to be expired/updated and a new one to be 438 * programmed in. 439 * + AGE_EN - enable address table aging 440 * + AGE_TIME - set to 5 minutes 441 */ 442 val = 0; 443 val |= AR8216_ATU_CTRL_ARP_EN; 444 val |= AR8216_ATU_CTRL_LEARN_CHANGE; 445 val |= AR8216_ATU_CTRL_AGE_EN; 446 val |= 0x2b; /* 5 minutes; bits 15:0 */ 447 448 ret = arswitch_writereg(sc->sc_dev, 449 AR8216_REG_ATU_CTRL, 450 val); 451 452 if (ret) 453 device_printf(sc->sc_dev, "%s: writereg failed\n", __func__); 454 455 return (ret); 456 } 457 458 /* 459 * XXX TODO: add another routine to configure the leaky behaviour 460 * when unknown frames are received. These must be consistent 461 * between ethernet switches. 462 */ 463 464 /* 465 * Fetch the configured switch MAC address. 466 */ 467 static int 468 ar8xxx_hw_get_switch_macaddr(struct arswitch_softc *sc, struct ether_addr *ea) 469 { 470 uint32_t ret0, ret1; 471 char *s; 472 473 s = (void *) ea; 474 475 ret0 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR0); 476 ret1 = arswitch_readreg(sc->sc_dev, AR8X16_REG_SW_MAC_ADDR1); 477 478 s[5] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE5); 479 s[4] = MS(ret0, AR8X16_REG_SW_MAC_ADDR0_BYTE4); 480 s[3] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE3); 481 s[2] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE2); 482 s[1] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE1); 483 s[0] = MS(ret1, AR8X16_REG_SW_MAC_ADDR1_BYTE0); 484 485 return (0); 486 } 487 488 /* 489 * Set the switch mac address. 490 */ 491 static int 492 ar8xxx_hw_set_switch_macaddr(struct arswitch_softc *sc, 493 const struct ether_addr *ea) 494 { 495 496 return (ENXIO); 497 } 498 499 /* 500 * XXX TODO: this attach routine does NOT free all memory, resources 501 * upon failure! 502 */ 503 static int 504 arswitch_attach(device_t dev) 505 { 506 struct arswitch_softc *sc = device_get_softc(dev); 507 struct sysctl_ctx_list *ctx; 508 struct sysctl_oid *tree; 509 int err = 0; 510 int port; 511 512 /* sc->sc_switchtype is already decided in arswitch_probe() */ 513 sc->sc_dev = dev; 514 mtx_init(&sc->sc_mtx, "arswitch", NULL, MTX_DEF); 515 sc->page = -1; 516 strlcpy(sc->info.es_name, device_get_desc(dev), 517 sizeof(sc->info.es_name)); 518 519 /* Debugging */ 520 ctx = device_get_sysctl_ctx(sc->sc_dev); 521 tree = device_get_sysctl_tree(sc->sc_dev); 522 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 523 "debug", CTLFLAG_RW, &sc->sc_debug, 0, 524 "control debugging printfs"); 525 526 /* Allocate a 128 entry ATU table; hopefully its big enough! */ 527 /* XXX TODO: make this per chip */ 528 sc->atu.entries = malloc(sizeof(etherswitch_atu_entry_t) * 128, 529 M_DEVBUF, M_NOWAIT); 530 if (sc->atu.entries == NULL) { 531 device_printf(sc->sc_dev, "%s: failed to allocate ATU table\n", 532 __func__); 533 return (ENXIO); 534 } 535 sc->atu.count = 0; 536 sc->atu.size = 128; 537 538 /* Default HAL methods */ 539 sc->hal.arswitch_port_init = ar8xxx_port_init; 540 sc->hal.arswitch_port_vlan_setup = ar8xxx_port_vlan_setup; 541 sc->hal.arswitch_port_vlan_get = ar8xxx_port_vlan_get; 542 sc->hal.arswitch_vlan_init_hw = ar8xxx_reset_vlans; 543 sc->hal.arswitch_hw_get_switch_macaddr = ar8xxx_hw_get_switch_macaddr; 544 sc->hal.arswitch_hw_set_switch_macaddr = ar8xxx_hw_set_switch_macaddr; 545 546 sc->hal.arswitch_vlan_getvgroup = ar8xxx_getvgroup; 547 sc->hal.arswitch_vlan_setvgroup = ar8xxx_setvgroup; 548 549 sc->hal.arswitch_vlan_get_pvid = ar8xxx_get_pvid; 550 sc->hal.arswitch_vlan_set_pvid = ar8xxx_set_pvid; 551 552 sc->hal.arswitch_get_dot1q_vlan = ar8xxx_get_dot1q_vlan; 553 sc->hal.arswitch_set_dot1q_vlan = ar8xxx_set_dot1q_vlan; 554 sc->hal.arswitch_flush_dot1q_vlan = ar8xxx_flush_dot1q_vlan; 555 sc->hal.arswitch_purge_dot1q_vlan = ar8xxx_purge_dot1q_vlan; 556 sc->hal.arswitch_get_port_vlan = ar8xxx_get_port_vlan; 557 sc->hal.arswitch_set_port_vlan = ar8xxx_set_port_vlan; 558 559 sc->hal.arswitch_atu_flush = ar8xxx_atu_flush; 560 sc->hal.arswitch_atu_flush_port = ar8xxx_atu_flush_port; 561 sc->hal.arswitch_atu_learn_default = ar8xxx_atu_learn_default; 562 sc->hal.arswitch_atu_fetch_table = ar8xxx_atu_fetch_table; 563 564 sc->hal.arswitch_phy_read = arswitch_readphy_internal; 565 sc->hal.arswitch_phy_write = arswitch_writephy_internal; 566 567 /* 568 * Attach switch related functions 569 */ 570 if (AR8X16_IS_SWITCH(sc, AR8216)) 571 ar8216_attach(sc); 572 else if (AR8X16_IS_SWITCH(sc, AR8226)) 573 ar8226_attach(sc); 574 else if (AR8X16_IS_SWITCH(sc, AR8316)) 575 ar8316_attach(sc); 576 else if (AR8X16_IS_SWITCH(sc, AR8327)) 577 ar8327_attach(sc); 578 else { 579 DPRINTF(sc, ARSWITCH_DBG_ANY, 580 "%s: unknown switch (%d)?\n", __func__, sc->sc_switchtype); 581 return (ENXIO); 582 } 583 584 /* Common defaults. */ 585 sc->info.es_nports = 5; /* XXX technically 6, but 6th not used */ 586 587 /* XXX Defaults for externally connected AR8316 */ 588 sc->numphys = 4; 589 sc->phy4cpu = 1; 590 sc->is_rgmii = 1; 591 sc->is_gmii = 0; 592 sc->is_mii = 0; 593 594 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 595 "numphys", &sc->numphys); 596 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 597 "phy4cpu", &sc->phy4cpu); 598 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 599 "is_rgmii", &sc->is_rgmii); 600 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 601 "is_gmii", &sc->is_gmii); 602 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), 603 "is_mii", &sc->is_mii); 604 605 if (sc->numphys > AR8X16_NUM_PHYS) 606 sc->numphys = AR8X16_NUM_PHYS; 607 608 /* Reset the switch. */ 609 if (arswitch_reset(dev)) { 610 DPRINTF(sc, ARSWITCH_DBG_ANY, 611 "%s: arswitch_reset: failed\n", __func__); 612 return (ENXIO); 613 } 614 615 err = sc->hal.arswitch_hw_setup(sc); 616 if (err != 0) { 617 DPRINTF(sc, ARSWITCH_DBG_ANY, 618 "%s: hw_setup: err=%d\n", __func__, err); 619 return (err); 620 } 621 622 err = sc->hal.arswitch_hw_global_setup(sc); 623 if (err != 0) { 624 DPRINTF(sc, ARSWITCH_DBG_ANY, 625 "%s: hw_global_setup: err=%d\n", __func__, err); 626 return (err); 627 } 628 629 /* 630 * Configure the default address table learning parameters for this 631 * switch. 632 */ 633 err = sc->hal.arswitch_atu_learn_default(sc); 634 if (err != 0) { 635 DPRINTF(sc, ARSWITCH_DBG_ANY, 636 "%s: atu_learn_default: err=%d\n", __func__, err); 637 return (err); 638 } 639 640 /* Initialize the switch ports. */ 641 for (port = 0; port <= sc->numphys; port++) { 642 sc->hal.arswitch_port_init(sc, port); 643 } 644 645 /* 646 * Attach the PHYs and complete the bus enumeration. 647 */ 648 err = arswitch_attach_phys(sc); 649 if (err != 0) { 650 DPRINTF(sc, ARSWITCH_DBG_ANY, 651 "%s: attach_phys: err=%d\n", __func__, err); 652 return (err); 653 } 654 655 /* Default to ingress filters off. */ 656 err = arswitch_set_vlan_mode(sc, 0); 657 if (err != 0) { 658 DPRINTF(sc, ARSWITCH_DBG_ANY, 659 "%s: set_vlan_mode: err=%d\n", __func__, err); 660 return (err); 661 } 662 663 bus_generic_probe(dev); 664 bus_enumerate_hinted_children(dev); 665 err = bus_generic_attach(dev); 666 if (err != 0) { 667 DPRINTF(sc, ARSWITCH_DBG_ANY, 668 "%s: bus_generic_attach: err=%d\n", __func__, err); 669 return (err); 670 } 671 672 callout_init_mtx(&sc->callout_tick, &sc->sc_mtx, 0); 673 674 ARSWITCH_LOCK(sc); 675 arswitch_tick(sc); 676 ARSWITCH_UNLOCK(sc); 677 678 return (err); 679 } 680 681 static int 682 arswitch_detach(device_t dev) 683 { 684 struct arswitch_softc *sc = device_get_softc(dev); 685 int i; 686 687 callout_drain(&sc->callout_tick); 688 689 for (i=0; i < sc->numphys; i++) { 690 if (sc->miibus[i] != NULL) 691 device_delete_child(dev, sc->miibus[i]); 692 if (sc->ifp[i] != NULL) 693 if_free(sc->ifp[i]); 694 free(sc->ifname[i], M_DEVBUF); 695 } 696 697 free(sc->atu.entries, M_DEVBUF); 698 699 bus_generic_detach(dev); 700 mtx_destroy(&sc->sc_mtx); 701 702 return (0); 703 } 704 705 /* 706 * Convert PHY number to port number. PHY0 is connected to port 1, PHY1 to 707 * port 2, etc. 708 */ 709 static inline int 710 arswitch_portforphy(int phy) 711 { 712 return (phy+1); 713 } 714 715 static inline struct mii_data * 716 arswitch_miiforport(struct arswitch_softc *sc, int port) 717 { 718 int phy = port-1; 719 720 if (phy < 0 || phy >= sc->numphys) 721 return (NULL); 722 return (device_get_softc(sc->miibus[phy])); 723 } 724 725 static inline if_t 726 arswitch_ifpforport(struct arswitch_softc *sc, int port) 727 { 728 int phy = port-1; 729 730 if (phy < 0 || phy >= sc->numphys) 731 return (NULL); 732 return (sc->ifp[phy]); 733 } 734 735 /* 736 * Convert port status to ifmedia. 737 */ 738 static void 739 arswitch_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active) 740 { 741 *media_active = IFM_ETHER; 742 *media_status = IFM_AVALID; 743 744 if ((portstatus & AR8X16_PORT_STS_LINK_UP) != 0) 745 *media_status |= IFM_ACTIVE; 746 else { 747 *media_active |= IFM_NONE; 748 return; 749 } 750 switch (portstatus & AR8X16_PORT_STS_SPEED_MASK) { 751 case AR8X16_PORT_STS_SPEED_10: 752 *media_active |= IFM_10_T; 753 break; 754 case AR8X16_PORT_STS_SPEED_100: 755 *media_active |= IFM_100_TX; 756 break; 757 case AR8X16_PORT_STS_SPEED_1000: 758 *media_active |= IFM_1000_T; 759 break; 760 } 761 if ((portstatus & AR8X16_PORT_STS_DUPLEX) == 0) 762 *media_active |= IFM_FDX; 763 else 764 *media_active |= IFM_HDX; 765 if ((portstatus & AR8X16_PORT_STS_TXFLOW) != 0) 766 *media_active |= IFM_ETH_TXPAUSE; 767 if ((portstatus & AR8X16_PORT_STS_RXFLOW) != 0) 768 *media_active |= IFM_ETH_RXPAUSE; 769 } 770 771 /* 772 * Poll the status for all PHYs. We're using the switch port status because 773 * thats a lot quicker to read than talking to all the PHYs. Care must be 774 * taken that the resulting ifmedia_active is identical to what the PHY will 775 * compute, or gratuitous link status changes will occur whenever the PHYs 776 * update function is called. 777 */ 778 static void 779 arswitch_miipollstat(struct arswitch_softc *sc) 780 { 781 int i; 782 struct mii_data *mii; 783 struct mii_softc *miisc; 784 int portstatus; 785 int port_flap = 0; 786 787 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 788 789 for (i = 0; i < sc->numphys; i++) { 790 if (sc->miibus[i] == NULL) 791 continue; 792 mii = device_get_softc(sc->miibus[i]); 793 /* XXX This would be nice to have abstracted out to be per-chip */ 794 /* AR8327/AR8337 has a different register base */ 795 if (AR8X16_IS_SWITCH(sc, AR8327)) 796 portstatus = arswitch_readreg(sc->sc_dev, 797 AR8327_REG_PORT_STATUS(arswitch_portforphy(i))); 798 else 799 portstatus = arswitch_readreg(sc->sc_dev, 800 AR8X16_REG_PORT_STS(arswitch_portforphy(i))); 801 #if 1 802 DPRINTF(sc, ARSWITCH_DBG_POLL, "p[%d]=0x%08x (%b)\n", 803 i, 804 portstatus, 805 portstatus, 806 "\20\3TXMAC\4RXMAC\5TXFLOW\6RXFLOW\7" 807 "DUPLEX\11LINK_UP\12LINK_AUTO\13LINK_PAUSE"); 808 #endif 809 /* 810 * If the current status is down, but we have a link 811 * status showing up, we need to do an ATU flush. 812 */ 813 if ((mii->mii_media_status & IFM_ACTIVE) == 0 && 814 (portstatus & AR8X16_PORT_STS_LINK_UP) != 0) { 815 device_printf(sc->sc_dev, "%s: port %d: port -> UP\n", 816 __func__, 817 i); 818 port_flap = 1; 819 } 820 /* 821 * and maybe if a port goes up->down? 822 */ 823 if ((mii->mii_media_status & IFM_ACTIVE) != 0 && 824 (portstatus & AR8X16_PORT_STS_LINK_UP) == 0) { 825 device_printf(sc->sc_dev, "%s: port %d: port -> DOWN\n", 826 __func__, 827 i); 828 port_flap = 1; 829 } 830 arswitch_update_ifmedia(portstatus, &mii->mii_media_status, 831 &mii->mii_media_active); 832 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) { 833 if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != 834 miisc->mii_inst) 835 continue; 836 mii_phy_update(miisc, MII_POLLSTAT); 837 } 838 } 839 840 /* If a port went from down->up, flush the ATU */ 841 if (port_flap) 842 sc->hal.arswitch_atu_flush(sc); 843 } 844 845 static void 846 arswitch_tick(void *arg) 847 { 848 struct arswitch_softc *sc = arg; 849 850 arswitch_miipollstat(sc); 851 callout_reset(&sc->callout_tick, hz, arswitch_tick, sc); 852 } 853 854 static void 855 arswitch_lock(device_t dev) 856 { 857 struct arswitch_softc *sc = device_get_softc(dev); 858 859 ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED); 860 ARSWITCH_LOCK(sc); 861 } 862 863 static void 864 arswitch_unlock(device_t dev) 865 { 866 struct arswitch_softc *sc = device_get_softc(dev); 867 868 ARSWITCH_LOCK_ASSERT(sc, MA_OWNED); 869 ARSWITCH_UNLOCK(sc); 870 } 871 872 static etherswitch_info_t * 873 arswitch_getinfo(device_t dev) 874 { 875 struct arswitch_softc *sc = device_get_softc(dev); 876 877 return (&sc->info); 878 } 879 880 static int 881 ar8xxx_port_vlan_get(struct arswitch_softc *sc, etherswitch_port_t *p) 882 { 883 uint32_t reg; 884 885 ARSWITCH_LOCK(sc); 886 887 /* Retrieve the PVID. */ 888 sc->hal.arswitch_vlan_get_pvid(sc, p->es_port, &p->es_pvid); 889 890 /* Port flags. */ 891 reg = arswitch_readreg(sc->sc_dev, AR8X16_REG_PORT_CTRL(p->es_port)); 892 if (reg & AR8X16_PORT_CTRL_DOUBLE_TAG) 893 p->es_flags |= ETHERSWITCH_PORT_DOUBLE_TAG; 894 reg >>= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT; 895 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD) 896 p->es_flags |= ETHERSWITCH_PORT_ADDTAG; 897 if ((reg & 0x3) == AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP) 898 p->es_flags |= ETHERSWITCH_PORT_STRIPTAG; 899 ARSWITCH_UNLOCK(sc); 900 901 return (0); 902 } 903 904 static int 905 arswitch_is_cpuport(struct arswitch_softc *sc, int port) 906 { 907 908 return ((port == AR8X16_PORT_CPU) || 909 ((AR8X16_IS_SWITCH(sc, AR8327) && 910 port == AR8327_PORT_GMAC6))); 911 } 912 913 static int 914 arswitch_getport(device_t dev, etherswitch_port_t *p) 915 { 916 struct arswitch_softc *sc; 917 struct mii_data *mii; 918 struct ifmediareq *ifmr; 919 int err; 920 921 sc = device_get_softc(dev); 922 /* XXX +1 is for AR8327; should make this configurable! */ 923 if (p->es_port < 0 || p->es_port > sc->info.es_nports) 924 return (ENXIO); 925 926 err = sc->hal.arswitch_port_vlan_get(sc, p); 927 if (err != 0) 928 return (err); 929 930 mii = arswitch_miiforport(sc, p->es_port); 931 if (arswitch_is_cpuport(sc, p->es_port)) { 932 /* fill in fixed values for CPU port */ 933 /* XXX is this valid in all cases? */ 934 p->es_flags |= ETHERSWITCH_PORT_CPU; 935 ifmr = &p->es_ifmr; 936 ifmr->ifm_count = 0; 937 ifmr->ifm_current = ifmr->ifm_active = 938 IFM_ETHER | IFM_1000_T | IFM_FDX; 939 ifmr->ifm_mask = 0; 940 ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID; 941 } else if (mii != NULL) { 942 err = ifmedia_ioctl(mii->mii_ifp, &p->es_ifr, 943 &mii->mii_media, SIOCGIFMEDIA); 944 if (err) 945 return (err); 946 } else { 947 return (ENXIO); 948 } 949 950 if (!arswitch_is_cpuport(sc, p->es_port) && 951 AR8X16_IS_SWITCH(sc, AR8327)) { 952 int led; 953 p->es_nleds = 3; 954 955 for (led = 0; led < p->es_nleds; led++) 956 { 957 int style; 958 uint32_t val; 959 960 /* Find the right style enum for our pattern */ 961 val = arswitch_readreg(dev, 962 ar8327_led_mapping[p->es_port-1][led].reg); 963 val = (val>>ar8327_led_mapping[p->es_port-1][led].shift)&0x03; 964 965 for (style = 0; style < ETHERSWITCH_PORT_LED_MAX; style++) 966 { 967 if (led_pattern_table[style] == val) break; 968 } 969 970 /* can't happen */ 971 if (style == ETHERSWITCH_PORT_LED_MAX) 972 style = ETHERSWITCH_PORT_LED_DEFAULT; 973 974 p->es_led[led] = style; 975 } 976 } else 977 { 978 p->es_nleds = 0; 979 } 980 981 return (0); 982 } 983 984 static int 985 ar8xxx_port_vlan_setup(struct arswitch_softc *sc, etherswitch_port_t *p) 986 { 987 uint32_t reg; 988 int err; 989 990 ARSWITCH_LOCK(sc); 991 992 /* Set the PVID. */ 993 if (p->es_pvid != 0) 994 sc->hal.arswitch_vlan_set_pvid(sc, p->es_port, p->es_pvid); 995 996 /* Mutually exclusive. */ 997 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG && 998 p->es_flags & ETHERSWITCH_PORT_STRIPTAG) { 999 ARSWITCH_UNLOCK(sc); 1000 return (EINVAL); 1001 } 1002 1003 reg = 0; 1004 if (p->es_flags & ETHERSWITCH_PORT_DOUBLE_TAG) 1005 reg |= AR8X16_PORT_CTRL_DOUBLE_TAG; 1006 if (p->es_flags & ETHERSWITCH_PORT_ADDTAG) 1007 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_ADD << 1008 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT; 1009 if (p->es_flags & ETHERSWITCH_PORT_STRIPTAG) 1010 reg |= AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_STRIP << 1011 AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT; 1012 1013 err = arswitch_modifyreg(sc->sc_dev, 1014 AR8X16_REG_PORT_CTRL(p->es_port), 1015 0x3 << AR8X16_PORT_CTRL_EGRESS_VLAN_MODE_SHIFT | 1016 AR8X16_PORT_CTRL_DOUBLE_TAG, reg); 1017 1018 ARSWITCH_UNLOCK(sc); 1019 return (err); 1020 } 1021 1022 static int 1023 arswitch_setport(device_t dev, etherswitch_port_t *p) 1024 { 1025 int err, i; 1026 struct arswitch_softc *sc; 1027 struct ifmedia *ifm; 1028 struct mii_data *mii; 1029 if_t ifp; 1030 1031 sc = device_get_softc(dev); 1032 if (p->es_port < 0 || p->es_port > sc->info.es_nports) 1033 return (ENXIO); 1034 1035 /* Port flags. */ 1036 if (sc->vlan_mode == ETHERSWITCH_VLAN_DOT1Q) { 1037 err = sc->hal.arswitch_port_vlan_setup(sc, p); 1038 if (err) 1039 return (err); 1040 } 1041 1042 /* Do not allow media or led changes on CPU port. */ 1043 if (arswitch_is_cpuport(sc, p->es_port)) 1044 return (0); 1045 1046 if (AR8X16_IS_SWITCH(sc, AR8327)) 1047 { 1048 for (i = 0; i < 3; i++) 1049 { 1050 int err; 1051 err = arswitch_setled(sc, p->es_port-1, i, p->es_led[i]); 1052 if (err) 1053 return (err); 1054 } 1055 } 1056 1057 mii = arswitch_miiforport(sc, p->es_port); 1058 if (mii == NULL) 1059 return (ENXIO); 1060 1061 ifp = arswitch_ifpforport(sc, p->es_port); 1062 1063 ifm = &mii->mii_media; 1064 return (ifmedia_ioctl(ifp, &p->es_ifr, ifm, SIOCSIFMEDIA)); 1065 } 1066 1067 static int 1068 arswitch_setled(struct arswitch_softc *sc, int phy, int led, int style) 1069 { 1070 int shift; 1071 int err; 1072 1073 if (phy < 0 || phy > sc->numphys) 1074 return EINVAL; 1075 1076 if (style < 0 || style > ETHERSWITCH_PORT_LED_MAX) 1077 return (EINVAL); 1078 1079 ARSWITCH_LOCK(sc); 1080 1081 shift = ar8327_led_mapping[phy][led].shift; 1082 err = (arswitch_modifyreg(sc->sc_dev, 1083 ar8327_led_mapping[phy][led].reg, 1084 0x03 << shift, led_pattern_table[style] << shift)); 1085 ARSWITCH_UNLOCK(sc); 1086 1087 return (err); 1088 } 1089 1090 static void 1091 arswitch_statchg(device_t dev) 1092 { 1093 struct arswitch_softc *sc = device_get_softc(dev); 1094 1095 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__); 1096 } 1097 1098 static int 1099 arswitch_ifmedia_upd(if_t ifp) 1100 { 1101 struct arswitch_softc *sc = if_getsoftc(ifp); 1102 struct mii_data *mii = arswitch_miiforport(sc, if_getdunit(ifp)); 1103 1104 if (mii == NULL) 1105 return (ENXIO); 1106 mii_mediachg(mii); 1107 return (0); 1108 } 1109 1110 static void 1111 arswitch_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) 1112 { 1113 struct arswitch_softc *sc = if_getsoftc(ifp); 1114 struct mii_data *mii = arswitch_miiforport(sc, if_getdunit(ifp)); 1115 1116 DPRINTF(sc, ARSWITCH_DBG_POLL, "%s\n", __func__); 1117 1118 if (mii == NULL) 1119 return; 1120 mii_pollstat(mii); 1121 ifmr->ifm_active = mii->mii_media_active; 1122 ifmr->ifm_status = mii->mii_media_status; 1123 } 1124 1125 static int 1126 arswitch_getconf(device_t dev, etherswitch_conf_t *conf) 1127 { 1128 struct arswitch_softc *sc; 1129 int ret; 1130 1131 sc = device_get_softc(dev); 1132 1133 /* Return the VLAN mode. */ 1134 conf->cmd = ETHERSWITCH_CONF_VLAN_MODE; 1135 conf->vlan_mode = sc->vlan_mode; 1136 1137 /* Return the switch ethernet address. */ 1138 ret = sc->hal.arswitch_hw_get_switch_macaddr(sc, 1139 &conf->switch_macaddr); 1140 if (ret == 0) { 1141 conf->cmd |= ETHERSWITCH_CONF_SWITCH_MACADDR; 1142 } 1143 1144 return (0); 1145 } 1146 1147 static int 1148 arswitch_setconf(device_t dev, etherswitch_conf_t *conf) 1149 { 1150 struct arswitch_softc *sc; 1151 int err; 1152 1153 sc = device_get_softc(dev); 1154 1155 /* Set the VLAN mode. */ 1156 if (conf->cmd & ETHERSWITCH_CONF_VLAN_MODE) { 1157 err = arswitch_set_vlan_mode(sc, conf->vlan_mode); 1158 if (err != 0) 1159 return (err); 1160 } 1161 1162 /* TODO: Set the switch ethernet address. */ 1163 1164 return (0); 1165 } 1166 1167 static int 1168 arswitch_atu_flush_all(device_t dev) 1169 { 1170 struct arswitch_softc *sc; 1171 int err; 1172 1173 sc = device_get_softc(dev); 1174 ARSWITCH_LOCK(sc); 1175 err = sc->hal.arswitch_atu_flush(sc); 1176 /* Invalidate cached ATU */ 1177 sc->atu.count = 0; 1178 ARSWITCH_UNLOCK(sc); 1179 return (err); 1180 } 1181 1182 static int 1183 arswitch_atu_flush_port(device_t dev, int port) 1184 { 1185 struct arswitch_softc *sc; 1186 int err; 1187 1188 sc = device_get_softc(dev); 1189 ARSWITCH_LOCK(sc); 1190 err = sc->hal.arswitch_atu_flush_port(sc, port); 1191 /* Invalidate cached ATU */ 1192 sc->atu.count = 0; 1193 ARSWITCH_UNLOCK(sc); 1194 return (err); 1195 } 1196 1197 static int 1198 arswitch_atu_fetch_table(device_t dev, etherswitch_atu_table_t *table) 1199 { 1200 struct arswitch_softc *sc; 1201 int err, nitems; 1202 1203 sc = device_get_softc(dev); 1204 1205 ARSWITCH_LOCK(sc); 1206 /* Initial setup */ 1207 nitems = 0; 1208 err = sc->hal.arswitch_atu_fetch_table(sc, NULL, 0); 1209 1210 /* fetch - ideally yes we'd fetch into a separate table then switch */ 1211 while (err == 0 && nitems < sc->atu.size) { 1212 err = sc->hal.arswitch_atu_fetch_table(sc, 1213 &sc->atu.entries[nitems], 1); 1214 if (err == 0) { 1215 sc->atu.entries[nitems].id = nitems; 1216 nitems++; 1217 } 1218 } 1219 sc->atu.count = nitems; 1220 ARSWITCH_UNLOCK(sc); 1221 1222 table->es_nitems = nitems; 1223 1224 return (0); 1225 } 1226 1227 static int 1228 arswitch_atu_fetch_table_entry(device_t dev, etherswitch_atu_entry_t *e) 1229 { 1230 struct arswitch_softc *sc; 1231 int id; 1232 1233 sc = device_get_softc(dev); 1234 id = e->id; 1235 1236 ARSWITCH_LOCK(sc); 1237 if (id > sc->atu.count) { 1238 ARSWITCH_UNLOCK(sc); 1239 return (ENOENT); 1240 } 1241 1242 memcpy(e, &sc->atu.entries[id], sizeof(*e)); 1243 ARSWITCH_UNLOCK(sc); 1244 return (0); 1245 } 1246 1247 static int 1248 arswitch_getvgroup(device_t dev, etherswitch_vlangroup_t *e) 1249 { 1250 struct arswitch_softc *sc = device_get_softc(dev); 1251 1252 return (sc->hal.arswitch_vlan_getvgroup(sc, e)); 1253 } 1254 1255 static int 1256 arswitch_setvgroup(device_t dev, etherswitch_vlangroup_t *e) 1257 { 1258 struct arswitch_softc *sc = device_get_softc(dev); 1259 1260 return (sc->hal.arswitch_vlan_setvgroup(sc, e)); 1261 } 1262 1263 static int 1264 arswitch_readphy(device_t dev, int phy, int reg) 1265 { 1266 struct arswitch_softc *sc = device_get_softc(dev); 1267 1268 return (sc->hal.arswitch_phy_read(dev, phy, reg)); 1269 } 1270 1271 static int 1272 arswitch_writephy(device_t dev, int phy, int reg, int val) 1273 { 1274 struct arswitch_softc *sc = device_get_softc(dev); 1275 1276 return (sc->hal.arswitch_phy_write(dev, phy, reg, val)); 1277 } 1278 1279 static device_method_t arswitch_methods[] = { 1280 /* Device interface */ 1281 DEVMETHOD(device_probe, arswitch_probe), 1282 DEVMETHOD(device_attach, arswitch_attach), 1283 DEVMETHOD(device_detach, arswitch_detach), 1284 1285 /* bus interface */ 1286 DEVMETHOD(bus_add_child, device_add_child_ordered), 1287 1288 /* MII interface */ 1289 DEVMETHOD(miibus_readreg, arswitch_readphy), 1290 DEVMETHOD(miibus_writereg, arswitch_writephy), 1291 DEVMETHOD(miibus_statchg, arswitch_statchg), 1292 1293 /* MDIO interface */ 1294 DEVMETHOD(mdio_readreg, arswitch_readphy), 1295 DEVMETHOD(mdio_writereg, arswitch_writephy), 1296 1297 /* etherswitch interface */ 1298 DEVMETHOD(etherswitch_lock, arswitch_lock), 1299 DEVMETHOD(etherswitch_unlock, arswitch_unlock), 1300 DEVMETHOD(etherswitch_getinfo, arswitch_getinfo), 1301 DEVMETHOD(etherswitch_readreg, arswitch_readreg), 1302 DEVMETHOD(etherswitch_writereg, arswitch_writereg), 1303 DEVMETHOD(etherswitch_readphyreg, arswitch_readphy), 1304 DEVMETHOD(etherswitch_writephyreg, arswitch_writephy), 1305 DEVMETHOD(etherswitch_getport, arswitch_getport), 1306 DEVMETHOD(etherswitch_setport, arswitch_setport), 1307 DEVMETHOD(etherswitch_getvgroup, arswitch_getvgroup), 1308 DEVMETHOD(etherswitch_setvgroup, arswitch_setvgroup), 1309 DEVMETHOD(etherswitch_getconf, arswitch_getconf), 1310 DEVMETHOD(etherswitch_setconf, arswitch_setconf), 1311 DEVMETHOD(etherswitch_flush_all, arswitch_atu_flush_all), 1312 DEVMETHOD(etherswitch_flush_port, arswitch_atu_flush_port), 1313 DEVMETHOD(etherswitch_fetch_table, arswitch_atu_fetch_table), 1314 DEVMETHOD(etherswitch_fetch_table_entry, arswitch_atu_fetch_table_entry), 1315 1316 DEVMETHOD_END 1317 }; 1318 1319 DEFINE_CLASS_0(arswitch, arswitch_driver, arswitch_methods, 1320 sizeof(struct arswitch_softc)); 1321 1322 DRIVER_MODULE(arswitch, mdio, arswitch_driver, 0, 0); 1323 DRIVER_MODULE(miibus, arswitch, miibus_driver, 0, 0); 1324 DRIVER_MODULE(mdio, arswitch, mdio_driver, 0, 0); 1325 DRIVER_MODULE(etherswitch, arswitch, etherswitch_driver, 0, 0); 1326 MODULE_VERSION(arswitch, 1); 1327 MODULE_DEPEND(arswitch, miibus, 1, 1, 1); /* XXX which versions? */ 1328 MODULE_DEPEND(arswitch, etherswitch, 1, 1, 1); /* XXX which versions? */ 1329