1*3a9fd824SRoger Pau Monné /* 2*3a9fd824SRoger Pau Monné * Permission is hereby granted, free of charge, to any person obtaining a copy 3*3a9fd824SRoger Pau Monné * of this software and associated documentation files (the "Software"), to 4*3a9fd824SRoger Pau Monné * deal in the Software without restriction, including without limitation the 5*3a9fd824SRoger Pau Monné * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 6*3a9fd824SRoger Pau Monné * sell copies of the Software, and to permit persons to whom the Software is 7*3a9fd824SRoger Pau Monné * furnished to do so, subject to the following conditions: 8*3a9fd824SRoger Pau Monné * 9*3a9fd824SRoger Pau Monné * The above copyright notice and this permission notice shall be included in 10*3a9fd824SRoger Pau Monné * all copies or substantial portions of the Software. 11*3a9fd824SRoger Pau Monné * 12*3a9fd824SRoger Pau Monné * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 13*3a9fd824SRoger Pau Monné * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 14*3a9fd824SRoger Pau Monné * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 15*3a9fd824SRoger Pau Monné * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 16*3a9fd824SRoger Pau Monné * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 17*3a9fd824SRoger Pau Monné * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 18*3a9fd824SRoger Pau Monné * DEALINGS IN THE SOFTWARE. 19*3a9fd824SRoger Pau Monné * 20*3a9fd824SRoger Pau Monné * Copyright (c) 2015 Oracle and/or its affiliates. All rights reserved. 21*3a9fd824SRoger Pau Monné */ 22*3a9fd824SRoger Pau Monné 23*3a9fd824SRoger Pau Monné #ifndef __XEN_PUBLIC_PMU_H__ 24*3a9fd824SRoger Pau Monné #define __XEN_PUBLIC_PMU_H__ 25*3a9fd824SRoger Pau Monné 26*3a9fd824SRoger Pau Monné #include "xen.h" 27*3a9fd824SRoger Pau Monné #if defined(__i386__) || defined(__x86_64__) 28*3a9fd824SRoger Pau Monné #include "arch-x86/pmu.h" 29*3a9fd824SRoger Pau Monné #elif defined (__arm__) || defined (__aarch64__) 30*3a9fd824SRoger Pau Monné #include "arch-arm.h" 31*3a9fd824SRoger Pau Monné #else 32*3a9fd824SRoger Pau Monné #error "Unsupported architecture" 33*3a9fd824SRoger Pau Monné #endif 34*3a9fd824SRoger Pau Monné 35*3a9fd824SRoger Pau Monné #define XENPMU_VER_MAJ 0 36*3a9fd824SRoger Pau Monné #define XENPMU_VER_MIN 1 37*3a9fd824SRoger Pau Monné 38*3a9fd824SRoger Pau Monné /* 39*3a9fd824SRoger Pau Monné * ` enum neg_errnoval 40*3a9fd824SRoger Pau Monné * ` HYPERVISOR_xenpmu_op(enum xenpmu_op cmd, struct xenpmu_params *args); 41*3a9fd824SRoger Pau Monné * 42*3a9fd824SRoger Pau Monné * @cmd == XENPMU_* (PMU operation) 43*3a9fd824SRoger Pau Monné * @args == struct xenpmu_params 44*3a9fd824SRoger Pau Monné */ 45*3a9fd824SRoger Pau Monné /* ` enum xenpmu_op { */ 46*3a9fd824SRoger Pau Monné #define XENPMU_mode_get 0 /* Also used for getting PMU version */ 47*3a9fd824SRoger Pau Monné #define XENPMU_mode_set 1 48*3a9fd824SRoger Pau Monné #define XENPMU_feature_get 2 49*3a9fd824SRoger Pau Monné #define XENPMU_feature_set 3 50*3a9fd824SRoger Pau Monné #define XENPMU_init 4 51*3a9fd824SRoger Pau Monné #define XENPMU_finish 5 52*3a9fd824SRoger Pau Monné #define XENPMU_lvtpc_set 6 53*3a9fd824SRoger Pau Monné #define XENPMU_flush 7 /* Write cached MSR values to HW */ 54*3a9fd824SRoger Pau Monné /* ` } */ 55*3a9fd824SRoger Pau Monné 56*3a9fd824SRoger Pau Monné /* Parameters structure for HYPERVISOR_xenpmu_op call */ 57*3a9fd824SRoger Pau Monné struct xen_pmu_params { 58*3a9fd824SRoger Pau Monné /* IN/OUT parameters */ 59*3a9fd824SRoger Pau Monné struct { 60*3a9fd824SRoger Pau Monné uint32_t maj; 61*3a9fd824SRoger Pau Monné uint32_t min; 62*3a9fd824SRoger Pau Monné } version; 63*3a9fd824SRoger Pau Monné uint64_t val; 64*3a9fd824SRoger Pau Monné 65*3a9fd824SRoger Pau Monné /* IN parameters */ 66*3a9fd824SRoger Pau Monné uint32_t vcpu; 67*3a9fd824SRoger Pau Monné uint32_t pad; 68*3a9fd824SRoger Pau Monné }; 69*3a9fd824SRoger Pau Monné typedef struct xen_pmu_params xen_pmu_params_t; 70*3a9fd824SRoger Pau Monné DEFINE_XEN_GUEST_HANDLE(xen_pmu_params_t); 71*3a9fd824SRoger Pau Monné 72*3a9fd824SRoger Pau Monné /* PMU modes: 73*3a9fd824SRoger Pau Monné * - XENPMU_MODE_OFF: No PMU virtualization 74*3a9fd824SRoger Pau Monné * - XENPMU_MODE_SELF: Guests can profile themselves 75*3a9fd824SRoger Pau Monné * - XENPMU_MODE_HV: Guests can profile themselves, dom0 profiles 76*3a9fd824SRoger Pau Monné * itself and Xen 77*3a9fd824SRoger Pau Monné * - XENPMU_MODE_ALL: Only dom0 has access to VPMU and it profiles 78*3a9fd824SRoger Pau Monné * everyone: itself, the hypervisor and the guests. 79*3a9fd824SRoger Pau Monné */ 80*3a9fd824SRoger Pau Monné #define XENPMU_MODE_OFF 0 81*3a9fd824SRoger Pau Monné #define XENPMU_MODE_SELF (1<<0) 82*3a9fd824SRoger Pau Monné #define XENPMU_MODE_HV (1<<1) 83*3a9fd824SRoger Pau Monné #define XENPMU_MODE_ALL (1<<2) 84*3a9fd824SRoger Pau Monné 85*3a9fd824SRoger Pau Monné /* 86*3a9fd824SRoger Pau Monné * PMU features: 87*3a9fd824SRoger Pau Monné * - XENPMU_FEATURE_INTEL_BTS: Intel BTS support (ignored on AMD) 88*3a9fd824SRoger Pau Monné * - XENPMU_FEATURE_IPC_ONLY: Restrict PMCs to the most minimum set possible. 89*3a9fd824SRoger Pau Monné * Instructions, cycles, and ref cycles. Can be 90*3a9fd824SRoger Pau Monné * used to calculate instructions-per-cycle (IPC) 91*3a9fd824SRoger Pau Monné * (ignored on AMD). 92*3a9fd824SRoger Pau Monné * - XENPMU_FEATURE_ARCH_ONLY: Restrict PMCs to the Intel Pre-Defined 93*3a9fd824SRoger Pau Monné * Architectural Performance Events exposed by 94*3a9fd824SRoger Pau Monné * cpuid and listed in the Intel developer's manual 95*3a9fd824SRoger Pau Monné * (ignored on AMD). 96*3a9fd824SRoger Pau Monné */ 97*3a9fd824SRoger Pau Monné #define XENPMU_FEATURE_INTEL_BTS (1<<0) 98*3a9fd824SRoger Pau Monné #define XENPMU_FEATURE_IPC_ONLY (1<<1) 99*3a9fd824SRoger Pau Monné #define XENPMU_FEATURE_ARCH_ONLY (1<<2) 100*3a9fd824SRoger Pau Monné 101*3a9fd824SRoger Pau Monné /* 102*3a9fd824SRoger Pau Monné * Shared PMU data between hypervisor and PV(H) domains. 103*3a9fd824SRoger Pau Monné * 104*3a9fd824SRoger Pau Monné * The hypervisor fills out this structure during PMU interrupt and sends an 105*3a9fd824SRoger Pau Monné * interrupt to appropriate VCPU. 106*3a9fd824SRoger Pau Monné * Architecture-independent fields of xen_pmu_data are WO for the hypervisor 107*3a9fd824SRoger Pau Monné * and RO for the guest but some fields in xen_pmu_arch can be writable 108*3a9fd824SRoger Pau Monné * by both the hypervisor and the guest (see arch-$arch/pmu.h). 109*3a9fd824SRoger Pau Monné */ 110*3a9fd824SRoger Pau Monné struct xen_pmu_data { 111*3a9fd824SRoger Pau Monné /* Interrupted VCPU */ 112*3a9fd824SRoger Pau Monné uint32_t vcpu_id; 113*3a9fd824SRoger Pau Monné 114*3a9fd824SRoger Pau Monné /* 115*3a9fd824SRoger Pau Monné * Physical processor on which the interrupt occurred. On non-privileged 116*3a9fd824SRoger Pau Monné * guests set to vcpu_id; 117*3a9fd824SRoger Pau Monné */ 118*3a9fd824SRoger Pau Monné uint32_t pcpu_id; 119*3a9fd824SRoger Pau Monné 120*3a9fd824SRoger Pau Monné /* 121*3a9fd824SRoger Pau Monné * Domain that was interrupted. On non-privileged guests set to DOMID_SELF. 122*3a9fd824SRoger Pau Monné * On privileged guests can be DOMID_SELF, DOMID_XEN, or, when in 123*3a9fd824SRoger Pau Monné * XENPMU_MODE_ALL mode, domain ID of another domain. 124*3a9fd824SRoger Pau Monné */ 125*3a9fd824SRoger Pau Monné domid_t domain_id; 126*3a9fd824SRoger Pau Monné 127*3a9fd824SRoger Pau Monné uint8_t pad[6]; 128*3a9fd824SRoger Pau Monné 129*3a9fd824SRoger Pau Monné /* Architecture-specific information */ 130*3a9fd824SRoger Pau Monné xen_pmu_arch_t pmu; 131*3a9fd824SRoger Pau Monné }; 132*3a9fd824SRoger Pau Monné 133*3a9fd824SRoger Pau Monné #endif /* __XEN_PUBLIC_PMU_H__ */ 134*3a9fd824SRoger Pau Monné 135*3a9fd824SRoger Pau Monné /* 136*3a9fd824SRoger Pau Monné * Local variables: 137*3a9fd824SRoger Pau Monné * mode: C 138*3a9fd824SRoger Pau Monné * c-file-style: "BSD" 139*3a9fd824SRoger Pau Monné * c-basic-offset: 4 140*3a9fd824SRoger Pau Monné * tab-width: 4 141*3a9fd824SRoger Pau Monné * indent-tabs-mode: nil 142*3a9fd824SRoger Pau Monné * End: 143*3a9fd824SRoger Pau Monné */ 144