1d5b0e70fSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2d5b0e70fSEmmanuel Vadot/* Copyright (c) 2020-2021 Microchip Technology Inc */ 3d5b0e70fSEmmanuel Vadot 4d5b0e70fSEmmanuel Vadot/ { 57ef62cebSEmmanuel Vadot compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit", 67ef62cebSEmmanuel Vadot "microchip,mpfs"; 7d5b0e70fSEmmanuel Vadot 87ef62cebSEmmanuel Vadot core_pwm0: pwm@40000000 { 9d5b0e70fSEmmanuel Vadot compatible = "microchip,corepwm-rtl-v4"; 107ef62cebSEmmanuel Vadot reg = <0x0 0x40000000 0x0 0xF0>; 11d5b0e70fSEmmanuel Vadot microchip,sync-update-mask = /bits/ 32 <0>; 12*8bab661aSEmmanuel Vadot #pwm-cells = <3>; 13*8bab661aSEmmanuel Vadot clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>; 14d5b0e70fSEmmanuel Vadot status = "disabled"; 15d5b0e70fSEmmanuel Vadot }; 16d5b0e70fSEmmanuel Vadot 177ef62cebSEmmanuel Vadot i2c2: i2c@40000200 { 18d5b0e70fSEmmanuel Vadot compatible = "microchip,corei2c-rtl-v7"; 197ef62cebSEmmanuel Vadot reg = <0x0 0x40000200 0x0 0x100>; 20d5b0e70fSEmmanuel Vadot #address-cells = <1>; 21d5b0e70fSEmmanuel Vadot #size-cells = <0>; 22*8bab661aSEmmanuel Vadot clocks = <&ccc_nw CLK_CCC_PLL0_OUT3>; 23d5b0e70fSEmmanuel Vadot interrupt-parent = <&plic>; 24d5b0e70fSEmmanuel Vadot interrupts = <122>; 25d5b0e70fSEmmanuel Vadot clock-frequency = <100000>; 26d5b0e70fSEmmanuel Vadot status = "disabled"; 27d5b0e70fSEmmanuel Vadot }; 28d5b0e70fSEmmanuel Vadot 297ef62cebSEmmanuel Vadot pcie: pcie@3000000000 { 307ef62cebSEmmanuel Vadot compatible = "microchip,pcie-host-1.0"; 317ef62cebSEmmanuel Vadot #address-cells = <0x3>; 327ef62cebSEmmanuel Vadot #interrupt-cells = <0x1>; 337ef62cebSEmmanuel Vadot #size-cells = <0x2>; 347ef62cebSEmmanuel Vadot device_type = "pci"; 357ef62cebSEmmanuel Vadot reg = <0x30 0x0 0x0 0x8000000>, <0x0 0x43000000 0x0 0x10000>; 367ef62cebSEmmanuel Vadot reg-names = "cfg", "apb"; 377ef62cebSEmmanuel Vadot bus-range = <0x0 0x7f>; 387ef62cebSEmmanuel Vadot interrupt-parent = <&plic>; 397ef62cebSEmmanuel Vadot interrupts = <119>; 407ef62cebSEmmanuel Vadot interrupt-map = <0 0 0 1 &pcie_intc 0>, 417ef62cebSEmmanuel Vadot <0 0 0 2 &pcie_intc 1>, 427ef62cebSEmmanuel Vadot <0 0 0 3 &pcie_intc 2>, 437ef62cebSEmmanuel Vadot <0 0 0 4 &pcie_intc 3>; 447ef62cebSEmmanuel Vadot interrupt-map-mask = <0 0 0 7>; 45*8bab661aSEmmanuel Vadot clocks = <&ccc_nw CLK_CCC_PLL0_OUT1>, <&ccc_nw CLK_CCC_PLL0_OUT3>; 467ef62cebSEmmanuel Vadot clock-names = "fic1", "fic3"; 477ef62cebSEmmanuel Vadot ranges = <0x3000000 0x0 0x8000000 0x30 0x8000000 0x0 0x80000000>; 487ef62cebSEmmanuel Vadot dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x1 0x00000000>; 497ef62cebSEmmanuel Vadot msi-parent = <&pcie>; 507ef62cebSEmmanuel Vadot msi-controller; 517ef62cebSEmmanuel Vadot status = "disabled"; 527ef62cebSEmmanuel Vadot pcie_intc: interrupt-controller { 537ef62cebSEmmanuel Vadot #address-cells = <0>; 547ef62cebSEmmanuel Vadot #interrupt-cells = <1>; 557ef62cebSEmmanuel Vadot interrupt-controller; 567ef62cebSEmmanuel Vadot }; 577ef62cebSEmmanuel Vadot }; 58*8bab661aSEmmanuel Vadot 59*8bab661aSEmmanuel Vadot refclk_ccc: cccrefclk { 60*8bab661aSEmmanuel Vadot compatible = "fixed-clock"; 61*8bab661aSEmmanuel Vadot #clock-cells = <0>; 62*8bab661aSEmmanuel Vadot }; 63*8bab661aSEmmanuel Vadot}; 64*8bab661aSEmmanuel Vadot 65*8bab661aSEmmanuel Vadot&ccc_nw { 66*8bab661aSEmmanuel Vadot clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, 67*8bab661aSEmmanuel Vadot <&refclk_ccc>, <&refclk_ccc>; 68*8bab661aSEmmanuel Vadot clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1", 69*8bab661aSEmmanuel Vadot "dll0_ref", "dll1_ref"; 70*8bab661aSEmmanuel Vadot status = "okay"; 71d5b0e70fSEmmanuel Vadot}; 72