1*0e8011faSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*0e8011faSEmmanuel Vadot 3*0e8011faSEmmanuel Vadot/ { 4*0e8011faSEmmanuel Vadot fabric_clk3: fabric-clk3 { 5*0e8011faSEmmanuel Vadot compatible = "fixed-clock"; 6*0e8011faSEmmanuel Vadot #clock-cells = <0>; 7*0e8011faSEmmanuel Vadot clock-frequency = <50000000>; 8*0e8011faSEmmanuel Vadot }; 9*0e8011faSEmmanuel Vadot 10*0e8011faSEmmanuel Vadot fabric_clk1: fabric-clk1 { 11*0e8011faSEmmanuel Vadot compatible = "fixed-clock"; 12*0e8011faSEmmanuel Vadot #clock-cells = <0>; 13*0e8011faSEmmanuel Vadot clock-frequency = <125000000>; 14*0e8011faSEmmanuel Vadot }; 15*0e8011faSEmmanuel Vadot 16*0e8011faSEmmanuel Vadot fabric-bus@40000000 { 17*0e8011faSEmmanuel Vadot compatible = "simple-bus"; 18*0e8011faSEmmanuel Vadot #address-cells = <2>; 19*0e8011faSEmmanuel Vadot #size-cells = <2>; 20*0e8011faSEmmanuel Vadot ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, /* FIC3-FAB */ 21*0e8011faSEmmanuel Vadot <0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */ 22*0e8011faSEmmanuel Vadot <0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */ 23*0e8011faSEmmanuel Vadot <0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */ 24*0e8011faSEmmanuel Vadot <0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */ 25*0e8011faSEmmanuel Vadot 26*0e8011faSEmmanuel Vadot cape_gpios_p8: gpio@41100000 { 27*0e8011faSEmmanuel Vadot compatible = "microchip,coregpio-rtl-v3"; 28*0e8011faSEmmanuel Vadot reg = <0x0 0x41100000 0x0 0x1000>; 29*0e8011faSEmmanuel Vadot clocks = <&fabric_clk3>; 30*0e8011faSEmmanuel Vadot gpio-controller; 31*0e8011faSEmmanuel Vadot #gpio-cells = <2>; 32*0e8011faSEmmanuel Vadot ngpios = <16>; 33*0e8011faSEmmanuel Vadot gpio-line-names = "P8_PIN31", "P8_PIN32", "P8_PIN33", "P8_PIN34", 34*0e8011faSEmmanuel Vadot "P8_PIN35", "P8_PIN36", "P8_PIN37", "P8_PIN38", 35*0e8011faSEmmanuel Vadot "P8_PIN39", "P8_PIN40", "P8_PIN41", "P8_PIN42", 36*0e8011faSEmmanuel Vadot "P8_PIN43", "P8_PIN44", "P8_PIN45", "P8_PIN46"; 37*0e8011faSEmmanuel Vadot }; 38*0e8011faSEmmanuel Vadot 39*0e8011faSEmmanuel Vadot cape_gpios_p9: gpio@41200000 { 40*0e8011faSEmmanuel Vadot compatible = "microchip,coregpio-rtl-v3"; 41*0e8011faSEmmanuel Vadot reg = <0x0 0x41200000 0x0 0x1000>; 42*0e8011faSEmmanuel Vadot clocks = <&fabric_clk3>; 43*0e8011faSEmmanuel Vadot gpio-controller; 44*0e8011faSEmmanuel Vadot #gpio-cells = <2>; 45*0e8011faSEmmanuel Vadot ngpios = <20>; 46*0e8011faSEmmanuel Vadot gpio-line-names = "P9_PIN11", "P9_PIN12", "P9_PIN13", "P9_PIN14", 47*0e8011faSEmmanuel Vadot "P9_PIN15", "P9_PIN16", "P9_PIN17", "P9_PIN18", 48*0e8011faSEmmanuel Vadot "P9_PIN21", "P9_PIN22", "P9_PIN23", "P9_PIN24", 49*0e8011faSEmmanuel Vadot "P9_PIN25", "P9_PIN26", "P9_PIN27", "P9_PIN28", 50*0e8011faSEmmanuel Vadot "P9_PIN29", "P9_PIN31", "P9_PIN41", "P9_PIN42"; 51*0e8011faSEmmanuel Vadot }; 52*0e8011faSEmmanuel Vadot 53*0e8011faSEmmanuel Vadot hsi_gpios: gpio@44000000 { 54*0e8011faSEmmanuel Vadot compatible = "microchip,coregpio-rtl-v3"; 55*0e8011faSEmmanuel Vadot reg = <0x0 0x44000000 0x0 0x1000>; 56*0e8011faSEmmanuel Vadot clocks = <&fabric_clk3>; 57*0e8011faSEmmanuel Vadot gpio-controller; 58*0e8011faSEmmanuel Vadot #gpio-cells = <2>; 59*0e8011faSEmmanuel Vadot ngpios = <20>; 60*0e8011faSEmmanuel Vadot gpio-line-names = "B0_HSIO70N", "B0_HSIO71N", "B0_HSIO83N", 61*0e8011faSEmmanuel Vadot "B0_HSIO73N_C2P_CLKN", "B0_HSIO70P", "B0_HSIO71P", 62*0e8011faSEmmanuel Vadot "B0_HSIO83P", "B0_HSIO73N_C2P_CLKP", "XCVR1_RX_VALID", 63*0e8011faSEmmanuel Vadot "XCVR1_LOCK", "XCVR1_ERROR", "XCVR2_RX_VALID", 64*0e8011faSEmmanuel Vadot "XCVR2_LOCK", "XCVR2_ERROR", "XCVR3_RX_VALID", 65*0e8011faSEmmanuel Vadot "XCVR3_LOCK", "XCVR3_ERROR", "XCVR_0B_REF_CLK_PLL_LOCK", 66*0e8011faSEmmanuel Vadot "XCVR_0C_REF_CLK_PLL_LOCK", "B0_HSIO81N"; 67*0e8011faSEmmanuel Vadot }; 68*0e8011faSEmmanuel Vadot }; 69*0e8011faSEmmanuel Vadot 70*0e8011faSEmmanuel Vadot refclk_ccc: cccrefclk { 71*0e8011faSEmmanuel Vadot compatible = "fixed-clock"; 72*0e8011faSEmmanuel Vadot #clock-cells = <0>; 73*0e8011faSEmmanuel Vadot }; 74*0e8011faSEmmanuel Vadot}; 75*0e8011faSEmmanuel Vadot 76*0e8011faSEmmanuel Vadot&ccc_nw { 77*0e8011faSEmmanuel Vadot clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, 78*0e8011faSEmmanuel Vadot <&refclk_ccc>, <&refclk_ccc>; 79*0e8011faSEmmanuel Vadot clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1", 80*0e8011faSEmmanuel Vadot "dll0_ref", "dll1_ref"; 81*0e8011faSEmmanuel Vadot status = "okay"; 82*0e8011faSEmmanuel Vadot}; 83