xref: /freebsd-src/sys/contrib/device-tree/src/arm64/renesas/rzg2lc-smarc-pinfunction.dtsi (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1c9ccf3a3SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2c9ccf3a3SEmmanuel Vadot/*
3c9ccf3a3SEmmanuel Vadot * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
4c9ccf3a3SEmmanuel Vadot *
5c9ccf3a3SEmmanuel Vadot * Copyright (C) 2021 Renesas Electronics Corp.
6c9ccf3a3SEmmanuel Vadot */
7c9ccf3a3SEmmanuel Vadot
8c9ccf3a3SEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
9c9ccf3a3SEmmanuel Vadot#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10c9ccf3a3SEmmanuel Vadot
11c9ccf3a3SEmmanuel Vadot&pinctrl {
12c9ccf3a3SEmmanuel Vadot	pinctrl-0 = <&sound_clk_pins>;
13c9ccf3a3SEmmanuel Vadot	pinctrl-names = "default";
14c9ccf3a3SEmmanuel Vadot
15c9ccf3a3SEmmanuel Vadot#if SW_SCIF_CAN
16c9ccf3a3SEmmanuel Vadot	/* SW8 should be at position 2->1 */
17c9ccf3a3SEmmanuel Vadot	can1_pins: can1 {
18c9ccf3a3SEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
19c9ccf3a3SEmmanuel Vadot			 <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
20c9ccf3a3SEmmanuel Vadot	};
21c9ccf3a3SEmmanuel Vadot#endif
22c9ccf3a3SEmmanuel Vadot
23c9ccf3a3SEmmanuel Vadot#if SW_RSPI_CAN
24c9ccf3a3SEmmanuel Vadot	/* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
25c9ccf3a3SEmmanuel Vadot	can1-stb-hog {
26c9ccf3a3SEmmanuel Vadot		gpio-hog;
27c9ccf3a3SEmmanuel Vadot		gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
28c9ccf3a3SEmmanuel Vadot		output-low;
29c9ccf3a3SEmmanuel Vadot		line-name = "can1_stb";
30c9ccf3a3SEmmanuel Vadot	};
31c9ccf3a3SEmmanuel Vadot
32c9ccf3a3SEmmanuel Vadot	can1_pins: can1 {
33c9ccf3a3SEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
34c9ccf3a3SEmmanuel Vadot			 <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
35c9ccf3a3SEmmanuel Vadot	};
36c9ccf3a3SEmmanuel Vadot#endif
37c9ccf3a3SEmmanuel Vadot
38d5b0e70fSEmmanuel Vadot	i2c0_pins: i2c0 {
39d5b0e70fSEmmanuel Vadot		pins = "RIIC0_SDA", "RIIC0_SCL";
40d5b0e70fSEmmanuel Vadot		input-enable;
41d5b0e70fSEmmanuel Vadot	};
42d5b0e70fSEmmanuel Vadot
43d5b0e70fSEmmanuel Vadot	i2c1_pins: i2c1 {
44d5b0e70fSEmmanuel Vadot		pins = "RIIC1_SDA", "RIIC1_SCL";
45d5b0e70fSEmmanuel Vadot		input-enable;
46d5b0e70fSEmmanuel Vadot	};
47d5b0e70fSEmmanuel Vadot
48d5b0e70fSEmmanuel Vadot	i2c2_pins: i2c2 {
49d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
50d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
51d5b0e70fSEmmanuel Vadot	};
52d5b0e70fSEmmanuel Vadot
53*aa1a8ff2SEmmanuel Vadot	mtu3_pins: mtu3 {
54*aa1a8ff2SEmmanuel Vadot		mtu3-pwm {
55*aa1a8ff2SEmmanuel Vadot			pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
56*aa1a8ff2SEmmanuel Vadot				 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
57*aa1a8ff2SEmmanuel Vadot				 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
58*aa1a8ff2SEmmanuel Vadot				 <RZG2L_PORT_PINMUX(44, 3, 4)>; /* MTIOC3D */
59*aa1a8ff2SEmmanuel Vadot		};
60*aa1a8ff2SEmmanuel Vadot	};
61*aa1a8ff2SEmmanuel Vadot
62d5b0e70fSEmmanuel Vadot	scif0_pins: scif0 {
63d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
64d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
65d5b0e70fSEmmanuel Vadot	};
66d5b0e70fSEmmanuel Vadot
67d5b0e70fSEmmanuel Vadot	scif1_pins: scif1 {
68d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
69d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
70d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
71d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
72d5b0e70fSEmmanuel Vadot	};
73d5b0e70fSEmmanuel Vadot
74c9ccf3a3SEmmanuel Vadot	sd1-pwr-en-hog {
75c9ccf3a3SEmmanuel Vadot		gpio-hog;
76c9ccf3a3SEmmanuel Vadot		gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
77c9ccf3a3SEmmanuel Vadot		output-high;
78c9ccf3a3SEmmanuel Vadot		line-name = "sd1_pwr_en";
79c9ccf3a3SEmmanuel Vadot	};
80c9ccf3a3SEmmanuel Vadot
81c9ccf3a3SEmmanuel Vadot	sdhi1_pins: sd1 {
82c9ccf3a3SEmmanuel Vadot		sd1_data {
83c9ccf3a3SEmmanuel Vadot			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
84c9ccf3a3SEmmanuel Vadot			power-source = <3300>;
85c9ccf3a3SEmmanuel Vadot		};
86c9ccf3a3SEmmanuel Vadot
87c9ccf3a3SEmmanuel Vadot		sd1_ctrl {
88c9ccf3a3SEmmanuel Vadot			pins = "SD1_CLK", "SD1_CMD";
89c9ccf3a3SEmmanuel Vadot			power-source = <3300>;
90c9ccf3a3SEmmanuel Vadot		};
91c9ccf3a3SEmmanuel Vadot
92c9ccf3a3SEmmanuel Vadot		sd1_mux {
93c9ccf3a3SEmmanuel Vadot			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
94c9ccf3a3SEmmanuel Vadot		};
95c9ccf3a3SEmmanuel Vadot	};
96c9ccf3a3SEmmanuel Vadot
97c9ccf3a3SEmmanuel Vadot	sdhi1_pins_uhs: sd1_uhs {
98c9ccf3a3SEmmanuel Vadot		sd1_data_uhs {
99c9ccf3a3SEmmanuel Vadot			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
100c9ccf3a3SEmmanuel Vadot			power-source = <1800>;
101c9ccf3a3SEmmanuel Vadot		};
102c9ccf3a3SEmmanuel Vadot
103c9ccf3a3SEmmanuel Vadot		sd1_ctrl_uhs {
104c9ccf3a3SEmmanuel Vadot			pins = "SD1_CLK", "SD1_CMD";
105c9ccf3a3SEmmanuel Vadot			power-source = <1800>;
106c9ccf3a3SEmmanuel Vadot		};
107c9ccf3a3SEmmanuel Vadot
108c9ccf3a3SEmmanuel Vadot		sd1_mux_uhs {
109c9ccf3a3SEmmanuel Vadot			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
110c9ccf3a3SEmmanuel Vadot		};
111c9ccf3a3SEmmanuel Vadot	};
112c9ccf3a3SEmmanuel Vadot
113c9ccf3a3SEmmanuel Vadot	sound_clk_pins: sound_clk {
114c9ccf3a3SEmmanuel Vadot		pins = "AUDIO_CLK1", "AUDIO_CLK2";
115c9ccf3a3SEmmanuel Vadot		input-enable;
116c9ccf3a3SEmmanuel Vadot	};
117d5b0e70fSEmmanuel Vadot
118d5b0e70fSEmmanuel Vadot	spi1_pins: spi1 {
119d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
120d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
121d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
122d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
123d5b0e70fSEmmanuel Vadot	};
124d5b0e70fSEmmanuel Vadot
125d5b0e70fSEmmanuel Vadot	ssi0_pins: ssi0 {
126d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
127d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
128d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
129d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
130d5b0e70fSEmmanuel Vadot	};
131d5b0e70fSEmmanuel Vadot
132d5b0e70fSEmmanuel Vadot	usb0_pins: usb0 {
133d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
134d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
135d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
136d5b0e70fSEmmanuel Vadot	};
137d5b0e70fSEmmanuel Vadot
138d5b0e70fSEmmanuel Vadot	usb1_pins: usb1 {
139d5b0e70fSEmmanuel Vadot		pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
140d5b0e70fSEmmanuel Vadot			 <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
141d5b0e70fSEmmanuel Vadot	};
142c9ccf3a3SEmmanuel Vadot};
143c9ccf3a3SEmmanuel Vadot
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