1c9ccf3a3SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2c9ccf3a3SEmmanuel Vadot/* 3c9ccf3a3SEmmanuel Vadot * Device Tree Source for the RZ/G2LC SMARC EVK board 4c9ccf3a3SEmmanuel Vadot * 5c9ccf3a3SEmmanuel Vadot * Copyright (C) 2021 Renesas Electronics Corp. 6c9ccf3a3SEmmanuel Vadot */ 7c9ccf3a3SEmmanuel Vadot 8c9ccf3a3SEmmanuel Vadot/dts-v1/; 98bab661aSEmmanuel Vadot 108bab661aSEmmanuel Vadot/* 118bab661aSEmmanuel Vadot * DIP-Switch SW1 setting on SoM 128bab661aSEmmanuel Vadot * 1 : High; 0: Low 138bab661aSEmmanuel Vadot * SW1-2 : SW_SD0_DEV_SEL (1: eMMC; 0: uSD) 148bab661aSEmmanuel Vadot * SW1-3 : SW_SCIF_CAN (1: CAN1; 0: SCIF1) 158bab661aSEmmanuel Vadot * SW1-4 : SW_RSPI_CAN (1: CAN1; 0: RSPI1) 168bab661aSEmmanuel Vadot * SW1-5 : SW_I2S0_I2S1 (1: I2S2 (HDMI audio); 0: I2S0) 178bab661aSEmmanuel Vadot * Please change below macros according to SW1 setting 188bab661aSEmmanuel Vadot */ 198bab661aSEmmanuel Vadot 208bab661aSEmmanuel Vadot#define SW_SD0_DEV_SEL 1 218bab661aSEmmanuel Vadot 228bab661aSEmmanuel Vadot#define SW_SCIF_CAN 0 238bab661aSEmmanuel Vadot#if (SW_SCIF_CAN) 248bab661aSEmmanuel Vadot/* Due to HW routing, SW_RSPI_CAN is always 0 when SW_SCIF_CAN is set to 1 */ 258bab661aSEmmanuel Vadot#define SW_RSPI_CAN 0 268bab661aSEmmanuel Vadot#else 278bab661aSEmmanuel Vadot/* Please set SW_RSPI_CAN. Default value is 1 */ 288bab661aSEmmanuel Vadot#define SW_RSPI_CAN 1 298bab661aSEmmanuel Vadot#endif 308bab661aSEmmanuel Vadot 318bab661aSEmmanuel Vadot#if (SW_SCIF_CAN && SW_RSPI_CAN) 328bab661aSEmmanuel Vadot#error "Can not set 1 to both SW_SCIF_CAN and SW_RSPI_CAN due to HW routing" 338bab661aSEmmanuel Vadot#endif 348bab661aSEmmanuel Vadot 358bab661aSEmmanuel Vadot/* comment the #define statement to disable SCIF1 (SER0) on PMOD1 (CN7) */ 368bab661aSEmmanuel Vadot#define PMOD1_SER0 1 378bab661aSEmmanuel Vadot 38aa1a8ff2SEmmanuel Vadot/* 39aa1a8ff2SEmmanuel Vadot * To enable MTU3a PWM on PMOD0, 40aa1a8ff2SEmmanuel Vadot * - Set DIP-Switch SW1-4 to Off position. 41aa1a8ff2SEmmanuel Vadot * - Set SW_RSPI_CAN macro to 0. 42aa1a8ff2SEmmanuel Vadot * - Set PMOD_MTU3 macro to 1. 43aa1a8ff2SEmmanuel Vadot */ 44aa1a8ff2SEmmanuel Vadot#define PMOD_MTU3 0 45aa1a8ff2SEmmanuel Vadot 46aa1a8ff2SEmmanuel Vadot#if (PMOD_MTU3 && SW_RSPI_CAN) 47aa1a8ff2SEmmanuel Vadot#error "Cannot set as both PMOD_MTU3 and SW_RSPI_CAN are mutually exclusive" 48aa1a8ff2SEmmanuel Vadot#endif 49aa1a8ff2SEmmanuel Vadot 50*b2d2a78aSEmmanuel Vadot/* Please set SW_I2S0_I2S1. Default value is 0 */ 51*b2d2a78aSEmmanuel Vadot#define SW_I2S0_I2S1 0 52*b2d2a78aSEmmanuel Vadot 53c9ccf3a3SEmmanuel Vadot#include "r9a07g044c2.dtsi" 548bab661aSEmmanuel Vadot#include "rzg2lc-smarc-som.dtsi" 55c9ccf3a3SEmmanuel Vadot#include "rzg2lc-smarc.dtsi" 56c9ccf3a3SEmmanuel Vadot 57c9ccf3a3SEmmanuel Vadot/ { 58c9ccf3a3SEmmanuel Vadot model = "Renesas SMARC EVK based on r9a07g044c2"; 59c9ccf3a3SEmmanuel Vadot compatible = "renesas,smarc-evk", "renesas,r9a07g044c2", "renesas,r9a07g044"; 60c9ccf3a3SEmmanuel Vadot}; 61