1*aa1a8ff2SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*aa1a8ff2SEmmanuel Vadot/* 3*aa1a8ff2SEmmanuel Vadot * Copyright (C) 2023, Intel Corporation 4*aa1a8ff2SEmmanuel Vadot */ 5*aa1a8ff2SEmmanuel Vadot#include "socfpga_agilex5.dtsi" 6*aa1a8ff2SEmmanuel Vadot 7*aa1a8ff2SEmmanuel Vadot/ { 8*aa1a8ff2SEmmanuel Vadot model = "SoCFPGA Agilex5 SoCDK"; 9*aa1a8ff2SEmmanuel Vadot compatible = "intel,socfpga-agilex5-socdk", "intel,socfpga-agilex5"; 10*aa1a8ff2SEmmanuel Vadot 11*aa1a8ff2SEmmanuel Vadot aliases { 12*aa1a8ff2SEmmanuel Vadot serial0 = &uart0; 13*aa1a8ff2SEmmanuel Vadot }; 14*aa1a8ff2SEmmanuel Vadot 15*aa1a8ff2SEmmanuel Vadot chosen { 16*aa1a8ff2SEmmanuel Vadot stdout-path = "serial0:115200n8"; 17*aa1a8ff2SEmmanuel Vadot }; 18*aa1a8ff2SEmmanuel Vadot}; 19*aa1a8ff2SEmmanuel Vadot 20*aa1a8ff2SEmmanuel Vadot&gpio1 { 21*aa1a8ff2SEmmanuel Vadot status = "okay"; 22*aa1a8ff2SEmmanuel Vadot}; 23*aa1a8ff2SEmmanuel Vadot 24*aa1a8ff2SEmmanuel Vadot&osc1 { 25*aa1a8ff2SEmmanuel Vadot clock-frequency = <25000000>; 26*aa1a8ff2SEmmanuel Vadot}; 27*aa1a8ff2SEmmanuel Vadot 28*aa1a8ff2SEmmanuel Vadot&uart0 { 29*aa1a8ff2SEmmanuel Vadot status = "okay"; 30*aa1a8ff2SEmmanuel Vadot}; 31*aa1a8ff2SEmmanuel Vadot 32*aa1a8ff2SEmmanuel Vadot&usb0 { 33*aa1a8ff2SEmmanuel Vadot status = "okay"; 34*aa1a8ff2SEmmanuel Vadot disable-over-current; 35*aa1a8ff2SEmmanuel Vadot}; 36*aa1a8ff2SEmmanuel Vadot 37*aa1a8ff2SEmmanuel Vadot&watchdog0 { 38*aa1a8ff2SEmmanuel Vadot status = "okay"; 39*aa1a8ff2SEmmanuel Vadot}; 40