1*c66ec88fSEmmanuel Vadot/* 2*c66ec88fSEmmanuel Vadot * ARM Ltd. 3*c66ec88fSEmmanuel Vadot * 4*c66ec88fSEmmanuel Vadot * ARMv8 Foundation model DTS (GICv2 configuration) 5*c66ec88fSEmmanuel Vadot */ 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot/ { 8*c66ec88fSEmmanuel Vadot gic: interrupt-controller@2c001000 { 9*c66ec88fSEmmanuel Vadot compatible = "arm,gic-400", "arm,cortex-a15-gic"; 10*c66ec88fSEmmanuel Vadot #interrupt-cells = <3>; 11*c66ec88fSEmmanuel Vadot #address-cells = <1>; 12*c66ec88fSEmmanuel Vadot interrupt-controller; 13*c66ec88fSEmmanuel Vadot reg = <0x0 0x2c001000 0 0x1000>, 14*c66ec88fSEmmanuel Vadot <0x0 0x2c002000 0 0x2000>, 15*c66ec88fSEmmanuel Vadot <0x0 0x2c004000 0 0x2000>, 16*c66ec88fSEmmanuel Vadot <0x0 0x2c006000 0 0x2000>; 17*c66ec88fSEmmanuel Vadot interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 18*c66ec88fSEmmanuel Vadot }; 19*c66ec88fSEmmanuel Vadot}; 20