1*aa1a8ff2SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*aa1a8ff2SEmmanuel Vadot/* 3*aa1a8ff2SEmmanuel Vadot * Copyright (c) 2023 Amlogic, Inc. All rights reserved. 4*aa1a8ff2SEmmanuel Vadot */ 5*aa1a8ff2SEmmanuel Vadot 6*aa1a8ff2SEmmanuel Vadot/dts-v1/; 7*aa1a8ff2SEmmanuel Vadot 8*aa1a8ff2SEmmanuel Vadot#include "amlogic-t7.dtsi" 9*aa1a8ff2SEmmanuel Vadot 10*aa1a8ff2SEmmanuel Vadot/ { 11*aa1a8ff2SEmmanuel Vadot model = "Amlogic A311D2 AN400 Development Board"; 12*aa1a8ff2SEmmanuel Vadot compatible = "amlogic,an400", "amlogic,a311d2", "amlogic,t7"; 13*aa1a8ff2SEmmanuel Vadot interrupt-parent = <&gic>; 14*aa1a8ff2SEmmanuel Vadot #address-cells = <2>; 15*aa1a8ff2SEmmanuel Vadot #size-cells = <2>; 16*aa1a8ff2SEmmanuel Vadot 17*aa1a8ff2SEmmanuel Vadot aliases { 18*aa1a8ff2SEmmanuel Vadot serial0 = &uart_a; 19*aa1a8ff2SEmmanuel Vadot }; 20*aa1a8ff2SEmmanuel Vadot 21*aa1a8ff2SEmmanuel Vadot memory@0 { 22*aa1a8ff2SEmmanuel Vadot device_type = "memory"; 23*aa1a8ff2SEmmanuel Vadot reg = <0x00000000 0x00000000 0x00000000 0xE0000000 24*aa1a8ff2SEmmanuel Vadot 0x00000001 0x00000000 0x00000000 0x20000000>; 25*aa1a8ff2SEmmanuel Vadot }; 26*aa1a8ff2SEmmanuel Vadot 27*aa1a8ff2SEmmanuel Vadot xtal: xtal-clk { 28*aa1a8ff2SEmmanuel Vadot compatible = "fixed-clock"; 29*aa1a8ff2SEmmanuel Vadot clock-frequency = <24000000>; 30*aa1a8ff2SEmmanuel Vadot clock-output-names = "xtal"; 31*aa1a8ff2SEmmanuel Vadot #clock-cells = <0>; 32*aa1a8ff2SEmmanuel Vadot }; 33*aa1a8ff2SEmmanuel Vadot}; 34*aa1a8ff2SEmmanuel Vadot 35*aa1a8ff2SEmmanuel Vadot&uart_a { 36*aa1a8ff2SEmmanuel Vadot clocks = <&xtal>, <&xtal>, <&xtal>; 37*aa1a8ff2SEmmanuel Vadot clock-names = "xtal", "pclk", "baud"; 38*aa1a8ff2SEmmanuel Vadot status = "okay"; 39*aa1a8ff2SEmmanuel Vadot}; 40