1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree Source for OMAP4 clock data 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2013 Texas Instruments, Inc. 6*f126890aSEmmanuel Vadot */ 7*f126890aSEmmanuel Vadot&prm_clocks { 8*f126890aSEmmanuel Vadot div_ts_ck: div_ts_ck@1888 { 9*f126890aSEmmanuel Vadot #clock-cells = <0>; 10*f126890aSEmmanuel Vadot compatible = "ti,divider-clock"; 11*f126890aSEmmanuel Vadot clock-output-names = "div_ts_ck"; 12*f126890aSEmmanuel Vadot clocks = <&l4_wkup_clk_mux_ck>; 13*f126890aSEmmanuel Vadot ti,bit-shift = <24>; 14*f126890aSEmmanuel Vadot reg = <0x1888>; 15*f126890aSEmmanuel Vadot ti,dividers = <8>, <16>, <32>; 16*f126890aSEmmanuel Vadot }; 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot bandgap_ts_fclk: bandgap_ts_fclk@1888 { 19*f126890aSEmmanuel Vadot #clock-cells = <0>; 20*f126890aSEmmanuel Vadot compatible = "ti,gate-clock"; 21*f126890aSEmmanuel Vadot clock-output-names = "bandgap_ts_fclk"; 22*f126890aSEmmanuel Vadot clocks = <&div_ts_ck>; 23*f126890aSEmmanuel Vadot ti,bit-shift = <8>; 24*f126890aSEmmanuel Vadot reg = <0x1888>; 25*f126890aSEmmanuel Vadot }; 26*f126890aSEmmanuel Vadot}; 27