xref: /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/omap36xx.dtsi (revision 01950c46b8155250f64374fb72fc11faa44bf099)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only
2f126890aSEmmanuel Vadot/*
3f126890aSEmmanuel Vadot * Device Tree Source for OMAP3 SoC
4f126890aSEmmanuel Vadot *
5f126890aSEmmanuel Vadot * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6f126890aSEmmanuel Vadot */
7f126890aSEmmanuel Vadot
8f126890aSEmmanuel Vadot#include <dt-bindings/bus/ti-sysc.h>
9f126890aSEmmanuel Vadot#include <dt-bindings/media/omap3-isp.h>
10f126890aSEmmanuel Vadot
11f126890aSEmmanuel Vadot#include "omap3.dtsi"
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot/ {
14f126890aSEmmanuel Vadot	aliases {
15f126890aSEmmanuel Vadot		serial3 = &uart4;
16f126890aSEmmanuel Vadot	};
17f126890aSEmmanuel Vadot
18f126890aSEmmanuel Vadot	cpus {
19f126890aSEmmanuel Vadot		/* OMAP3630/OMAP37xx variants OPP50 to OPP130 and OPP1G */
20f126890aSEmmanuel Vadot		cpu: cpu@0 {
21f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
22f126890aSEmmanuel Vadot
23f126890aSEmmanuel Vadot			vbb-supply = <&abb_mpu_iva>;
24f126890aSEmmanuel Vadot			clock-latency = <300000>; /* From omap-cpufreq driver */
25f126890aSEmmanuel Vadot			#cooling-cells = <2>;
26f126890aSEmmanuel Vadot		};
27f126890aSEmmanuel Vadot	};
28f126890aSEmmanuel Vadot
29f126890aSEmmanuel Vadot	cpu0_opp_table: opp-table {
30f126890aSEmmanuel Vadot		compatible = "operating-points-v2-ti-cpu";
31f126890aSEmmanuel Vadot		syscon = <&scm_conf>;
32f126890aSEmmanuel Vadot
33aa1a8ff2SEmmanuel Vadot		opp-50-300000000 {
34aa1a8ff2SEmmanuel Vadot			/* OPP50 */
35f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <300000000>;
36f126890aSEmmanuel Vadot			/*
37f126890aSEmmanuel Vadot			 * we currently only select the max voltage from table
38f126890aSEmmanuel Vadot			 * Table 4-19 of the DM3730 Data sheet (SPRS685B)
39f126890aSEmmanuel Vadot			 * Format is:	cpu0-supply:	<target min max>
40f126890aSEmmanuel Vadot			 *		vbb-supply:	<target min max>
41f126890aSEmmanuel Vadot			 */
42f126890aSEmmanuel Vadot			opp-microvolt = <1012500 1012500 1012500>,
43f126890aSEmmanuel Vadot					 <1012500 1012500 1012500>;
44f126890aSEmmanuel Vadot			/*
45f126890aSEmmanuel Vadot			 * first value is silicon revision bit mask
46f126890aSEmmanuel Vadot			 * second one is "speed binned" bit mask
47f126890aSEmmanuel Vadot			 */
48f126890aSEmmanuel Vadot			opp-supported-hw = <0xffffffff 3>;
49f126890aSEmmanuel Vadot			opp-suspend;
50f126890aSEmmanuel Vadot		};
51f126890aSEmmanuel Vadot
52aa1a8ff2SEmmanuel Vadot		opp-100-600000000 {
53aa1a8ff2SEmmanuel Vadot			/* OPP100 */
54f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <600000000>;
55f126890aSEmmanuel Vadot			opp-microvolt = <1200000 1200000 1200000>,
56f126890aSEmmanuel Vadot					 <1200000 1200000 1200000>;
57f126890aSEmmanuel Vadot			opp-supported-hw = <0xffffffff 3>;
58f126890aSEmmanuel Vadot		};
59f126890aSEmmanuel Vadot
60aa1a8ff2SEmmanuel Vadot		opp-130-800000000 {
61aa1a8ff2SEmmanuel Vadot			/* OPP130 */
62f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <800000000>;
63f126890aSEmmanuel Vadot			opp-microvolt = <1325000 1325000 1325000>,
64f126890aSEmmanuel Vadot					 <1325000 1325000 1325000>;
65f126890aSEmmanuel Vadot			opp-supported-hw = <0xffffffff 3>;
66f126890aSEmmanuel Vadot		};
67f126890aSEmmanuel Vadot
68aa1a8ff2SEmmanuel Vadot		opp-1000000000 {
69aa1a8ff2SEmmanuel Vadot			/* OPP1G */
70f126890aSEmmanuel Vadot			opp-hz = /bits/ 64 <1000000000>;
71f126890aSEmmanuel Vadot			opp-microvolt = <1375000 1375000 1375000>,
72f126890aSEmmanuel Vadot					 <1375000 1375000 1375000>;
73f126890aSEmmanuel Vadot			/* only on am/dm37x with speed-binned bit set */
74f126890aSEmmanuel Vadot			opp-supported-hw = <0xffffffff 2>;
75f126890aSEmmanuel Vadot		};
76f126890aSEmmanuel Vadot	};
77f126890aSEmmanuel Vadot
78aa1a8ff2SEmmanuel Vadot	opp_supply_mpu_iva: opp-supply {
79f126890aSEmmanuel Vadot		compatible = "ti,omap-opp-supply";
80f126890aSEmmanuel Vadot		ti,absolute-max-voltage-uv = <1375000>;
81f126890aSEmmanuel Vadot	};
82f126890aSEmmanuel Vadot
83f126890aSEmmanuel Vadot	ocp@68000000 {
84f126890aSEmmanuel Vadot		uart4: serial@49042000 {
85f126890aSEmmanuel Vadot			compatible = "ti,omap3-uart";
86f126890aSEmmanuel Vadot			reg = <0x49042000 0x400>;
87f126890aSEmmanuel Vadot			interrupts = <80>;
88f126890aSEmmanuel Vadot			dmas = <&sdma 81 &sdma 82>;
89f126890aSEmmanuel Vadot			dma-names = "tx", "rx";
90f126890aSEmmanuel Vadot			ti,hwmods = "uart4";
91f126890aSEmmanuel Vadot			clock-frequency = <48000000>;
92f126890aSEmmanuel Vadot		};
93f126890aSEmmanuel Vadot
94f126890aSEmmanuel Vadot		abb_mpu_iva: regulator-abb-mpu {
95f126890aSEmmanuel Vadot			compatible = "ti,abb-v1";
96f126890aSEmmanuel Vadot			regulator-name = "abb_mpu_iva";
97f126890aSEmmanuel Vadot			#address-cells = <0>;
98f126890aSEmmanuel Vadot			#size-cells = <0>;
99f126890aSEmmanuel Vadot			reg = <0x483072f0 0x8>, <0x48306818 0x4>;
100f126890aSEmmanuel Vadot			reg-names = "base-address", "int-address";
101f126890aSEmmanuel Vadot			ti,tranxdone-status-mask = <0x4000000>;
102f126890aSEmmanuel Vadot			clocks = <&sys_ck>;
103f126890aSEmmanuel Vadot			ti,settling-time = <30>;
104f126890aSEmmanuel Vadot			ti,clock-cycles = <8>;
105f126890aSEmmanuel Vadot			ti,abb_info = <
106f126890aSEmmanuel Vadot			/*uV		ABB	efuse	rbb_m	fbb_m	vset_m*/
107f126890aSEmmanuel Vadot			1012500		0	0	0	0	0
108f126890aSEmmanuel Vadot			1200000		0	0	0	0	0
109f126890aSEmmanuel Vadot			1325000		0	0	0	0	0
110f126890aSEmmanuel Vadot			1375000		1	0	0	0	0
111f126890aSEmmanuel Vadot			>;
112f126890aSEmmanuel Vadot		};
113f126890aSEmmanuel Vadot
114f126890aSEmmanuel Vadot		omap3_pmx_core2: pinmux@480025a0 {
115f126890aSEmmanuel Vadot			compatible = "ti,omap3-padconf", "pinctrl-single";
116f126890aSEmmanuel Vadot			reg = <0x480025a0 0x5c>;
117f126890aSEmmanuel Vadot			#address-cells = <1>;
118f126890aSEmmanuel Vadot			#size-cells = <0>;
119f126890aSEmmanuel Vadot			#pinctrl-cells = <1>;
120f126890aSEmmanuel Vadot			#interrupt-cells = <1>;
121f126890aSEmmanuel Vadot			interrupt-controller;
122f126890aSEmmanuel Vadot			pinctrl-single,register-width = <16>;
123f126890aSEmmanuel Vadot			pinctrl-single,function-mask = <0xff1f>;
124f126890aSEmmanuel Vadot		};
125f126890aSEmmanuel Vadot
126f126890aSEmmanuel Vadot		isp: isp@480bc000 {
127f126890aSEmmanuel Vadot			compatible = "ti,omap3-isp";
128f126890aSEmmanuel Vadot			reg = <0x480bc000 0x12fc
129f126890aSEmmanuel Vadot			       0x480bd800 0x0600>;
130f126890aSEmmanuel Vadot			interrupts = <24>;
131f126890aSEmmanuel Vadot			iommus = <&mmu_isp>;
132f126890aSEmmanuel Vadot			syscon = <&scm_conf 0x2f0>;
133f126890aSEmmanuel Vadot			ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
134f126890aSEmmanuel Vadot			#clock-cells = <1>;
135f126890aSEmmanuel Vadot			ports {
136f126890aSEmmanuel Vadot				#address-cells = <1>;
137f126890aSEmmanuel Vadot				#size-cells = <0>;
138f126890aSEmmanuel Vadot			};
139f126890aSEmmanuel Vadot		};
140f126890aSEmmanuel Vadot
141f126890aSEmmanuel Vadot		bandgap: bandgap@48002524 {
142f126890aSEmmanuel Vadot			reg = <0x48002524 0x4>;
143f126890aSEmmanuel Vadot			compatible = "ti,omap36xx-bandgap";
144f126890aSEmmanuel Vadot			#thermal-sensor-cells = <0>;
145f126890aSEmmanuel Vadot		};
146f126890aSEmmanuel Vadot
147f126890aSEmmanuel Vadot		target-module@480cb000 {
148f126890aSEmmanuel Vadot			compatible = "ti,sysc-omap3630-sr", "ti,sysc";
149f126890aSEmmanuel Vadot			ti,hwmods = "smartreflex_core";
150f126890aSEmmanuel Vadot			reg = <0x480cb038 0x4>;
151f126890aSEmmanuel Vadot			reg-names = "sysc";
152f126890aSEmmanuel Vadot			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
153f126890aSEmmanuel Vadot			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
154f126890aSEmmanuel Vadot					<SYSC_IDLE_NO>,
155f126890aSEmmanuel Vadot					<SYSC_IDLE_SMART>;
156f126890aSEmmanuel Vadot			clocks = <&sr2_fck>;
157f126890aSEmmanuel Vadot			clock-names = "fck";
158f126890aSEmmanuel Vadot			#address-cells = <1>;
159f126890aSEmmanuel Vadot			#size-cells = <1>;
160f126890aSEmmanuel Vadot			ranges = <0 0x480cb000 0x001000>;
161f126890aSEmmanuel Vadot
162f126890aSEmmanuel Vadot			smartreflex_core: smartreflex@0 {
163f126890aSEmmanuel Vadot				compatible = "ti,omap3-smartreflex-core";
164f126890aSEmmanuel Vadot				reg = <0 0x400>;
165f126890aSEmmanuel Vadot				interrupts = <19>;
166f126890aSEmmanuel Vadot			};
167f126890aSEmmanuel Vadot		};
168f126890aSEmmanuel Vadot
169f126890aSEmmanuel Vadot		target-module@480c9000 {
170f126890aSEmmanuel Vadot			compatible = "ti,sysc-omap3630-sr", "ti,sysc";
171f126890aSEmmanuel Vadot			ti,hwmods = "smartreflex_mpu_iva";
172f126890aSEmmanuel Vadot			reg = <0x480c9038 0x4>;
173f126890aSEmmanuel Vadot			reg-names = "sysc";
174f126890aSEmmanuel Vadot			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
175f126890aSEmmanuel Vadot			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
176f126890aSEmmanuel Vadot					<SYSC_IDLE_NO>,
177f126890aSEmmanuel Vadot					<SYSC_IDLE_SMART>;
178f126890aSEmmanuel Vadot			clocks = <&sr1_fck>;
179f126890aSEmmanuel Vadot			clock-names = "fck";
180f126890aSEmmanuel Vadot			#address-cells = <1>;
181f126890aSEmmanuel Vadot			#size-cells = <1>;
182f126890aSEmmanuel Vadot			ranges = <0 0x480c9000 0x001000>;
183f126890aSEmmanuel Vadot
184f126890aSEmmanuel Vadot
185f126890aSEmmanuel Vadot			smartreflex_mpu_iva: smartreflex@480c9000 {
186f126890aSEmmanuel Vadot				compatible = "ti,omap3-smartreflex-mpu-iva";
187f126890aSEmmanuel Vadot				reg = <0 0x400>;
188f126890aSEmmanuel Vadot				interrupts = <18>;
189f126890aSEmmanuel Vadot			};
190f126890aSEmmanuel Vadot		};
191f126890aSEmmanuel Vadot
192f126890aSEmmanuel Vadot		/*
193f126890aSEmmanuel Vadot		 * Note that the sysconfig register layout is a subset of the
194f126890aSEmmanuel Vadot		 * "ti,sysc-omap4" type register with just sidle and midle bits
195f126890aSEmmanuel Vadot		 * available while omap34xx has "ti,sysc-omap2" type sysconfig.
196f126890aSEmmanuel Vadot		 */
197f126890aSEmmanuel Vadot		sgx_module: target-module@50000000 {
198f126890aSEmmanuel Vadot			compatible = "ti,sysc-omap4", "ti,sysc";
199f126890aSEmmanuel Vadot			reg = <0x5000fe00 0x4>,
200f126890aSEmmanuel Vadot			      <0x5000fe10 0x4>;
201f126890aSEmmanuel Vadot			reg-names = "rev", "sysc";
202f126890aSEmmanuel Vadot			ti,sysc-midle = <SYSC_IDLE_FORCE>,
203f126890aSEmmanuel Vadot					<SYSC_IDLE_NO>,
204f126890aSEmmanuel Vadot					<SYSC_IDLE_SMART>;
205f126890aSEmmanuel Vadot			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
206f126890aSEmmanuel Vadot					<SYSC_IDLE_NO>,
207f126890aSEmmanuel Vadot					<SYSC_IDLE_SMART>;
208f126890aSEmmanuel Vadot			clocks = <&sgx_fck>, <&sgx_ick>;
209f126890aSEmmanuel Vadot			clock-names = "fck", "ick";
210f126890aSEmmanuel Vadot			#address-cells = <1>;
211f126890aSEmmanuel Vadot			#size-cells = <1>;
212f126890aSEmmanuel Vadot			ranges = <0 0x50000000 0x2000000>;
213f126890aSEmmanuel Vadot
214*01950c46SEmmanuel Vadot			gpu@0 {
215*01950c46SEmmanuel Vadot				compatible = "ti,omap3630-gpu", "img,powervr-sgx530";
216*01950c46SEmmanuel Vadot				reg = <0x0 0x2000000>; /* 32MB */
217*01950c46SEmmanuel Vadot				interrupts = <21>;
218*01950c46SEmmanuel Vadot			};
219f126890aSEmmanuel Vadot		};
220f126890aSEmmanuel Vadot	};
221f126890aSEmmanuel Vadot
222f126890aSEmmanuel Vadot	thermal_zones: thermal-zones {
223f126890aSEmmanuel Vadot		#include "omap3-cpu-thermal.dtsi"
224f126890aSEmmanuel Vadot	};
225f126890aSEmmanuel Vadot};
226f126890aSEmmanuel Vadot
227f126890aSEmmanuel Vadot&sdma {
228f126890aSEmmanuel Vadot	compatible = "ti,omap3630-sdma", "ti,omap-sdma";
229f126890aSEmmanuel Vadot};
230f126890aSEmmanuel Vadot
231f126890aSEmmanuel Vadot/* OMAP3630 needs dss_96m_fck for VENC */
232f126890aSEmmanuel Vadot&venc {
233f126890aSEmmanuel Vadot	clocks = <&dss_tv_fck>, <&dss_96m_fck>;
234f126890aSEmmanuel Vadot	clock-names = "fck", "tv_dac_clk";
235f126890aSEmmanuel Vadot};
236f126890aSEmmanuel Vadot
237f126890aSEmmanuel Vadot&ssi {
238f126890aSEmmanuel Vadot	status = "okay";
239f126890aSEmmanuel Vadot
240f126890aSEmmanuel Vadot	clocks = <&ssi_ssr_fck>,
241f126890aSEmmanuel Vadot		 <&ssi_sst_fck>,
242f126890aSEmmanuel Vadot		 <&ssi_ick>;
243f126890aSEmmanuel Vadot	clock-names = "ssi_ssr_fck",
244f126890aSEmmanuel Vadot		      "ssi_sst_fck",
245f126890aSEmmanuel Vadot		      "ssi_ick";
246f126890aSEmmanuel Vadot};
247f126890aSEmmanuel Vadot
248f126890aSEmmanuel Vadot&usb_otg_target {
249f126890aSEmmanuel Vadot	clocks = <&hsotgusb_ick_3430es2>;
250f126890aSEmmanuel Vadot};
251f126890aSEmmanuel Vadot
252f126890aSEmmanuel Vadot/include/ "omap34xx-omap36xx-clocks.dtsi"
253f126890aSEmmanuel Vadot/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
254f126890aSEmmanuel Vadot/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
255f126890aSEmmanuel Vadot/include/ "omap36xx-clocks.dtsi"
256