xref: /freebsd-src/sys/contrib/device-tree/src/arm/ti/keystone/keystone-clocks.dtsi (revision 01950c46b8155250f64374fb72fc11faa44bf099)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/*
3f126890aSEmmanuel Vadot * Device Tree Source for Keystone 2 clock tree
4f126890aSEmmanuel Vadot *
5*01950c46SEmmanuel Vadot * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6f126890aSEmmanuel Vadot */
7f126890aSEmmanuel Vadot
8f126890aSEmmanuel Vadotclocks {
9f126890aSEmmanuel Vadot	#address-cells = <1>;
10f126890aSEmmanuel Vadot	#size-cells = <1>;
11f126890aSEmmanuel Vadot	ranges;
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot	mainmuxclk: mainmuxclk@2310108 {
14f126890aSEmmanuel Vadot		#clock-cells = <0>;
15f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-mux-clock";
16f126890aSEmmanuel Vadot		clocks = <&mainpllclk>, <&refclksys>;
17f126890aSEmmanuel Vadot		reg = <0x02310108 4>;
18f126890aSEmmanuel Vadot		bit-shift = <23>;
19f126890aSEmmanuel Vadot		bit-mask = <1>;
20f126890aSEmmanuel Vadot		clock-output-names = "mainmuxclk";
21f126890aSEmmanuel Vadot	};
22f126890aSEmmanuel Vadot
23f126890aSEmmanuel Vadot	chipclk1: chipclk1 {
24f126890aSEmmanuel Vadot		#clock-cells = <0>;
25f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
26f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
27f126890aSEmmanuel Vadot		clock-div = <1>;
28f126890aSEmmanuel Vadot		clock-mult = <1>;
29f126890aSEmmanuel Vadot		clock-output-names = "chipclk1";
30f126890aSEmmanuel Vadot	};
31f126890aSEmmanuel Vadot
32f126890aSEmmanuel Vadot	chipclk1rstiso: chipclk1rstiso {
33f126890aSEmmanuel Vadot		#clock-cells = <0>;
34f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
35f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
36f126890aSEmmanuel Vadot		clock-div = <1>;
37f126890aSEmmanuel Vadot		clock-mult = <1>;
38f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso";
39f126890aSEmmanuel Vadot	};
40f126890aSEmmanuel Vadot
41f126890aSEmmanuel Vadot	gemtraceclk: gemtraceclk@2310120 {
42f126890aSEmmanuel Vadot		#clock-cells = <0>;
43f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-divider-clock";
44f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
45f126890aSEmmanuel Vadot		reg = <0x02310120 4>;
46f126890aSEmmanuel Vadot		bit-shift = <0>;
47f126890aSEmmanuel Vadot		bit-mask = <8>;
48f126890aSEmmanuel Vadot		clock-output-names = "gemtraceclk";
49f126890aSEmmanuel Vadot	};
50f126890aSEmmanuel Vadot
51f126890aSEmmanuel Vadot	chipstmxptclk: chipstmxptclk@2310164 {
52f126890aSEmmanuel Vadot		#clock-cells = <0>;
53f126890aSEmmanuel Vadot		compatible = "ti,keystone,pll-divider-clock";
54f126890aSEmmanuel Vadot		clocks = <&mainmuxclk>;
55f126890aSEmmanuel Vadot		reg = <0x02310164 4>;
56f126890aSEmmanuel Vadot		bit-shift = <0>;
57f126890aSEmmanuel Vadot		bit-mask = <8>;
58f126890aSEmmanuel Vadot		clock-output-names = "chipstmxptclk";
59f126890aSEmmanuel Vadot	};
60f126890aSEmmanuel Vadot
61f126890aSEmmanuel Vadot	chipclk12: chipclk12 {
62f126890aSEmmanuel Vadot		#clock-cells = <0>;
63f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
64f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
65f126890aSEmmanuel Vadot		clock-div = <2>;
66f126890aSEmmanuel Vadot		clock-mult = <1>;
67f126890aSEmmanuel Vadot		clock-output-names = "chipclk12";
68f126890aSEmmanuel Vadot	};
69f126890aSEmmanuel Vadot
70f126890aSEmmanuel Vadot	chipclk13: chipclk13 {
71f126890aSEmmanuel Vadot		#clock-cells = <0>;
72f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
73f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
74f126890aSEmmanuel Vadot		clock-div = <3>;
75f126890aSEmmanuel Vadot		clock-mult = <1>;
76f126890aSEmmanuel Vadot		clock-output-names = "chipclk13";
77f126890aSEmmanuel Vadot	};
78f126890aSEmmanuel Vadot
79f126890aSEmmanuel Vadot	paclk13: paclk13 {
80f126890aSEmmanuel Vadot		#clock-cells = <0>;
81f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
82f126890aSEmmanuel Vadot		clocks = <&papllclk>;
83f126890aSEmmanuel Vadot		clock-div = <3>;
84f126890aSEmmanuel Vadot		clock-mult = <1>;
85f126890aSEmmanuel Vadot		clock-output-names = "paclk13";
86f126890aSEmmanuel Vadot	};
87f126890aSEmmanuel Vadot
88f126890aSEmmanuel Vadot	chipclk14: chipclk14 {
89f126890aSEmmanuel Vadot		#clock-cells = <0>;
90f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
91f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
92f126890aSEmmanuel Vadot		clock-div = <4>;
93f126890aSEmmanuel Vadot		clock-mult = <1>;
94f126890aSEmmanuel Vadot		clock-output-names = "chipclk14";
95f126890aSEmmanuel Vadot	};
96f126890aSEmmanuel Vadot
97f126890aSEmmanuel Vadot	chipclk16: chipclk16 {
98f126890aSEmmanuel Vadot		#clock-cells = <0>;
99f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
100f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
101f126890aSEmmanuel Vadot		clock-div = <6>;
102f126890aSEmmanuel Vadot		clock-mult = <1>;
103f126890aSEmmanuel Vadot		clock-output-names = "chipclk16";
104f126890aSEmmanuel Vadot	};
105f126890aSEmmanuel Vadot
106f126890aSEmmanuel Vadot	chipclk112: chipclk112 {
107f126890aSEmmanuel Vadot		#clock-cells = <0>;
108f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
109f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
110f126890aSEmmanuel Vadot		clock-div = <12>;
111f126890aSEmmanuel Vadot		clock-mult = <1>;
112f126890aSEmmanuel Vadot		clock-output-names = "chipclk112";
113f126890aSEmmanuel Vadot	};
114f126890aSEmmanuel Vadot
115f126890aSEmmanuel Vadot	chipclk124: chipclk124 {
116f126890aSEmmanuel Vadot		#clock-cells = <0>;
117f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
118f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
119f126890aSEmmanuel Vadot		clock-div = <24>;
120f126890aSEmmanuel Vadot		clock-mult = <1>;
121f126890aSEmmanuel Vadot		clock-output-names = "chipclk114";
122f126890aSEmmanuel Vadot	};
123f126890aSEmmanuel Vadot
124f126890aSEmmanuel Vadot	chipclk1rstiso13: chipclk1rstiso13 {
125f126890aSEmmanuel Vadot		#clock-cells = <0>;
126f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
127f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
128f126890aSEmmanuel Vadot		clock-div = <3>;
129f126890aSEmmanuel Vadot		clock-mult = <1>;
130f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso13";
131f126890aSEmmanuel Vadot	};
132f126890aSEmmanuel Vadot
133f126890aSEmmanuel Vadot	chipclk1rstiso14: chipclk1rstiso14 {
134f126890aSEmmanuel Vadot		#clock-cells = <0>;
135f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
136f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
137f126890aSEmmanuel Vadot		clock-div = <4>;
138f126890aSEmmanuel Vadot		clock-mult = <1>;
139f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso14";
140f126890aSEmmanuel Vadot	};
141f126890aSEmmanuel Vadot
142f126890aSEmmanuel Vadot	chipclk1rstiso16: chipclk1rstiso16 {
143f126890aSEmmanuel Vadot		#clock-cells = <0>;
144f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
145f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
146f126890aSEmmanuel Vadot		clock-div = <6>;
147f126890aSEmmanuel Vadot		clock-mult = <1>;
148f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso16";
149f126890aSEmmanuel Vadot	};
150f126890aSEmmanuel Vadot
151f126890aSEmmanuel Vadot	chipclk1rstiso112: chipclk1rstiso112 {
152f126890aSEmmanuel Vadot		#clock-cells = <0>;
153f126890aSEmmanuel Vadot		compatible = "fixed-factor-clock";
154f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso>;
155f126890aSEmmanuel Vadot		clock-div = <12>;
156f126890aSEmmanuel Vadot		clock-mult = <1>;
157f126890aSEmmanuel Vadot		clock-output-names = "chipclk1rstiso112";
158f126890aSEmmanuel Vadot	};
159f126890aSEmmanuel Vadot
160f126890aSEmmanuel Vadot	clkmodrst0: clkmodrst0@2350000 {
161f126890aSEmmanuel Vadot		#clock-cells = <0>;
162f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
163f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
164f126890aSEmmanuel Vadot		clock-output-names = "modrst0";
165f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
166f126890aSEmmanuel Vadot		reg-names = "control", "domain";
167f126890aSEmmanuel Vadot		domain-id = <0>;
168f126890aSEmmanuel Vadot	};
169f126890aSEmmanuel Vadot
170f126890aSEmmanuel Vadot
171f126890aSEmmanuel Vadot	clkusb: clkusb@2350008 {
172f126890aSEmmanuel Vadot		#clock-cells = <0>;
173f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
174f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
175f126890aSEmmanuel Vadot		clock-output-names = "usb";
176f126890aSEmmanuel Vadot		reg = <0x02350008 0xb00>, <0x02350000 0x400>;
177f126890aSEmmanuel Vadot		reg-names = "control", "domain";
178f126890aSEmmanuel Vadot		domain-id = <0>;
179f126890aSEmmanuel Vadot	};
180f126890aSEmmanuel Vadot
181f126890aSEmmanuel Vadot	clkaemifspi: clkaemifspi@235000c {
182f126890aSEmmanuel Vadot		#clock-cells = <0>;
183f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
184f126890aSEmmanuel Vadot		clocks = <&chipclk16>;
185f126890aSEmmanuel Vadot		clock-output-names = "aemif-spi";
186f126890aSEmmanuel Vadot		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
187f126890aSEmmanuel Vadot		reg-names = "control", "domain";
188f126890aSEmmanuel Vadot		domain-id = <0>;
189f126890aSEmmanuel Vadot	};
190f126890aSEmmanuel Vadot
191f126890aSEmmanuel Vadot
192f126890aSEmmanuel Vadot	clkdebugsstrc: clkdebugsstrc@2350014 {
193f126890aSEmmanuel Vadot		#clock-cells = <0>;
194f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
195f126890aSEmmanuel Vadot		clocks = <&chipclk13>;
196f126890aSEmmanuel Vadot		clock-output-names = "debugss-trc";
197f126890aSEmmanuel Vadot		reg = <0x02350014 0xb00>, <0x02350000 0x400>;
198f126890aSEmmanuel Vadot		reg-names = "control", "domain";
199f126890aSEmmanuel Vadot		domain-id = <1>;
200f126890aSEmmanuel Vadot	};
201f126890aSEmmanuel Vadot
202f126890aSEmmanuel Vadot	clktetbtrc: clktetbtrc@2350018 {
203f126890aSEmmanuel Vadot		#clock-cells = <0>;
204f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
205f126890aSEmmanuel Vadot		clocks = <&chipclk13>;
206f126890aSEmmanuel Vadot		clock-output-names = "tetb-trc";
207f126890aSEmmanuel Vadot		reg = <0x02350018 0xb00>, <0x02350004 0x400>;
208f126890aSEmmanuel Vadot		reg-names = "control", "domain";
209f126890aSEmmanuel Vadot		domain-id = <1>;
210f126890aSEmmanuel Vadot	};
211f126890aSEmmanuel Vadot
212f126890aSEmmanuel Vadot	clkpa: clkpa@235001c {
213f126890aSEmmanuel Vadot		#clock-cells = <0>;
214f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
215f126890aSEmmanuel Vadot		clocks = <&paclk13>;
216f126890aSEmmanuel Vadot		clock-output-names = "pa";
217f126890aSEmmanuel Vadot		reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
218f126890aSEmmanuel Vadot		reg-names = "control", "domain";
219f126890aSEmmanuel Vadot		domain-id = <2>;
220f126890aSEmmanuel Vadot	};
221f126890aSEmmanuel Vadot
222f126890aSEmmanuel Vadot	clkcpgmac: clkcpgmac@2350020 {
223f126890aSEmmanuel Vadot		#clock-cells = <0>;
224f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
225f126890aSEmmanuel Vadot		clocks = <&clkpa>;
226f126890aSEmmanuel Vadot		clock-output-names = "cpgmac";
227f126890aSEmmanuel Vadot		reg = <0x02350020 0xb00>, <0x02350008 0x400>;
228f126890aSEmmanuel Vadot		reg-names = "control", "domain";
229f126890aSEmmanuel Vadot		domain-id = <2>;
230f126890aSEmmanuel Vadot	};
231f126890aSEmmanuel Vadot
232f126890aSEmmanuel Vadot	clksa: clksa@2350024 {
233f126890aSEmmanuel Vadot		#clock-cells = <0>;
234f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
235f126890aSEmmanuel Vadot		clocks = <&clkpa>;
236f126890aSEmmanuel Vadot		clock-output-names = "sa";
237f126890aSEmmanuel Vadot		reg = <0x02350024 0xb00>, <0x02350008 0x400>;
238f126890aSEmmanuel Vadot		reg-names = "control", "domain";
239f126890aSEmmanuel Vadot		domain-id = <2>;
240f126890aSEmmanuel Vadot	};
241f126890aSEmmanuel Vadot
242f126890aSEmmanuel Vadot	clkpcie: clkpcie@2350028 {
243f126890aSEmmanuel Vadot		#clock-cells = <0>;
244f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
245f126890aSEmmanuel Vadot		clocks = <&chipclk12>;
246f126890aSEmmanuel Vadot		clock-output-names = "pcie";
247f126890aSEmmanuel Vadot		reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
248f126890aSEmmanuel Vadot		reg-names = "control", "domain";
249f126890aSEmmanuel Vadot		domain-id = <3>;
250f126890aSEmmanuel Vadot	};
251f126890aSEmmanuel Vadot
252f126890aSEmmanuel Vadot	clksr: clksr@2350034 {
253f126890aSEmmanuel Vadot		#clock-cells = <0>;
254f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
255f126890aSEmmanuel Vadot		clocks = <&chipclk1rstiso112>;
256f126890aSEmmanuel Vadot		clock-output-names = "sr";
257f126890aSEmmanuel Vadot		reg = <0x02350034 0xb00>, <0x02350018 0x400>;
258f126890aSEmmanuel Vadot		reg-names = "control", "domain";
259f126890aSEmmanuel Vadot		domain-id = <6>;
260f126890aSEmmanuel Vadot	};
261f126890aSEmmanuel Vadot
262f126890aSEmmanuel Vadot	clkgem0: clkgem0@235003c {
263f126890aSEmmanuel Vadot		#clock-cells = <0>;
264f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
265f126890aSEmmanuel Vadot		clocks = <&chipclk1>;
266f126890aSEmmanuel Vadot		clock-output-names = "gem0";
267f126890aSEmmanuel Vadot		reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
268f126890aSEmmanuel Vadot		reg-names = "control", "domain";
269f126890aSEmmanuel Vadot		domain-id = <8>;
270f126890aSEmmanuel Vadot	};
271f126890aSEmmanuel Vadot
272f126890aSEmmanuel Vadot	clkddr30: clkddr30@235005c {
273f126890aSEmmanuel Vadot		#clock-cells = <0>;
274f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
275f126890aSEmmanuel Vadot		clocks = <&chipclk12>;
276f126890aSEmmanuel Vadot		clock-output-names = "ddr3-0";
277f126890aSEmmanuel Vadot		reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
278f126890aSEmmanuel Vadot		reg-names = "control", "domain";
279f126890aSEmmanuel Vadot		domain-id = <16>;
280f126890aSEmmanuel Vadot	};
281f126890aSEmmanuel Vadot
282f126890aSEmmanuel Vadot	clkwdtimer0: clkwdtimer0@2350000 {
283f126890aSEmmanuel Vadot		#clock-cells = <0>;
284f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
285f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
286f126890aSEmmanuel Vadot		clock-output-names = "timer0";
287f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
288f126890aSEmmanuel Vadot		reg-names = "control", "domain";
289f126890aSEmmanuel Vadot		domain-id = <0>;
290f126890aSEmmanuel Vadot	};
291f126890aSEmmanuel Vadot
292f126890aSEmmanuel Vadot	clkwdtimer1: clkwdtimer1@2350000 {
293f126890aSEmmanuel Vadot		#clock-cells = <0>;
294f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
295f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
296f126890aSEmmanuel Vadot		clock-output-names = "timer1";
297f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
298f126890aSEmmanuel Vadot		reg-names = "control", "domain";
299f126890aSEmmanuel Vadot		domain-id = <0>;
300f126890aSEmmanuel Vadot	};
301f126890aSEmmanuel Vadot
302f126890aSEmmanuel Vadot	clkwdtimer2: clkwdtimer2@2350000 {
303f126890aSEmmanuel Vadot		#clock-cells = <0>;
304f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
305f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
306f126890aSEmmanuel Vadot		clock-output-names = "timer2";
307f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
308f126890aSEmmanuel Vadot		reg-names = "control", "domain";
309f126890aSEmmanuel Vadot		domain-id = <0>;
310f126890aSEmmanuel Vadot	};
311f126890aSEmmanuel Vadot
312f126890aSEmmanuel Vadot	clkwdtimer3: clkwdtimer3@2350000 {
313f126890aSEmmanuel Vadot		#clock-cells = <0>;
314f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
315f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
316f126890aSEmmanuel Vadot		clock-output-names = "timer3";
317f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
318f126890aSEmmanuel Vadot		reg-names = "control", "domain";
319f126890aSEmmanuel Vadot		domain-id = <0>;
320f126890aSEmmanuel Vadot	};
321f126890aSEmmanuel Vadot
322f126890aSEmmanuel Vadot	clktimer15: clktimer15@2350000 {
323f126890aSEmmanuel Vadot		#clock-cells = <0>;
324f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
325f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
326f126890aSEmmanuel Vadot		clock-output-names = "timer15";
327f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
328f126890aSEmmanuel Vadot		reg-names = "control", "domain";
329f126890aSEmmanuel Vadot		domain-id = <0>;
330f126890aSEmmanuel Vadot	};
331f126890aSEmmanuel Vadot
332f126890aSEmmanuel Vadot	clkuart0: clkuart0@2350000 {
333f126890aSEmmanuel Vadot		#clock-cells = <0>;
334f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
335f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
336f126890aSEmmanuel Vadot		clock-output-names = "uart0";
337f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
338f126890aSEmmanuel Vadot		reg-names = "control", "domain";
339f126890aSEmmanuel Vadot		domain-id = <0>;
340f126890aSEmmanuel Vadot	};
341f126890aSEmmanuel Vadot
342f126890aSEmmanuel Vadot	clkuart1: clkuart1@2350000 {
343f126890aSEmmanuel Vadot		#clock-cells = <0>;
344f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
345f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
346f126890aSEmmanuel Vadot		clock-output-names = "uart1";
347f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
348f126890aSEmmanuel Vadot		reg-names = "control", "domain";
349f126890aSEmmanuel Vadot		domain-id = <0>;
350f126890aSEmmanuel Vadot	};
351f126890aSEmmanuel Vadot
352f126890aSEmmanuel Vadot	clkaemif: clkaemif@2350000 {
353f126890aSEmmanuel Vadot		#clock-cells = <0>;
354f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
355f126890aSEmmanuel Vadot		clocks = <&clkaemifspi>;
356f126890aSEmmanuel Vadot		clock-output-names = "aemif";
357f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
358f126890aSEmmanuel Vadot		reg-names = "control", "domain";
359f126890aSEmmanuel Vadot		domain-id = <0>;
360f126890aSEmmanuel Vadot	};
361f126890aSEmmanuel Vadot
362f126890aSEmmanuel Vadot	clkusim: clkusim@2350000 {
363f126890aSEmmanuel Vadot		#clock-cells = <0>;
364f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
365f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
366f126890aSEmmanuel Vadot		clock-output-names = "usim";
367f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
368f126890aSEmmanuel Vadot		reg-names = "control", "domain";
369f126890aSEmmanuel Vadot		domain-id = <0>;
370f126890aSEmmanuel Vadot	};
371f126890aSEmmanuel Vadot
372f126890aSEmmanuel Vadot	clki2c: clki2c@2350000 {
373f126890aSEmmanuel Vadot		#clock-cells = <0>;
374f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
375f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
376f126890aSEmmanuel Vadot		clock-output-names = "i2c";
377f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
378f126890aSEmmanuel Vadot		reg-names = "control", "domain";
379f126890aSEmmanuel Vadot		domain-id = <0>;
380f126890aSEmmanuel Vadot	};
381f126890aSEmmanuel Vadot
382f126890aSEmmanuel Vadot	clkspi: clkspi@2350000 {
383f126890aSEmmanuel Vadot		#clock-cells = <0>;
384f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
385f126890aSEmmanuel Vadot		clocks = <&clkaemifspi>;
386f126890aSEmmanuel Vadot		clock-output-names = "spi";
387f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
388f126890aSEmmanuel Vadot		reg-names = "control", "domain";
389f126890aSEmmanuel Vadot		domain-id = <0>;
390f126890aSEmmanuel Vadot	};
391f126890aSEmmanuel Vadot
392f126890aSEmmanuel Vadot	clkgpio: clkgpio@2350000 {
393f126890aSEmmanuel Vadot		#clock-cells = <0>;
394f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
395f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
396f126890aSEmmanuel Vadot		clock-output-names = "gpio";
397f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
398f126890aSEmmanuel Vadot		reg-names = "control", "domain";
399f126890aSEmmanuel Vadot		domain-id = <0>;
400f126890aSEmmanuel Vadot	};
401f126890aSEmmanuel Vadot
402f126890aSEmmanuel Vadot	clkkeymgr: clkkeymgr@2350000 {
403f126890aSEmmanuel Vadot		#clock-cells = <0>;
404f126890aSEmmanuel Vadot		compatible = "ti,keystone,psc-clock";
405f126890aSEmmanuel Vadot		clocks = <&clkmodrst0>;
406f126890aSEmmanuel Vadot		clock-output-names = "keymgr";
407f126890aSEmmanuel Vadot		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
408f126890aSEmmanuel Vadot		reg-names = "control", "domain";
409f126890aSEmmanuel Vadot		domain-id = <0>;
410f126890aSEmmanuel Vadot	};
411f126890aSEmmanuel Vadot
412f126890aSEmmanuel Vadot	/*
413f126890aSEmmanuel Vadot	 * Below are set of fixed, input clocks definitions,
414f126890aSEmmanuel Vadot	 * for which real frequencies have to be defined in board files.
415f126890aSEmmanuel Vadot	 * Those clocks can be used as reference clocks for some HW modules
416f126890aSEmmanuel Vadot	 * (as cpts, for example) by configuring corresponding clock muxes.
417f126890aSEmmanuel Vadot	 */
418f126890aSEmmanuel Vadot	timi0: timi0 {
419f126890aSEmmanuel Vadot		#clock-cells = <0>;
420f126890aSEmmanuel Vadot		compatible = "fixed-clock";
421f126890aSEmmanuel Vadot		clock-frequency = <0>;
422f126890aSEmmanuel Vadot		clock-output-names = "timi0";
423f126890aSEmmanuel Vadot	};
424f126890aSEmmanuel Vadot
425f126890aSEmmanuel Vadot	timi1: timi1 {
426f126890aSEmmanuel Vadot		#clock-cells = <0>;
427f126890aSEmmanuel Vadot		compatible = "fixed-clock";
428f126890aSEmmanuel Vadot		clock-frequency = <0>;
429f126890aSEmmanuel Vadot		clock-output-names = "timi1";
430f126890aSEmmanuel Vadot	};
431f126890aSEmmanuel Vadot
432f126890aSEmmanuel Vadot	tsrefclk: tsrefclk {
433f126890aSEmmanuel Vadot		#clock-cells = <0>;
434f126890aSEmmanuel Vadot		compatible = "fixed-clock";
435f126890aSEmmanuel Vadot		clock-frequency = <0>;
436f126890aSEmmanuel Vadot		clock-output-names = "tsrefclk";
437f126890aSEmmanuel Vadot	};
438f126890aSEmmanuel Vadot};
439