1*f126890aSEmmanuel Vadot /* SPDX-License-Identifier: GPL-2.0 */ 2*f126890aSEmmanuel Vadot /* 3*f126890aSEmmanuel Vadot * Samsung Exynos DTS pinctrl constants 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (c) 2016 Samsung Electronics Co., Ltd. 6*f126890aSEmmanuel Vadot * http://www.samsung.com 7*f126890aSEmmanuel Vadot * Copyright (c) 2022 Linaro Ltd 8*f126890aSEmmanuel Vadot * Author: Krzysztof Kozlowski <krzk@kernel.org> 9*f126890aSEmmanuel Vadot */ 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot #ifndef __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ 12*f126890aSEmmanuel Vadot #define __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ 13*f126890aSEmmanuel Vadot 14*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PULL_NONE 0 15*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PULL_DOWN 1 16*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PULL_UP 3 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot /* Pin function in power down mode */ 19*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PDN_OUT0 0 20*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PDN_OUT1 1 21*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PDN_INPUT 2 22*f126890aSEmmanuel Vadot #define EXYNOS_PIN_PDN_PREV 3 23*f126890aSEmmanuel Vadot 24*f126890aSEmmanuel Vadot /* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ 25*f126890aSEmmanuel Vadot #define EXYNOS4_PIN_DRV_LV1 0 26*f126890aSEmmanuel Vadot #define EXYNOS4_PIN_DRV_LV2 2 27*f126890aSEmmanuel Vadot #define EXYNOS4_PIN_DRV_LV3 1 28*f126890aSEmmanuel Vadot #define EXYNOS4_PIN_DRV_LV4 3 29*f126890aSEmmanuel Vadot 30*f126890aSEmmanuel Vadot /* Drive strengths for Exynos5260 */ 31*f126890aSEmmanuel Vadot #define EXYNOS5260_PIN_DRV_LV1 0 32*f126890aSEmmanuel Vadot #define EXYNOS5260_PIN_DRV_LV2 1 33*f126890aSEmmanuel Vadot #define EXYNOS5260_PIN_DRV_LV4 2 34*f126890aSEmmanuel Vadot #define EXYNOS5260_PIN_DRV_LV6 3 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot /* 37*f126890aSEmmanuel Vadot * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except 38*f126890aSEmmanuel Vadot * GPIO_HSI block) 39*f126890aSEmmanuel Vadot */ 40*f126890aSEmmanuel Vadot #define EXYNOS5420_PIN_DRV_LV1 0 41*f126890aSEmmanuel Vadot #define EXYNOS5420_PIN_DRV_LV2 1 42*f126890aSEmmanuel Vadot #define EXYNOS5420_PIN_DRV_LV3 2 43*f126890aSEmmanuel Vadot #define EXYNOS5420_PIN_DRV_LV4 3 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_INPUT 0 46*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_OUTPUT 1 47*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_2 2 48*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_3 3 49*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_4 4 50*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_5 5 51*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_6 6 52*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_EINT 0xf 53*f126890aSEmmanuel Vadot #define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot #endif /* __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ */ 56