1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (C) 2019 4*f126890aSEmmanuel Vadot * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> 5*f126890aSEmmanuel Vadot */ 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot/dts-v1/; 8*f126890aSEmmanuel Vadot#include "imxrt1050.dtsi" 9*f126890aSEmmanuel Vadot#include "imxrt1050-pinfunc.h" 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot/ { 12*f126890aSEmmanuel Vadot model = "NXP IMXRT1050-evk board"; 13*f126890aSEmmanuel Vadot compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050"; 14*f126890aSEmmanuel Vadot 15*f126890aSEmmanuel Vadot chosen { 16*f126890aSEmmanuel Vadot stdout-path = &lpuart1; 17*f126890aSEmmanuel Vadot }; 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot aliases { 20*f126890aSEmmanuel Vadot gpio0 = &gpio1; 21*f126890aSEmmanuel Vadot gpio1 = &gpio2; 22*f126890aSEmmanuel Vadot gpio2 = &gpio3; 23*f126890aSEmmanuel Vadot gpio3 = &gpio4; 24*f126890aSEmmanuel Vadot gpio4 = &gpio5; 25*f126890aSEmmanuel Vadot mmc0 = &usdhc1; 26*f126890aSEmmanuel Vadot serial0 = &lpuart1; 27*f126890aSEmmanuel Vadot }; 28*f126890aSEmmanuel Vadot 29*f126890aSEmmanuel Vadot memory@80000000 { 30*f126890aSEmmanuel Vadot device_type = "memory"; 31*f126890aSEmmanuel Vadot reg = <0x80000000 0x2000000>; 32*f126890aSEmmanuel Vadot }; 33*f126890aSEmmanuel Vadot}; 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadot&lpuart1 { 36*f126890aSEmmanuel Vadot pinctrl-names = "default"; 37*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_lpuart1>; 38*f126890aSEmmanuel Vadot status = "okay"; 39*f126890aSEmmanuel Vadot}; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot&iomuxc { 42*f126890aSEmmanuel Vadot pinctrl-names = "default"; 43*f126890aSEmmanuel Vadot pinctrl_lpuart1: lpuart1grp { 44*f126890aSEmmanuel Vadot fsl,pins = < 45*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0xf1 46*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0xf1 47*f126890aSEmmanuel Vadot >; 48*f126890aSEmmanuel Vadot }; 49*f126890aSEmmanuel Vadot 50*f126890aSEmmanuel Vadot pinctrl_usdhc0: usdhc0grp { 51*f126890aSEmmanuel Vadot fsl,pins = < 52*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1B000 53*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0xB069 54*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x17061 55*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x17061 56*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x17061 57*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x17061 58*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x17061 59*f126890aSEmmanuel Vadot MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x17061 60*f126890aSEmmanuel Vadot >; 61*f126890aSEmmanuel Vadot }; 62*f126890aSEmmanuel Vadot}; 63*f126890aSEmmanuel Vadot 64*f126890aSEmmanuel Vadot&usdhc1 { 65*f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 66*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc0>; 67*f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc0>; 68*f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc0>; 69*f126890aSEmmanuel Vadot pinctrl-3 = <&pinctrl_usdhc0>; 70*f126890aSEmmanuel Vadot cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; 71*f126890aSEmmanuel Vadot status = "okay"; 72*f126890aSEmmanuel Vadot}; 73