1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2f126890aSEmmanuel Vadot// 3f126890aSEmmanuel Vadot// Copyright (C) 2015 Freescale Semiconductor, Inc. 4f126890aSEmmanuel Vadot 5f126890aSEmmanuel Vadot#include <dt-bindings/media/video-interfaces.h> 6f126890aSEmmanuel Vadot 7f126890aSEmmanuel Vadot/ { 8f126890aSEmmanuel Vadot chosen { 9f126890aSEmmanuel Vadot stdout-path = &uart1; 10f126890aSEmmanuel Vadot }; 11f126890aSEmmanuel Vadot 12f126890aSEmmanuel Vadot memory@80000000 { 13f126890aSEmmanuel Vadot device_type = "memory"; 14f126890aSEmmanuel Vadot reg = <0x80000000 0x20000000>; 15f126890aSEmmanuel Vadot }; 16f126890aSEmmanuel Vadot 17f126890aSEmmanuel Vadot backlight_display: backlight-display { 18f126890aSEmmanuel Vadot compatible = "pwm-backlight"; 197d0873ebSEmmanuel Vadot pwms = <&pwm1 0 5000000 0>; 20f126890aSEmmanuel Vadot brightness-levels = <0 4 8 16 32 64 128 255>; 21f126890aSEmmanuel Vadot default-brightness-level = <6>; 22f126890aSEmmanuel Vadot status = "okay"; 23f126890aSEmmanuel Vadot }; 24f126890aSEmmanuel Vadot 25f126890aSEmmanuel Vadot 26f126890aSEmmanuel Vadot reg_sd1_vmmc: regulator-sd1-vmmc { 27f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 28f126890aSEmmanuel Vadot regulator-name = "VSD_3V3"; 29f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 30f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 31f126890aSEmmanuel Vadot gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; 32f126890aSEmmanuel Vadot enable-active-high; 33f126890aSEmmanuel Vadot }; 34f126890aSEmmanuel Vadot 35f126890aSEmmanuel Vadot reg_peri_3v3: regulator-peri-3v3 { 36f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 37f126890aSEmmanuel Vadot pinctrl-names = "default"; 38f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_peri_3v3>; 39f126890aSEmmanuel Vadot regulator-name = "VPERI_3V3"; 40f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 41f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 42f126890aSEmmanuel Vadot gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; 43f126890aSEmmanuel Vadot /* 44f126890aSEmmanuel Vadot * If you want to want to make this dynamic please 45f126890aSEmmanuel Vadot * check schematics and test all affected peripherals: 46f126890aSEmmanuel Vadot * 47f126890aSEmmanuel Vadot * - sensors 48f126890aSEmmanuel Vadot * - ethernet phy 49f126890aSEmmanuel Vadot * - can 50f126890aSEmmanuel Vadot * - bluetooth 51f126890aSEmmanuel Vadot * - wm8960 audio codec 52f126890aSEmmanuel Vadot * - ov5640 camera 53f126890aSEmmanuel Vadot */ 54f126890aSEmmanuel Vadot regulator-always-on; 55f126890aSEmmanuel Vadot }; 56f126890aSEmmanuel Vadot 57f126890aSEmmanuel Vadot reg_can_3v3: regulator-can-3v3 { 58f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 59f126890aSEmmanuel Vadot regulator-name = "can-3v3"; 60f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 61f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 62f126890aSEmmanuel Vadot gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; 63f126890aSEmmanuel Vadot }; 64f126890aSEmmanuel Vadot 65f126890aSEmmanuel Vadot sound-wm8960 { 66f126890aSEmmanuel Vadot compatible = "fsl,imx-audio-wm8960"; 67f126890aSEmmanuel Vadot model = "wm8960-audio"; 68f126890aSEmmanuel Vadot audio-cpu = <&sai2>; 69f126890aSEmmanuel Vadot audio-codec = <&codec>; 70f126890aSEmmanuel Vadot audio-asrc = <&asrc>; 71f126890aSEmmanuel Vadot hp-det-gpio = <&gpio5 4 0>; 72f126890aSEmmanuel Vadot audio-routing = 73f126890aSEmmanuel Vadot "Headphone Jack", "HP_L", 74f126890aSEmmanuel Vadot "Headphone Jack", "HP_R", 75f126890aSEmmanuel Vadot "Ext Spk", "SPK_LP", 76f126890aSEmmanuel Vadot "Ext Spk", "SPK_LN", 77f126890aSEmmanuel Vadot "Ext Spk", "SPK_RP", 78f126890aSEmmanuel Vadot "Ext Spk", "SPK_RN", 79f126890aSEmmanuel Vadot "LINPUT2", "Mic Jack", 80f126890aSEmmanuel Vadot "LINPUT3", "Mic Jack", 81f126890aSEmmanuel Vadot "RINPUT1", "AMIC", 82f126890aSEmmanuel Vadot "RINPUT2", "AMIC", 83f126890aSEmmanuel Vadot "Mic Jack", "MICB", 84f126890aSEmmanuel Vadot "AMIC", "MICB"; 85f126890aSEmmanuel Vadot }; 86f126890aSEmmanuel Vadot 87f126890aSEmmanuel Vadot spi-4 { 88f126890aSEmmanuel Vadot compatible = "spi-gpio"; 89f126890aSEmmanuel Vadot pinctrl-names = "default"; 90f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_spi4>; 91f126890aSEmmanuel Vadot status = "okay"; 92f126890aSEmmanuel Vadot sck-gpios = <&gpio5 11 0>; 93f126890aSEmmanuel Vadot mosi-gpios = <&gpio5 10 0>; 94f126890aSEmmanuel Vadot cs-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>; 95f126890aSEmmanuel Vadot num-chipselects = <1>; 96f126890aSEmmanuel Vadot #address-cells = <1>; 97f126890aSEmmanuel Vadot #size-cells = <0>; 98f126890aSEmmanuel Vadot 99f126890aSEmmanuel Vadot gpio_spi: gpio@0 { 100f126890aSEmmanuel Vadot compatible = "fairchild,74hc595"; 101f126890aSEmmanuel Vadot gpio-controller; 102f126890aSEmmanuel Vadot #gpio-cells = <2>; 103f126890aSEmmanuel Vadot reg = <0>; 104f126890aSEmmanuel Vadot registers-number = <1>; 105f126890aSEmmanuel Vadot spi-max-frequency = <100000>; 106f126890aSEmmanuel Vadot enable-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 107f126890aSEmmanuel Vadot }; 108f126890aSEmmanuel Vadot }; 109f126890aSEmmanuel Vadot 110f126890aSEmmanuel Vadot panel { 111f126890aSEmmanuel Vadot compatible = "innolux,at043tn24"; 112f126890aSEmmanuel Vadot backlight = <&backlight_display>; 113f126890aSEmmanuel Vadot 114f126890aSEmmanuel Vadot port { 115f126890aSEmmanuel Vadot panel_in: endpoint { 116f126890aSEmmanuel Vadot remote-endpoint = <&display_out>; 117f126890aSEmmanuel Vadot }; 118f126890aSEmmanuel Vadot }; 119f126890aSEmmanuel Vadot }; 120f126890aSEmmanuel Vadot}; 121f126890aSEmmanuel Vadot 122f126890aSEmmanuel Vadot&clks { 123f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; 124f126890aSEmmanuel Vadot assigned-clock-rates = <786432000>; 125f126890aSEmmanuel Vadot}; 126f126890aSEmmanuel Vadot 127f126890aSEmmanuel Vadot&i2c2 { 128f126890aSEmmanuel Vadot clock-frequency = <100000>; 129f126890aSEmmanuel Vadot pinctrl-names = "default"; 130f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 131f126890aSEmmanuel Vadot status = "okay"; 132f126890aSEmmanuel Vadot 133f126890aSEmmanuel Vadot codec: wm8960@1a { 134f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 135f126890aSEmmanuel Vadot compatible = "wlf,wm8960"; 136f126890aSEmmanuel Vadot reg = <0x1a>; 137f126890aSEmmanuel Vadot wlf,shared-lrclk; 138f126890aSEmmanuel Vadot wlf,hp-cfg = <3 2 3>; 139f126890aSEmmanuel Vadot wlf,gpio-cfg = <1 3>; 140f126890aSEmmanuel Vadot clocks = <&clks IMX6UL_CLK_SAI2>; 141f126890aSEmmanuel Vadot clock-names = "mclk"; 142f126890aSEmmanuel Vadot }; 143f126890aSEmmanuel Vadot 144f126890aSEmmanuel Vadot camera@3c { 145f126890aSEmmanuel Vadot compatible = "ovti,ov5640"; 146f126890aSEmmanuel Vadot reg = <0x3c>; 147f126890aSEmmanuel Vadot pinctrl-names = "default"; 148f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_camera_clock>; 149f126890aSEmmanuel Vadot clocks = <&clks IMX6UL_CLK_CSI>; 150f126890aSEmmanuel Vadot clock-names = "xclk"; 151f126890aSEmmanuel Vadot powerdown-gpios = <&gpio_spi 6 GPIO_ACTIVE_HIGH>; 152f126890aSEmmanuel Vadot reset-gpios = <&gpio_spi 5 GPIO_ACTIVE_LOW>; 153f126890aSEmmanuel Vadot 154f126890aSEmmanuel Vadot port { 155f126890aSEmmanuel Vadot ov5640_to_parallel: endpoint { 156f126890aSEmmanuel Vadot remote-endpoint = <¶llel_from_ov5640>; 157f126890aSEmmanuel Vadot bus-width = <8>; 158f126890aSEmmanuel Vadot data-shift = <2>; /* lines 9:2 are used */ 159f126890aSEmmanuel Vadot hsync-active = <0>; 160f126890aSEmmanuel Vadot vsync-active = <0>; 161f126890aSEmmanuel Vadot pclk-sample = <1>; 162f126890aSEmmanuel Vadot }; 163f126890aSEmmanuel Vadot }; 164f126890aSEmmanuel Vadot }; 165f126890aSEmmanuel Vadot}; 166f126890aSEmmanuel Vadot 167f126890aSEmmanuel Vadot&csi { 168f126890aSEmmanuel Vadot pinctrl-names = "default"; 169f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_csi1>; 170f126890aSEmmanuel Vadot status = "okay"; 171f126890aSEmmanuel Vadot 172f126890aSEmmanuel Vadot port { 173f126890aSEmmanuel Vadot parallel_from_ov5640: endpoint { 174f126890aSEmmanuel Vadot remote-endpoint = <&ov5640_to_parallel>; 175f126890aSEmmanuel Vadot bus-type = <MEDIA_BUS_TYPE_PARALLEL>; 176f126890aSEmmanuel Vadot }; 177f126890aSEmmanuel Vadot }; 178f126890aSEmmanuel Vadot}; 179f126890aSEmmanuel Vadot 180f126890aSEmmanuel Vadot&fec1 { 181f126890aSEmmanuel Vadot pinctrl-names = "default"; 182f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet1>; 183f126890aSEmmanuel Vadot phy-mode = "rmii"; 184f126890aSEmmanuel Vadot phy-handle = <ðphy0>; 185f126890aSEmmanuel Vadot phy-supply = <®_peri_3v3>; 186f126890aSEmmanuel Vadot status = "okay"; 187f126890aSEmmanuel Vadot}; 188f126890aSEmmanuel Vadot 189f126890aSEmmanuel Vadot&fec2 { 190f126890aSEmmanuel Vadot pinctrl-names = "default"; 191f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet2>; 192f126890aSEmmanuel Vadot phy-mode = "rmii"; 193f126890aSEmmanuel Vadot phy-handle = <ðphy1>; 194f126890aSEmmanuel Vadot phy-supply = <®_peri_3v3>; 195f126890aSEmmanuel Vadot status = "okay"; 196f126890aSEmmanuel Vadot 197f126890aSEmmanuel Vadot mdio { 198f126890aSEmmanuel Vadot #address-cells = <1>; 199f126890aSEmmanuel Vadot #size-cells = <0>; 200f126890aSEmmanuel Vadot 201f126890aSEmmanuel Vadot ethphy0: ethernet-phy@2 { 202f126890aSEmmanuel Vadot compatible = "ethernet-phy-id0022.1560"; 203f126890aSEmmanuel Vadot reg = <2>; 204f126890aSEmmanuel Vadot micrel,led-mode = <1>; 205f126890aSEmmanuel Vadot clocks = <&clks IMX6UL_CLK_ENET_REF>; 206f126890aSEmmanuel Vadot clock-names = "rmii-ref"; 207f126890aSEmmanuel Vadot 208f126890aSEmmanuel Vadot }; 209f126890aSEmmanuel Vadot 210f126890aSEmmanuel Vadot ethphy1: ethernet-phy@1 { 211f126890aSEmmanuel Vadot compatible = "ethernet-phy-id0022.1560"; 212f126890aSEmmanuel Vadot reg = <1>; 213f126890aSEmmanuel Vadot micrel,led-mode = <1>; 214f126890aSEmmanuel Vadot clocks = <&clks IMX6UL_CLK_ENET2_REF>; 215f126890aSEmmanuel Vadot clock-names = "rmii-ref"; 216f126890aSEmmanuel Vadot }; 217f126890aSEmmanuel Vadot }; 218f126890aSEmmanuel Vadot}; 219f126890aSEmmanuel Vadot 220f126890aSEmmanuel Vadot&can1 { 221f126890aSEmmanuel Vadot pinctrl-names = "default"; 222f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan1>; 223f126890aSEmmanuel Vadot xceiver-supply = <®_can_3v3>; 224f126890aSEmmanuel Vadot status = "okay"; 225f126890aSEmmanuel Vadot}; 226f126890aSEmmanuel Vadot 227f126890aSEmmanuel Vadot&can2 { 228f126890aSEmmanuel Vadot pinctrl-names = "default"; 229f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_flexcan2>; 230f126890aSEmmanuel Vadot xceiver-supply = <®_can_3v3>; 231f126890aSEmmanuel Vadot status = "okay"; 232f126890aSEmmanuel Vadot}; 233f126890aSEmmanuel Vadot 234f126890aSEmmanuel Vadot&gpio_spi { 235f126890aSEmmanuel Vadot eth0-phy-hog { 236f126890aSEmmanuel Vadot gpio-hog; 237f126890aSEmmanuel Vadot gpios = <1 GPIO_ACTIVE_HIGH>; 238f126890aSEmmanuel Vadot output-high; 239f126890aSEmmanuel Vadot line-name = "eth0-phy"; 240f126890aSEmmanuel Vadot }; 241f126890aSEmmanuel Vadot 242f126890aSEmmanuel Vadot eth1-phy-hog { 243f126890aSEmmanuel Vadot gpio-hog; 244f126890aSEmmanuel Vadot gpios = <2 GPIO_ACTIVE_HIGH>; 245f126890aSEmmanuel Vadot output-high; 246f126890aSEmmanuel Vadot line-name = "eth1-phy"; 247f126890aSEmmanuel Vadot }; 248f126890aSEmmanuel Vadot}; 249f126890aSEmmanuel Vadot 250f126890aSEmmanuel Vadot&i2c1 { 251f126890aSEmmanuel Vadot clock-frequency = <100000>; 252f126890aSEmmanuel Vadot pinctrl-names = "default"; 253f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 254f126890aSEmmanuel Vadot status = "okay"; 255f126890aSEmmanuel Vadot 256f126890aSEmmanuel Vadot magnetometer@e { 257f126890aSEmmanuel Vadot compatible = "fsl,mag3110"; 258f126890aSEmmanuel Vadot reg = <0x0e>; 259f126890aSEmmanuel Vadot vdd-supply = <®_peri_3v3>; 260f126890aSEmmanuel Vadot vddio-supply = <®_peri_3v3>; 261f126890aSEmmanuel Vadot }; 262f126890aSEmmanuel Vadot}; 263f126890aSEmmanuel Vadot 264f126890aSEmmanuel Vadot&lcdif { 265f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; 266f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; 267f126890aSEmmanuel Vadot pinctrl-names = "default"; 268f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_lcdif_dat 269f126890aSEmmanuel Vadot &pinctrl_lcdif_ctrl>; 270f126890aSEmmanuel Vadot status = "okay"; 271f126890aSEmmanuel Vadot 272f126890aSEmmanuel Vadot port { 273f126890aSEmmanuel Vadot display_out: endpoint { 274f126890aSEmmanuel Vadot remote-endpoint = <&panel_in>; 275f126890aSEmmanuel Vadot }; 276f126890aSEmmanuel Vadot }; 277f126890aSEmmanuel Vadot}; 278f126890aSEmmanuel Vadot 279f126890aSEmmanuel Vadot&pwm1 { 280f126890aSEmmanuel Vadot pinctrl-names = "default"; 281f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm1>; 282f126890aSEmmanuel Vadot status = "okay"; 283f126890aSEmmanuel Vadot}; 284f126890aSEmmanuel Vadot 285f126890aSEmmanuel Vadot&qspi { 286f126890aSEmmanuel Vadot pinctrl-names = "default"; 287f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_qspi>; 288f126890aSEmmanuel Vadot status = "okay"; 289f126890aSEmmanuel Vadot 290f126890aSEmmanuel Vadot flash0: flash@0 { 291f126890aSEmmanuel Vadot #address-cells = <1>; 292f126890aSEmmanuel Vadot #size-cells = <1>; 293f126890aSEmmanuel Vadot compatible = "micron,n25q256a", "jedec,spi-nor"; 294f126890aSEmmanuel Vadot spi-max-frequency = <29000000>; 295f126890aSEmmanuel Vadot spi-rx-bus-width = <4>; 296f126890aSEmmanuel Vadot spi-tx-bus-width = <1>; 297f126890aSEmmanuel Vadot reg = <0>; 298f126890aSEmmanuel Vadot }; 299f126890aSEmmanuel Vadot}; 300f126890aSEmmanuel Vadot 301f126890aSEmmanuel Vadot&sai2 { 302f126890aSEmmanuel Vadot pinctrl-names = "default"; 303f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sai2>; 304f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, 305f126890aSEmmanuel Vadot <&clks IMX6UL_CLK_SAI2>; 306f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; 307f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <12288000>; 308f126890aSEmmanuel Vadot fsl,sai-mclk-direction-output; 309f126890aSEmmanuel Vadot status = "okay"; 310f126890aSEmmanuel Vadot}; 311f126890aSEmmanuel Vadot 312f126890aSEmmanuel Vadot&snvs_poweroff { 313f126890aSEmmanuel Vadot status = "okay"; 314f126890aSEmmanuel Vadot}; 315f126890aSEmmanuel Vadot 316f126890aSEmmanuel Vadot&snvs_pwrkey { 317f126890aSEmmanuel Vadot status = "okay"; 318f126890aSEmmanuel Vadot}; 319f126890aSEmmanuel Vadot 320f126890aSEmmanuel Vadot&tsc { 321f126890aSEmmanuel Vadot pinctrl-names = "default"; 322f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tsc>; 32301950c46SEmmanuel Vadot xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 324f126890aSEmmanuel Vadot measure-delay-time = <0xffff>; 325f126890aSEmmanuel Vadot pre-charge-time = <0xfff>; 326f126890aSEmmanuel Vadot status = "okay"; 327f126890aSEmmanuel Vadot}; 328f126890aSEmmanuel Vadot 329f126890aSEmmanuel Vadot&uart1 { 330f126890aSEmmanuel Vadot pinctrl-names = "default"; 331f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 332f126890aSEmmanuel Vadot status = "okay"; 333f126890aSEmmanuel Vadot}; 334f126890aSEmmanuel Vadot 335f126890aSEmmanuel Vadot&uart2 { 336f126890aSEmmanuel Vadot pinctrl-names = "default"; 337f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 338f126890aSEmmanuel Vadot uart-has-rtscts; 339f126890aSEmmanuel Vadot status = "okay"; 340f126890aSEmmanuel Vadot}; 341f126890aSEmmanuel Vadot 342f126890aSEmmanuel Vadot&usbotg1 { 343f126890aSEmmanuel Vadot dr_mode = "otg"; 344f126890aSEmmanuel Vadot pinctrl-names = "default"; 345f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usb_otg1>; 346f126890aSEmmanuel Vadot status = "okay"; 347f126890aSEmmanuel Vadot}; 348f126890aSEmmanuel Vadot 349f126890aSEmmanuel Vadot&usbotg2 { 350f126890aSEmmanuel Vadot dr_mode = "host"; 351f126890aSEmmanuel Vadot disable-over-current; 352f126890aSEmmanuel Vadot status = "okay"; 353f126890aSEmmanuel Vadot}; 354f126890aSEmmanuel Vadot 355f126890aSEmmanuel Vadot&usbphy1 { 356f126890aSEmmanuel Vadot fsl,tx-d-cal = <106>; 357f126890aSEmmanuel Vadot}; 358f126890aSEmmanuel Vadot 359f126890aSEmmanuel Vadot&usbphy2 { 360f126890aSEmmanuel Vadot fsl,tx-d-cal = <106>; 361f126890aSEmmanuel Vadot}; 362f126890aSEmmanuel Vadot 363f126890aSEmmanuel Vadot&usdhc1 { 364f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 365f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 366f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 367f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 368f126890aSEmmanuel Vadot cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 369f126890aSEmmanuel Vadot keep-power-in-suspend; 370f126890aSEmmanuel Vadot wakeup-source; 371f126890aSEmmanuel Vadot vmmc-supply = <®_sd1_vmmc>; 372f126890aSEmmanuel Vadot status = "okay"; 373f126890aSEmmanuel Vadot}; 374f126890aSEmmanuel Vadot 375f126890aSEmmanuel Vadot&usdhc2 { 376f126890aSEmmanuel Vadot pinctrl-names = "default"; 377f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>; 378f126890aSEmmanuel Vadot no-1-8-v; 379f126890aSEmmanuel Vadot broken-cd; 380f126890aSEmmanuel Vadot keep-power-in-suspend; 381f126890aSEmmanuel Vadot wakeup-source; 382f126890aSEmmanuel Vadot status = "okay"; 383f126890aSEmmanuel Vadot}; 384f126890aSEmmanuel Vadot 385f126890aSEmmanuel Vadot&wdog1 { 386f126890aSEmmanuel Vadot pinctrl-names = "default"; 387f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 388f126890aSEmmanuel Vadot fsl,ext-reset-output; 389f126890aSEmmanuel Vadot}; 390f126890aSEmmanuel Vadot 391f126890aSEmmanuel Vadot&iomuxc { 392f126890aSEmmanuel Vadot pinctrl-names = "default"; 393f126890aSEmmanuel Vadot 394f126890aSEmmanuel Vadot pinctrl_camera_clock: cameraclockgrp { 395f126890aSEmmanuel Vadot fsl,pins = < 396f126890aSEmmanuel Vadot MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 397f126890aSEmmanuel Vadot >; 398f126890aSEmmanuel Vadot }; 399f126890aSEmmanuel Vadot 400f126890aSEmmanuel Vadot pinctrl_csi1: csi1grp { 401f126890aSEmmanuel Vadot fsl,pins = < 402f126890aSEmmanuel Vadot MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 403f126890aSEmmanuel Vadot MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 404f126890aSEmmanuel Vadot MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 405f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 406f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 407f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 408f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 409f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 410f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 411f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 412f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 413f126890aSEmmanuel Vadot >; 414f126890aSEmmanuel Vadot }; 415f126890aSEmmanuel Vadot 416f126890aSEmmanuel Vadot pinctrl_enet1: enet1grp { 417f126890aSEmmanuel Vadot fsl,pins = < 418f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 419f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 420f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 421f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 422f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 423f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 424f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 425f126890aSEmmanuel Vadot MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 426f126890aSEmmanuel Vadot >; 427f126890aSEmmanuel Vadot }; 428f126890aSEmmanuel Vadot 429f126890aSEmmanuel Vadot pinctrl_enet2: enet2grp { 430f126890aSEmmanuel Vadot fsl,pins = < 431f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 432f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 433f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 434f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 435f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 436f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 437f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 438f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 439f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 440f126890aSEmmanuel Vadot MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 441f126890aSEmmanuel Vadot >; 442f126890aSEmmanuel Vadot }; 443f126890aSEmmanuel Vadot 444f126890aSEmmanuel Vadot pinctrl_flexcan1: flexcan1grp { 445f126890aSEmmanuel Vadot fsl,pins = < 446f126890aSEmmanuel Vadot MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 447f126890aSEmmanuel Vadot MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 448f126890aSEmmanuel Vadot >; 449f126890aSEmmanuel Vadot }; 450f126890aSEmmanuel Vadot 451f126890aSEmmanuel Vadot pinctrl_flexcan2: flexcan2grp { 452f126890aSEmmanuel Vadot fsl,pins = < 453f126890aSEmmanuel Vadot MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 454f126890aSEmmanuel Vadot MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 455f126890aSEmmanuel Vadot >; 456f126890aSEmmanuel Vadot }; 457f126890aSEmmanuel Vadot 458f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 459f126890aSEmmanuel Vadot fsl,pins = < 460f126890aSEmmanuel Vadot MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 461f126890aSEmmanuel Vadot MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 462f126890aSEmmanuel Vadot >; 463f126890aSEmmanuel Vadot }; 464f126890aSEmmanuel Vadot 465f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 466f126890aSEmmanuel Vadot fsl,pins = < 467f126890aSEmmanuel Vadot MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 468f126890aSEmmanuel Vadot MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 469f126890aSEmmanuel Vadot >; 470f126890aSEmmanuel Vadot }; 471f126890aSEmmanuel Vadot 472f126890aSEmmanuel Vadot pinctrl_lcdif_dat: lcdifdatgrp { 473f126890aSEmmanuel Vadot fsl,pins = < 474f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 475f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 476f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 477f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 478f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 479f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 480f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 481f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 482f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 483f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 484f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 485f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 486f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 487f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 488f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 489f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 490f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 491f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 492f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 493f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 494f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 495f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 496f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 497f126890aSEmmanuel Vadot MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 498f126890aSEmmanuel Vadot >; 499f126890aSEmmanuel Vadot }; 500f126890aSEmmanuel Vadot 501f126890aSEmmanuel Vadot pinctrl_lcdif_ctrl: lcdifctrlgrp { 502f126890aSEmmanuel Vadot fsl,pins = < 503f126890aSEmmanuel Vadot MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 504f126890aSEmmanuel Vadot MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 505f126890aSEmmanuel Vadot MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 506f126890aSEmmanuel Vadot MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 507f126890aSEmmanuel Vadot /* used for lcd reset */ 508f126890aSEmmanuel Vadot MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79 509f126890aSEmmanuel Vadot >; 510f126890aSEmmanuel Vadot }; 511f126890aSEmmanuel Vadot 512f126890aSEmmanuel Vadot pinctrl_qspi: qspigrp { 513f126890aSEmmanuel Vadot fsl,pins = < 514f126890aSEmmanuel Vadot MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 515f126890aSEmmanuel Vadot MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 516f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 517f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 518f126890aSEmmanuel Vadot MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 519f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 520f126890aSEmmanuel Vadot >; 521f126890aSEmmanuel Vadot }; 522f126890aSEmmanuel Vadot 523f126890aSEmmanuel Vadot pinctrl_sai2: sai2grp { 524f126890aSEmmanuel Vadot fsl,pins = < 525f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 526f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 527f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 528f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 529f126890aSEmmanuel Vadot MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 530f126890aSEmmanuel Vadot MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059 531f126890aSEmmanuel Vadot >; 532f126890aSEmmanuel Vadot }; 533f126890aSEmmanuel Vadot 534f126890aSEmmanuel Vadot pinctrl_peri_3v3: peri3v3grp { 535f126890aSEmmanuel Vadot fsl,pins = < 536f126890aSEmmanuel Vadot MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 537f126890aSEmmanuel Vadot >; 538f126890aSEmmanuel Vadot }; 539f126890aSEmmanuel Vadot 540f126890aSEmmanuel Vadot pinctrl_pwm1: pwm1grp { 541f126890aSEmmanuel Vadot fsl,pins = < 542f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 543f126890aSEmmanuel Vadot >; 544f126890aSEmmanuel Vadot }; 545f126890aSEmmanuel Vadot 546f126890aSEmmanuel Vadot pinctrl_sim2: sim2grp { 547f126890aSEmmanuel Vadot fsl,pins = < 548f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD 0xb808 549f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK 0x31 550f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B 0xb808 551f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN 0xb808 552f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD 0xb809 553f126890aSEmmanuel Vadot MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x3008 554f126890aSEmmanuel Vadot >; 555f126890aSEmmanuel Vadot }; 556f126890aSEmmanuel Vadot 557f126890aSEmmanuel Vadot pinctrl_spi4: spi4grp { 558f126890aSEmmanuel Vadot fsl,pins = < 559f126890aSEmmanuel Vadot MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 560f126890aSEmmanuel Vadot MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 561f126890aSEmmanuel Vadot MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 562f126890aSEmmanuel Vadot MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 563f126890aSEmmanuel Vadot >; 564f126890aSEmmanuel Vadot }; 565f126890aSEmmanuel Vadot 566f126890aSEmmanuel Vadot pinctrl_tsc: tscgrp { 567f126890aSEmmanuel Vadot fsl,pins = < 568f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 569f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 570f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 571f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 572f126890aSEmmanuel Vadot >; 573f126890aSEmmanuel Vadot }; 574f126890aSEmmanuel Vadot 575f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 576f126890aSEmmanuel Vadot fsl,pins = < 577f126890aSEmmanuel Vadot MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 578f126890aSEmmanuel Vadot MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 579f126890aSEmmanuel Vadot >; 580f126890aSEmmanuel Vadot }; 581f126890aSEmmanuel Vadot 582f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 583f126890aSEmmanuel Vadot fsl,pins = < 584f126890aSEmmanuel Vadot MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 585f126890aSEmmanuel Vadot MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 586f126890aSEmmanuel Vadot MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 587f126890aSEmmanuel Vadot MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 588f126890aSEmmanuel Vadot >; 589f126890aSEmmanuel Vadot }; 590f126890aSEmmanuel Vadot 591f126890aSEmmanuel Vadot pinctrl_usb_otg1: usbotg1grp { 592f126890aSEmmanuel Vadot fsl,pins = < 593f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 594f126890aSEmmanuel Vadot >; 595f126890aSEmmanuel Vadot }; 596f126890aSEmmanuel Vadot 597f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 598f126890aSEmmanuel Vadot fsl,pins = < 599f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 600f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 601f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 602f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 603f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 604f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 605f126890aSEmmanuel Vadot MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ 606f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ 607f126890aSEmmanuel Vadot MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ 608f126890aSEmmanuel Vadot >; 609f126890aSEmmanuel Vadot }; 610f126890aSEmmanuel Vadot 611*b2d2a78aSEmmanuel Vadot pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { 612f126890aSEmmanuel Vadot fsl,pins = < 613f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 614f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 615f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 616f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 617f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 618f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 619f126890aSEmmanuel Vadot 620f126890aSEmmanuel Vadot >; 621f126890aSEmmanuel Vadot }; 622f126890aSEmmanuel Vadot 623*b2d2a78aSEmmanuel Vadot pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { 624f126890aSEmmanuel Vadot fsl,pins = < 625f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 626f126890aSEmmanuel Vadot MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 627f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 628f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 629f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 630f126890aSEmmanuel Vadot MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 631f126890aSEmmanuel Vadot >; 632f126890aSEmmanuel Vadot }; 633f126890aSEmmanuel Vadot 634f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 635f126890aSEmmanuel Vadot fsl,pins = < 636f126890aSEmmanuel Vadot MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 637f126890aSEmmanuel Vadot MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 638f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 639f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 640f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 641f126890aSEmmanuel Vadot MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 642f126890aSEmmanuel Vadot >; 643f126890aSEmmanuel Vadot }; 644f126890aSEmmanuel Vadot 645f126890aSEmmanuel Vadot pinctrl_wdog: wdoggrp { 646f126890aSEmmanuel Vadot fsl,pins = < 647f126890aSEmmanuel Vadot MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 648f126890aSEmmanuel Vadot >; 649f126890aSEmmanuel Vadot }; 650f126890aSEmmanuel Vadot}; 651