1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (C) 2016-2017 Zodiac Inflight Innovations 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 7*f126890aSEmmanuel Vadot#include <dt-bindings/sound/fsl-imx-audmux.h> 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot/ { 10*f126890aSEmmanuel Vadot chosen { 11*f126890aSEmmanuel Vadot stdout-path = &uart1; 12*f126890aSEmmanuel Vadot }; 13*f126890aSEmmanuel Vadot 14*f126890aSEmmanuel Vadot aliases { 15*f126890aSEmmanuel Vadot mdio-gpio0 = &mdio1; 16*f126890aSEmmanuel Vadot rtc0 = &ds1341; 17*f126890aSEmmanuel Vadot }; 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot mdio1: mdio { 20*f126890aSEmmanuel Vadot compatible = "virtual,mdio-gpio"; 21*f126890aSEmmanuel Vadot #address-cells = <1>; 22*f126890aSEmmanuel Vadot #size-cells = <0>; 23*f126890aSEmmanuel Vadot pinctrl-names = "default"; 24*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_mdio1>; 25*f126890aSEmmanuel Vadot gpios = <&gpio6 5 GPIO_ACTIVE_HIGH 26*f126890aSEmmanuel Vadot &gpio6 4 GPIO_ACTIVE_HIGH>; 27*f126890aSEmmanuel Vadot 28*f126890aSEmmanuel Vadot phy: ethernet-phy@0 { 29*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_rmii_phy_irq>; 30*f126890aSEmmanuel Vadot pinctrl-names = "default"; 31*f126890aSEmmanuel Vadot reg = <0>; 32*f126890aSEmmanuel Vadot interrupt-parent = <&gpio3>; 33*f126890aSEmmanuel Vadot interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 34*f126890aSEmmanuel Vadot }; 35*f126890aSEmmanuel Vadot }; 36*f126890aSEmmanuel Vadot 37*f126890aSEmmanuel Vadot reg_28p0v: regulator-28p0v { 38*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 39*f126890aSEmmanuel Vadot regulator-name = "28V_IN"; 40*f126890aSEmmanuel Vadot regulator-min-microvolt = <28000000>; 41*f126890aSEmmanuel Vadot regulator-max-microvolt = <28000000>; 42*f126890aSEmmanuel Vadot regulator-always-on; 43*f126890aSEmmanuel Vadot }; 44*f126890aSEmmanuel Vadot 45*f126890aSEmmanuel Vadot reg_12p0v: regulator-12p0v { 46*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 47*f126890aSEmmanuel Vadot vin-supply = <®_28p0v>; 48*f126890aSEmmanuel Vadot regulator-name = "12V_MAIN"; 49*f126890aSEmmanuel Vadot regulator-min-microvolt = <12000000>; 50*f126890aSEmmanuel Vadot regulator-max-microvolt = <12000000>; 51*f126890aSEmmanuel Vadot regulator-always-on; 52*f126890aSEmmanuel Vadot }; 53*f126890aSEmmanuel Vadot 54*f126890aSEmmanuel Vadot reg_5p0v_main: regulator-5p0v-main { 55*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 56*f126890aSEmmanuel Vadot vin-supply = <®_12p0v>; 57*f126890aSEmmanuel Vadot regulator-name = "5V_MAIN"; 58*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 59*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 60*f126890aSEmmanuel Vadot regulator-always-on; 61*f126890aSEmmanuel Vadot }; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot reg_3p3v_pmic: regulator-3p3v-pmic { 64*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 65*f126890aSEmmanuel Vadot vin-supply = <®_12p0v>; 66*f126890aSEmmanuel Vadot regulator-name = "PMIC_3V3"; 67*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 68*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 69*f126890aSEmmanuel Vadot regulator-always-on; 70*f126890aSEmmanuel Vadot }; 71*f126890aSEmmanuel Vadot 72*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 73*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 74*f126890aSEmmanuel Vadot vin-supply = <®_3p3v_pmic>; 75*f126890aSEmmanuel Vadot regulator-name = "GEN_3V3"; 76*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 77*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 78*f126890aSEmmanuel Vadot regulator-always-on; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot 81*f126890aSEmmanuel Vadot reg_3p3v_sd: regulator-3p3v-sd { 82*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 83*f126890aSEmmanuel Vadot pinctrl-names = "default"; 84*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_reg_3p3v_sd>; 85*f126890aSEmmanuel Vadot vin-supply = <®_3p3v>; 86*f126890aSEmmanuel Vadot regulator-name = "3V3_SD"; 87*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 88*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 89*f126890aSEmmanuel Vadot gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 90*f126890aSEmmanuel Vadot startup-delay-us = <1000>; 91*f126890aSEmmanuel Vadot enable-active-high; 92*f126890aSEmmanuel Vadot regulator-always-on; 93*f126890aSEmmanuel Vadot }; 94*f126890aSEmmanuel Vadot 95*f126890aSEmmanuel Vadot reg_3p3v_display: regulator-3p3v-display { 96*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 97*f126890aSEmmanuel Vadot vin-supply = <®_12p0v>; 98*f126890aSEmmanuel Vadot regulator-name = "3V3_DISPLAY"; 99*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 100*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 101*f126890aSEmmanuel Vadot regulator-always-on; 102*f126890aSEmmanuel Vadot }; 103*f126890aSEmmanuel Vadot 104*f126890aSEmmanuel Vadot reg_3p3v_ssd: regulator-3p3v-ssd { 105*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 106*f126890aSEmmanuel Vadot vin-supply = <®_12p0v>; 107*f126890aSEmmanuel Vadot regulator-name = "3V3_SSD"; 108*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 109*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 110*f126890aSEmmanuel Vadot regulator-always-on; 111*f126890aSEmmanuel Vadot }; 112*f126890aSEmmanuel Vadot 113*f126890aSEmmanuel Vadot sound1 { 114*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 115*f126890aSEmmanuel Vadot simple-audio-card,name = "front"; 116*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 117*f126890aSEmmanuel Vadot simple-audio-card,bitclock-master = <&sound1_codec>; 118*f126890aSEmmanuel Vadot simple-audio-card,frame-master = <&sound1_codec>; 119*f126890aSEmmanuel Vadot simple-audio-card,widgets = 120*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack"; 121*f126890aSEmmanuel Vadot simple-audio-card,routing = 122*f126890aSEmmanuel Vadot "Headphone Jack", "HPA1 HPLEFT", 123*f126890aSEmmanuel Vadot "Headphone Jack", "HPA1 HPRIGHT", 124*f126890aSEmmanuel Vadot "HPA1 LEFTIN", "HPL", 125*f126890aSEmmanuel Vadot "HPA1 RIGHTIN", "HPR"; 126*f126890aSEmmanuel Vadot simple-audio-card,aux-devs = <&hpa1>; 127*f126890aSEmmanuel Vadot 128*f126890aSEmmanuel Vadot sound1_cpu: simple-audio-card,cpu { 129*f126890aSEmmanuel Vadot sound-dai = <&ssi2>; 130*f126890aSEmmanuel Vadot }; 131*f126890aSEmmanuel Vadot 132*f126890aSEmmanuel Vadot sound1_codec: simple-audio-card,codec { 133*f126890aSEmmanuel Vadot sound-dai = <&codec1>; 134*f126890aSEmmanuel Vadot clocks = <&cs2000>; 135*f126890aSEmmanuel Vadot }; 136*f126890aSEmmanuel Vadot }; 137*f126890aSEmmanuel Vadot 138*f126890aSEmmanuel Vadot sound2 { 139*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 140*f126890aSEmmanuel Vadot simple-audio-card,name = "periph"; 141*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 142*f126890aSEmmanuel Vadot simple-audio-card,bitclock-master = <&sound2_codec>; 143*f126890aSEmmanuel Vadot simple-audio-card,frame-master = <&sound2_codec>; 144*f126890aSEmmanuel Vadot simple-audio-card,widgets = 145*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack"; 146*f126890aSEmmanuel Vadot simple-audio-card,routing = 147*f126890aSEmmanuel Vadot "Headphone Jack", "HPA1 HPLEFT", 148*f126890aSEmmanuel Vadot "Headphone Jack", "HPA1 HPRIGHT", 149*f126890aSEmmanuel Vadot "HPA1 LEFTIN", "HPL", 150*f126890aSEmmanuel Vadot "HPA1 RIGHTIN", "HPR"; 151*f126890aSEmmanuel Vadot simple-audio-card,aux-devs = <&hpa2>; 152*f126890aSEmmanuel Vadot 153*f126890aSEmmanuel Vadot sound2_cpu: simple-audio-card,cpu { 154*f126890aSEmmanuel Vadot sound-dai = <&ssi1>; 155*f126890aSEmmanuel Vadot }; 156*f126890aSEmmanuel Vadot 157*f126890aSEmmanuel Vadot sound2_codec: simple-audio-card,codec { 158*f126890aSEmmanuel Vadot sound-dai = <&codec2>; 159*f126890aSEmmanuel Vadot clocks = <&cs2000>; 160*f126890aSEmmanuel Vadot }; 161*f126890aSEmmanuel Vadot }; 162*f126890aSEmmanuel Vadot 163*f126890aSEmmanuel Vadot panel { 164*f126890aSEmmanuel Vadot power-supply = <®_3p3v_display>; 165*f126890aSEmmanuel Vadot backlight = <&sp_backlight>; 166*f126890aSEmmanuel Vadot status = "disabled"; 167*f126890aSEmmanuel Vadot 168*f126890aSEmmanuel Vadot port { 169*f126890aSEmmanuel Vadot panel_in: endpoint { 170*f126890aSEmmanuel Vadot remote-endpoint = <&lvds0_out>; 171*f126890aSEmmanuel Vadot }; 172*f126890aSEmmanuel Vadot }; 173*f126890aSEmmanuel Vadot }; 174*f126890aSEmmanuel Vadot 175*f126890aSEmmanuel Vadot disp0: disp0 { 176*f126890aSEmmanuel Vadot #address-cells = <1>; 177*f126890aSEmmanuel Vadot #size-cells = <0>; 178*f126890aSEmmanuel Vadot compatible = "fsl,imx-parallel-display"; 179*f126890aSEmmanuel Vadot pinctrl-names = "default"; 180*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_disp0>; 181*f126890aSEmmanuel Vadot status = "disabled"; 182*f126890aSEmmanuel Vadot 183*f126890aSEmmanuel Vadot port@0 { 184*f126890aSEmmanuel Vadot reg = <0>; 185*f126890aSEmmanuel Vadot 186*f126890aSEmmanuel Vadot disp0_in_0: endpoint { 187*f126890aSEmmanuel Vadot remote-endpoint = <&ipu1_di0_disp0>; 188*f126890aSEmmanuel Vadot }; 189*f126890aSEmmanuel Vadot }; 190*f126890aSEmmanuel Vadot 191*f126890aSEmmanuel Vadot port@1 { 192*f126890aSEmmanuel Vadot reg = <1>; 193*f126890aSEmmanuel Vadot 194*f126890aSEmmanuel Vadot disp0_out: endpoint { 195*f126890aSEmmanuel Vadot remote-endpoint = <&tc358767_in>; 196*f126890aSEmmanuel Vadot }; 197*f126890aSEmmanuel Vadot }; 198*f126890aSEmmanuel Vadot }; 199*f126890aSEmmanuel Vadot 200*f126890aSEmmanuel Vadot cs2000_ref: cs2000-ref { 201*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 202*f126890aSEmmanuel Vadot #clock-cells = <0>; 203*f126890aSEmmanuel Vadot clock-frequency = <24576000>; 204*f126890aSEmmanuel Vadot }; 205*f126890aSEmmanuel Vadot 206*f126890aSEmmanuel Vadot cs2000_in_dummy: cs2000-in-dummy { 207*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 208*f126890aSEmmanuel Vadot #clock-cells = <0>; 209*f126890aSEmmanuel Vadot clock-frequency = <0>; 210*f126890aSEmmanuel Vadot }; 211*f126890aSEmmanuel Vadot 212*f126890aSEmmanuel Vadot edp_refclk: edp-refclk { 213*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 214*f126890aSEmmanuel Vadot #clock-cells = <0>; 215*f126890aSEmmanuel Vadot clock-frequency = <19200000>; 216*f126890aSEmmanuel Vadot }; 217*f126890aSEmmanuel Vadot}; 218*f126890aSEmmanuel Vadot 219*f126890aSEmmanuel Vadot&clks { 220*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 221*f126890aSEmmanuel Vadot <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 222*f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, 223*f126890aSEmmanuel Vadot <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; 224*f126890aSEmmanuel Vadot}; 225*f126890aSEmmanuel Vadot 226*f126890aSEmmanuel Vadot&cpu0 { 227*f126890aSEmmanuel Vadot fsl,soc-operating-points = < 228*f126890aSEmmanuel Vadot /* ARM kHz SOC-PU uV */ 229*f126890aSEmmanuel Vadot 1200000 1300000 230*f126890aSEmmanuel Vadot 996000 1275000 231*f126890aSEmmanuel Vadot 852000 1275000 232*f126890aSEmmanuel Vadot 792000 1200000 233*f126890aSEmmanuel Vadot 396000 1200000 234*f126890aSEmmanuel Vadot >; 235*f126890aSEmmanuel Vadot}; 236*f126890aSEmmanuel Vadot 237*f126890aSEmmanuel Vadot®_arm { 238*f126890aSEmmanuel Vadot vin-supply = <&sw1a_reg>; 239*f126890aSEmmanuel Vadot}; 240*f126890aSEmmanuel Vadot 241*f126890aSEmmanuel Vadot®_pu { 242*f126890aSEmmanuel Vadot vin-supply = <&sw1c_reg>; 243*f126890aSEmmanuel Vadot}; 244*f126890aSEmmanuel Vadot 245*f126890aSEmmanuel Vadot®_soc { 246*f126890aSEmmanuel Vadot vin-supply = <&sw1c_reg>; 247*f126890aSEmmanuel Vadot}; 248*f126890aSEmmanuel Vadot 249*f126890aSEmmanuel Vadot&ldb { 250*f126890aSEmmanuel Vadot lvds-channel@0 { 251*f126890aSEmmanuel Vadot port@4 { 252*f126890aSEmmanuel Vadot reg = <4>; 253*f126890aSEmmanuel Vadot 254*f126890aSEmmanuel Vadot lvds0_out: endpoint { 255*f126890aSEmmanuel Vadot remote-endpoint = <&panel_in>; 256*f126890aSEmmanuel Vadot }; 257*f126890aSEmmanuel Vadot }; 258*f126890aSEmmanuel Vadot }; 259*f126890aSEmmanuel Vadot}; 260*f126890aSEmmanuel Vadot 261*f126890aSEmmanuel Vadot&uart1 { 262*f126890aSEmmanuel Vadot pinctrl-names = "default"; 263*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart1>; 264*f126890aSEmmanuel Vadot status = "okay"; 265*f126890aSEmmanuel Vadot}; 266*f126890aSEmmanuel Vadot 267*f126890aSEmmanuel Vadot&uart3 { 268*f126890aSEmmanuel Vadot pinctrl-names = "default"; 269*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3>; 270*f126890aSEmmanuel Vadot uart-has-rtscts; 271*f126890aSEmmanuel Vadot linux,rs485-enabled-at-boot-time; 272*f126890aSEmmanuel Vadot status = "okay"; 273*f126890aSEmmanuel Vadot}; 274*f126890aSEmmanuel Vadot 275*f126890aSEmmanuel Vadot&uart4 { 276*f126890aSEmmanuel Vadot pinctrl-names = "default"; 277*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 278*f126890aSEmmanuel Vadot status = "okay"; 279*f126890aSEmmanuel Vadot 280*f126890aSEmmanuel Vadot mcu { 281*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-rdu2"; 282*f126890aSEmmanuel Vadot current-speed = <1000000>; 283*f126890aSEmmanuel Vadot #address-cells = <1>; 284*f126890aSEmmanuel Vadot #size-cells = <1>; 285*f126890aSEmmanuel Vadot 286*f126890aSEmmanuel Vadot watchdog { 287*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-watchdog"; 288*f126890aSEmmanuel Vadot }; 289*f126890aSEmmanuel Vadot 290*f126890aSEmmanuel Vadot sp_backlight: backlight { 291*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-backlight"; 292*f126890aSEmmanuel Vadot }; 293*f126890aSEmmanuel Vadot 294*f126890aSEmmanuel Vadot pwrbutton { 295*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-pwrbutton"; 296*f126890aSEmmanuel Vadot }; 297*f126890aSEmmanuel Vadot 298*f126890aSEmmanuel Vadot eeprom@a3 { 299*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-eeprom"; 300*f126890aSEmmanuel Vadot reg = <0xa3 0x4000>; 301*f126890aSEmmanuel Vadot #address-cells = <1>; 302*f126890aSEmmanuel Vadot #size-cells = <1>; 303*f126890aSEmmanuel Vadot zii,eeprom-name = "dds-eeprom"; 304*f126890aSEmmanuel Vadot }; 305*f126890aSEmmanuel Vadot 306*f126890aSEmmanuel Vadot eeprom@a4 { 307*f126890aSEmmanuel Vadot compatible = "zii,rave-sp-eeprom"; 308*f126890aSEmmanuel Vadot reg = <0xa4 0x4000>; 309*f126890aSEmmanuel Vadot #address-cells = <1>; 310*f126890aSEmmanuel Vadot #size-cells = <1>; 311*f126890aSEmmanuel Vadot zii,eeprom-name = "main-eeprom"; 312*f126890aSEmmanuel Vadot }; 313*f126890aSEmmanuel Vadot }; 314*f126890aSEmmanuel Vadot}; 315*f126890aSEmmanuel Vadot 316*f126890aSEmmanuel Vadot&ecspi1 { 317*f126890aSEmmanuel Vadot pinctrl-names = "default"; 318*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>; 319*f126890aSEmmanuel Vadot cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; 320*f126890aSEmmanuel Vadot status = "okay"; 321*f126890aSEmmanuel Vadot 322*f126890aSEmmanuel Vadot flash@0 { 323*f126890aSEmmanuel Vadot compatible = "st,m25p128", "jedec,spi-nor"; 324*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 325*f126890aSEmmanuel Vadot reg = <0>; 326*f126890aSEmmanuel Vadot }; 327*f126890aSEmmanuel Vadot}; 328*f126890aSEmmanuel Vadot 329*f126890aSEmmanuel Vadot&gpio3 { 330*f126890aSEmmanuel Vadot pinctrl-names = "default"; 331*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio3_hog>; 332*f126890aSEmmanuel Vadot 333*f126890aSEmmanuel Vadot usb-emulation-hog { 334*f126890aSEmmanuel Vadot gpio-hog; 335*f126890aSEmmanuel Vadot gpios = <19 GPIO_ACTIVE_HIGH>; 336*f126890aSEmmanuel Vadot output-low; 337*f126890aSEmmanuel Vadot line-name = "usb-emulation"; 338*f126890aSEmmanuel Vadot }; 339*f126890aSEmmanuel Vadot 340*f126890aSEmmanuel Vadot usb-mode1-hog { 341*f126890aSEmmanuel Vadot gpio-hog; 342*f126890aSEmmanuel Vadot gpios = <20 GPIO_ACTIVE_HIGH>; 343*f126890aSEmmanuel Vadot output-high; 344*f126890aSEmmanuel Vadot line-name = "usb-mode1"; 345*f126890aSEmmanuel Vadot }; 346*f126890aSEmmanuel Vadot 347*f126890aSEmmanuel Vadot usb-pwr-hog { 348*f126890aSEmmanuel Vadot gpio-hog; 349*f126890aSEmmanuel Vadot gpios = <22 GPIO_ACTIVE_LOW>; 350*f126890aSEmmanuel Vadot output-high; 351*f126890aSEmmanuel Vadot line-name = "usb-pwr-ctrl-en-n"; 352*f126890aSEmmanuel Vadot }; 353*f126890aSEmmanuel Vadot 354*f126890aSEmmanuel Vadot usb-mode2-hog { 355*f126890aSEmmanuel Vadot gpio-hog; 356*f126890aSEmmanuel Vadot gpios = <23 GPIO_ACTIVE_HIGH>; 357*f126890aSEmmanuel Vadot output-high; 358*f126890aSEmmanuel Vadot line-name = "usb-mode2"; 359*f126890aSEmmanuel Vadot }; 360*f126890aSEmmanuel Vadot}; 361*f126890aSEmmanuel Vadot 362*f126890aSEmmanuel Vadot&i2c1 { 363*f126890aSEmmanuel Vadot pinctrl-names = "default"; 364*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 365*f126890aSEmmanuel Vadot clock-frequency = <100000>; 366*f126890aSEmmanuel Vadot status = "okay"; 367*f126890aSEmmanuel Vadot 368*f126890aSEmmanuel Vadot codec2: codec@18 { 369*f126890aSEmmanuel Vadot compatible = "ti,tlv320dac3100"; 370*f126890aSEmmanuel Vadot pinctrl-names = "default"; 371*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_codec2>; 372*f126890aSEmmanuel Vadot reg = <0x18>; 373*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 374*f126890aSEmmanuel Vadot HPVDD-supply = <®_3p3v>; 375*f126890aSEmmanuel Vadot SPRVDD-supply = <®_3p3v>; 376*f126890aSEmmanuel Vadot SPLVDD-supply = <®_3p3v>; 377*f126890aSEmmanuel Vadot AVDD-supply = <®_3p3v>; 378*f126890aSEmmanuel Vadot IOVDD-supply = <®_3p3v>; 379*f126890aSEmmanuel Vadot DVDD-supply = <&vgen4_reg>; 380*f126890aSEmmanuel Vadot reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 381*f126890aSEmmanuel Vadot }; 382*f126890aSEmmanuel Vadot 383*f126890aSEmmanuel Vadot accel@1c { 384*f126890aSEmmanuel Vadot pinctrl-names = "default"; 385*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_accel>; 386*f126890aSEmmanuel Vadot compatible = "fsl,mma8451"; 387*f126890aSEmmanuel Vadot reg = <0x1c>; 388*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 389*f126890aSEmmanuel Vadot interrupt-names = "INT2"; 390*f126890aSEmmanuel Vadot interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 391*f126890aSEmmanuel Vadot vdd-supply = <®_3p3v>; 392*f126890aSEmmanuel Vadot vddio-supply = <®_3p3v>; 393*f126890aSEmmanuel Vadot }; 394*f126890aSEmmanuel Vadot 395*f126890aSEmmanuel Vadot hpa2: amp@60 { 396*f126890aSEmmanuel Vadot compatible = "ti,tpa6130a2"; 397*f126890aSEmmanuel Vadot pinctrl-names = "default"; 398*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tpa2>; 399*f126890aSEmmanuel Vadot reg = <0x60>; 400*f126890aSEmmanuel Vadot power-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 401*f126890aSEmmanuel Vadot Vdd-supply = <®_5p0v_main>; 402*f126890aSEmmanuel Vadot sound-name-prefix = "HPA1"; 403*f126890aSEmmanuel Vadot }; 404*f126890aSEmmanuel Vadot 405*f126890aSEmmanuel Vadot edp-bridge@68 { 406*f126890aSEmmanuel Vadot compatible = "toshiba,tc358767"; 407*f126890aSEmmanuel Vadot pinctrl-names = "default"; 408*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tc358767>; 409*f126890aSEmmanuel Vadot reg = <0x68>; 410*f126890aSEmmanuel Vadot shutdown-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 411*f126890aSEmmanuel Vadot clock-names = "ref"; 412*f126890aSEmmanuel Vadot clocks = <&edp_refclk>; 413*f126890aSEmmanuel Vadot status = "disabled"; 414*f126890aSEmmanuel Vadot 415*f126890aSEmmanuel Vadot ports { 416*f126890aSEmmanuel Vadot #address-cells = <1>; 417*f126890aSEmmanuel Vadot #size-cells = <0>; 418*f126890aSEmmanuel Vadot 419*f126890aSEmmanuel Vadot port@1 { 420*f126890aSEmmanuel Vadot reg = <1>; 421*f126890aSEmmanuel Vadot 422*f126890aSEmmanuel Vadot tc358767_in: endpoint { 423*f126890aSEmmanuel Vadot remote-endpoint = <&disp0_out>; 424*f126890aSEmmanuel Vadot }; 425*f126890aSEmmanuel Vadot }; 426*f126890aSEmmanuel Vadot }; 427*f126890aSEmmanuel Vadot }; 428*f126890aSEmmanuel Vadot}; 429*f126890aSEmmanuel Vadot 430*f126890aSEmmanuel Vadot&i2c2 { 431*f126890aSEmmanuel Vadot pinctrl-names = "default"; 432*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 433*f126890aSEmmanuel Vadot clock-frequency = <100000>; 434*f126890aSEmmanuel Vadot status = "okay"; 435*f126890aSEmmanuel Vadot 436*f126890aSEmmanuel Vadot pmic@8 { 437*f126890aSEmmanuel Vadot compatible = "fsl,pfuze100"; 438*f126890aSEmmanuel Vadot pinctrl-names = "default"; 439*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pfuze100_irq>; 440*f126890aSEmmanuel Vadot reg = <0x08>; 441*f126890aSEmmanuel Vadot interrupt-parent = <&gpio7>; 442*f126890aSEmmanuel Vadot interrupts = <13 IRQ_TYPE_LEVEL_LOW>; 443*f126890aSEmmanuel Vadot 444*f126890aSEmmanuel Vadot regulators { 445*f126890aSEmmanuel Vadot sw1a_reg: sw1ab { 446*f126890aSEmmanuel Vadot regulator-min-microvolt = <300000>; 447*f126890aSEmmanuel Vadot regulator-max-microvolt = <1875000>; 448*f126890aSEmmanuel Vadot regulator-boot-on; 449*f126890aSEmmanuel Vadot regulator-always-on; 450*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 451*f126890aSEmmanuel Vadot }; 452*f126890aSEmmanuel Vadot 453*f126890aSEmmanuel Vadot sw1c_reg: sw1c { 454*f126890aSEmmanuel Vadot regulator-min-microvolt = <300000>; 455*f126890aSEmmanuel Vadot regulator-max-microvolt = <1875000>; 456*f126890aSEmmanuel Vadot regulator-boot-on; 457*f126890aSEmmanuel Vadot regulator-always-on; 458*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 459*f126890aSEmmanuel Vadot }; 460*f126890aSEmmanuel Vadot 461*f126890aSEmmanuel Vadot sw2_reg: sw2 { 462*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 463*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 464*f126890aSEmmanuel Vadot regulator-boot-on; 465*f126890aSEmmanuel Vadot regulator-always-on; 466*f126890aSEmmanuel Vadot }; 467*f126890aSEmmanuel Vadot 468*f126890aSEmmanuel Vadot sw3a_reg: sw3a { 469*f126890aSEmmanuel Vadot regulator-min-microvolt = <400000>; 470*f126890aSEmmanuel Vadot regulator-max-microvolt = <1500000>; 471*f126890aSEmmanuel Vadot regulator-boot-on; 472*f126890aSEmmanuel Vadot regulator-always-on; 473*f126890aSEmmanuel Vadot }; 474*f126890aSEmmanuel Vadot 475*f126890aSEmmanuel Vadot sw3b_reg: sw3b { 476*f126890aSEmmanuel Vadot regulator-min-microvolt = <400000>; 477*f126890aSEmmanuel Vadot regulator-max-microvolt = <1500000>; 478*f126890aSEmmanuel Vadot regulator-boot-on; 479*f126890aSEmmanuel Vadot regulator-always-on; 480*f126890aSEmmanuel Vadot }; 481*f126890aSEmmanuel Vadot 482*f126890aSEmmanuel Vadot sw4_reg: sw4 { 483*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 484*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 485*f126890aSEmmanuel Vadot regulator-boot-on; 486*f126890aSEmmanuel Vadot regulator-always-on; 487*f126890aSEmmanuel Vadot }; 488*f126890aSEmmanuel Vadot 489*f126890aSEmmanuel Vadot snvs_reg: vsnvs { 490*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 491*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 492*f126890aSEmmanuel Vadot regulator-boot-on; 493*f126890aSEmmanuel Vadot regulator-always-on; 494*f126890aSEmmanuel Vadot }; 495*f126890aSEmmanuel Vadot 496*f126890aSEmmanuel Vadot vref_reg: vrefddr { 497*f126890aSEmmanuel Vadot regulator-boot-on; 498*f126890aSEmmanuel Vadot regulator-always-on; 499*f126890aSEmmanuel Vadot }; 500*f126890aSEmmanuel Vadot 501*f126890aSEmmanuel Vadot vgen2_reg: vgen2 { 502*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 503*f126890aSEmmanuel Vadot regulator-max-microvolt = <1500000>; 504*f126890aSEmmanuel Vadot regulator-always-on; 505*f126890aSEmmanuel Vadot }; 506*f126890aSEmmanuel Vadot 507*f126890aSEmmanuel Vadot vgen4_reg: vgen4 { 508*f126890aSEmmanuel Vadot regulator-min-microvolt = <1200000>; 509*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 510*f126890aSEmmanuel Vadot regulator-always-on; 511*f126890aSEmmanuel Vadot }; 512*f126890aSEmmanuel Vadot 513*f126890aSEmmanuel Vadot vgen5_reg: vgen5 { 514*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 515*f126890aSEmmanuel Vadot regulator-max-microvolt = <2500000>; 516*f126890aSEmmanuel Vadot regulator-always-on; 517*f126890aSEmmanuel Vadot }; 518*f126890aSEmmanuel Vadot 519*f126890aSEmmanuel Vadot vgen6_reg: vgen6 { 520*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 521*f126890aSEmmanuel Vadot regulator-max-microvolt = <2800000>; 522*f126890aSEmmanuel Vadot regulator-always-on; 523*f126890aSEmmanuel Vadot }; 524*f126890aSEmmanuel Vadot }; 525*f126890aSEmmanuel Vadot }; 526*f126890aSEmmanuel Vadot 527*f126890aSEmmanuel Vadot watchdog@38 { 528*f126890aSEmmanuel Vadot compatible = "zii,rave-wdt"; 529*f126890aSEmmanuel Vadot reg = <0x38>; 530*f126890aSEmmanuel Vadot }; 531*f126890aSEmmanuel Vadot 532*f126890aSEmmanuel Vadot temp-sense@48 { 533*f126890aSEmmanuel Vadot compatible = "national,lm75"; 534*f126890aSEmmanuel Vadot reg = <0x48>; 535*f126890aSEmmanuel Vadot }; 536*f126890aSEmmanuel Vadot 537*f126890aSEmmanuel Vadot cs2000: clkgen@4e { 538*f126890aSEmmanuel Vadot compatible = "cirrus,cs2000-cp"; 539*f126890aSEmmanuel Vadot reg = <0x4e>; 540*f126890aSEmmanuel Vadot #clock-cells = <0>; 541*f126890aSEmmanuel Vadot clock-names = "clk_in", "ref_clk"; 542*f126890aSEmmanuel Vadot clocks = <&cs2000_in_dummy>, <&cs2000_ref>; 543*f126890aSEmmanuel Vadot assigned-clocks = <&cs2000>; 544*f126890aSEmmanuel Vadot assigned-clock-rates = <24000000>; 545*f126890aSEmmanuel Vadot }; 546*f126890aSEmmanuel Vadot 547*f126890aSEmmanuel Vadot eeprom@54 { 548*f126890aSEmmanuel Vadot compatible = "atmel,24c128"; 549*f126890aSEmmanuel Vadot reg = <0x54>; 550*f126890aSEmmanuel Vadot }; 551*f126890aSEmmanuel Vadot 552*f126890aSEmmanuel Vadot ds1341: rtc@68 { 553*f126890aSEmmanuel Vadot compatible = "dallas,ds1341"; 554*f126890aSEmmanuel Vadot reg = <0x68>; 555*f126890aSEmmanuel Vadot }; 556*f126890aSEmmanuel Vadot}; 557*f126890aSEmmanuel Vadot 558*f126890aSEmmanuel Vadot&i2c3 { 559*f126890aSEmmanuel Vadot pinctrl-names = "default"; 560*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 561*f126890aSEmmanuel Vadot clock-frequency = <400000>; 562*f126890aSEmmanuel Vadot status = "okay"; 563*f126890aSEmmanuel Vadot 564*f126890aSEmmanuel Vadot codec1: codec@18 { 565*f126890aSEmmanuel Vadot compatible = "ti,tlv320dac3100"; 566*f126890aSEmmanuel Vadot pinctrl-names = "default"; 567*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_codec1>; 568*f126890aSEmmanuel Vadot reg = <0x18>; 569*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 570*f126890aSEmmanuel Vadot HPVDD-supply = <®_3p3v>; 571*f126890aSEmmanuel Vadot SPRVDD-supply = <®_3p3v>; 572*f126890aSEmmanuel Vadot SPLVDD-supply = <®_3p3v>; 573*f126890aSEmmanuel Vadot AVDD-supply = <®_3p3v>; 574*f126890aSEmmanuel Vadot IOVDD-supply = <®_3p3v>; 575*f126890aSEmmanuel Vadot DVDD-supply = <&vgen4_reg>; 576*f126890aSEmmanuel Vadot reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 577*f126890aSEmmanuel Vadot }; 578*f126890aSEmmanuel Vadot 579*f126890aSEmmanuel Vadot touchscreen@20 { 580*f126890aSEmmanuel Vadot compatible = "syna,rmi4-i2c"; 581*f126890aSEmmanuel Vadot pinctrl-names = "default"; 582*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ts>; 583*f126890aSEmmanuel Vadot reg = <0x20>; 584*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 585*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 586*f126890aSEmmanuel Vadot vdd-supply = <®_5p0v_main>; 587*f126890aSEmmanuel Vadot vio-supply = <®_3p3v>; 588*f126890aSEmmanuel Vadot 589*f126890aSEmmanuel Vadot #address-cells = <1>; 590*f126890aSEmmanuel Vadot #size-cells = <0>; 591*f126890aSEmmanuel Vadot 592*f126890aSEmmanuel Vadot rmi4-f01@1 { 593*f126890aSEmmanuel Vadot reg = <0x1>; 594*f126890aSEmmanuel Vadot syna,nosleep-mode = <2>; 595*f126890aSEmmanuel Vadot }; 596*f126890aSEmmanuel Vadot 597*f126890aSEmmanuel Vadot rmi4-f11@11 { 598*f126890aSEmmanuel Vadot reg = <0x11>; 599*f126890aSEmmanuel Vadot touchscreen-inverted-x; 600*f126890aSEmmanuel Vadot touchscreen-swapped-x-y; 601*f126890aSEmmanuel Vadot syna,sensor-type = <1>; 602*f126890aSEmmanuel Vadot syna,delta-x-threshold = <5>; 603*f126890aSEmmanuel Vadot syna,delta-y-threshold = <10>; 604*f126890aSEmmanuel Vadot }; 605*f126890aSEmmanuel Vadot 606*f126890aSEmmanuel Vadot rmi4-f12@12 { 607*f126890aSEmmanuel Vadot reg = <0x12>; 608*f126890aSEmmanuel Vadot touchscreen-inverted-x; 609*f126890aSEmmanuel Vadot touchscreen-swapped-x-y; 610*f126890aSEmmanuel Vadot syna,sensor-type = <1>; 611*f126890aSEmmanuel Vadot }; 612*f126890aSEmmanuel Vadot }; 613*f126890aSEmmanuel Vadot 614*f126890aSEmmanuel Vadot touchscreen@2a { 615*f126890aSEmmanuel Vadot compatible = "eeti,exc3000"; 616*f126890aSEmmanuel Vadot pinctrl-names = "default"; 617*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ts>; 618*f126890aSEmmanuel Vadot reg = <0x2a>; 619*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 620*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 621*f126890aSEmmanuel Vadot touchscreen-inverted-x; 622*f126890aSEmmanuel Vadot touchscreen-swapped-x-y; 623*f126890aSEmmanuel Vadot status = "disabled"; 624*f126890aSEmmanuel Vadot }; 625*f126890aSEmmanuel Vadot 626*f126890aSEmmanuel Vadot reg_5p0v_user_usb: charger@32 { 627*f126890aSEmmanuel Vadot compatible = "microchip,ucs1002"; 628*f126890aSEmmanuel Vadot pinctrl-names = "default"; 629*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ucs1002_pins>; 630*f126890aSEmmanuel Vadot reg = <0x32>; 631*f126890aSEmmanuel Vadot interrupts-extended = <&gpio5 2 IRQ_TYPE_EDGE_BOTH>, 632*f126890aSEmmanuel Vadot <&gpio3 21 IRQ_TYPE_EDGE_FALLING>; 633*f126890aSEmmanuel Vadot interrupt-names = "a_det", "alert"; 634*f126890aSEmmanuel Vadot }; 635*f126890aSEmmanuel Vadot 636*f126890aSEmmanuel Vadot hpa1: amp@60 { 637*f126890aSEmmanuel Vadot compatible = "ti,tpa6130a2"; 638*f126890aSEmmanuel Vadot pinctrl-names = "default"; 639*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_tpa1>; 640*f126890aSEmmanuel Vadot reg = <0x60>; 641*f126890aSEmmanuel Vadot power-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>; 642*f126890aSEmmanuel Vadot Vdd-supply = <®_5p0v_main>; 643*f126890aSEmmanuel Vadot sound-name-prefix = "HPA1"; 644*f126890aSEmmanuel Vadot }; 645*f126890aSEmmanuel Vadot}; 646*f126890aSEmmanuel Vadot 647*f126890aSEmmanuel Vadot&ipu1_di0_disp0 { 648*f126890aSEmmanuel Vadot remote-endpoint = <&disp0_in_0>; 649*f126890aSEmmanuel Vadot}; 650*f126890aSEmmanuel Vadot 651*f126890aSEmmanuel Vadot&pcie { 652*f126890aSEmmanuel Vadot pinctrl-names = "default"; 653*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pcie>; 654*f126890aSEmmanuel Vadot reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 655*f126890aSEmmanuel Vadot status = "okay"; 656*f126890aSEmmanuel Vadot 657*f126890aSEmmanuel Vadot host@0 { 658*f126890aSEmmanuel Vadot reg = <0 0 0 0 0>; 659*f126890aSEmmanuel Vadot 660*f126890aSEmmanuel Vadot #address-cells = <3>; 661*f126890aSEmmanuel Vadot #size-cells = <2>; 662*f126890aSEmmanuel Vadot 663*f126890aSEmmanuel Vadot i210: i210@0 { 664*f126890aSEmmanuel Vadot reg = <0 0 0 0 0>; 665*f126890aSEmmanuel Vadot }; 666*f126890aSEmmanuel Vadot }; 667*f126890aSEmmanuel Vadot}; 668*f126890aSEmmanuel Vadot 669*f126890aSEmmanuel Vadot&usdhc2 { 670*f126890aSEmmanuel Vadot pinctrl-names = "default"; 671*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>; 672*f126890aSEmmanuel Vadot bus-width = <4>; 673*f126890aSEmmanuel Vadot cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 674*f126890aSEmmanuel Vadot disable-wp; 675*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v_sd>; 676*f126890aSEmmanuel Vadot vqmmc-supply = <®_3p3v>; 677*f126890aSEmmanuel Vadot no-1-8-v; 678*f126890aSEmmanuel Vadot no-sdio; 679*f126890aSEmmanuel Vadot status = "okay"; 680*f126890aSEmmanuel Vadot}; 681*f126890aSEmmanuel Vadot 682*f126890aSEmmanuel Vadot&usdhc3 { 683*f126890aSEmmanuel Vadot pinctrl-names = "default"; 684*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 685*f126890aSEmmanuel Vadot bus-width = <4>; 686*f126890aSEmmanuel Vadot cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 687*f126890aSEmmanuel Vadot disable-wp; 688*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v_sd>; 689*f126890aSEmmanuel Vadot vqmmc-supply = <®_3p3v>; 690*f126890aSEmmanuel Vadot no-1-8-v; 691*f126890aSEmmanuel Vadot no-sdio; 692*f126890aSEmmanuel Vadot status = "okay"; 693*f126890aSEmmanuel Vadot}; 694*f126890aSEmmanuel Vadot 695*f126890aSEmmanuel Vadot&usdhc4 { 696*f126890aSEmmanuel Vadot pinctrl-names = "default"; 697*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc4>; 698*f126890aSEmmanuel Vadot bus-width = <8>; 699*f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v>; 700*f126890aSEmmanuel Vadot vqmmc-supply = <®_3p3v>; 701*f126890aSEmmanuel Vadot no-1-8-v; 702*f126890aSEmmanuel Vadot non-removable; 703*f126890aSEmmanuel Vadot no-sdio; 704*f126890aSEmmanuel Vadot no-sd; 705*f126890aSEmmanuel Vadot status = "okay"; 706*f126890aSEmmanuel Vadot}; 707*f126890aSEmmanuel Vadot 708*f126890aSEmmanuel Vadot&sata { 709*f126890aSEmmanuel Vadot target-supply = <®_3p3v_ssd>; 710*f126890aSEmmanuel Vadot status = "okay"; 711*f126890aSEmmanuel Vadot}; 712*f126890aSEmmanuel Vadot 713*f126890aSEmmanuel Vadot&fec { 714*f126890aSEmmanuel Vadot pinctrl-names = "default"; 715*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 716*f126890aSEmmanuel Vadot phy-mode = "rmii"; 717*f126890aSEmmanuel Vadot phy-handle = <&phy>; 718*f126890aSEmmanuel Vadot phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 719*f126890aSEmmanuel Vadot phy-reset-duration = <100>; 720*f126890aSEmmanuel Vadot phy-supply = <®_3p3v>; 721*f126890aSEmmanuel Vadot status = "okay"; 722*f126890aSEmmanuel Vadot 723*f126890aSEmmanuel Vadot mdio { 724*f126890aSEmmanuel Vadot #address-cells = <1>; 725*f126890aSEmmanuel Vadot #size-cells = <0>; 726*f126890aSEmmanuel Vadot clock-frequency = <12500000>; 727*f126890aSEmmanuel Vadot suppress-preamble; 728*f126890aSEmmanuel Vadot status = "okay"; 729*f126890aSEmmanuel Vadot 730*f126890aSEmmanuel Vadot switch: switch@0 { 731*f126890aSEmmanuel Vadot compatible = "marvell,mv88e6085"; 732*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_switch_irq>; 733*f126890aSEmmanuel Vadot pinctrl-names = "default"; 734*f126890aSEmmanuel Vadot reg = <0>; 735*f126890aSEmmanuel Vadot dsa,member = <0 0>; 736*f126890aSEmmanuel Vadot eeprom-length = <512>; 737*f126890aSEmmanuel Vadot interrupt-parent = <&gpio6>; 738*f126890aSEmmanuel Vadot interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 739*f126890aSEmmanuel Vadot interrupt-controller; 740*f126890aSEmmanuel Vadot #interrupt-cells = <2>; 741*f126890aSEmmanuel Vadot 742*f126890aSEmmanuel Vadot ports { 743*f126890aSEmmanuel Vadot #address-cells = <1>; 744*f126890aSEmmanuel Vadot #size-cells = <0>; 745*f126890aSEmmanuel Vadot 746*f126890aSEmmanuel Vadot port@0 { 747*f126890aSEmmanuel Vadot reg = <0>; 748*f126890aSEmmanuel Vadot label = "gigabit_proc"; 749*f126890aSEmmanuel Vadot phy-handle = <&switchphy0>; 750*f126890aSEmmanuel Vadot }; 751*f126890aSEmmanuel Vadot 752*f126890aSEmmanuel Vadot port@1 { 753*f126890aSEmmanuel Vadot reg = <1>; 754*f126890aSEmmanuel Vadot label = "netaux"; 755*f126890aSEmmanuel Vadot phy-handle = <&switchphy1>; 756*f126890aSEmmanuel Vadot }; 757*f126890aSEmmanuel Vadot 758*f126890aSEmmanuel Vadot port@2 { 759*f126890aSEmmanuel Vadot reg = <2>; 760*f126890aSEmmanuel Vadot phy-mode = "rev-rmii"; 761*f126890aSEmmanuel Vadot ethernet = <&fec>; 762*f126890aSEmmanuel Vadot 763*f126890aSEmmanuel Vadot fixed-link { 764*f126890aSEmmanuel Vadot speed = <100>; 765*f126890aSEmmanuel Vadot full-duplex; 766*f126890aSEmmanuel Vadot }; 767*f126890aSEmmanuel Vadot }; 768*f126890aSEmmanuel Vadot 769*f126890aSEmmanuel Vadot port@3 { 770*f126890aSEmmanuel Vadot reg = <3>; 771*f126890aSEmmanuel Vadot label = "netright"; 772*f126890aSEmmanuel Vadot phy-handle = <&switchphy3>; 773*f126890aSEmmanuel Vadot }; 774*f126890aSEmmanuel Vadot 775*f126890aSEmmanuel Vadot port@4 { 776*f126890aSEmmanuel Vadot reg = <4>; 777*f126890aSEmmanuel Vadot label = "netleft"; 778*f126890aSEmmanuel Vadot phy-handle = <&switchphy4>; 779*f126890aSEmmanuel Vadot }; 780*f126890aSEmmanuel Vadot }; 781*f126890aSEmmanuel Vadot 782*f126890aSEmmanuel Vadot mdio { 783*f126890aSEmmanuel Vadot #address-cells = <1>; 784*f126890aSEmmanuel Vadot #size-cells = <0>; 785*f126890aSEmmanuel Vadot 786*f126890aSEmmanuel Vadot switchphy0: switchphy@0 { 787*f126890aSEmmanuel Vadot reg = <0>; 788*f126890aSEmmanuel Vadot interrupt-parent = <&switch>; 789*f126890aSEmmanuel Vadot interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 790*f126890aSEmmanuel Vadot }; 791*f126890aSEmmanuel Vadot 792*f126890aSEmmanuel Vadot switchphy1: switchphy@1 { 793*f126890aSEmmanuel Vadot reg = <1>; 794*f126890aSEmmanuel Vadot interrupt-parent = <&switch>; 795*f126890aSEmmanuel Vadot interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; 796*f126890aSEmmanuel Vadot }; 797*f126890aSEmmanuel Vadot 798*f126890aSEmmanuel Vadot switchphy2: switchphy@2 { 799*f126890aSEmmanuel Vadot reg = <2>; 800*f126890aSEmmanuel Vadot interrupt-parent = <&switch>; 801*f126890aSEmmanuel Vadot interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; 802*f126890aSEmmanuel Vadot }; 803*f126890aSEmmanuel Vadot 804*f126890aSEmmanuel Vadot switchphy3: switchphy@3 { 805*f126890aSEmmanuel Vadot reg = <3>; 806*f126890aSEmmanuel Vadot interrupt-parent = <&switch>; 807*f126890aSEmmanuel Vadot interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; 808*f126890aSEmmanuel Vadot }; 809*f126890aSEmmanuel Vadot 810*f126890aSEmmanuel Vadot switchphy4: switchphy@4 { 811*f126890aSEmmanuel Vadot reg = <4>; 812*f126890aSEmmanuel Vadot interrupt-parent = <&switch>; 813*f126890aSEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; 814*f126890aSEmmanuel Vadot }; 815*f126890aSEmmanuel Vadot }; 816*f126890aSEmmanuel Vadot }; 817*f126890aSEmmanuel Vadot }; 818*f126890aSEmmanuel Vadot}; 819*f126890aSEmmanuel Vadot 820*f126890aSEmmanuel Vadot&usbh1 { 821*f126890aSEmmanuel Vadot vbus-supply = <®_5p0v_main>; 822*f126890aSEmmanuel Vadot disable-over-current; 823*f126890aSEmmanuel Vadot maximum-speed = "full-speed"; 824*f126890aSEmmanuel Vadot status = "okay"; 825*f126890aSEmmanuel Vadot}; 826*f126890aSEmmanuel Vadot 827*f126890aSEmmanuel Vadot&usbotg { 828*f126890aSEmmanuel Vadot vbus-supply = <®_5p0v_user_usb>; 829*f126890aSEmmanuel Vadot disable-over-current; 830*f126890aSEmmanuel Vadot dr_mode = "host"; 831*f126890aSEmmanuel Vadot status = "okay"; 832*f126890aSEmmanuel Vadot}; 833*f126890aSEmmanuel Vadot 834*f126890aSEmmanuel Vadot&snvs_rtc { 835*f126890aSEmmanuel Vadot status = "disabled"; 836*f126890aSEmmanuel Vadot}; 837*f126890aSEmmanuel Vadot 838*f126890aSEmmanuel Vadot&ssi1 { 839*f126890aSEmmanuel Vadot status = "okay"; 840*f126890aSEmmanuel Vadot}; 841*f126890aSEmmanuel Vadot 842*f126890aSEmmanuel Vadot&ssi2 { 843*f126890aSEmmanuel Vadot status = "okay"; 844*f126890aSEmmanuel Vadot}; 845*f126890aSEmmanuel Vadot 846*f126890aSEmmanuel Vadot&audmux { 847*f126890aSEmmanuel Vadot pinctrl-names = "default"; 848*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_audmux>; 849*f126890aSEmmanuel Vadot status = "okay"; 850*f126890aSEmmanuel Vadot 851*f126890aSEmmanuel Vadot mux-ssi1 { 852*f126890aSEmmanuel Vadot fsl,audmux-port = <0>; 853*f126890aSEmmanuel Vadot fsl,port-config = < 854*f126890aSEmmanuel Vadot (IMX_AUDMUX_V2_PTCR_SYN | 855*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSEL(2) | 856*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCSEL(2) | 857*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSDIR | 858*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCLKDIR) 859*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PDCR_RXDSEL(2) 860*f126890aSEmmanuel Vadot >; 861*f126890aSEmmanuel Vadot }; 862*f126890aSEmmanuel Vadot 863*f126890aSEmmanuel Vadot mux-aud3 { 864*f126890aSEmmanuel Vadot fsl,audmux-port = <2>; 865*f126890aSEmmanuel Vadot fsl,port-config = < 866*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_SYN 867*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PDCR_RXDSEL(0) 868*f126890aSEmmanuel Vadot >; 869*f126890aSEmmanuel Vadot }; 870*f126890aSEmmanuel Vadot 871*f126890aSEmmanuel Vadot mux-ssi2 { 872*f126890aSEmmanuel Vadot fsl,audmux-port = <1>; 873*f126890aSEmmanuel Vadot fsl,port-config = < 874*f126890aSEmmanuel Vadot (IMX_AUDMUX_V2_PTCR_SYN | 875*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSEL(4) | 876*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCSEL(4) | 877*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSDIR | 878*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCLKDIR) 879*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PDCR_RXDSEL(4) 880*f126890aSEmmanuel Vadot >; 881*f126890aSEmmanuel Vadot }; 882*f126890aSEmmanuel Vadot 883*f126890aSEmmanuel Vadot mux-aud5 { 884*f126890aSEmmanuel Vadot fsl,audmux-port = <4>; 885*f126890aSEmmanuel Vadot fsl,port-config = < 886*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_SYN 887*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PDCR_RXDSEL(1) 888*f126890aSEmmanuel Vadot >; 889*f126890aSEmmanuel Vadot }; 890*f126890aSEmmanuel Vadot}; 891*f126890aSEmmanuel Vadot 892*f126890aSEmmanuel Vadot&iomuxc { 893*f126890aSEmmanuel Vadot pinctrl_accel: accelgrp { 894*f126890aSEmmanuel Vadot fsl,pins = < 895*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x4001b000 896*f126890aSEmmanuel Vadot >; 897*f126890aSEmmanuel Vadot }; 898*f126890aSEmmanuel Vadot 899*f126890aSEmmanuel Vadot pinctrl_audmux: audmuxgrp { 900*f126890aSEmmanuel Vadot fsl,pins = < 901*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 902*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 903*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 904*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 905*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0 906*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 907*f126890aSEmmanuel Vadot >; 908*f126890aSEmmanuel Vadot }; 909*f126890aSEmmanuel Vadot 910*f126890aSEmmanuel Vadot pinctrl_codec1: dac1grp { 911*f126890aSEmmanuel Vadot fsl,pins = < 912*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x40000038 913*f126890aSEmmanuel Vadot >; 914*f126890aSEmmanuel Vadot }; 915*f126890aSEmmanuel Vadot 916*f126890aSEmmanuel Vadot pinctrl_codec2: dac2grp { 917*f126890aSEmmanuel Vadot fsl,pins = < 918*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x40000038 919*f126890aSEmmanuel Vadot >; 920*f126890aSEmmanuel Vadot }; 921*f126890aSEmmanuel Vadot 922*f126890aSEmmanuel Vadot pinctrl_disp0: disp0grp { 923*f126890aSEmmanuel Vadot fsl,pins = < 924*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100f9 925*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100f9 926*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f9 927*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f9 928*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100f9 929*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100f9 930*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100f9 931*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100f9 932*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100f9 933*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100f9 934*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100f9 935*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100f9 936*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100f9 937*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100f9 938*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100f9 939*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100f9 940*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100f9 941*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100f9 942*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100f9 943*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100f9 944*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100f9 945*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100f9 946*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x100f9 947*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x100f9 948*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x100f9 949*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x100f9 950*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x100f9 951*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x100f9 952*f126890aSEmmanuel Vadot >; 953*f126890aSEmmanuel Vadot }; 954*f126890aSEmmanuel Vadot 955*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 956*f126890aSEmmanuel Vadot fsl,pins = < 957*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 958*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 959*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 960*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b1 961*f126890aSEmmanuel Vadot >; 962*f126890aSEmmanuel Vadot }; 963*f126890aSEmmanuel Vadot 964*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 965*f126890aSEmmanuel Vadot fsl,pins = < 966*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x000b1 967*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b1 968*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5 969*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5 970*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0 971*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0 972*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5 973*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5 974*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x40010040 975*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x100b0 976*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 977*f126890aSEmmanuel Vadot >; 978*f126890aSEmmanuel Vadot }; 979*f126890aSEmmanuel Vadot 980*f126890aSEmmanuel Vadot pinctrl_gpio3_hog: gpio3hoggrp { 981*f126890aSEmmanuel Vadot fsl,pins = < 982*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b0 983*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 984*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 985*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 986*f126890aSEmmanuel Vadot >; 987*f126890aSEmmanuel Vadot }; 988*f126890aSEmmanuel Vadot 989*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 990*f126890aSEmmanuel Vadot fsl,pins = < 991*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b811 992*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b811 993*f126890aSEmmanuel Vadot >; 994*f126890aSEmmanuel Vadot }; 995*f126890aSEmmanuel Vadot 996*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 997*f126890aSEmmanuel Vadot fsl,pins = < 998*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b811 999*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b811 1000*f126890aSEmmanuel Vadot >; 1001*f126890aSEmmanuel Vadot }; 1002*f126890aSEmmanuel Vadot 1003*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 1004*f126890aSEmmanuel Vadot fsl,pins = < 1005*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b811 1006*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b811 1007*f126890aSEmmanuel Vadot >; 1008*f126890aSEmmanuel Vadot }; 1009*f126890aSEmmanuel Vadot 1010*f126890aSEmmanuel Vadot pinctrl_mdio1: bitbangmdiogrp { 1011*f126890aSEmmanuel Vadot fsl,pins = < 1012*f126890aSEmmanuel Vadot /* Bitbang MDIO for DEB Switch */ 1013*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x4001b030 1014*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40018830 1015*f126890aSEmmanuel Vadot >; 1016*f126890aSEmmanuel Vadot }; 1017*f126890aSEmmanuel Vadot 1018*f126890aSEmmanuel Vadot pinctrl_pcie: pciegrp { 1019*f126890aSEmmanuel Vadot fsl,pins = < 1020*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x10038 1021*f126890aSEmmanuel Vadot >; 1022*f126890aSEmmanuel Vadot }; 1023*f126890aSEmmanuel Vadot 1024*f126890aSEmmanuel Vadot pinctrl_pfuze100_irq: pfuze100grp { 1025*f126890aSEmmanuel Vadot fsl,pins = < 1026*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x40010000 1027*f126890aSEmmanuel Vadot >; 1028*f126890aSEmmanuel Vadot }; 1029*f126890aSEmmanuel Vadot 1030*f126890aSEmmanuel Vadot pinctrl_reg_3p3v_sd: mmcsupply1grp { 1031*f126890aSEmmanuel Vadot fsl,pins = < 1032*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x858 1033*f126890aSEmmanuel Vadot >; 1034*f126890aSEmmanuel Vadot }; 1035*f126890aSEmmanuel Vadot 1036*f126890aSEmmanuel Vadot pinctrl_rmii_phy_irq: phygrp { 1037*f126890aSEmmanuel Vadot fsl,pins = < 1038*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x40010000 1039*f126890aSEmmanuel Vadot >; 1040*f126890aSEmmanuel Vadot }; 1041*f126890aSEmmanuel Vadot 1042*f126890aSEmmanuel Vadot pinctrl_switch_irq: switchgrp { 1043*f126890aSEmmanuel Vadot fsl,pins = < 1044*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x4001b000 1045*f126890aSEmmanuel Vadot >; 1046*f126890aSEmmanuel Vadot }; 1047*f126890aSEmmanuel Vadot 1048*f126890aSEmmanuel Vadot pinctrl_tc358767: tc358767grp { 1049*f126890aSEmmanuel Vadot fsl,pins = < 1050*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10 1051*f126890aSEmmanuel Vadot >; 1052*f126890aSEmmanuel Vadot }; 1053*f126890aSEmmanuel Vadot 1054*f126890aSEmmanuel Vadot pinctrl_tpa1: tpa6130-1grp { 1055*f126890aSEmmanuel Vadot fsl,pins = < 1056*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x40000038 1057*f126890aSEmmanuel Vadot >; 1058*f126890aSEmmanuel Vadot }; 1059*f126890aSEmmanuel Vadot 1060*f126890aSEmmanuel Vadot pinctrl_tpa2: tpa6130-2grp { 1061*f126890aSEmmanuel Vadot fsl,pins = < 1062*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x40000038 1063*f126890aSEmmanuel Vadot >; 1064*f126890aSEmmanuel Vadot }; 1065*f126890aSEmmanuel Vadot 1066*f126890aSEmmanuel Vadot pinctrl_ts: tsgrp { 1067*f126890aSEmmanuel Vadot fsl,pins = < 1068*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 1069*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 1070*f126890aSEmmanuel Vadot >; 1071*f126890aSEmmanuel Vadot }; 1072*f126890aSEmmanuel Vadot 1073*f126890aSEmmanuel Vadot pinctrl_uart1: uart1grp { 1074*f126890aSEmmanuel Vadot fsl,pins = < 1075*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 1076*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 1077*f126890aSEmmanuel Vadot >; 1078*f126890aSEmmanuel Vadot }; 1079*f126890aSEmmanuel Vadot 1080*f126890aSEmmanuel Vadot pinctrl_uart3: uart3grp { 1081*f126890aSEmmanuel Vadot fsl,pins = < 1082*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 1083*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 1084*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 1085*f126890aSEmmanuel Vadot >; 1086*f126890aSEmmanuel Vadot }; 1087*f126890aSEmmanuel Vadot 1088*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 1089*f126890aSEmmanuel Vadot fsl,pins = < 1090*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 1091*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 1092*f126890aSEmmanuel Vadot >; 1093*f126890aSEmmanuel Vadot }; 1094*f126890aSEmmanuel Vadot 1095*f126890aSEmmanuel Vadot pinctrl_ucs1002_pins: ucs1002grp { 1096*f126890aSEmmanuel Vadot fsl,pins = < 1097*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 1098*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x1b0b0 1099*f126890aSEmmanuel Vadot >; 1100*f126890aSEmmanuel Vadot }; 1101*f126890aSEmmanuel Vadot 1102*f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 1103*f126890aSEmmanuel Vadot fsl,pins = < 1104*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CMD__SD2_CMD 0x10059 1105*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069 1106*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 1107*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 1108*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 1109*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 1110*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x40010040 1111*f126890aSEmmanuel Vadot >; 1112*f126890aSEmmanuel Vadot }; 1113*f126890aSEmmanuel Vadot 1114*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 1115*f126890aSEmmanuel Vadot fsl,pins = < 1116*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x10059 1117*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069 1118*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 1119*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 1120*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 1121*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 1122*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x40010040 1123*f126890aSEmmanuel Vadot 1124*f126890aSEmmanuel Vadot >; 1125*f126890aSEmmanuel Vadot }; 1126*f126890aSEmmanuel Vadot 1127*f126890aSEmmanuel Vadot pinctrl_usdhc4: usdhc4grp { 1128*f126890aSEmmanuel Vadot fsl,pins = < 1129*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 1130*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 1131*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 1132*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 1133*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 1134*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 1135*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 1136*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 1137*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 1138*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 1139*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x1b0b1 1140*f126890aSEmmanuel Vadot >; 1141*f126890aSEmmanuel Vadot }; 1142*f126890aSEmmanuel Vadot}; 1143