xref: /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/imx6qdl-pico.dtsi (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 OR MIT
2*f126890aSEmmanuel Vadot//
3*f126890aSEmmanuel Vadot// Copyright 2018 Technexion Ltd.
4*f126890aSEmmanuel Vadot//
5*f126890aSEmmanuel Vadot// Author: Wig Cheng <wig.cheng@technexion.com>
6*f126890aSEmmanuel Vadot//	   Richard Hu <richard.hu@technexion.com>
7*f126890aSEmmanuel Vadot//	   Tapani Utriainen <tapani@technexion.com>
8*f126890aSEmmanuel Vadot
9*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
10*f126890aSEmmanuel Vadot
11*f126890aSEmmanuel Vadot/ {
12*f126890aSEmmanuel Vadot	chosen {
13*f126890aSEmmanuel Vadot		stdout-path = &uart1;
14*f126890aSEmmanuel Vadot	};
15*f126890aSEmmanuel Vadot
16*f126890aSEmmanuel Vadot	reg_2p5v: regulator-2p5v {
17*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
18*f126890aSEmmanuel Vadot		regulator-name = "2P5V";
19*f126890aSEmmanuel Vadot		regulator-min-microvolt = <2500000>;
20*f126890aSEmmanuel Vadot		regulator-max-microvolt = <2500000>;
21*f126890aSEmmanuel Vadot		regulator-always-on;
22*f126890aSEmmanuel Vadot	};
23*f126890aSEmmanuel Vadot
24*f126890aSEmmanuel Vadot	reg_3p3v: regulator-3p3v {
25*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
26*f126890aSEmmanuel Vadot		regulator-name = "3P3V";
27*f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
28*f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
29*f126890aSEmmanuel Vadot		regulator-always-on;
30*f126890aSEmmanuel Vadot	};
31*f126890aSEmmanuel Vadot
32*f126890aSEmmanuel Vadot	reg_1p8v: regulator-1p8v {
33*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
34*f126890aSEmmanuel Vadot		regulator-name = "1P8V";
35*f126890aSEmmanuel Vadot		regulator-min-microvolt = <1800000>;
36*f126890aSEmmanuel Vadot		regulator-max-microvolt = <1800000>;
37*f126890aSEmmanuel Vadot		regulator-always-on;
38*f126890aSEmmanuel Vadot	};
39*f126890aSEmmanuel Vadot
40*f126890aSEmmanuel Vadot	reg_1p5v: regulator-1p5v {
41*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
42*f126890aSEmmanuel Vadot		regulator-name = "1P5V";
43*f126890aSEmmanuel Vadot		regulator-min-microvolt = <1500000>;
44*f126890aSEmmanuel Vadot		regulator-max-microvolt = <1500000>;
45*f126890aSEmmanuel Vadot		regulator-always-on;
46*f126890aSEmmanuel Vadot	};
47*f126890aSEmmanuel Vadot
48*f126890aSEmmanuel Vadot	reg_2p8v: regulator-2p8v {
49*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
50*f126890aSEmmanuel Vadot		regulator-name = "2P8V";
51*f126890aSEmmanuel Vadot		regulator-min-microvolt = <2800000>;
52*f126890aSEmmanuel Vadot		regulator-max-microvolt = <2800000>;
53*f126890aSEmmanuel Vadot		regulator-always-on;
54*f126890aSEmmanuel Vadot	};
55*f126890aSEmmanuel Vadot
56*f126890aSEmmanuel Vadot	reg_usb_otg_vbus: regulator-usb-otg-vbus {
57*f126890aSEmmanuel Vadot		pinctrl-names = "default";
58*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_usbotg_vbus>;
59*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
60*f126890aSEmmanuel Vadot		regulator-name = "usb_otg_vbus";
61*f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
62*f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
63*f126890aSEmmanuel Vadot		gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
64*f126890aSEmmanuel Vadot	};
65*f126890aSEmmanuel Vadot
66*f126890aSEmmanuel Vadot	codec_osc: clock {
67*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
68*f126890aSEmmanuel Vadot		#clock-cells = <0>;
69*f126890aSEmmanuel Vadot		clock-frequency = <24576000>;
70*f126890aSEmmanuel Vadot	};
71*f126890aSEmmanuel Vadot
72*f126890aSEmmanuel Vadot	sound {
73*f126890aSEmmanuel Vadot		compatible = "fsl,imx-audio-sgtl5000";
74*f126890aSEmmanuel Vadot		model = "imx6-pico-sgtl5000";
75*f126890aSEmmanuel Vadot		ssi-controller = <&ssi1>;
76*f126890aSEmmanuel Vadot		audio-codec = <&sgtl5000>;
77*f126890aSEmmanuel Vadot		audio-routing =
78*f126890aSEmmanuel Vadot			"MIC_IN", "Mic Jack",
79*f126890aSEmmanuel Vadot			"Mic Jack", "Mic Bias",
80*f126890aSEmmanuel Vadot			"Headphone Jack", "HP_OUT";
81*f126890aSEmmanuel Vadot		mux-int-port = <1>;
82*f126890aSEmmanuel Vadot		mux-ext-port = <3>;
83*f126890aSEmmanuel Vadot	};
84*f126890aSEmmanuel Vadot
85*f126890aSEmmanuel Vadot	backlight: backlight {
86*f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
87*f126890aSEmmanuel Vadot		pwms = <&pwm4 0 50000 0>;
88*f126890aSEmmanuel Vadot		brightness-levels = <0 36 72 108 144 180 216 255>;
89*f126890aSEmmanuel Vadot		default-brightness-level = <6>;
90*f126890aSEmmanuel Vadot		status = "okay";
91*f126890aSEmmanuel Vadot	};
92*f126890aSEmmanuel Vadot
93*f126890aSEmmanuel Vadot	reg_lcd_3v3: regulator-lcd-3v3 {
94*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
95*f126890aSEmmanuel Vadot		pinctrl-names = "default";
96*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_reg_lcd>;
97*f126890aSEmmanuel Vadot		regulator-name = "lcd-3v3";
98*f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
99*f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
100*f126890aSEmmanuel Vadot		gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
101*f126890aSEmmanuel Vadot		enable-active-high;
102*f126890aSEmmanuel Vadot	};
103*f126890aSEmmanuel Vadot
104*f126890aSEmmanuel Vadot	lcd_display: disp0 {
105*f126890aSEmmanuel Vadot		compatible = "fsl,imx-parallel-display";
106*f126890aSEmmanuel Vadot		#address-cells = <1>;
107*f126890aSEmmanuel Vadot		#size-cells = <0>;
108*f126890aSEmmanuel Vadot		pinctrl-names = "default";
109*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_ipu1>;
110*f126890aSEmmanuel Vadot		status = "okay";
111*f126890aSEmmanuel Vadot
112*f126890aSEmmanuel Vadot		port@0 {
113*f126890aSEmmanuel Vadot			reg = <0>;
114*f126890aSEmmanuel Vadot
115*f126890aSEmmanuel Vadot			lcd_display_in: endpoint {
116*f126890aSEmmanuel Vadot				remote-endpoint = <&ipu1_di0_disp0>;
117*f126890aSEmmanuel Vadot			};
118*f126890aSEmmanuel Vadot		};
119*f126890aSEmmanuel Vadot
120*f126890aSEmmanuel Vadot		port@1 {
121*f126890aSEmmanuel Vadot			reg = <1>;
122*f126890aSEmmanuel Vadot
123*f126890aSEmmanuel Vadot			lcd_display_out: endpoint {
124*f126890aSEmmanuel Vadot				remote-endpoint = <&lcd_panel_in>;
125*f126890aSEmmanuel Vadot			};
126*f126890aSEmmanuel Vadot		};
127*f126890aSEmmanuel Vadot	};
128*f126890aSEmmanuel Vadot
129*f126890aSEmmanuel Vadot	panel {
130*f126890aSEmmanuel Vadot		compatible = "vxt,vl050-8048nt-c01";
131*f126890aSEmmanuel Vadot		backlight = <&backlight>;
132*f126890aSEmmanuel Vadot		power-supply = <&reg_lcd_3v3>;
133*f126890aSEmmanuel Vadot
134*f126890aSEmmanuel Vadot		port {
135*f126890aSEmmanuel Vadot			lcd_panel_in: endpoint {
136*f126890aSEmmanuel Vadot				remote-endpoint = <&lcd_display_out>;
137*f126890aSEmmanuel Vadot			};
138*f126890aSEmmanuel Vadot		};
139*f126890aSEmmanuel Vadot	};
140*f126890aSEmmanuel Vadot};
141*f126890aSEmmanuel Vadot
142*f126890aSEmmanuel Vadot&audmux {
143*f126890aSEmmanuel Vadot	pinctrl-names = "default";
144*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_audmux>;
145*f126890aSEmmanuel Vadot	status = "okay";
146*f126890aSEmmanuel Vadot};
147*f126890aSEmmanuel Vadot
148*f126890aSEmmanuel Vadot&can1 {
149*f126890aSEmmanuel Vadot	pinctrl-names = "default";
150*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_flexcan1>;
151*f126890aSEmmanuel Vadot	status = "okay";
152*f126890aSEmmanuel Vadot};
153*f126890aSEmmanuel Vadot
154*f126890aSEmmanuel Vadot&can2 {
155*f126890aSEmmanuel Vadot	pinctrl-names = "default";
156*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_flexcan2>;
157*f126890aSEmmanuel Vadot	status = "okay";
158*f126890aSEmmanuel Vadot};
159*f126890aSEmmanuel Vadot
160*f126890aSEmmanuel Vadot&clks {
161*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
162*f126890aSEmmanuel Vadot			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
163*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
164*f126890aSEmmanuel Vadot				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
165*f126890aSEmmanuel Vadot};
166*f126890aSEmmanuel Vadot
167*f126890aSEmmanuel Vadot&ecspi2 {
168*f126890aSEmmanuel Vadot	pinctrl-names = "default";
169*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_ecspi2>;
170*f126890aSEmmanuel Vadot	cs-gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
171*f126890aSEmmanuel Vadot	status = "okay";
172*f126890aSEmmanuel Vadot};
173*f126890aSEmmanuel Vadot
174*f126890aSEmmanuel Vadot&fec {
175*f126890aSEmmanuel Vadot	pinctrl-names = "default";
176*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet>;
177*f126890aSEmmanuel Vadot	phy-mode = "rgmii-id";
178*f126890aSEmmanuel Vadot	phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
179*f126890aSEmmanuel Vadot	phy-handle = <&phy>;
180*f126890aSEmmanuel Vadot	status = "okay";
181*f126890aSEmmanuel Vadot
182*f126890aSEmmanuel Vadot	mdio {
183*f126890aSEmmanuel Vadot		#address-cells = <1>;
184*f126890aSEmmanuel Vadot		#size-cells = <0>;
185*f126890aSEmmanuel Vadot
186*f126890aSEmmanuel Vadot		phy: ethernet-phy@1 {
187*f126890aSEmmanuel Vadot			reg = <1>;
188*f126890aSEmmanuel Vadot			qca,clk-out-frequency = <125000000>;
189*f126890aSEmmanuel Vadot		};
190*f126890aSEmmanuel Vadot	};
191*f126890aSEmmanuel Vadot};
192*f126890aSEmmanuel Vadot
193*f126890aSEmmanuel Vadot&hdmi {
194*f126890aSEmmanuel Vadot	ddc-i2c-bus = <&i2c2>;
195*f126890aSEmmanuel Vadot	status = "okay";
196*f126890aSEmmanuel Vadot};
197*f126890aSEmmanuel Vadot
198*f126890aSEmmanuel Vadot&i2c1 {
199*f126890aSEmmanuel Vadot	pinctrl-names = "default";
200*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
201*f126890aSEmmanuel Vadot	status = "okay";
202*f126890aSEmmanuel Vadot
203*f126890aSEmmanuel Vadot	sgtl5000: audio-codec@a {
204*f126890aSEmmanuel Vadot		#sound-dai-cells = <0>;
205*f126890aSEmmanuel Vadot		reg = <0x0a>;
206*f126890aSEmmanuel Vadot		compatible = "fsl,sgtl5000";
207*f126890aSEmmanuel Vadot		clocks = <&codec_osc>;
208*f126890aSEmmanuel Vadot		VDDA-supply = <&reg_2p5v>;
209*f126890aSEmmanuel Vadot		VDDIO-supply = <&reg_1p8v>;
210*f126890aSEmmanuel Vadot	};
211*f126890aSEmmanuel Vadot};
212*f126890aSEmmanuel Vadot
213*f126890aSEmmanuel Vadot&i2c2 {
214*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
215*f126890aSEmmanuel Vadot	pinctrl-names = "default";
216*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c2>;
217*f126890aSEmmanuel Vadot	status = "okay";
218*f126890aSEmmanuel Vadot
219*f126890aSEmmanuel Vadot	touchscreen@38 {
220*f126890aSEmmanuel Vadot		compatible = "edt,edt-ft5x06";
221*f126890aSEmmanuel Vadot		reg = <0x38>;
222*f126890aSEmmanuel Vadot		interrupt-parent = <&gpio5>;
223*f126890aSEmmanuel Vadot		interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
224*f126890aSEmmanuel Vadot		reset-gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
225*f126890aSEmmanuel Vadot		touchscreen-size-x = <800>;
226*f126890aSEmmanuel Vadot		touchscreen-size-y = <480>;
227*f126890aSEmmanuel Vadot		wakeup-source;
228*f126890aSEmmanuel Vadot	};
229*f126890aSEmmanuel Vadot
230*f126890aSEmmanuel Vadot	camera@3c {
231*f126890aSEmmanuel Vadot		compatible = "ovti,ov5645";
232*f126890aSEmmanuel Vadot		pinctrl-names = "default";
233*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_ov5645>;
234*f126890aSEmmanuel Vadot		reg = <0x3c>;
235*f126890aSEmmanuel Vadot		clocks = <&clks IMX6QDL_CLK_CKO2>;
236*f126890aSEmmanuel Vadot		clock-frequency = <24000000>;
237*f126890aSEmmanuel Vadot		vdddo-supply = <&reg_1p8v>;
238*f126890aSEmmanuel Vadot		vdda-supply = <&reg_2p8v>;
239*f126890aSEmmanuel Vadot		vddd-supply = <&reg_1p5v>;
240*f126890aSEmmanuel Vadot		enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
241*f126890aSEmmanuel Vadot		reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
242*f126890aSEmmanuel Vadot
243*f126890aSEmmanuel Vadot		port {
244*f126890aSEmmanuel Vadot			ov5645_to_mipi_csi2: endpoint {
245*f126890aSEmmanuel Vadot				remote-endpoint = <&mipi_csi2_in>;
246*f126890aSEmmanuel Vadot				clock-lanes = <0>;
247*f126890aSEmmanuel Vadot				data-lanes = <1 2>;
248*f126890aSEmmanuel Vadot			};
249*f126890aSEmmanuel Vadot		};
250*f126890aSEmmanuel Vadot	};
251*f126890aSEmmanuel Vadot};
252*f126890aSEmmanuel Vadot
253*f126890aSEmmanuel Vadot&i2c3 {
254*f126890aSEmmanuel Vadot	pinctrl-names = "default";
255*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c3>;
256*f126890aSEmmanuel Vadot	status = "okay";
257*f126890aSEmmanuel Vadot};
258*f126890aSEmmanuel Vadot
259*f126890aSEmmanuel Vadot&ipu1_di0_disp0 {
260*f126890aSEmmanuel Vadot	remote-endpoint = <&lcd_display_in>;
261*f126890aSEmmanuel Vadot};
262*f126890aSEmmanuel Vadot
263*f126890aSEmmanuel Vadot&mipi_csi {
264*f126890aSEmmanuel Vadot	status = "okay";
265*f126890aSEmmanuel Vadot
266*f126890aSEmmanuel Vadot	port@0 {
267*f126890aSEmmanuel Vadot		reg = <0>;
268*f126890aSEmmanuel Vadot
269*f126890aSEmmanuel Vadot		mipi_csi2_in: endpoint {
270*f126890aSEmmanuel Vadot			remote-endpoint = <&ov5645_to_mipi_csi2>;
271*f126890aSEmmanuel Vadot			clock-lanes = <0>;
272*f126890aSEmmanuel Vadot			data-lanes = <1 2>;
273*f126890aSEmmanuel Vadot		};
274*f126890aSEmmanuel Vadot	};
275*f126890aSEmmanuel Vadot};
276*f126890aSEmmanuel Vadot
277*f126890aSEmmanuel Vadot&pcie {
278*f126890aSEmmanuel Vadot	pinctrl-names = "default";
279*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pcie_reset>;
280*f126890aSEmmanuel Vadot	reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>;
281*f126890aSEmmanuel Vadot};
282*f126890aSEmmanuel Vadot
283*f126890aSEmmanuel Vadot&pwm1 {
284*f126890aSEmmanuel Vadot	pinctrl-names = "default";
285*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm1>;
286*f126890aSEmmanuel Vadot	status = "okay";
287*f126890aSEmmanuel Vadot};
288*f126890aSEmmanuel Vadot
289*f126890aSEmmanuel Vadot&pwm2 {
290*f126890aSEmmanuel Vadot	pinctrl-names = "default";
291*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm2>;
292*f126890aSEmmanuel Vadot	status = "okay";
293*f126890aSEmmanuel Vadot};
294*f126890aSEmmanuel Vadot
295*f126890aSEmmanuel Vadot&pwm3 {
296*f126890aSEmmanuel Vadot	pinctrl-names = "default";
297*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm3>;
298*f126890aSEmmanuel Vadot	status = "okay";
299*f126890aSEmmanuel Vadot};
300*f126890aSEmmanuel Vadot
301*f126890aSEmmanuel Vadot&pwm4 {
302*f126890aSEmmanuel Vadot	pinctrl-names = "default";
303*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm4>;
304*f126890aSEmmanuel Vadot	status = "okay";
305*f126890aSEmmanuel Vadot};
306*f126890aSEmmanuel Vadot
307*f126890aSEmmanuel Vadot&ssi1 {
308*f126890aSEmmanuel Vadot	status = "okay";
309*f126890aSEmmanuel Vadot};
310*f126890aSEmmanuel Vadot
311*f126890aSEmmanuel Vadot&uart1 {
312*f126890aSEmmanuel Vadot	pinctrl-names = "default";
313*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart1>;
314*f126890aSEmmanuel Vadot	status = "okay";
315*f126890aSEmmanuel Vadot};
316*f126890aSEmmanuel Vadot
317*f126890aSEmmanuel Vadot&uart2 {  /* Bluetooth module */
318*f126890aSEmmanuel Vadot	pinctrl-names = "default";
319*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
320*f126890aSEmmanuel Vadot	uart-has-rtscts;
321*f126890aSEmmanuel Vadot	status = "okay";
322*f126890aSEmmanuel Vadot};
323*f126890aSEmmanuel Vadot
324*f126890aSEmmanuel Vadot&uart3 {
325*f126890aSEmmanuel Vadot	pinctrl-names = "default";
326*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart3>;
327*f126890aSEmmanuel Vadot	uart-has-rtscts;
328*f126890aSEmmanuel Vadot	status = "okay";
329*f126890aSEmmanuel Vadot};
330*f126890aSEmmanuel Vadot
331*f126890aSEmmanuel Vadot&usbh1 {
332*f126890aSEmmanuel Vadot	status = "okay";
333*f126890aSEmmanuel Vadot};
334*f126890aSEmmanuel Vadot
335*f126890aSEmmanuel Vadot&usbotg {
336*f126890aSEmmanuel Vadot	vbus-supply = <&reg_usb_otg_vbus>;
337*f126890aSEmmanuel Vadot	pinctrl-names = "default";
338*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usbotg>;
339*f126890aSEmmanuel Vadot	disable-over-current;
340*f126890aSEmmanuel Vadot	dr_mode = "otg";
341*f126890aSEmmanuel Vadot	status = "okay";
342*f126890aSEmmanuel Vadot};
343*f126890aSEmmanuel Vadot
344*f126890aSEmmanuel Vadot&usdhc1 {
345*f126890aSEmmanuel Vadot	pinctrl-names = "default";
346*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
347*f126890aSEmmanuel Vadot	bus-width = <8>;
348*f126890aSEmmanuel Vadot	cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
349*f126890aSEmmanuel Vadot	status = "okay";
350*f126890aSEmmanuel Vadot};
351*f126890aSEmmanuel Vadot
352*f126890aSEmmanuel Vadot&usdhc2 {  /* Wifi/BT  */
353*f126890aSEmmanuel Vadot	pinctrl-names = "default";
354*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc2>;
355*f126890aSEmmanuel Vadot	bus-width = <4>;
356*f126890aSEmmanuel Vadot	no-1-8-v;
357*f126890aSEmmanuel Vadot	keep-power-in-suspend;
358*f126890aSEmmanuel Vadot	non-removable;
359*f126890aSEmmanuel Vadot	status = "okay";
360*f126890aSEmmanuel Vadot};
361*f126890aSEmmanuel Vadot
362*f126890aSEmmanuel Vadot&usdhc3 {
363*f126890aSEmmanuel Vadot	pinctrl-names = "default";
364*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc3>;
365*f126890aSEmmanuel Vadot	bus-width = <8>;
366*f126890aSEmmanuel Vadot	no-1-8-v;
367*f126890aSEmmanuel Vadot	non-removable;
368*f126890aSEmmanuel Vadot	status = "okay";
369*f126890aSEmmanuel Vadot};
370*f126890aSEmmanuel Vadot
371*f126890aSEmmanuel Vadot&iomuxc {
372*f126890aSEmmanuel Vadot	pinctrl-names = "default";
373*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_hog>;
374*f126890aSEmmanuel Vadot
375*f126890aSEmmanuel Vadot	pinctrl_hog: hoggrp {
376*f126890aSEmmanuel Vadot		fsl,pins = <
377*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19	0x4001b0b5 /* PICO_P24 */
378*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x4001b0b5 /* PICO_P26 */
379*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20	0x4001b0b5 /* PICO_P28 */
380*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26	0x4001b0b5 /* PICO_P30 */
381*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27	0x4001b0b5 /* PICO_P32 */
382*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x4001b0b5 /* PICO_P34 */
383*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30	0x4001b0b5 /* PICO_P42 */
384*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x4001b0b5 /* PICO_P44 */
385*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01	0x4001b0b5 /* PICO_P48 */
386*f126890aSEmmanuel Vadot		>;
387*f126890aSEmmanuel Vadot	};
388*f126890aSEmmanuel Vadot
389*f126890aSEmmanuel Vadot	pinctrl_audmux: audmuxgrp {
390*f126890aSEmmanuel Vadot		fsl,pins = <
391*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
392*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
393*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
394*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
395*f126890aSEmmanuel Vadot		>;
396*f126890aSEmmanuel Vadot	};
397*f126890aSEmmanuel Vadot
398*f126890aSEmmanuel Vadot	pinctrl_ecspi1: ecspi1grp {
399*f126890aSEmmanuel Vadot		fsl,pins = <
400*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
401*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
402*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
403*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x000f0b0
404*f126890aSEmmanuel Vadot		>;
405*f126890aSEmmanuel Vadot	};
406*f126890aSEmmanuel Vadot
407*f126890aSEmmanuel Vadot	pinctrl_ecspi2: ecspi2grp {
408*f126890aSEmmanuel Vadot		fsl,pins = <
409*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_OE__ECSPI2_MISO		0x1b0b1
410*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI		0x1b0b1
411*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK		0x1b0b1
412*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x000f0b0
413*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_LBA__GPIO2_IO27		0x000f0b0
414*f126890aSEmmanuel Vadot		>;
415*f126890aSEmmanuel Vadot	};
416*f126890aSEmmanuel Vadot
417*f126890aSEmmanuel Vadot	pinctrl_enet: enetgrp {
418*f126890aSEmmanuel Vadot		fsl,pins = <
419*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
420*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
421*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
422*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
423*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
424*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
425*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
426*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
427*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
428*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
429*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
430*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
431*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
432*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
433*f126890aSEmmanuel Vadot			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
434*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
435*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1f0b1
436*f126890aSEmmanuel Vadot		>;
437*f126890aSEmmanuel Vadot	};
438*f126890aSEmmanuel Vadot
439*f126890aSEmmanuel Vadot	pinctrl_flexcan1: flexcan1grp {
440*f126890aSEmmanuel Vadot		fsl,pins = <
441*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0
442*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0
443*f126890aSEmmanuel Vadot		>;
444*f126890aSEmmanuel Vadot	};
445*f126890aSEmmanuel Vadot
446*f126890aSEmmanuel Vadot	pinctrl_flexcan2: flexcan2grp {
447*f126890aSEmmanuel Vadot		fsl,pins = <
448*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x1b0b0
449*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x1b0b0
450*f126890aSEmmanuel Vadot		>;
451*f126890aSEmmanuel Vadot	};
452*f126890aSEmmanuel Vadot
453*f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
454*f126890aSEmmanuel Vadot		fsl,pins = <
455*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
456*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
457*f126890aSEmmanuel Vadot		>;
458*f126890aSEmmanuel Vadot	};
459*f126890aSEmmanuel Vadot
460*f126890aSEmmanuel Vadot	pinctrl_i2c2: i2c2grp {
461*f126890aSEmmanuel Vadot		fsl,pins = <
462*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
463*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
464*f126890aSEmmanuel Vadot		>;
465*f126890aSEmmanuel Vadot	};
466*f126890aSEmmanuel Vadot
467*f126890aSEmmanuel Vadot	pinctrl_i2c3: i2c3grp {
468*f126890aSEmmanuel Vadot		fsl,pins = <
469*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D17__I2C3_SCL		0x4001b8b1
470*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D18__I2C3_SDA		0x4001b8b1
471*f126890aSEmmanuel Vadot		>;
472*f126890aSEmmanuel Vadot	};
473*f126890aSEmmanuel Vadot
474*f126890aSEmmanuel Vadot	pinctrl_ipu1: ipu1grp {
475*f126890aSEmmanuel Vadot		fsl,pins = <
476*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x10
477*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x10
478*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x10
479*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x10
480*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04		0x10
481*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x10
482*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x10
483*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x10
484*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x10
485*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x10
486*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x10
487*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x10
488*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x10
489*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x10
490*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x10
491*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x10
492*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x10
493*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x10
494*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x10
495*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x10
496*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x10
497*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x10
498*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x10
499*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18	0x10
500*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19	0x10
501*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20	0x10
502*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21	0x10
503*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22	0x10
504*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23	0x10
505*f126890aSEmmanuel Vadot		>;
506*f126890aSEmmanuel Vadot	};
507*f126890aSEmmanuel Vadot
508*f126890aSEmmanuel Vadot	pinctrl_ov5645: ov5645grp {
509*f126890aSEmmanuel Vadot		fsl,pins = <
510*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_6__GPIO1_IO06		0x0b0b0
511*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0b0b0
512*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_3__CCM_CLKO2		0x000b0
513*f126890aSEmmanuel Vadot		>;
514*f126890aSEmmanuel Vadot	};
515*f126890aSEmmanuel Vadot
516*f126890aSEmmanuel Vadot	pinctrl_pcie_reset: pciegrp {
517*f126890aSEmmanuel Vadot		fsl,pins = <
518*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21	0x130b0
519*f126890aSEmmanuel Vadot		>;
520*f126890aSEmmanuel Vadot	};
521*f126890aSEmmanuel Vadot
522*f126890aSEmmanuel Vadot	pinctrl_pwm1: pwm1grp {
523*f126890aSEmmanuel Vadot		fsl,pins = <
524*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
525*f126890aSEmmanuel Vadot		>;
526*f126890aSEmmanuel Vadot	};
527*f126890aSEmmanuel Vadot
528*f126890aSEmmanuel Vadot	pinctrl_pwm2: pwm2grp {
529*f126890aSEmmanuel Vadot		fsl,pins = <
530*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_1__PWM2_OUT		0x1b0b1
531*f126890aSEmmanuel Vadot		>;
532*f126890aSEmmanuel Vadot	};
533*f126890aSEmmanuel Vadot
534*f126890aSEmmanuel Vadot	pinctrl_pwm3: pwm3grp {
535*f126890aSEmmanuel Vadot		fsl,pins = <
536*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT1__PWM3_OUT		0x1b0b1
537*f126890aSEmmanuel Vadot		>;
538*f126890aSEmmanuel Vadot	};
539*f126890aSEmmanuel Vadot
540*f126890aSEmmanuel Vadot	pinctrl_pwm4: pwm4grp {
541*f126890aSEmmanuel Vadot		fsl,pins = <
542*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT2__PWM4_OUT		0x1b0b1
543*f126890aSEmmanuel Vadot		>;
544*f126890aSEmmanuel Vadot	};
545*f126890aSEmmanuel Vadot
546*f126890aSEmmanuel Vadot	pinctrl_reg_lcd: reglcdgrp {
547*f126890aSEmmanuel Vadot		fsl,pins = <
548*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT3__GPIO2_IO11		0x1b0b0
549*f126890aSEmmanuel Vadot		>;
550*f126890aSEmmanuel Vadot	};
551*f126890aSEmmanuel Vadot
552*f126890aSEmmanuel Vadot	pinctrl_uart1: uart1grp {
553*f126890aSEmmanuel Vadot		fsl,pins = <
554*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
555*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
556*f126890aSEmmanuel Vadot		>;
557*f126890aSEmmanuel Vadot	};
558*f126890aSEmmanuel Vadot
559*f126890aSEmmanuel Vadot	pinctrl_uart2: uart2grp {
560*f126890aSEmmanuel Vadot		fsl,pins = <
561*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
562*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B	0x1b0b1
563*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B	0x1b0b1
564*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
565*f126890aSEmmanuel Vadot		>;
566*f126890aSEmmanuel Vadot	};
567*f126890aSEmmanuel Vadot
568*f126890aSEmmanuel Vadot	pinctrl_uart3: uart3grp {
569*f126890aSEmmanuel Vadot		fsl,pins = <
570*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
571*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
572*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1
573*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1
574*f126890aSEmmanuel Vadot		>;
575*f126890aSEmmanuel Vadot	};
576*f126890aSEmmanuel Vadot
577*f126890aSEmmanuel Vadot	pinctrl_usbotg: usbotggrp {
578*f126890aSEmmanuel Vadot		fsl,pins = <
579*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x17059
580*f126890aSEmmanuel Vadot		>;
581*f126890aSEmmanuel Vadot	};
582*f126890aSEmmanuel Vadot
583*f126890aSEmmanuel Vadot	pinctrl_usbotg_vbus: usbotgvbusgrp {
584*f126890aSEmmanuel Vadot		fsl,pins = <
585*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0
586*f126890aSEmmanuel Vadot		>;
587*f126890aSEmmanuel Vadot	};
588*f126890aSEmmanuel Vadot
589*f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
590*f126890aSEmmanuel Vadot		fsl,pins = <
591*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x17071
592*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x17071
593*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x17071
594*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x17071
595*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x17071
596*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x17071
597*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x1b0b0
598*f126890aSEmmanuel Vadot		>;
599*f126890aSEmmanuel Vadot	};
600*f126890aSEmmanuel Vadot
601*f126890aSEmmanuel Vadot	pinctrl_usdhc2: usdhc2grp {
602*f126890aSEmmanuel Vadot		fsl,pins = <
603*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
604*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10059
605*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17059
606*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17059
607*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17059
608*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17059
609*f126890aSEmmanuel Vadot		>;
610*f126890aSEmmanuel Vadot	};
611*f126890aSEmmanuel Vadot
612*f126890aSEmmanuel Vadot	pinctrl_usdhc3: usdhc3grp {
613*f126890aSEmmanuel Vadot		fsl,pins = <
614*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
615*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
616*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
617*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
618*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
619*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
620*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_DA9__GPIO3_IO09		0xb0b1
621*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
622*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
623*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
624*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
625*f126890aSEmmanuel Vadot		>;
626*f126890aSEmmanuel Vadot	};
627*f126890aSEmmanuel Vadot};
628