1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright 2014 Gateworks Corporation 4*f126890aSEmmanuel Vadot */ 5*f126890aSEmmanuel Vadot 6*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 7*f126890aSEmmanuel Vadot#include <dt-bindings/input/linux-event-codes.h> 8*f126890aSEmmanuel Vadot#include <dt-bindings/interrupt-controller/irq.h> 9*f126890aSEmmanuel Vadot 10*f126890aSEmmanuel Vadot/ { 11*f126890aSEmmanuel Vadot /* these are used by bootloader for disabling nodes */ 12*f126890aSEmmanuel Vadot aliases { 13*f126890aSEmmanuel Vadot led0 = &led0; 14*f126890aSEmmanuel Vadot led1 = &led1; 15*f126890aSEmmanuel Vadot led2 = &led2; 16*f126890aSEmmanuel Vadot nand = &gpmi; 17*f126890aSEmmanuel Vadot usb0 = &usbh1; 18*f126890aSEmmanuel Vadot usb1 = &usbotg; 19*f126890aSEmmanuel Vadot }; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot chosen { 22*f126890aSEmmanuel Vadot bootargs = "console=ttymxc1,115200"; 23*f126890aSEmmanuel Vadot }; 24*f126890aSEmmanuel Vadot 25*f126890aSEmmanuel Vadot gpio-keys { 26*f126890aSEmmanuel Vadot compatible = "gpio-keys"; 27*f126890aSEmmanuel Vadot 28*f126890aSEmmanuel Vadot user-pb { 29*f126890aSEmmanuel Vadot label = "user_pb"; 30*f126890aSEmmanuel Vadot gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 31*f126890aSEmmanuel Vadot linux,code = <BTN_0>; 32*f126890aSEmmanuel Vadot }; 33*f126890aSEmmanuel Vadot 34*f126890aSEmmanuel Vadot user-pb1x { 35*f126890aSEmmanuel Vadot label = "user_pb1x"; 36*f126890aSEmmanuel Vadot linux,code = <BTN_1>; 37*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 38*f126890aSEmmanuel Vadot interrupts = <0>; 39*f126890aSEmmanuel Vadot }; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot key-erased { 42*f126890aSEmmanuel Vadot label = "key-erased"; 43*f126890aSEmmanuel Vadot linux,code = <BTN_2>; 44*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 45*f126890aSEmmanuel Vadot interrupts = <1>; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot eeprom-wp { 49*f126890aSEmmanuel Vadot label = "eeprom_wp"; 50*f126890aSEmmanuel Vadot linux,code = <BTN_3>; 51*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 52*f126890aSEmmanuel Vadot interrupts = <2>; 53*f126890aSEmmanuel Vadot }; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot tamper { 56*f126890aSEmmanuel Vadot label = "tamper"; 57*f126890aSEmmanuel Vadot linux,code = <BTN_4>; 58*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 59*f126890aSEmmanuel Vadot interrupts = <5>; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot switch-hold { 63*f126890aSEmmanuel Vadot label = "switch_hold"; 64*f126890aSEmmanuel Vadot linux,code = <BTN_5>; 65*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 66*f126890aSEmmanuel Vadot interrupts = <7>; 67*f126890aSEmmanuel Vadot }; 68*f126890aSEmmanuel Vadot }; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot leds { 71*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 72*f126890aSEmmanuel Vadot pinctrl-names = "default"; 73*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_leds>; 74*f126890aSEmmanuel Vadot 75*f126890aSEmmanuel Vadot led0: led-user1 { 76*f126890aSEmmanuel Vadot label = "user1"; 77*f126890aSEmmanuel Vadot gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 78*f126890aSEmmanuel Vadot default-state = "on"; 79*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 80*f126890aSEmmanuel Vadot }; 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot led1: led-user2 { 83*f126890aSEmmanuel Vadot label = "user2"; 84*f126890aSEmmanuel Vadot gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 85*f126890aSEmmanuel Vadot default-state = "off"; 86*f126890aSEmmanuel Vadot }; 87*f126890aSEmmanuel Vadot 88*f126890aSEmmanuel Vadot led2: led-user3 { 89*f126890aSEmmanuel Vadot label = "user3"; 90*f126890aSEmmanuel Vadot gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 91*f126890aSEmmanuel Vadot default-state = "off"; 92*f126890aSEmmanuel Vadot }; 93*f126890aSEmmanuel Vadot }; 94*f126890aSEmmanuel Vadot 95*f126890aSEmmanuel Vadot memory@10000000 { 96*f126890aSEmmanuel Vadot device_type = "memory"; 97*f126890aSEmmanuel Vadot reg = <0x10000000 0x20000000>; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot reg_1p0v: regulator-1p0v { 101*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 102*f126890aSEmmanuel Vadot regulator-name = "1P0V"; 103*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 104*f126890aSEmmanuel Vadot regulator-max-microvolt = <1000000>; 105*f126890aSEmmanuel Vadot regulator-always-on; 106*f126890aSEmmanuel Vadot }; 107*f126890aSEmmanuel Vadot 108*f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 109*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 110*f126890aSEmmanuel Vadot regulator-name = "3P3V"; 111*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 112*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 113*f126890aSEmmanuel Vadot regulator-always-on; 114*f126890aSEmmanuel Vadot }; 115*f126890aSEmmanuel Vadot 116*f126890aSEmmanuel Vadot reg_5p0v: regulator-5p0v { 117*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 118*f126890aSEmmanuel Vadot regulator-name = "5P0V"; 119*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 120*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 121*f126890aSEmmanuel Vadot regulator-always-on; 122*f126890aSEmmanuel Vadot }; 123*f126890aSEmmanuel Vadot}; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot&gpmi { 126*f126890aSEmmanuel Vadot pinctrl-names = "default"; 127*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpmi_nand>; 128*f126890aSEmmanuel Vadot status = "okay"; 129*f126890aSEmmanuel Vadot}; 130*f126890aSEmmanuel Vadot 131*f126890aSEmmanuel Vadot&hdmi { 132*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c3>; 133*f126890aSEmmanuel Vadot status = "okay"; 134*f126890aSEmmanuel Vadot}; 135*f126890aSEmmanuel Vadot 136*f126890aSEmmanuel Vadot&i2c1 { 137*f126890aSEmmanuel Vadot clock-frequency = <100000>; 138*f126890aSEmmanuel Vadot pinctrl-names = "default"; 139*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 140*f126890aSEmmanuel Vadot status = "okay"; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot gsc: gsc@20 { 143*f126890aSEmmanuel Vadot compatible = "gw,gsc"; 144*f126890aSEmmanuel Vadot reg = <0x20>; 145*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 146*f126890aSEmmanuel Vadot interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 147*f126890aSEmmanuel Vadot interrupt-controller; 148*f126890aSEmmanuel Vadot #interrupt-cells = <1>; 149*f126890aSEmmanuel Vadot #size-cells = <0>; 150*f126890aSEmmanuel Vadot 151*f126890aSEmmanuel Vadot adc { 152*f126890aSEmmanuel Vadot compatible = "gw,gsc-adc"; 153*f126890aSEmmanuel Vadot #address-cells = <1>; 154*f126890aSEmmanuel Vadot #size-cells = <0>; 155*f126890aSEmmanuel Vadot 156*f126890aSEmmanuel Vadot channel@0 { 157*f126890aSEmmanuel Vadot gw,mode = <0>; 158*f126890aSEmmanuel Vadot reg = <0x00>; 159*f126890aSEmmanuel Vadot label = "temp"; 160*f126890aSEmmanuel Vadot }; 161*f126890aSEmmanuel Vadot 162*f126890aSEmmanuel Vadot channel@2 { 163*f126890aSEmmanuel Vadot gw,mode = <1>; 164*f126890aSEmmanuel Vadot reg = <0x02>; 165*f126890aSEmmanuel Vadot label = "vdd_vin"; 166*f126890aSEmmanuel Vadot }; 167*f126890aSEmmanuel Vadot 168*f126890aSEmmanuel Vadot channel@5 { 169*f126890aSEmmanuel Vadot gw,mode = <1>; 170*f126890aSEmmanuel Vadot reg = <0x05>; 171*f126890aSEmmanuel Vadot label = "vdd_3p3"; 172*f126890aSEmmanuel Vadot }; 173*f126890aSEmmanuel Vadot 174*f126890aSEmmanuel Vadot channel@8 { 175*f126890aSEmmanuel Vadot gw,mode = <1>; 176*f126890aSEmmanuel Vadot reg = <0x08>; 177*f126890aSEmmanuel Vadot label = "vdd_bat"; 178*f126890aSEmmanuel Vadot }; 179*f126890aSEmmanuel Vadot 180*f126890aSEmmanuel Vadot channel@b { 181*f126890aSEmmanuel Vadot gw,mode = <1>; 182*f126890aSEmmanuel Vadot reg = <0x0b>; 183*f126890aSEmmanuel Vadot label = "vdd_5p0"; 184*f126890aSEmmanuel Vadot }; 185*f126890aSEmmanuel Vadot 186*f126890aSEmmanuel Vadot channel@e { 187*f126890aSEmmanuel Vadot gw,mode = <1>; 188*f126890aSEmmanuel Vadot reg = <0xe>; 189*f126890aSEmmanuel Vadot label = "vdd_arm"; 190*f126890aSEmmanuel Vadot }; 191*f126890aSEmmanuel Vadot 192*f126890aSEmmanuel Vadot channel@11 { 193*f126890aSEmmanuel Vadot gw,mode = <1>; 194*f126890aSEmmanuel Vadot reg = <0x11>; 195*f126890aSEmmanuel Vadot label = "vdd_soc"; 196*f126890aSEmmanuel Vadot }; 197*f126890aSEmmanuel Vadot 198*f126890aSEmmanuel Vadot channel@14 { 199*f126890aSEmmanuel Vadot gw,mode = <1>; 200*f126890aSEmmanuel Vadot reg = <0x14>; 201*f126890aSEmmanuel Vadot label = "vdd_3p0"; 202*f126890aSEmmanuel Vadot }; 203*f126890aSEmmanuel Vadot 204*f126890aSEmmanuel Vadot channel@17 { 205*f126890aSEmmanuel Vadot gw,mode = <1>; 206*f126890aSEmmanuel Vadot reg = <0x17>; 207*f126890aSEmmanuel Vadot label = "vdd_1p5"; 208*f126890aSEmmanuel Vadot }; 209*f126890aSEmmanuel Vadot 210*f126890aSEmmanuel Vadot channel@1d { 211*f126890aSEmmanuel Vadot gw,mode = <1>; 212*f126890aSEmmanuel Vadot reg = <0x1d>; 213*f126890aSEmmanuel Vadot label = "vdd_1p8"; 214*f126890aSEmmanuel Vadot }; 215*f126890aSEmmanuel Vadot 216*f126890aSEmmanuel Vadot channel@20 { 217*f126890aSEmmanuel Vadot gw,mode = <1>; 218*f126890aSEmmanuel Vadot reg = <0x20>; 219*f126890aSEmmanuel Vadot label = "vdd_1p0"; 220*f126890aSEmmanuel Vadot }; 221*f126890aSEmmanuel Vadot 222*f126890aSEmmanuel Vadot channel@23 { 223*f126890aSEmmanuel Vadot gw,mode = <1>; 224*f126890aSEmmanuel Vadot reg = <0x23>; 225*f126890aSEmmanuel Vadot label = "vdd_2p5"; 226*f126890aSEmmanuel Vadot }; 227*f126890aSEmmanuel Vadot }; 228*f126890aSEmmanuel Vadot }; 229*f126890aSEmmanuel Vadot 230*f126890aSEmmanuel Vadot gsc_gpio: gpio@23 { 231*f126890aSEmmanuel Vadot compatible = "nxp,pca9555"; 232*f126890aSEmmanuel Vadot reg = <0x23>; 233*f126890aSEmmanuel Vadot gpio-controller; 234*f126890aSEmmanuel Vadot #gpio-cells = <2>; 235*f126890aSEmmanuel Vadot interrupt-parent = <&gsc>; 236*f126890aSEmmanuel Vadot interrupts = <4>; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot 239*f126890aSEmmanuel Vadot eeprom1: eeprom@50 { 240*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 241*f126890aSEmmanuel Vadot reg = <0x50>; 242*f126890aSEmmanuel Vadot pagesize = <16>; 243*f126890aSEmmanuel Vadot }; 244*f126890aSEmmanuel Vadot 245*f126890aSEmmanuel Vadot eeprom2: eeprom@51 { 246*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 247*f126890aSEmmanuel Vadot reg = <0x51>; 248*f126890aSEmmanuel Vadot pagesize = <16>; 249*f126890aSEmmanuel Vadot }; 250*f126890aSEmmanuel Vadot 251*f126890aSEmmanuel Vadot eeprom3: eeprom@52 { 252*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 253*f126890aSEmmanuel Vadot reg = <0x52>; 254*f126890aSEmmanuel Vadot pagesize = <16>; 255*f126890aSEmmanuel Vadot }; 256*f126890aSEmmanuel Vadot 257*f126890aSEmmanuel Vadot eeprom4: eeprom@53 { 258*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 259*f126890aSEmmanuel Vadot reg = <0x53>; 260*f126890aSEmmanuel Vadot pagesize = <16>; 261*f126890aSEmmanuel Vadot }; 262*f126890aSEmmanuel Vadot 263*f126890aSEmmanuel Vadot rtc: ds1672@68 { 264*f126890aSEmmanuel Vadot compatible = "dallas,ds1672"; 265*f126890aSEmmanuel Vadot reg = <0x68>; 266*f126890aSEmmanuel Vadot }; 267*f126890aSEmmanuel Vadot}; 268*f126890aSEmmanuel Vadot 269*f126890aSEmmanuel Vadot&i2c2 { 270*f126890aSEmmanuel Vadot clock-frequency = <100000>; 271*f126890aSEmmanuel Vadot pinctrl-names = "default"; 272*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 273*f126890aSEmmanuel Vadot status = "okay"; 274*f126890aSEmmanuel Vadot 275*f126890aSEmmanuel Vadot ltc3676: pmic@3c { 276*f126890aSEmmanuel Vadot compatible = "lltc,ltc3676"; 277*f126890aSEmmanuel Vadot reg = <0x3c>; 278*f126890aSEmmanuel Vadot pinctrl-names = "default"; 279*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 280*f126890aSEmmanuel Vadot interrupt-parent = <&gpio1>; 281*f126890aSEmmanuel Vadot interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 282*f126890aSEmmanuel Vadot 283*f126890aSEmmanuel Vadot regulators { 284*f126890aSEmmanuel Vadot /* VDD_SOC (1+R1/R2 = 1.635) */ 285*f126890aSEmmanuel Vadot reg_vdd_soc: sw1 { 286*f126890aSEmmanuel Vadot regulator-name = "vddsoc"; 287*f126890aSEmmanuel Vadot regulator-min-microvolt = <674400>; 288*f126890aSEmmanuel Vadot regulator-max-microvolt = <1308000>; 289*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <127000 200000>; 290*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 291*f126890aSEmmanuel Vadot regulator-boot-on; 292*f126890aSEmmanuel Vadot regulator-always-on; 293*f126890aSEmmanuel Vadot }; 294*f126890aSEmmanuel Vadot 295*f126890aSEmmanuel Vadot /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */ 296*f126890aSEmmanuel Vadot reg_1p8v: sw2 { 297*f126890aSEmmanuel Vadot regulator-name = "vdd1p8"; 298*f126890aSEmmanuel Vadot regulator-min-microvolt = <1033310>; 299*f126890aSEmmanuel Vadot regulator-max-microvolt = <2004000>; 300*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <301000 200000>; 301*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 302*f126890aSEmmanuel Vadot regulator-boot-on; 303*f126890aSEmmanuel Vadot regulator-always-on; 304*f126890aSEmmanuel Vadot }; 305*f126890aSEmmanuel Vadot 306*f126890aSEmmanuel Vadot /* VDD_ARM (1+R1/R2 = 1.635) */ 307*f126890aSEmmanuel Vadot reg_vdd_arm: sw3 { 308*f126890aSEmmanuel Vadot regulator-name = "vddarm"; 309*f126890aSEmmanuel Vadot regulator-min-microvolt = <674400>; 310*f126890aSEmmanuel Vadot regulator-max-microvolt = <1308000>; 311*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <127000 200000>; 312*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 313*f126890aSEmmanuel Vadot regulator-boot-on; 314*f126890aSEmmanuel Vadot regulator-always-on; 315*f126890aSEmmanuel Vadot }; 316*f126890aSEmmanuel Vadot 317*f126890aSEmmanuel Vadot /* VDD_DDR (1+R1/R2 = 2.105) */ 318*f126890aSEmmanuel Vadot reg_vdd_ddr: sw4 { 319*f126890aSEmmanuel Vadot regulator-name = "vddddr"; 320*f126890aSEmmanuel Vadot regulator-min-microvolt = <868310>; 321*f126890aSEmmanuel Vadot regulator-max-microvolt = <1684000>; 322*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <221000 200000>; 323*f126890aSEmmanuel Vadot regulator-ramp-delay = <7000>; 324*f126890aSEmmanuel Vadot regulator-boot-on; 325*f126890aSEmmanuel Vadot regulator-always-on; 326*f126890aSEmmanuel Vadot }; 327*f126890aSEmmanuel Vadot 328*f126890aSEmmanuel Vadot /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ 329*f126890aSEmmanuel Vadot reg_2p5v: ldo2 { 330*f126890aSEmmanuel Vadot regulator-name = "vdd2p5"; 331*f126890aSEmmanuel Vadot regulator-min-microvolt = <2490375>; 332*f126890aSEmmanuel Vadot regulator-max-microvolt = <2490375>; 333*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <487000 200000>; 334*f126890aSEmmanuel Vadot regulator-boot-on; 335*f126890aSEmmanuel Vadot regulator-always-on; 336*f126890aSEmmanuel Vadot }; 337*f126890aSEmmanuel Vadot 338*f126890aSEmmanuel Vadot /* VDD_HIGH (1+R1/R2 = 4.17) */ 339*f126890aSEmmanuel Vadot reg_3p0v: ldo4 { 340*f126890aSEmmanuel Vadot regulator-name = "vdd3p0"; 341*f126890aSEmmanuel Vadot regulator-min-microvolt = <3023250>; 342*f126890aSEmmanuel Vadot regulator-max-microvolt = <3023250>; 343*f126890aSEmmanuel Vadot lltc,fb-voltage-divider = <634000 200000>; 344*f126890aSEmmanuel Vadot regulator-boot-on; 345*f126890aSEmmanuel Vadot regulator-always-on; 346*f126890aSEmmanuel Vadot }; 347*f126890aSEmmanuel Vadot }; 348*f126890aSEmmanuel Vadot }; 349*f126890aSEmmanuel Vadot}; 350*f126890aSEmmanuel Vadot 351*f126890aSEmmanuel Vadot&i2c3 { 352*f126890aSEmmanuel Vadot clock-frequency = <100000>; 353*f126890aSEmmanuel Vadot pinctrl-names = "default"; 354*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 355*f126890aSEmmanuel Vadot status = "okay"; 356*f126890aSEmmanuel Vadot}; 357*f126890aSEmmanuel Vadot 358*f126890aSEmmanuel Vadot&pcie { 359*f126890aSEmmanuel Vadot pinctrl-names = "default"; 360*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pcie>; 361*f126890aSEmmanuel Vadot reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; 362*f126890aSEmmanuel Vadot status = "okay"; 363*f126890aSEmmanuel Vadot}; 364*f126890aSEmmanuel Vadot 365*f126890aSEmmanuel Vadot&pwm2 { 366*f126890aSEmmanuel Vadot pinctrl-names = "default"; 367*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 368*f126890aSEmmanuel Vadot status = "disabled"; 369*f126890aSEmmanuel Vadot}; 370*f126890aSEmmanuel Vadot 371*f126890aSEmmanuel Vadot&pwm3 { 372*f126890aSEmmanuel Vadot pinctrl-names = "default"; 373*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 374*f126890aSEmmanuel Vadot status = "disabled"; 375*f126890aSEmmanuel Vadot}; 376*f126890aSEmmanuel Vadot 377*f126890aSEmmanuel Vadot&uart2 { 378*f126890aSEmmanuel Vadot pinctrl-names = "default"; 379*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 380*f126890aSEmmanuel Vadot status = "okay"; 381*f126890aSEmmanuel Vadot}; 382*f126890aSEmmanuel Vadot 383*f126890aSEmmanuel Vadot&uart3 { 384*f126890aSEmmanuel Vadot pinctrl-names = "default"; 385*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart3>; 386*f126890aSEmmanuel Vadot status = "okay"; 387*f126890aSEmmanuel Vadot}; 388*f126890aSEmmanuel Vadot 389*f126890aSEmmanuel Vadot&uart5 { 390*f126890aSEmmanuel Vadot pinctrl-names = "default"; 391*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5>; 392*f126890aSEmmanuel Vadot status = "okay"; }; 393*f126890aSEmmanuel Vadot 394*f126890aSEmmanuel Vadot&usbh1 { 395*f126890aSEmmanuel Vadot status = "okay"; 396*f126890aSEmmanuel Vadot}; 397*f126890aSEmmanuel Vadot 398*f126890aSEmmanuel Vadot&usbotg { 399*f126890aSEmmanuel Vadot vbus-supply = <®_5p0v>; 400*f126890aSEmmanuel Vadot pinctrl-names = "default"; 401*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 402*f126890aSEmmanuel Vadot disable-over-current; 403*f126890aSEmmanuel Vadot status = "okay"; 404*f126890aSEmmanuel Vadot}; 405*f126890aSEmmanuel Vadot 406*f126890aSEmmanuel Vadot&wdog1 { 407*f126890aSEmmanuel Vadot pinctrl-names = "default"; 408*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 409*f126890aSEmmanuel Vadot fsl,ext-reset-output; 410*f126890aSEmmanuel Vadot}; 411*f126890aSEmmanuel Vadot 412*f126890aSEmmanuel Vadot&iomuxc { 413*f126890aSEmmanuel Vadot pinctrl_gpio_leds: gpioledsgrp { 414*f126890aSEmmanuel Vadot fsl,pins = < 415*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 416*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 417*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 418*f126890aSEmmanuel Vadot >; 419*f126890aSEmmanuel Vadot }; 420*f126890aSEmmanuel Vadot 421*f126890aSEmmanuel Vadot pinctrl_gpmi_nand: gpminandgrp { 422*f126890aSEmmanuel Vadot fsl,pins = < 423*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 424*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 425*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 426*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 427*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 428*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 429*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 430*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 431*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 432*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 433*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 434*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 435*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 436*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 437*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 438*f126890aSEmmanuel Vadot >; 439*f126890aSEmmanuel Vadot }; 440*f126890aSEmmanuel Vadot 441*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 442*f126890aSEmmanuel Vadot fsl,pins = < 443*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 444*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 445*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 446*f126890aSEmmanuel Vadot >; 447*f126890aSEmmanuel Vadot }; 448*f126890aSEmmanuel Vadot 449*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 450*f126890aSEmmanuel Vadot fsl,pins = < 451*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 452*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 453*f126890aSEmmanuel Vadot >; 454*f126890aSEmmanuel Vadot }; 455*f126890aSEmmanuel Vadot 456*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 457*f126890aSEmmanuel Vadot fsl,pins = < 458*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 459*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 460*f126890aSEmmanuel Vadot >; 461*f126890aSEmmanuel Vadot }; 462*f126890aSEmmanuel Vadot 463*f126890aSEmmanuel Vadot pinctrl_pcie: pciegrp { 464*f126890aSEmmanuel Vadot fsl,pins = < 465*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 466*f126890aSEmmanuel Vadot >; 467*f126890aSEmmanuel Vadot }; 468*f126890aSEmmanuel Vadot 469*f126890aSEmmanuel Vadot pinctrl_pmic: pmicgrp { 470*f126890aSEmmanuel Vadot fsl,pins = < 471*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 472*f126890aSEmmanuel Vadot >; 473*f126890aSEmmanuel Vadot }; 474*f126890aSEmmanuel Vadot 475*f126890aSEmmanuel Vadot pinctrl_pwm2: pwm2grp { 476*f126890aSEmmanuel Vadot fsl,pins = < 477*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 478*f126890aSEmmanuel Vadot >; 479*f126890aSEmmanuel Vadot }; 480*f126890aSEmmanuel Vadot 481*f126890aSEmmanuel Vadot pinctrl_pwm3: pwm3grp { 482*f126890aSEmmanuel Vadot fsl,pins = < 483*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 484*f126890aSEmmanuel Vadot >; 485*f126890aSEmmanuel Vadot }; 486*f126890aSEmmanuel Vadot 487*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 488*f126890aSEmmanuel Vadot fsl,pins = < 489*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 490*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 491*f126890aSEmmanuel Vadot >; 492*f126890aSEmmanuel Vadot }; 493*f126890aSEmmanuel Vadot 494*f126890aSEmmanuel Vadot pinctrl_uart3: uart3grp { 495*f126890aSEmmanuel Vadot fsl,pins = < 496*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 497*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 498*f126890aSEmmanuel Vadot >; 499*f126890aSEmmanuel Vadot }; 500*f126890aSEmmanuel Vadot 501*f126890aSEmmanuel Vadot pinctrl_uart5: uart5grp { 502*f126890aSEmmanuel Vadot fsl,pins = < 503*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 504*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 505*f126890aSEmmanuel Vadot >; 506*f126890aSEmmanuel Vadot }; 507*f126890aSEmmanuel Vadot 508*f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 509*f126890aSEmmanuel Vadot fsl,pins = < 510*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059 511*f126890aSEmmanuel Vadot >; 512*f126890aSEmmanuel Vadot }; 513*f126890aSEmmanuel Vadot 514*f126890aSEmmanuel Vadot pinctrl_wdog: wdoggrp { 515*f126890aSEmmanuel Vadot fsl,pins = < 516*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 517*f126890aSEmmanuel Vadot >; 518*f126890aSEmmanuel Vadot }; 519*f126890aSEmmanuel Vadot}; 520