1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0+ 2*f126890aSEmmanuel Vadot// 3*f126890aSEmmanuel Vadot// Copyright 2021 Dillon Min <dillon.minfei@gmail.com> 4*f126890aSEmmanuel Vadot// 5*f126890aSEmmanuel Vadot// Based on imx6qdl-sabresd.dtsi which is: 6*f126890aSEmmanuel Vadot// Copyright 2012 Freescale Semiconductor, Inc. 7*f126890aSEmmanuel Vadot// Copyright 2011 Linaro Ltd. 8*f126890aSEmmanuel Vadot 9*f126890aSEmmanuel Vadot#include <dt-bindings/clock/imx6qdl-clock.h> 10*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 11*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot/ { 14*f126890aSEmmanuel Vadot chosen { 15*f126890aSEmmanuel Vadot stdout-path = &uart4; 16*f126890aSEmmanuel Vadot }; 17*f126890aSEmmanuel Vadot 18*f126890aSEmmanuel Vadot memory@10000000 { 19*f126890aSEmmanuel Vadot device_type = "memory"; 20*f126890aSEmmanuel Vadot reg = <0x10000000 0x80000000>; 21*f126890aSEmmanuel Vadot }; 22*f126890aSEmmanuel Vadot 23*f126890aSEmmanuel Vadot reg_usb_otg_vbus: regulator-usb-otg-vbus { 24*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 25*f126890aSEmmanuel Vadot regulator-name = "usb_otg_vbus"; 26*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 27*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 28*f126890aSEmmanuel Vadot }; 29*f126890aSEmmanuel Vadot 30*f126890aSEmmanuel Vadot reg_usb_h1_vbus: regulator-usb-h1-vbus { 31*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 32*f126890aSEmmanuel Vadot regulator-name = "usb_h1_vbus"; 33*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 34*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 35*f126890aSEmmanuel Vadot }; 36*f126890aSEmmanuel Vadot 37*f126890aSEmmanuel Vadot leds { 38*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 39*f126890aSEmmanuel Vadot pinctrl-names = "default"; 40*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_leds>; 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot led-0 { 43*f126890aSEmmanuel Vadot gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; 44*f126890aSEmmanuel Vadot default-state = "on"; 45*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot }; 48*f126890aSEmmanuel Vadot}; 49*f126890aSEmmanuel Vadot 50*f126890aSEmmanuel Vadot&ipu1_csi0_from_ipu1_csi0_mux { 51*f126890aSEmmanuel Vadot bus-width = <8>; 52*f126890aSEmmanuel Vadot data-shift = <12>; /* Lines 19:12 used */ 53*f126890aSEmmanuel Vadot hsync-active = <1>; 54*f126890aSEmmanuel Vadot vsync-active = <1>; 55*f126890aSEmmanuel Vadot}; 56*f126890aSEmmanuel Vadot 57*f126890aSEmmanuel Vadot&ipu1_csi0_mux_from_parallel_sensor { 58*f126890aSEmmanuel Vadot remote-endpoint = <&ov2659_to_ipu1_csi0_mux>; 59*f126890aSEmmanuel Vadot}; 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadot&ipu1_csi0 { 62*f126890aSEmmanuel Vadot pinctrl-names = "default"; 63*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ipu1_csi0>; 64*f126890aSEmmanuel Vadot status = "okay"; 65*f126890aSEmmanuel Vadot}; 66*f126890aSEmmanuel Vadot 67*f126890aSEmmanuel Vadot&ecspi1 { 68*f126890aSEmmanuel Vadot cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; 69*f126890aSEmmanuel Vadot pinctrl-names = "default"; 70*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_gpio>; 71*f126890aSEmmanuel Vadot status = "okay"; 72*f126890aSEmmanuel Vadot 73*f126890aSEmmanuel Vadot m25p80: flash@0 { 74*f126890aSEmmanuel Vadot #address-cells = <1>; 75*f126890aSEmmanuel Vadot #size-cells = <1>; 76*f126890aSEmmanuel Vadot compatible = "st,m25p80", "jedec,spi-nor"; 77*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 78*f126890aSEmmanuel Vadot reg = <0>; 79*f126890aSEmmanuel Vadot }; 80*f126890aSEmmanuel Vadot}; 81*f126890aSEmmanuel Vadot 82*f126890aSEmmanuel Vadot&fec { 83*f126890aSEmmanuel Vadot pinctrl-names = "default"; 84*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 85*f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 86*f126890aSEmmanuel Vadot phy-handle = <&phy>; 87*f126890aSEmmanuel Vadot fsl,magic-packet; 88*f126890aSEmmanuel Vadot status = "okay"; 89*f126890aSEmmanuel Vadot 90*f126890aSEmmanuel Vadot mdio { 91*f126890aSEmmanuel Vadot #address-cells = <1>; 92*f126890aSEmmanuel Vadot #size-cells = <0>; 93*f126890aSEmmanuel Vadot 94*f126890aSEmmanuel Vadot phy: ethernet-phy@1 { 95*f126890aSEmmanuel Vadot reg = <1>; 96*f126890aSEmmanuel Vadot qca,clk-out-frequency = <125000000>; 97*f126890aSEmmanuel Vadot reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 98*f126890aSEmmanuel Vadot reset-assert-us = <10000>; 99*f126890aSEmmanuel Vadot }; 100*f126890aSEmmanuel Vadot }; 101*f126890aSEmmanuel Vadot}; 102*f126890aSEmmanuel Vadot 103*f126890aSEmmanuel Vadot&hdmi { 104*f126890aSEmmanuel Vadot pinctrl-names = "default"; 105*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hdmi_cec>; 106*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c3>; 107*f126890aSEmmanuel Vadot status = "okay"; 108*f126890aSEmmanuel Vadot}; 109*f126890aSEmmanuel Vadot 110*f126890aSEmmanuel Vadot&i2c2 { 111*f126890aSEmmanuel Vadot clock-frequency = <100000>; 112*f126890aSEmmanuel Vadot pinctrl-names = "default"; 113*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 114*f126890aSEmmanuel Vadot status = "okay"; 115*f126890aSEmmanuel Vadot 116*f126890aSEmmanuel Vadot pfuze100: pmic@8 { 117*f126890aSEmmanuel Vadot compatible = "fsl,pfuze100"; 118*f126890aSEmmanuel Vadot reg = <0x08>; 119*f126890aSEmmanuel Vadot 120*f126890aSEmmanuel Vadot regulators { 121*f126890aSEmmanuel Vadot sw1a_reg: sw1ab { 122*f126890aSEmmanuel Vadot regulator-min-microvolt = <300000>; 123*f126890aSEmmanuel Vadot regulator-max-microvolt = <1875000>; 124*f126890aSEmmanuel Vadot regulator-boot-on; 125*f126890aSEmmanuel Vadot regulator-always-on; 126*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 127*f126890aSEmmanuel Vadot }; 128*f126890aSEmmanuel Vadot 129*f126890aSEmmanuel Vadot sw1c_reg: sw1c { 130*f126890aSEmmanuel Vadot regulator-min-microvolt = <300000>; 131*f126890aSEmmanuel Vadot regulator-max-microvolt = <1875000>; 132*f126890aSEmmanuel Vadot regulator-boot-on; 133*f126890aSEmmanuel Vadot regulator-always-on; 134*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 135*f126890aSEmmanuel Vadot }; 136*f126890aSEmmanuel Vadot 137*f126890aSEmmanuel Vadot sw2_reg: sw2 { 138*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 139*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 140*f126890aSEmmanuel Vadot regulator-boot-on; 141*f126890aSEmmanuel Vadot regulator-always-on; 142*f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 143*f126890aSEmmanuel Vadot }; 144*f126890aSEmmanuel Vadot 145*f126890aSEmmanuel Vadot sw3a_reg: sw3a { 146*f126890aSEmmanuel Vadot regulator-min-microvolt = <400000>; 147*f126890aSEmmanuel Vadot regulator-max-microvolt = <1975000>; 148*f126890aSEmmanuel Vadot regulator-boot-on; 149*f126890aSEmmanuel Vadot regulator-always-on; 150*f126890aSEmmanuel Vadot }; 151*f126890aSEmmanuel Vadot 152*f126890aSEmmanuel Vadot sw3b_reg: sw3b { 153*f126890aSEmmanuel Vadot regulator-min-microvolt = <400000>; 154*f126890aSEmmanuel Vadot regulator-max-microvolt = <1975000>; 155*f126890aSEmmanuel Vadot regulator-boot-on; 156*f126890aSEmmanuel Vadot regulator-always-on; 157*f126890aSEmmanuel Vadot }; 158*f126890aSEmmanuel Vadot 159*f126890aSEmmanuel Vadot sw4_reg: sw4 { 160*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 161*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 162*f126890aSEmmanuel Vadot regulator-always-on; 163*f126890aSEmmanuel Vadot }; 164*f126890aSEmmanuel Vadot 165*f126890aSEmmanuel Vadot swbst_reg: swbst { 166*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 167*f126890aSEmmanuel Vadot regulator-max-microvolt = <5150000>; 168*f126890aSEmmanuel Vadot }; 169*f126890aSEmmanuel Vadot 170*f126890aSEmmanuel Vadot snvs_reg: vsnvs { 171*f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 172*f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 173*f126890aSEmmanuel Vadot regulator-boot-on; 174*f126890aSEmmanuel Vadot regulator-always-on; 175*f126890aSEmmanuel Vadot }; 176*f126890aSEmmanuel Vadot 177*f126890aSEmmanuel Vadot vref_reg: vrefddr { 178*f126890aSEmmanuel Vadot regulator-boot-on; 179*f126890aSEmmanuel Vadot regulator-always-on; 180*f126890aSEmmanuel Vadot }; 181*f126890aSEmmanuel Vadot 182*f126890aSEmmanuel Vadot vgen1_reg: vgen1 { 183*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 184*f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 185*f126890aSEmmanuel Vadot }; 186*f126890aSEmmanuel Vadot 187*f126890aSEmmanuel Vadot vgen2_reg: vgen2 { 188*f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 189*f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 190*f126890aSEmmanuel Vadot }; 191*f126890aSEmmanuel Vadot 192*f126890aSEmmanuel Vadot vgen3_reg: vgen3 { 193*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 194*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 195*f126890aSEmmanuel Vadot }; 196*f126890aSEmmanuel Vadot 197*f126890aSEmmanuel Vadot vgen4_reg: vgen4 { 198*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 199*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 200*f126890aSEmmanuel Vadot regulator-always-on; 201*f126890aSEmmanuel Vadot }; 202*f126890aSEmmanuel Vadot 203*f126890aSEmmanuel Vadot vgen5_reg: vgen5 { 204*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 205*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 206*f126890aSEmmanuel Vadot regulator-always-on; 207*f126890aSEmmanuel Vadot }; 208*f126890aSEmmanuel Vadot 209*f126890aSEmmanuel Vadot vgen6_reg: vgen6 { 210*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 211*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 212*f126890aSEmmanuel Vadot regulator-always-on; 213*f126890aSEmmanuel Vadot }; 214*f126890aSEmmanuel Vadot }; 215*f126890aSEmmanuel Vadot }; 216*f126890aSEmmanuel Vadot}; 217*f126890aSEmmanuel Vadot 218*f126890aSEmmanuel Vadot&i2c3 { 219*f126890aSEmmanuel Vadot clock-frequency = <100000>; 220*f126890aSEmmanuel Vadot pinctrl-names = "default"; 221*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 222*f126890aSEmmanuel Vadot status = "okay"; 223*f126890aSEmmanuel Vadot 224*f126890aSEmmanuel Vadot ov2659: camera@30 { 225*f126890aSEmmanuel Vadot compatible = "ovti,ov2659"; 226*f126890aSEmmanuel Vadot pinctrl-names = "default"; 227*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ov2659>; 228*f126890aSEmmanuel Vadot clocks = <&clks IMX6QDL_CLK_CKO>; 229*f126890aSEmmanuel Vadot clock-names = "xvclk"; 230*f126890aSEmmanuel Vadot reg = <0x30>; 231*f126890aSEmmanuel Vadot powerdown-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 232*f126890aSEmmanuel Vadot reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 233*f126890aSEmmanuel Vadot status = "okay"; 234*f126890aSEmmanuel Vadot 235*f126890aSEmmanuel Vadot port { 236*f126890aSEmmanuel Vadot ov2659_to_ipu1_csi0_mux: endpoint { 237*f126890aSEmmanuel Vadot remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 238*f126890aSEmmanuel Vadot link-frequencies = /bits/ 64 <70000000>; 239*f126890aSEmmanuel Vadot bus-width = <8>; 240*f126890aSEmmanuel Vadot hsync-active = <1>; 241*f126890aSEmmanuel Vadot vsync-active = <1>; 242*f126890aSEmmanuel Vadot }; 243*f126890aSEmmanuel Vadot }; 244*f126890aSEmmanuel Vadot }; 245*f126890aSEmmanuel Vadot}; 246*f126890aSEmmanuel Vadot 247*f126890aSEmmanuel Vadot&iomuxc { 248*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 249*f126890aSEmmanuel Vadot fsl,pins = < 250*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 251*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 252*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 253*f126890aSEmmanuel Vadot >; 254*f126890aSEmmanuel Vadot }; 255*f126890aSEmmanuel Vadot 256*f126890aSEmmanuel Vadot pinctrl_ecspi1_gpio: ecspi1grpgpiogrp { 257*f126890aSEmmanuel Vadot fsl,pins = < 258*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 259*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0 260*f126890aSEmmanuel Vadot >; 261*f126890aSEmmanuel Vadot }; 262*f126890aSEmmanuel Vadot 263*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 264*f126890aSEmmanuel Vadot fsl,pins = < 265*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 266*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 267*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 268*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 269*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 270*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 271*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 272*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 273*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 274*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 275*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 276*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 277*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 278*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 279*f126890aSEmmanuel Vadot MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 280*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 281*f126890aSEmmanuel Vadot >; 282*f126890aSEmmanuel Vadot }; 283*f126890aSEmmanuel Vadot 284*f126890aSEmmanuel Vadot pinctrl_hdmi_cec: hdmicecgrp { 285*f126890aSEmmanuel Vadot fsl,pins = < 286*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 287*f126890aSEmmanuel Vadot >; 288*f126890aSEmmanuel Vadot }; 289*f126890aSEmmanuel Vadot 290*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 291*f126890aSEmmanuel Vadot fsl,pins = < 292*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 293*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 294*f126890aSEmmanuel Vadot >; 295*f126890aSEmmanuel Vadot }; 296*f126890aSEmmanuel Vadot 297*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 298*f126890aSEmmanuel Vadot fsl,pins = < 299*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 300*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 301*f126890aSEmmanuel Vadot >; 302*f126890aSEmmanuel Vadot }; 303*f126890aSEmmanuel Vadot 304*f126890aSEmmanuel Vadot pinctrl_ipu1_csi0: ipu1csi0grp { 305*f126890aSEmmanuel Vadot fsl,pins = < 306*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 307*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 308*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 309*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 310*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 311*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 312*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 313*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 314*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 315*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0 316*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0 317*f126890aSEmmanuel Vadot >; 318*f126890aSEmmanuel Vadot }; 319*f126890aSEmmanuel Vadot 320*f126890aSEmmanuel Vadot pinctrl_ov2659: ov2659grp { 321*f126890aSEmmanuel Vadot fsl,pins = < 322*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 323*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 324*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 325*f126890aSEmmanuel Vadot >; 326*f126890aSEmmanuel Vadot }; 327*f126890aSEmmanuel Vadot 328*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 329*f126890aSEmmanuel Vadot fsl,pins = < 330*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 331*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 332*f126890aSEmmanuel Vadot >; 333*f126890aSEmmanuel Vadot }; 334*f126890aSEmmanuel Vadot 335*f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 336*f126890aSEmmanuel Vadot fsl,pins = < 337*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 338*f126890aSEmmanuel Vadot >; 339*f126890aSEmmanuel Vadot }; 340*f126890aSEmmanuel Vadot 341*f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 342*f126890aSEmmanuel Vadot fsl,pins = < 343*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 344*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 345*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 346*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 347*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 348*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 349*f126890aSEmmanuel Vadot >; 350*f126890aSEmmanuel Vadot }; 351*f126890aSEmmanuel Vadot 352*f126890aSEmmanuel Vadot pinctrl_usdhc1_gpio: usdhc1grpgpiogrp { 353*f126890aSEmmanuel Vadot fsl,pins = < 354*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 355*f126890aSEmmanuel Vadot >; 356*f126890aSEmmanuel Vadot }; 357*f126890aSEmmanuel Vadot 358*f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 359*f126890aSEmmanuel Vadot fsl,pins = < 360*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 361*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 362*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 363*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 364*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 365*f126890aSEmmanuel Vadot MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 366*f126890aSEmmanuel Vadot >; 367*f126890aSEmmanuel Vadot }; 368*f126890aSEmmanuel Vadot 369*f126890aSEmmanuel Vadot pinctrl_usdhc2_gpio: usdhc2grpgpiogrp { 370*f126890aSEmmanuel Vadot fsl,pins = < 371*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 372*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 373*f126890aSEmmanuel Vadot >; 374*f126890aSEmmanuel Vadot }; 375*f126890aSEmmanuel Vadot 376*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 377*f126890aSEmmanuel Vadot fsl,pins = < 378*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 379*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 380*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 381*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 382*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 383*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 384*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 385*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 386*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 387*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 388*f126890aSEmmanuel Vadot >; 389*f126890aSEmmanuel Vadot }; 390*f126890aSEmmanuel Vadot 391*f126890aSEmmanuel Vadot pinctrl_wdog: wdoggrp { 392*f126890aSEmmanuel Vadot fsl,pins = < 393*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0 394*f126890aSEmmanuel Vadot >; 395*f126890aSEmmanuel Vadot }; 396*f126890aSEmmanuel Vadot 397*f126890aSEmmanuel Vadot pinctrl_gpio_leds: gpioledsgrp { 398*f126890aSEmmanuel Vadot fsl,pins = < 399*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0 400*f126890aSEmmanuel Vadot >; 401*f126890aSEmmanuel Vadot }; 402*f126890aSEmmanuel Vadot}; 403*f126890aSEmmanuel Vadot 404*f126890aSEmmanuel Vadot&uart4 { 405*f126890aSEmmanuel Vadot pinctrl-names = "default"; 406*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 407*f126890aSEmmanuel Vadot status = "okay"; 408*f126890aSEmmanuel Vadot}; 409*f126890aSEmmanuel Vadot 410*f126890aSEmmanuel Vadot&usbh1 { 411*f126890aSEmmanuel Vadot vbus-supply = <®_usb_h1_vbus>; 412*f126890aSEmmanuel Vadot status = "okay"; 413*f126890aSEmmanuel Vadot}; 414*f126890aSEmmanuel Vadot 415*f126890aSEmmanuel Vadot&usbotg { 416*f126890aSEmmanuel Vadot vbus-supply = <®_usb_otg_vbus>; 417*f126890aSEmmanuel Vadot pinctrl-names = "default"; 418*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 419*f126890aSEmmanuel Vadot disable-over-current; 420*f126890aSEmmanuel Vadot status = "okay"; 421*f126890aSEmmanuel Vadot}; 422*f126890aSEmmanuel Vadot 423*f126890aSEmmanuel Vadot&usdhc1 { 424*f126890aSEmmanuel Vadot pinctrl-names = "default"; 425*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; 426*f126890aSEmmanuel Vadot bus-width = <4>; 427*f126890aSEmmanuel Vadot cd-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 428*f126890aSEmmanuel Vadot status = "okay"; 429*f126890aSEmmanuel Vadot}; 430*f126890aSEmmanuel Vadot 431*f126890aSEmmanuel Vadot&usdhc2 { 432*f126890aSEmmanuel Vadot pinctrl-names = "default"; 433*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 434*f126890aSEmmanuel Vadot bus-width = <4>; 435*f126890aSEmmanuel Vadot cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 436*f126890aSEmmanuel Vadot wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 437*f126890aSEmmanuel Vadot status = "disabled"; 438*f126890aSEmmanuel Vadot}; 439*f126890aSEmmanuel Vadot 440*f126890aSEmmanuel Vadot&usdhc3 { 441*f126890aSEmmanuel Vadot pinctrl-names = "default"; 442*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 443*f126890aSEmmanuel Vadot bus-width = <8>; 444*f126890aSEmmanuel Vadot non-removable; 445*f126890aSEmmanuel Vadot no-1-8-v; 446*f126890aSEmmanuel Vadot status = "okay"; 447*f126890aSEmmanuel Vadot}; 448*f126890aSEmmanuel Vadot 449*f126890aSEmmanuel Vadot&wdog1 { 450*f126890aSEmmanuel Vadot status = "disabled"; 451*f126890aSEmmanuel Vadot}; 452*f126890aSEmmanuel Vadot 453*f126890aSEmmanuel Vadot&wdog2 { 454*f126890aSEmmanuel Vadot pinctrl-names = "default"; 455*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 456*f126890aSEmmanuel Vadot fsl,ext-reset-output; 457*f126890aSEmmanuel Vadot status = "okay"; 458*f126890aSEmmanuel Vadot}; 459