1*f126890aSEmmanuel Vadot/* 2*f126890aSEmmanuel Vadot * Copyright 2013 CompuLab Ltd. 3*f126890aSEmmanuel Vadot * Copyright 2016 Christopher Spinrath 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Based on the devicetree distributed with the vendor kernel for the 6*f126890aSEmmanuel Vadot * Utilite Pro: 7*f126890aSEmmanuel Vadot * Copyright 2013 CompuLab Ltd. 8*f126890aSEmmanuel Vadot * Author: Valentin Raevsky <valentin@compulab.co.il> 9*f126890aSEmmanuel Vadot * 10*f126890aSEmmanuel Vadot * This file is dual-licensed: you can use it either under the terms 11*f126890aSEmmanuel Vadot * of the GPL or the X11 license, at your option. Note that this dual 12*f126890aSEmmanuel Vadot * licensing only applies to this file, and not this project as a 13*f126890aSEmmanuel Vadot * whole. 14*f126890aSEmmanuel Vadot * 15*f126890aSEmmanuel Vadot * a) This file is free software; you can redistribute it and/or 16*f126890aSEmmanuel Vadot * modify it under the terms of the GNU General Public License as 17*f126890aSEmmanuel Vadot * published by the Free Software Foundation; either version 2 of the 18*f126890aSEmmanuel Vadot * License, or (at your option) any later version. 19*f126890aSEmmanuel Vadot * 20*f126890aSEmmanuel Vadot * This file is distributed in the hope that it will be useful, 21*f126890aSEmmanuel Vadot * but WITHOUT ANY WARRANTY; without even the implied warranty of 22*f126890aSEmmanuel Vadot * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23*f126890aSEmmanuel Vadot * GNU General Public License for more details. 24*f126890aSEmmanuel Vadot * 25*f126890aSEmmanuel Vadot * Or, alternatively, 26*f126890aSEmmanuel Vadot * 27*f126890aSEmmanuel Vadot * b) Permission is hereby granted, free of charge, to any person 28*f126890aSEmmanuel Vadot * obtaining a copy of this software and associated documentation 29*f126890aSEmmanuel Vadot * files (the "Software"), to deal in the Software without 30*f126890aSEmmanuel Vadot * restriction, including without limitation the rights to use, 31*f126890aSEmmanuel Vadot * copy, modify, merge, publish, distribute, sublicense, and/or 32*f126890aSEmmanuel Vadot * sell copies of the Software, and to permit persons to whom the 33*f126890aSEmmanuel Vadot * Software is furnished to do so, subject to the following 34*f126890aSEmmanuel Vadot * conditions: 35*f126890aSEmmanuel Vadot * 36*f126890aSEmmanuel Vadot * The above copyright notice and this permission notice shall be 37*f126890aSEmmanuel Vadot * included in all copies or substantial portions of the Software. 38*f126890aSEmmanuel Vadot * 39*f126890aSEmmanuel Vadot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 40*f126890aSEmmanuel Vadot * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 41*f126890aSEmmanuel Vadot * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 42*f126890aSEmmanuel Vadot * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 43*f126890aSEmmanuel Vadot * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 44*f126890aSEmmanuel Vadot * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 45*f126890aSEmmanuel Vadot * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 46*f126890aSEmmanuel Vadot * OTHER DEALINGS IN THE SOFTWARE. 47*f126890aSEmmanuel Vadot */ 48*f126890aSEmmanuel Vadot 49*f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h> 50*f126890aSEmmanuel Vadot#include "imx6q-cm-fx6.dts" 51*f126890aSEmmanuel Vadot 52*f126890aSEmmanuel Vadot/ { 53*f126890aSEmmanuel Vadot model = "CompuLab Utilite Pro"; 54*f126890aSEmmanuel Vadot compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q"; 55*f126890aSEmmanuel Vadot 56*f126890aSEmmanuel Vadot aliases { 57*f126890aSEmmanuel Vadot ethernet1 = ð1; 58*f126890aSEmmanuel Vadot rtc0 = &em3027; 59*f126890aSEmmanuel Vadot rtc1 = &snvs_rtc; 60*f126890aSEmmanuel Vadot }; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot encoder { 63*f126890aSEmmanuel Vadot compatible = "ti,tfp410"; 64*f126890aSEmmanuel Vadot 65*f126890aSEmmanuel Vadot ports { 66*f126890aSEmmanuel Vadot #address-cells = <1>; 67*f126890aSEmmanuel Vadot #size-cells = <0>; 68*f126890aSEmmanuel Vadot 69*f126890aSEmmanuel Vadot port@0 { 70*f126890aSEmmanuel Vadot reg = <0>; 71*f126890aSEmmanuel Vadot 72*f126890aSEmmanuel Vadot tfp410_in: endpoint { 73*f126890aSEmmanuel Vadot remote-endpoint = <¶llel_display_out>; 74*f126890aSEmmanuel Vadot }; 75*f126890aSEmmanuel Vadot }; 76*f126890aSEmmanuel Vadot 77*f126890aSEmmanuel Vadot port@1 { 78*f126890aSEmmanuel Vadot reg = <1>; 79*f126890aSEmmanuel Vadot 80*f126890aSEmmanuel Vadot tfp410_out: endpoint { 81*f126890aSEmmanuel Vadot remote-endpoint = <&hdmi_connector_in>; 82*f126890aSEmmanuel Vadot }; 83*f126890aSEmmanuel Vadot }; 84*f126890aSEmmanuel Vadot }; 85*f126890aSEmmanuel Vadot }; 86*f126890aSEmmanuel Vadot 87*f126890aSEmmanuel Vadot gpio-keys { 88*f126890aSEmmanuel Vadot compatible = "gpio-keys"; 89*f126890aSEmmanuel Vadot pinctrl-names = "default"; 90*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_keys>; 91*f126890aSEmmanuel Vadot 92*f126890aSEmmanuel Vadot key-power { 93*f126890aSEmmanuel Vadot label = "Power Button"; 94*f126890aSEmmanuel Vadot gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 95*f126890aSEmmanuel Vadot linux,code = <KEY_POWER>; 96*f126890aSEmmanuel Vadot wakeup-source; 97*f126890aSEmmanuel Vadot }; 98*f126890aSEmmanuel Vadot }; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot hdmi-connector { 101*f126890aSEmmanuel Vadot compatible = "hdmi-connector"; 102*f126890aSEmmanuel Vadot pinctrl-names = "default"; 103*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hpd>; 104*f126890aSEmmanuel Vadot type = "a"; 105*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c_dvi_ddc>; 106*f126890aSEmmanuel Vadot hpd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 107*f126890aSEmmanuel Vadot 108*f126890aSEmmanuel Vadot port { 109*f126890aSEmmanuel Vadot hdmi_connector_in: endpoint { 110*f126890aSEmmanuel Vadot remote-endpoint = <&tfp410_out>; 111*f126890aSEmmanuel Vadot }; 112*f126890aSEmmanuel Vadot }; 113*f126890aSEmmanuel Vadot }; 114*f126890aSEmmanuel Vadot 115*f126890aSEmmanuel Vadot i2cmux { 116*f126890aSEmmanuel Vadot compatible = "i2c-mux-gpio"; 117*f126890aSEmmanuel Vadot pinctrl-names = "default"; 118*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1mux>; 119*f126890aSEmmanuel Vadot #address-cells = <1>; 120*f126890aSEmmanuel Vadot #size-cells = <0>; 121*f126890aSEmmanuel Vadot 122*f126890aSEmmanuel Vadot mux-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 123*f126890aSEmmanuel Vadot i2c-parent = <&i2c1>; 124*f126890aSEmmanuel Vadot 125*f126890aSEmmanuel Vadot i2c@0 { 126*f126890aSEmmanuel Vadot reg = <0>; 127*f126890aSEmmanuel Vadot #address-cells = <1>; 128*f126890aSEmmanuel Vadot #size-cells = <0>; 129*f126890aSEmmanuel Vadot 130*f126890aSEmmanuel Vadot eeprom@50 { 131*f126890aSEmmanuel Vadot compatible = "atmel,24c02"; 132*f126890aSEmmanuel Vadot reg = <0x50>; 133*f126890aSEmmanuel Vadot pagesize = <16>; 134*f126890aSEmmanuel Vadot }; 135*f126890aSEmmanuel Vadot 136*f126890aSEmmanuel Vadot em3027: rtc@56 { 137*f126890aSEmmanuel Vadot compatible = "emmicro,em3027"; 138*f126890aSEmmanuel Vadot reg = <0x56>; 139*f126890aSEmmanuel Vadot }; 140*f126890aSEmmanuel Vadot }; 141*f126890aSEmmanuel Vadot 142*f126890aSEmmanuel Vadot i2c_dvi_ddc: i2c@1 { 143*f126890aSEmmanuel Vadot reg = <1>; 144*f126890aSEmmanuel Vadot #address-cells = <1>; 145*f126890aSEmmanuel Vadot #size-cells = <0>; 146*f126890aSEmmanuel Vadot }; 147*f126890aSEmmanuel Vadot }; 148*f126890aSEmmanuel Vadot 149*f126890aSEmmanuel Vadot parallel-display { 150*f126890aSEmmanuel Vadot compatible = "fsl,imx-parallel-display"; 151*f126890aSEmmanuel Vadot #address-cells = <1>; 152*f126890aSEmmanuel Vadot #size-cells = <0>; 153*f126890aSEmmanuel Vadot pinctrl-names = "default"; 154*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ipu1>; 155*f126890aSEmmanuel Vadot 156*f126890aSEmmanuel Vadot interface-pix-fmt = "rgb24"; 157*f126890aSEmmanuel Vadot 158*f126890aSEmmanuel Vadot port@0 { 159*f126890aSEmmanuel Vadot reg = <0>; 160*f126890aSEmmanuel Vadot 161*f126890aSEmmanuel Vadot parallel_display_in: endpoint { 162*f126890aSEmmanuel Vadot remote-endpoint = <&ipu1_di0_disp0>; 163*f126890aSEmmanuel Vadot }; 164*f126890aSEmmanuel Vadot }; 165*f126890aSEmmanuel Vadot 166*f126890aSEmmanuel Vadot port@1 { 167*f126890aSEmmanuel Vadot reg = <1>; 168*f126890aSEmmanuel Vadot 169*f126890aSEmmanuel Vadot parallel_display_out: endpoint { 170*f126890aSEmmanuel Vadot remote-endpoint = <&tfp410_in>; 171*f126890aSEmmanuel Vadot }; 172*f126890aSEmmanuel Vadot }; 173*f126890aSEmmanuel Vadot }; 174*f126890aSEmmanuel Vadot}; 175*f126890aSEmmanuel Vadot 176*f126890aSEmmanuel Vadot/* 177*f126890aSEmmanuel Vadot * A single IPU is not able to drive both display interfaces available on the 178*f126890aSEmmanuel Vadot * Utilite Pro at high resolution due to its bandwidth limitation. Since the 179*f126890aSEmmanuel Vadot * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the 180*f126890aSEmmanuel Vadot * SoC-internal Designware HDMI encoder forcing the latter to be connected to 181*f126890aSEmmanuel Vadot * IPU2 instead of IPU1. 182*f126890aSEmmanuel Vadot */ 183*f126890aSEmmanuel Vadot/delete-node/&ipu1_di0_hdmi; 184*f126890aSEmmanuel Vadot/delete-node/&hdmi_mux_0; 185*f126890aSEmmanuel Vadot/delete-node/&ipu1_di1_hdmi; 186*f126890aSEmmanuel Vadot/delete-node/&hdmi_mux_1; 187*f126890aSEmmanuel Vadot 188*f126890aSEmmanuel Vadot&hdmi { 189*f126890aSEmmanuel Vadot pinctrl-names = "default"; 190*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hdmicec>; 191*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c2>; 192*f126890aSEmmanuel Vadot status = "okay"; 193*f126890aSEmmanuel Vadot}; 194*f126890aSEmmanuel Vadot 195*f126890aSEmmanuel Vadot&i2c1 { 196*f126890aSEmmanuel Vadot pinctrl-names = "default"; 197*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 198*f126890aSEmmanuel Vadot status = "okay"; 199*f126890aSEmmanuel Vadot}; 200*f126890aSEmmanuel Vadot 201*f126890aSEmmanuel Vadot&i2c2 { 202*f126890aSEmmanuel Vadot pinctrl-names = "default"; 203*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 204*f126890aSEmmanuel Vadot status = "okay"; 205*f126890aSEmmanuel Vadot}; 206*f126890aSEmmanuel Vadot 207*f126890aSEmmanuel Vadot&iomuxc { 208*f126890aSEmmanuel Vadot pinctrl_gpio_keys: gpio_keysgrp { 209*f126890aSEmmanuel Vadot fsl,pins = < 210*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 211*f126890aSEmmanuel Vadot >; 212*f126890aSEmmanuel Vadot }; 213*f126890aSEmmanuel Vadot 214*f126890aSEmmanuel Vadot pinctrl_hdmicec: hdmicecgrp { 215*f126890aSEmmanuel Vadot fsl,pins = < 216*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 217*f126890aSEmmanuel Vadot >; 218*f126890aSEmmanuel Vadot }; 219*f126890aSEmmanuel Vadot 220*f126890aSEmmanuel Vadot pinctrl_hpd: hpdgrp { 221*f126890aSEmmanuel Vadot fsl,pins = < 222*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 223*f126890aSEmmanuel Vadot >; 224*f126890aSEmmanuel Vadot }; 225*f126890aSEmmanuel Vadot 226*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 227*f126890aSEmmanuel Vadot fsl,pins = < 228*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 229*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 230*f126890aSEmmanuel Vadot >; 231*f126890aSEmmanuel Vadot }; 232*f126890aSEmmanuel Vadot 233*f126890aSEmmanuel Vadot pinctrl_i2c1mux: i2c1muxgrp { 234*f126890aSEmmanuel Vadot fsl,pins = < 235*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 236*f126890aSEmmanuel Vadot >; 237*f126890aSEmmanuel Vadot }; 238*f126890aSEmmanuel Vadot 239*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 240*f126890aSEmmanuel Vadot fsl,pins = < 241*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 242*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 243*f126890aSEmmanuel Vadot >; 244*f126890aSEmmanuel Vadot }; 245*f126890aSEmmanuel Vadot 246*f126890aSEmmanuel Vadot pinctrl_ipu1: ipu1grp { 247*f126890aSEmmanuel Vadot fsl,pins = < 248*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 249*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 250*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 251*f126890aSEmmanuel Vadot MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 252*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 253*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 254*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 255*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 256*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 257*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 258*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 259*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 260*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 261*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 262*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 263*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 264*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 265*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 266*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 267*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 268*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 269*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 270*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 271*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 272*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 273*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 274*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 275*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 276*f126890aSEmmanuel Vadot >; 277*f126890aSEmmanuel Vadot }; 278*f126890aSEmmanuel Vadot 279*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 280*f126890aSEmmanuel Vadot fsl,pins = < 281*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 282*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 283*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 284*f126890aSEmmanuel Vadot MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 285*f126890aSEmmanuel Vadot >; 286*f126890aSEmmanuel Vadot }; 287*f126890aSEmmanuel Vadot 288*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 289*f126890aSEmmanuel Vadot fsl,pins = < 290*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 291*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 292*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 293*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 294*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 295*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 296*f126890aSEmmanuel Vadot >; 297*f126890aSEmmanuel Vadot }; 298*f126890aSEmmanuel Vadot 299*f126890aSEmmanuel Vadot pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { 300*f126890aSEmmanuel Vadot fsl,pins = < 301*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9 302*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9 303*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9 304*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9 305*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9 306*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9 307*f126890aSEmmanuel Vadot >; 308*f126890aSEmmanuel Vadot }; 309*f126890aSEmmanuel Vadot 310*f126890aSEmmanuel Vadot pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { 311*f126890aSEmmanuel Vadot fsl,pins = < 312*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9 313*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9 314*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9 315*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9 316*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9 317*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9 318*f126890aSEmmanuel Vadot >; 319*f126890aSEmmanuel Vadot }; 320*f126890aSEmmanuel Vadot}; 321*f126890aSEmmanuel Vadot 322*f126890aSEmmanuel Vadot&ipu1_di0_disp0 { 323*f126890aSEmmanuel Vadot remote-endpoint = <¶llel_display_in>; 324*f126890aSEmmanuel Vadot}; 325*f126890aSEmmanuel Vadot 326*f126890aSEmmanuel Vadot&pcie { 327*f126890aSEmmanuel Vadot pcie@0,0 { 328*f126890aSEmmanuel Vadot reg = <0x000000 0 0 0 0>; 329*f126890aSEmmanuel Vadot #address-cells = <3>; 330*f126890aSEmmanuel Vadot #size-cells = <2>; 331*f126890aSEmmanuel Vadot 332*f126890aSEmmanuel Vadot /* non-removable i211 ethernet card */ 333*f126890aSEmmanuel Vadot eth1: intel,i211@pcie0,0 { 334*f126890aSEmmanuel Vadot reg = <0x010000 0 0 0 0>; 335*f126890aSEmmanuel Vadot }; 336*f126890aSEmmanuel Vadot }; 337*f126890aSEmmanuel Vadot}; 338*f126890aSEmmanuel Vadot 339*f126890aSEmmanuel Vadot&uart2 { 340*f126890aSEmmanuel Vadot pinctrl-names = "default"; 341*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 342*f126890aSEmmanuel Vadot uart-has-rtscts; 343*f126890aSEmmanuel Vadot status = "okay"; 344*f126890aSEmmanuel Vadot}; 345*f126890aSEmmanuel Vadot 346*f126890aSEmmanuel Vadot&usdhc3 { 347*f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 348*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 349*f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 350*f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 351*f126890aSEmmanuel Vadot no-1-8-v; 352*f126890aSEmmanuel Vadot broken-cd; 353*f126890aSEmmanuel Vadot keep-power-in-suspend; 354*f126890aSEmmanuel Vadot status = "okay"; 355*f126890aSEmmanuel Vadot}; 356