xref: /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/imx6dl-plym2m.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Copyright (c) 2014 Protonic Holland
4*f126890aSEmmanuel Vadot * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5*f126890aSEmmanuel Vadot */
6*f126890aSEmmanuel Vadot
7*f126890aSEmmanuel Vadot/dts-v1/;
8*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
9*f126890aSEmmanuel Vadot#include <dt-bindings/leds/common.h>
10*f126890aSEmmanuel Vadot#include "imx6dl.dtsi"
11*f126890aSEmmanuel Vadot
12*f126890aSEmmanuel Vadot/ {
13*f126890aSEmmanuel Vadot	model = "Plymovent M2M board";
14*f126890aSEmmanuel Vadot	compatible = "ply,plym2m", "fsl,imx6dl";
15*f126890aSEmmanuel Vadot
16*f126890aSEmmanuel Vadot	chosen {
17*f126890aSEmmanuel Vadot		stdout-path = &uart4;
18*f126890aSEmmanuel Vadot	};
19*f126890aSEmmanuel Vadot
20*f126890aSEmmanuel Vadot	backlight: backlight {
21*f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
22*f126890aSEmmanuel Vadot		pwms = <&pwm1 0 5000000 0>;
23*f126890aSEmmanuel Vadot		brightness-levels = <0 1000>;
24*f126890aSEmmanuel Vadot		num-interpolated-steps = <20>;
25*f126890aSEmmanuel Vadot		default-brightness-level = <19>;
26*f126890aSEmmanuel Vadot		power-supply = <&reg_12v0>;
27*f126890aSEmmanuel Vadot	};
28*f126890aSEmmanuel Vadot
29*f126890aSEmmanuel Vadot	display {
30*f126890aSEmmanuel Vadot		compatible = "fsl,imx-parallel-display";
31*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_ipu1_disp>;
32*f126890aSEmmanuel Vadot		pinctrl-names = "default";
33*f126890aSEmmanuel Vadot		#address-cells = <1>;
34*f126890aSEmmanuel Vadot		#size-cells = <0>;
35*f126890aSEmmanuel Vadot
36*f126890aSEmmanuel Vadot		port@0 {
37*f126890aSEmmanuel Vadot			reg = <0>;
38*f126890aSEmmanuel Vadot
39*f126890aSEmmanuel Vadot			display_in: endpoint {
40*f126890aSEmmanuel Vadot				remote-endpoint = <&ipu1_di0_disp0>;
41*f126890aSEmmanuel Vadot			};
42*f126890aSEmmanuel Vadot		};
43*f126890aSEmmanuel Vadot
44*f126890aSEmmanuel Vadot		port@1 {
45*f126890aSEmmanuel Vadot			reg = <1>;
46*f126890aSEmmanuel Vadot
47*f126890aSEmmanuel Vadot			display_out: endpoint {
48*f126890aSEmmanuel Vadot				remote-endpoint = <&panel_in>;
49*f126890aSEmmanuel Vadot			};
50*f126890aSEmmanuel Vadot		};
51*f126890aSEmmanuel Vadot	};
52*f126890aSEmmanuel Vadot
53*f126890aSEmmanuel Vadot	iio-hwmon {
54*f126890aSEmmanuel Vadot		compatible = "iio-hwmon";
55*f126890aSEmmanuel Vadot		io-channels = <&vdiv_vaccu>;
56*f126890aSEmmanuel Vadot	};
57*f126890aSEmmanuel Vadot
58*f126890aSEmmanuel Vadot	leds {
59*f126890aSEmmanuel Vadot		compatible = "gpio-leds";
60*f126890aSEmmanuel Vadot		pinctrl-names = "default";
61*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_leds>;
62*f126890aSEmmanuel Vadot
63*f126890aSEmmanuel Vadot		led-0 {
64*f126890aSEmmanuel Vadot			label = "debug0";
65*f126890aSEmmanuel Vadot			function = LED_FUNCTION_STATUS;
66*f126890aSEmmanuel Vadot			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
67*f126890aSEmmanuel Vadot			linux,default-trigger = "heartbeat";
68*f126890aSEmmanuel Vadot		};
69*f126890aSEmmanuel Vadot	};
70*f126890aSEmmanuel Vadot
71*f126890aSEmmanuel Vadot	panel {
72*f126890aSEmmanuel Vadot		compatible = "edt,etm0700g0bdh6";
73*f126890aSEmmanuel Vadot		backlight = <&backlight>;
74*f126890aSEmmanuel Vadot		power-supply = <&reg_3v3>;
75*f126890aSEmmanuel Vadot
76*f126890aSEmmanuel Vadot		port {
77*f126890aSEmmanuel Vadot			panel_in: endpoint {
78*f126890aSEmmanuel Vadot				remote-endpoint = <&display_out>;
79*f126890aSEmmanuel Vadot			};
80*f126890aSEmmanuel Vadot		};
81*f126890aSEmmanuel Vadot	};
82*f126890aSEmmanuel Vadot
83*f126890aSEmmanuel Vadot	clk50m_phy: phy-clock {
84*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
85*f126890aSEmmanuel Vadot		#clock-cells = <0>;
86*f126890aSEmmanuel Vadot		clock-frequency = <50000000>;
87*f126890aSEmmanuel Vadot		clock-output-names = "enet_ref_pad";
88*f126890aSEmmanuel Vadot	};
89*f126890aSEmmanuel Vadot
90*f126890aSEmmanuel Vadot	reg_3v3: regulator-3v3 {
91*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
92*f126890aSEmmanuel Vadot		regulator-name = "3v3";
93*f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
94*f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
95*f126890aSEmmanuel Vadot	};
96*f126890aSEmmanuel Vadot
97*f126890aSEmmanuel Vadot	reg_5v0: regulator-5v0 {
98*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
99*f126890aSEmmanuel Vadot		regulator-name = "5v0";
100*f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
101*f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
102*f126890aSEmmanuel Vadot	};
103*f126890aSEmmanuel Vadot
104*f126890aSEmmanuel Vadot	reg_12v0: regulator-12v0 {
105*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
106*f126890aSEmmanuel Vadot		regulator-name = "12v0";
107*f126890aSEmmanuel Vadot		regulator-min-microvolt = <12000000>;
108*f126890aSEmmanuel Vadot		regulator-max-microvolt = <12000000>;
109*f126890aSEmmanuel Vadot	};
110*f126890aSEmmanuel Vadot
111*f126890aSEmmanuel Vadot	thermal-zones {
112*f126890aSEmmanuel Vadot		chassis-thermal {
113*f126890aSEmmanuel Vadot			polling-delay = <20000>;
114*f126890aSEmmanuel Vadot			polling-delay-passive = <0>;
115*f126890aSEmmanuel Vadot			thermal-sensors = <&tsens0>;
116*f126890aSEmmanuel Vadot
117*f126890aSEmmanuel Vadot			trips {
118*f126890aSEmmanuel Vadot				alert {
119*f126890aSEmmanuel Vadot					temperature = <85000>; /* millicelsius */
120*f126890aSEmmanuel Vadot					hysteresis = <2000>; /* millicelsius */
121*f126890aSEmmanuel Vadot					type = "passive";
122*f126890aSEmmanuel Vadot				};
123*f126890aSEmmanuel Vadot			};
124*f126890aSEmmanuel Vadot		};
125*f126890aSEmmanuel Vadot
126*f126890aSEmmanuel Vadot		touch-thermal0 {
127*f126890aSEmmanuel Vadot			polling-delay = <20000>;
128*f126890aSEmmanuel Vadot			polling-delay-passive = <0>;
129*f126890aSEmmanuel Vadot			thermal-sensors = <&touch_temp0>;
130*f126890aSEmmanuel Vadot
131*f126890aSEmmanuel Vadot			trips {
132*f126890aSEmmanuel Vadot				alert {
133*f126890aSEmmanuel Vadot					temperature = <85000>; /* millicelsius */
134*f126890aSEmmanuel Vadot					hysteresis = <2000>; /* millicelsius */
135*f126890aSEmmanuel Vadot					type = "passive";
136*f126890aSEmmanuel Vadot				};
137*f126890aSEmmanuel Vadot			};
138*f126890aSEmmanuel Vadot		};
139*f126890aSEmmanuel Vadot
140*f126890aSEmmanuel Vadot		touch-thermal1 {
141*f126890aSEmmanuel Vadot			polling-delay = <20000>;
142*f126890aSEmmanuel Vadot			polling-delay-passive = <0>;
143*f126890aSEmmanuel Vadot			thermal-sensors = <&touch_temp1>;
144*f126890aSEmmanuel Vadot
145*f126890aSEmmanuel Vadot			trips {
146*f126890aSEmmanuel Vadot				alert {
147*f126890aSEmmanuel Vadot					temperature = <85000>; /* millicelsius */
148*f126890aSEmmanuel Vadot					hysteresis = <2000>; /* millicelsius */
149*f126890aSEmmanuel Vadot					type = "passive";
150*f126890aSEmmanuel Vadot				};
151*f126890aSEmmanuel Vadot			};
152*f126890aSEmmanuel Vadot		};
153*f126890aSEmmanuel Vadot	};
154*f126890aSEmmanuel Vadot
155*f126890aSEmmanuel Vadot	touchscreen {
156*f126890aSEmmanuel Vadot		compatible = "resistive-adc-touch";
157*f126890aSEmmanuel Vadot		io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
158*f126890aSEmmanuel Vadot                              <&adc_ts 5>;
159*f126890aSEmmanuel Vadot		io-channel-names = "y", "z1", "z2", "x";
160*f126890aSEmmanuel Vadot		touchscreen-min-pressure = <64687>;
161*f126890aSEmmanuel Vadot		touchscreen-inverted-x;
162*f126890aSEmmanuel Vadot		touchscreen-inverted-y;
163*f126890aSEmmanuel Vadot		touchscreen-x-plate-ohms = <300>;
164*f126890aSEmmanuel Vadot		touchscreen-y-plate-ohms = <800>;
165*f126890aSEmmanuel Vadot	};
166*f126890aSEmmanuel Vadot
167*f126890aSEmmanuel Vadot	touch_temp0: touch-temperature-sensor0 {
168*f126890aSEmmanuel Vadot		compatible = "generic-adc-thermal";
169*f126890aSEmmanuel Vadot		#thermal-sensor-cells = <0>;
170*f126890aSEmmanuel Vadot		io-channels = <&adc_ts 0>;
171*f126890aSEmmanuel Vadot		io-channel-names = "sensor-channel";
172*f126890aSEmmanuel Vadot		temperature-lookup-table = <    (-40000) 736
173*f126890aSEmmanuel Vadot						85000 474>;
174*f126890aSEmmanuel Vadot	};
175*f126890aSEmmanuel Vadot
176*f126890aSEmmanuel Vadot	touch_temp1: touch-temperature-sensor1 {
177*f126890aSEmmanuel Vadot		compatible = "generic-adc-thermal";
178*f126890aSEmmanuel Vadot		#thermal-sensor-cells = <0>;
179*f126890aSEmmanuel Vadot		io-channels = <&adc_ts 7>;
180*f126890aSEmmanuel Vadot		io-channel-names = "sensor-channel";
181*f126890aSEmmanuel Vadot		temperature-lookup-table = <    (-40000) 826
182*f126890aSEmmanuel Vadot						85000 609>;
183*f126890aSEmmanuel Vadot	};
184*f126890aSEmmanuel Vadot
185*f126890aSEmmanuel Vadot	vdiv_vaccu: voltage-divider-vaccu {
186*f126890aSEmmanuel Vadot		compatible = "voltage-divider";
187*f126890aSEmmanuel Vadot		io-channels = <&adc_ts 2>;
188*f126890aSEmmanuel Vadot		output-ohms = <2500>;
189*f126890aSEmmanuel Vadot		full-ohms = <64000>;
190*f126890aSEmmanuel Vadot		#io-channel-cells = <0>;
191*f126890aSEmmanuel Vadot	};
192*f126890aSEmmanuel Vadot};
193*f126890aSEmmanuel Vadot
194*f126890aSEmmanuel Vadot&can1 {
195*f126890aSEmmanuel Vadot	pinctrl-names = "default";
196*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_can1>;
197*f126890aSEmmanuel Vadot	xceiver-supply = <&reg_5v0>;
198*f126890aSEmmanuel Vadot	status = "okay";
199*f126890aSEmmanuel Vadot};
200*f126890aSEmmanuel Vadot
201*f126890aSEmmanuel Vadot&clks {
202*f126890aSEmmanuel Vadot	clocks = <&clk50m_phy>;
203*f126890aSEmmanuel Vadot	clock-names = "enet_ref_pad";
204*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
205*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clk50m_phy>;
206*f126890aSEmmanuel Vadot};
207*f126890aSEmmanuel Vadot
208*f126890aSEmmanuel Vadot&ecspi1 {
209*f126890aSEmmanuel Vadot	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
210*f126890aSEmmanuel Vadot	pinctrl-names = "default";
211*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_ecspi1>;
212*f126890aSEmmanuel Vadot	status = "okay";
213*f126890aSEmmanuel Vadot
214*f126890aSEmmanuel Vadot	flash@0 {
215*f126890aSEmmanuel Vadot		compatible = "jedec,spi-nor";
216*f126890aSEmmanuel Vadot		reg = <0>;
217*f126890aSEmmanuel Vadot		spi-max-frequency = <20000000>;
218*f126890aSEmmanuel Vadot	};
219*f126890aSEmmanuel Vadot};
220*f126890aSEmmanuel Vadot
221*f126890aSEmmanuel Vadot&ecspi2 {
222*f126890aSEmmanuel Vadot	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
223*f126890aSEmmanuel Vadot	pinctrl-names = "default";
224*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_ecspi2>;
225*f126890aSEmmanuel Vadot	status = "okay";
226*f126890aSEmmanuel Vadot
227*f126890aSEmmanuel Vadot	adc_ts: adc@0 {
228*f126890aSEmmanuel Vadot		compatible = "ti,tsc2046e-adc";
229*f126890aSEmmanuel Vadot		reg = <0>;
230*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_tsc2046>;
231*f126890aSEmmanuel Vadot		pinctrl-names = "default";
232*f126890aSEmmanuel Vadot		spi-max-frequency = <1000000>;
233*f126890aSEmmanuel Vadot		interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
234*f126890aSEmmanuel Vadot		#io-channel-cells = <1>;
235*f126890aSEmmanuel Vadot
236*f126890aSEmmanuel Vadot		#address-cells = <1>;
237*f126890aSEmmanuel Vadot		#size-cells = <0>;
238*f126890aSEmmanuel Vadot
239*f126890aSEmmanuel Vadot		channel@0 {
240*f126890aSEmmanuel Vadot			reg = <0>;
241*f126890aSEmmanuel Vadot			settling-time-us = <300>;
242*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
243*f126890aSEmmanuel Vadot		};
244*f126890aSEmmanuel Vadot
245*f126890aSEmmanuel Vadot		channel@1 {
246*f126890aSEmmanuel Vadot			reg = <1>;
247*f126890aSEmmanuel Vadot			settling-time-us = <700>;
248*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
249*f126890aSEmmanuel Vadot		};
250*f126890aSEmmanuel Vadot
251*f126890aSEmmanuel Vadot		channel@2 {
252*f126890aSEmmanuel Vadot			reg = <2>;
253*f126890aSEmmanuel Vadot			settling-time-us = <300>;
254*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
255*f126890aSEmmanuel Vadot		};
256*f126890aSEmmanuel Vadot
257*f126890aSEmmanuel Vadot		channel@3 {
258*f126890aSEmmanuel Vadot			reg = <3>;
259*f126890aSEmmanuel Vadot			settling-time-us = <700>;
260*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
261*f126890aSEmmanuel Vadot		};
262*f126890aSEmmanuel Vadot
263*f126890aSEmmanuel Vadot		channel@4 {
264*f126890aSEmmanuel Vadot			reg = <4>;
265*f126890aSEmmanuel Vadot			settling-time-us = <700>;
266*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
267*f126890aSEmmanuel Vadot		};
268*f126890aSEmmanuel Vadot
269*f126890aSEmmanuel Vadot		channel@5 {
270*f126890aSEmmanuel Vadot			reg = <5>;
271*f126890aSEmmanuel Vadot			settling-time-us = <700>;
272*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
273*f126890aSEmmanuel Vadot		};
274*f126890aSEmmanuel Vadot
275*f126890aSEmmanuel Vadot		/* channel 6 is not connected */
276*f126890aSEmmanuel Vadot
277*f126890aSEmmanuel Vadot		channel@7 {
278*f126890aSEmmanuel Vadot			reg = <7>;
279*f126890aSEmmanuel Vadot			settling-time-us = <300>;
280*f126890aSEmmanuel Vadot			oversampling-ratio = <5>;
281*f126890aSEmmanuel Vadot		};
282*f126890aSEmmanuel Vadot	};
283*f126890aSEmmanuel Vadot};
284*f126890aSEmmanuel Vadot
285*f126890aSEmmanuel Vadot&fec {
286*f126890aSEmmanuel Vadot	pinctrl-names = "default";
287*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet>;
288*f126890aSEmmanuel Vadot	phy-mode = "rmii";
289*f126890aSEmmanuel Vadot	phy-handle = <&rgmii_phy>;
290*f126890aSEmmanuel Vadot	status = "okay";
291*f126890aSEmmanuel Vadot
292*f126890aSEmmanuel Vadot	mdio {
293*f126890aSEmmanuel Vadot		#address-cells = <1>;
294*f126890aSEmmanuel Vadot		#size-cells = <0>;
295*f126890aSEmmanuel Vadot
296*f126890aSEmmanuel Vadot		/* Microchip KSZ8081RNA PHY */
297*f126890aSEmmanuel Vadot		rgmii_phy: ethernet-phy@0 {
298*f126890aSEmmanuel Vadot			reg = <0>;
299*f126890aSEmmanuel Vadot			interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
300*f126890aSEmmanuel Vadot			reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
301*f126890aSEmmanuel Vadot			reset-assert-us = <10000>;
302*f126890aSEmmanuel Vadot			reset-deassert-us = <300>;
303*f126890aSEmmanuel Vadot		};
304*f126890aSEmmanuel Vadot	};
305*f126890aSEmmanuel Vadot};
306*f126890aSEmmanuel Vadot
307*f126890aSEmmanuel Vadot&gpio1 {
308*f126890aSEmmanuel Vadot	gpio-line-names =
309*f126890aSEmmanuel Vadot		"CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
310*f126890aSEmmanuel Vadot		"DEBUG_0", "", "", "", "", "", "", "",
311*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
312*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
313*f126890aSEmmanuel Vadot};
314*f126890aSEmmanuel Vadot
315*f126890aSEmmanuel Vadot&gpio2 {
316*f126890aSEmmanuel Vadot	gpio-line-names =
317*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
318*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
319*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
320*f126890aSEmmanuel Vadot		"", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
321*f126890aSEmmanuel Vadot};
322*f126890aSEmmanuel Vadot
323*f126890aSEmmanuel Vadot&gpio3 {
324*f126890aSEmmanuel Vadot	gpio-line-names =
325*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
326*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
327*f126890aSEmmanuel Vadot		"", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
328*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
329*f126890aSEmmanuel Vadot};
330*f126890aSEmmanuel Vadot
331*f126890aSEmmanuel Vadot&gpio4 {
332*f126890aSEmmanuel Vadot	gpio-line-names =
333*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
334*f126890aSEmmanuel Vadot		"", "", "", "", "CAN1_SR", "", "", "",
335*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
336*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
337*f126890aSEmmanuel Vadot};
338*f126890aSEmmanuel Vadot
339*f126890aSEmmanuel Vadot&gpio5 {
340*f126890aSEmmanuel Vadot	gpio-line-names =
341*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
342*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
343*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
344*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
345*f126890aSEmmanuel Vadot};
346*f126890aSEmmanuel Vadot
347*f126890aSEmmanuel Vadot&i2c1 {
348*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
349*f126890aSEmmanuel Vadot	pinctrl-names = "default";
350*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
351*f126890aSEmmanuel Vadot	status = "okay";
352*f126890aSEmmanuel Vadot
353*f126890aSEmmanuel Vadot	/* additional i2c devices are added automatically by the boot loader */
354*f126890aSEmmanuel Vadot};
355*f126890aSEmmanuel Vadot
356*f126890aSEmmanuel Vadot&i2c3 {
357*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
358*f126890aSEmmanuel Vadot	pinctrl-names = "default";
359*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c3>;
360*f126890aSEmmanuel Vadot	status = "okay";
361*f126890aSEmmanuel Vadot
362*f126890aSEmmanuel Vadot	tsens0: temperature-sensor@70 {
363*f126890aSEmmanuel Vadot		compatible = "ti,tmp103";
364*f126890aSEmmanuel Vadot		reg = <0x70>;
365*f126890aSEmmanuel Vadot		#thermal-sensor-cells = <0>;
366*f126890aSEmmanuel Vadot	};
367*f126890aSEmmanuel Vadot};
368*f126890aSEmmanuel Vadot
369*f126890aSEmmanuel Vadot&ipu1_di0_disp0 {
370*f126890aSEmmanuel Vadot	remote-endpoint = <&display_in>;
371*f126890aSEmmanuel Vadot};
372*f126890aSEmmanuel Vadot
373*f126890aSEmmanuel Vadot&pwm1 {
374*f126890aSEmmanuel Vadot	pinctrl-names = "default";
375*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm1>;
376*f126890aSEmmanuel Vadot	status = "okay";
377*f126890aSEmmanuel Vadot};
378*f126890aSEmmanuel Vadot
379*f126890aSEmmanuel Vadot&uart4 {
380*f126890aSEmmanuel Vadot	pinctrl-names = "default";
381*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart4>;
382*f126890aSEmmanuel Vadot	status = "okay";
383*f126890aSEmmanuel Vadot};
384*f126890aSEmmanuel Vadot
385*f126890aSEmmanuel Vadot&usbphynop1 {
386*f126890aSEmmanuel Vadot	status = "disabled";
387*f126890aSEmmanuel Vadot};
388*f126890aSEmmanuel Vadot
389*f126890aSEmmanuel Vadot&usbphynop2 {
390*f126890aSEmmanuel Vadot	status = "disabled";
391*f126890aSEmmanuel Vadot};
392*f126890aSEmmanuel Vadot
393*f126890aSEmmanuel Vadot&usbotg {
394*f126890aSEmmanuel Vadot	phy_type = "utmi";
395*f126890aSEmmanuel Vadot	dr_mode = "host";
396*f126890aSEmmanuel Vadot	disable-over-current;
397*f126890aSEmmanuel Vadot	status = "okay";
398*f126890aSEmmanuel Vadot};
399*f126890aSEmmanuel Vadot
400*f126890aSEmmanuel Vadot&usdhc1 {
401*f126890aSEmmanuel Vadot	pinctrl-names = "default";
402*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
403*f126890aSEmmanuel Vadot	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
404*f126890aSEmmanuel Vadot	no-1-8-v;
405*f126890aSEmmanuel Vadot	disable-wp;
406*f126890aSEmmanuel Vadot	cap-sd-highspeed;
407*f126890aSEmmanuel Vadot	no-mmc;
408*f126890aSEmmanuel Vadot	no-sdio;
409*f126890aSEmmanuel Vadot	status = "okay";
410*f126890aSEmmanuel Vadot};
411*f126890aSEmmanuel Vadot
412*f126890aSEmmanuel Vadot&usdhc3 {
413*f126890aSEmmanuel Vadot	pinctrl-names = "default";
414*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc3>;
415*f126890aSEmmanuel Vadot	bus-width = <8>;
416*f126890aSEmmanuel Vadot	no-1-8-v;
417*f126890aSEmmanuel Vadot	non-removable;
418*f126890aSEmmanuel Vadot	no-sd;
419*f126890aSEmmanuel Vadot	no-sdio;
420*f126890aSEmmanuel Vadot	status = "okay";
421*f126890aSEmmanuel Vadot};
422*f126890aSEmmanuel Vadot
423*f126890aSEmmanuel Vadot&iomuxc {
424*f126890aSEmmanuel Vadot	pinctrl_can1: can1grp {
425*f126890aSEmmanuel Vadot		fsl,pins = <
426*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
427*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
428*f126890aSEmmanuel Vadot			/* CAN1_SR */
429*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL3__GPIO4_IO12			0x13008
430*f126890aSEmmanuel Vadot			/* CAN1_TERM */
431*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_0__GPIO1_IO00			0x1b088
432*f126890aSEmmanuel Vadot		>;
433*f126890aSEmmanuel Vadot	};
434*f126890aSEmmanuel Vadot
435*f126890aSEmmanuel Vadot	pinctrl_ecspi1: ecspi1grp {
436*f126890aSEmmanuel Vadot		fsl,pins = <
437*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D17__ECSPI1_MISO			0x1b000
438*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI			0x3008
439*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK			0x3008
440*f126890aSEmmanuel Vadot			/* CS */
441*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D19__GPIO3_IO19			0x3008
442*f126890aSEmmanuel Vadot		>;
443*f126890aSEmmanuel Vadot	};
444*f126890aSEmmanuel Vadot
445*f126890aSEmmanuel Vadot	pinctrl_ecspi2: ecspi2grp {
446*f126890aSEmmanuel Vadot		fsl,pins = <
447*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_OE__ECSPI2_MISO			0x10000
448*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK			0x3008
449*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI			0x3008
450*f126890aSEmmanuel Vadot			/* CS */
451*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_RW__GPIO2_IO26			0x3008
452*f126890aSEmmanuel Vadot		>;
453*f126890aSEmmanuel Vadot	};
454*f126890aSEmmanuel Vadot
455*f126890aSEmmanuel Vadot	pinctrl_enet: enetgrp {
456*f126890aSEmmanuel Vadot		fsl,pins = <
457*f126890aSEmmanuel Vadot			/* MX6QDL_ENET_PINGRP4 */
458*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b0b0
459*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b0b0
460*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0		0x1b0b0
461*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1		0x1b0b0
462*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER		0x1b0b0
463*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN		0x1b0b0
464*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0		0x1b0b0
465*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1		0x1b0b0
466*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN		0x1b0b0
467*f126890aSEmmanuel Vadot
468*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_16__ENET_REF_CLK		0x1b0b0
469*f126890aSEmmanuel Vadot			/* Phy reset */
470*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22		0x1b0b0
471*f126890aSEmmanuel Vadot			/* nINTRP */
472*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23		0x1b0b0
473*f126890aSEmmanuel Vadot		>;
474*f126890aSEmmanuel Vadot	};
475*f126890aSEmmanuel Vadot
476*f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
477*f126890aSEmmanuel Vadot		fsl,pins = <
478*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA			0x4001f8b1
479*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL			0x4001f8b1
480*f126890aSEmmanuel Vadot		>;
481*f126890aSEmmanuel Vadot	};
482*f126890aSEmmanuel Vadot
483*f126890aSEmmanuel Vadot	pinctrl_i2c3: i2c3grp {
484*f126890aSEmmanuel Vadot		fsl,pins = <
485*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_5__I2C3_SCL			0x4001b8b1
486*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_6__I2C3_SDA			0x4001b8b1
487*f126890aSEmmanuel Vadot		>;
488*f126890aSEmmanuel Vadot	};
489*f126890aSEmmanuel Vadot
490*f126890aSEmmanuel Vadot	pinctrl_ipu1_disp: ipudisp1grp {
491*f126890aSEmmanuel Vadot		fsl,pins = <
492*f126890aSEmmanuel Vadot			/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
493*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x30
494*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x30
495*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x30
496*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x30
497*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x30
498*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x30
499*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x30
500*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x30
501*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x30
502*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x30
503*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x30
504*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x30
505*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x30
506*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x30
507*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x30
508*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x30
509*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x30
510*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x30
511*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x30
512*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x30
513*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x30
514*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x30
515*f126890aSEmmanuel Vadot		>;
516*f126890aSEmmanuel Vadot	};
517*f126890aSEmmanuel Vadot
518*f126890aSEmmanuel Vadot	pinctrl_leds: ledsgrp {
519*f126890aSEmmanuel Vadot		fsl,pins = <
520*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x1b0b0
521*f126890aSEmmanuel Vadot		>;
522*f126890aSEmmanuel Vadot	};
523*f126890aSEmmanuel Vadot
524*f126890aSEmmanuel Vadot	pinctrl_pwm1: pwm1grp {
525*f126890aSEmmanuel Vadot		fsl,pins = <
526*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x8
527*f126890aSEmmanuel Vadot		>;
528*f126890aSEmmanuel Vadot	};
529*f126890aSEmmanuel Vadot
530*f126890aSEmmanuel Vadot	pinctrl_tsc2046: tsc2046grp {
531*f126890aSEmmanuel Vadot		fsl,pins = <
532*f126890aSEmmanuel Vadot			/* TSC_PENIRQ */
533*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x1b0b1
534*f126890aSEmmanuel Vadot			/* TSC_BUSY */
535*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_EB2__GPIO2_IO30			0x1b0b0
536*f126890aSEmmanuel Vadot		>;
537*f126890aSEmmanuel Vadot	};
538*f126890aSEmmanuel Vadot
539*f126890aSEmmanuel Vadot	pinctrl_uart4: uart4grp {
540*f126890aSEmmanuel Vadot		fsl,pins = <
541*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
542*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
543*f126890aSEmmanuel Vadot		>;
544*f126890aSEmmanuel Vadot	};
545*f126890aSEmmanuel Vadot
546*f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
547*f126890aSEmmanuel Vadot		fsl,pins = <
548*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
549*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
550*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
551*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
552*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
553*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
554*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_1__GPIO1_IO01			0x1b0b0
555*f126890aSEmmanuel Vadot		>;
556*f126890aSEmmanuel Vadot	};
557*f126890aSEmmanuel Vadot
558*f126890aSEmmanuel Vadot	pinctrl_usdhc3: usdhc3grp {
559*f126890aSEmmanuel Vadot		fsl,pins = <
560*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
561*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
562*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
563*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
564*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
565*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
566*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
567*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
568*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
569*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
570*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
571*f126890aSEmmanuel Vadot		>;
572*f126890aSEmmanuel Vadot	};
573*f126890aSEmmanuel Vadot};
574