xref: /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/imx6dl-lanmcu.dts (revision f126890ac5386406dadf7c4cfa9566cbb56537c5)
1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later
2*f126890aSEmmanuel Vadot/*
3*f126890aSEmmanuel Vadot * Copyright (c) 2019 Protonic Holland
4*f126890aSEmmanuel Vadot * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5*f126890aSEmmanuel Vadot */
6*f126890aSEmmanuel Vadot
7*f126890aSEmmanuel Vadot/dts-v1/;
8*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h>
9*f126890aSEmmanuel Vadot#include <dt-bindings/leds/common.h>
10*f126890aSEmmanuel Vadot#include "imx6dl.dtsi"
11*f126890aSEmmanuel Vadot
12*f126890aSEmmanuel Vadot/ {
13*f126890aSEmmanuel Vadot	model = "Van der Laan LANMCU";
14*f126890aSEmmanuel Vadot	compatible = "vdl,lanmcu", "fsl,imx6dl";
15*f126890aSEmmanuel Vadot
16*f126890aSEmmanuel Vadot	chosen {
17*f126890aSEmmanuel Vadot		stdout-path = &uart4;
18*f126890aSEmmanuel Vadot	};
19*f126890aSEmmanuel Vadot
20*f126890aSEmmanuel Vadot	clock_ksz8081: clock-ksz8081 {
21*f126890aSEmmanuel Vadot		compatible = "fixed-clock";
22*f126890aSEmmanuel Vadot		#clock-cells = <0>;
23*f126890aSEmmanuel Vadot		clock-frequency = <50000000>;
24*f126890aSEmmanuel Vadot		clock-output-names = "enet_ref_pad";
25*f126890aSEmmanuel Vadot	};
26*f126890aSEmmanuel Vadot
27*f126890aSEmmanuel Vadot	backlight: backlight {
28*f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
29*f126890aSEmmanuel Vadot		pwms = <&pwm1 0 5000000 0>;
30*f126890aSEmmanuel Vadot		brightness-levels = <0 1000>;
31*f126890aSEmmanuel Vadot		num-interpolated-steps = <20>;
32*f126890aSEmmanuel Vadot		default-brightness-level = <19>;
33*f126890aSEmmanuel Vadot	};
34*f126890aSEmmanuel Vadot
35*f126890aSEmmanuel Vadot	display {
36*f126890aSEmmanuel Vadot		compatible = "fsl,imx-parallel-display";
37*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_ipu1_disp>;
38*f126890aSEmmanuel Vadot		pinctrl-names = "default";
39*f126890aSEmmanuel Vadot		#address-cells = <1>;
40*f126890aSEmmanuel Vadot		#size-cells = <0>;
41*f126890aSEmmanuel Vadot
42*f126890aSEmmanuel Vadot		port@0 {
43*f126890aSEmmanuel Vadot			reg = <0>;
44*f126890aSEmmanuel Vadot
45*f126890aSEmmanuel Vadot			display_in: endpoint {
46*f126890aSEmmanuel Vadot				remote-endpoint = <&ipu1_di0_disp0>;
47*f126890aSEmmanuel Vadot			};
48*f126890aSEmmanuel Vadot		};
49*f126890aSEmmanuel Vadot
50*f126890aSEmmanuel Vadot		port@1 {
51*f126890aSEmmanuel Vadot			reg = <1>;
52*f126890aSEmmanuel Vadot
53*f126890aSEmmanuel Vadot			display_out: endpoint {
54*f126890aSEmmanuel Vadot				remote-endpoint = <&panel_in>;
55*f126890aSEmmanuel Vadot			};
56*f126890aSEmmanuel Vadot		};
57*f126890aSEmmanuel Vadot	};
58*f126890aSEmmanuel Vadot
59*f126890aSEmmanuel Vadot	leds {
60*f126890aSEmmanuel Vadot		compatible = "gpio-leds";
61*f126890aSEmmanuel Vadot		pinctrl-names = "default";
62*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_leds>;
63*f126890aSEmmanuel Vadot
64*f126890aSEmmanuel Vadot		led-0 {
65*f126890aSEmmanuel Vadot			label = "debug0";
66*f126890aSEmmanuel Vadot			function = LED_FUNCTION_STATUS;
67*f126890aSEmmanuel Vadot			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
68*f126890aSEmmanuel Vadot			linux,default-trigger = "heartbeat";
69*f126890aSEmmanuel Vadot		};
70*f126890aSEmmanuel Vadot	};
71*f126890aSEmmanuel Vadot
72*f126890aSEmmanuel Vadot	panel {
73*f126890aSEmmanuel Vadot		compatible = "edt,etm0700g0bdh6";
74*f126890aSEmmanuel Vadot		backlight = <&backlight>;
75*f126890aSEmmanuel Vadot
76*f126890aSEmmanuel Vadot		port {
77*f126890aSEmmanuel Vadot			panel_in: endpoint {
78*f126890aSEmmanuel Vadot				remote-endpoint = <&display_out>;
79*f126890aSEmmanuel Vadot			};
80*f126890aSEmmanuel Vadot		};
81*f126890aSEmmanuel Vadot	};
82*f126890aSEmmanuel Vadot
83*f126890aSEmmanuel Vadot	reg_otg_vbus: regulator-otg-vbus {
84*f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
85*f126890aSEmmanuel Vadot		regulator-name = "otg-vbus";
86*f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
87*f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
88*f126890aSEmmanuel Vadot		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
89*f126890aSEmmanuel Vadot		enable-active-high;
90*f126890aSEmmanuel Vadot	};
91*f126890aSEmmanuel Vadot
92*f126890aSEmmanuel Vadot	usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
93*f126890aSEmmanuel Vadot		compatible = "mmc-pwrseq-simple";
94*f126890aSEmmanuel Vadot		pinctrl-names = "default";
95*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_wifi_npd>;
96*f126890aSEmmanuel Vadot		reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
97*f126890aSEmmanuel Vadot	};
98*f126890aSEmmanuel Vadot
99*f126890aSEmmanuel Vadot};
100*f126890aSEmmanuel Vadot
101*f126890aSEmmanuel Vadot&can1 {
102*f126890aSEmmanuel Vadot	pinctrl-names = "default";
103*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_can1>;
104*f126890aSEmmanuel Vadot	status = "okay";
105*f126890aSEmmanuel Vadot};
106*f126890aSEmmanuel Vadot
107*f126890aSEmmanuel Vadot&can2 {
108*f126890aSEmmanuel Vadot	pinctrl-names = "default";
109*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_can2>;
110*f126890aSEmmanuel Vadot	status = "okay";
111*f126890aSEmmanuel Vadot};
112*f126890aSEmmanuel Vadot
113*f126890aSEmmanuel Vadot&clks {
114*f126890aSEmmanuel Vadot	clocks = <&clock_ksz8081>;
115*f126890aSEmmanuel Vadot	clock-names = "enet_ref_pad";
116*f126890aSEmmanuel Vadot	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
117*f126890aSEmmanuel Vadot	assigned-clock-parents = <&clock_ksz8081>;
118*f126890aSEmmanuel Vadot};
119*f126890aSEmmanuel Vadot
120*f126890aSEmmanuel Vadot&fec {
121*f126890aSEmmanuel Vadot	pinctrl-names = "default";
122*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_enet>;
123*f126890aSEmmanuel Vadot	phy-mode = "rmii";
124*f126890aSEmmanuel Vadot	phy-handle = <&rgmii_phy>;
125*f126890aSEmmanuel Vadot	status = "okay";
126*f126890aSEmmanuel Vadot
127*f126890aSEmmanuel Vadot	mdio {
128*f126890aSEmmanuel Vadot		#address-cells = <1>;
129*f126890aSEmmanuel Vadot		#size-cells = <0>;
130*f126890aSEmmanuel Vadot
131*f126890aSEmmanuel Vadot		/* Microchip KSZ8081RNA PHY */
132*f126890aSEmmanuel Vadot		rgmii_phy: ethernet-phy@0 {
133*f126890aSEmmanuel Vadot			reg = <0>;
134*f126890aSEmmanuel Vadot			interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
135*f126890aSEmmanuel Vadot			reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
136*f126890aSEmmanuel Vadot			reset-assert-us = <10000>;
137*f126890aSEmmanuel Vadot			reset-deassert-us = <300>;
138*f126890aSEmmanuel Vadot		};
139*f126890aSEmmanuel Vadot	};
140*f126890aSEmmanuel Vadot};
141*f126890aSEmmanuel Vadot
142*f126890aSEmmanuel Vadot&gpio1 {
143*f126890aSEmmanuel Vadot	gpio-line-names =
144*f126890aSEmmanuel Vadot		"", "SD1_CD", "", "", "", "", "", "",
145*f126890aSEmmanuel Vadot		"DEBUG_0", "BL_PWM", "", "", "", "", "", "",
146*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "ENET_LED_GREEN",
147*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
148*f126890aSEmmanuel Vadot};
149*f126890aSEmmanuel Vadot
150*f126890aSEmmanuel Vadot&gpio3 {
151*f126890aSEmmanuel Vadot	gpio-line-names =
152*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
153*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
154*f126890aSEmmanuel Vadot		"", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
155*f126890aSEmmanuel Vadot		"", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
156*f126890aSEmmanuel Vadot};
157*f126890aSEmmanuel Vadot
158*f126890aSEmmanuel Vadot&gpio5 {
159*f126890aSEmmanuel Vadot	gpio-line-names =
160*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
161*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
162*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "ENET_RST", "ENET_INT",
163*f126890aSEmmanuel Vadot		"", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
164*f126890aSEmmanuel Vadot};
165*f126890aSEmmanuel Vadot
166*f126890aSEmmanuel Vadot&gpio6 {
167*f126890aSEmmanuel Vadot	gpio-line-names =
168*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
169*f126890aSEmmanuel Vadot		"", "", "WLAN_REG_ON", "", "", "", "", "",
170*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
171*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
172*f126890aSEmmanuel Vadot};
173*f126890aSEmmanuel Vadot
174*f126890aSEmmanuel Vadot&gpio7 {
175*f126890aSEmmanuel Vadot	gpio-line-names =
176*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
177*f126890aSEmmanuel Vadot		"EMMC_RST", "", "", "", "", "", "", "",
178*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "",
179*f126890aSEmmanuel Vadot		"", "", "", "", "", "", "", "";
180*f126890aSEmmanuel Vadot};
181*f126890aSEmmanuel Vadot
182*f126890aSEmmanuel Vadot&i2c1 {
183*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
184*f126890aSEmmanuel Vadot	pinctrl-names = "default";
185*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c1>;
186*f126890aSEmmanuel Vadot	status = "okay";
187*f126890aSEmmanuel Vadot
188*f126890aSEmmanuel Vadot	/* additional i2c devices are added automatically by the boot loader */
189*f126890aSEmmanuel Vadot};
190*f126890aSEmmanuel Vadot
191*f126890aSEmmanuel Vadot&i2c3 {
192*f126890aSEmmanuel Vadot	clock-frequency = <100000>;
193*f126890aSEmmanuel Vadot	pinctrl-names = "default";
194*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_i2c3>;
195*f126890aSEmmanuel Vadot	status = "okay";
196*f126890aSEmmanuel Vadot
197*f126890aSEmmanuel Vadot	touchscreen@38 {
198*f126890aSEmmanuel Vadot		compatible = "edt,edt-ft5406";
199*f126890aSEmmanuel Vadot		reg = <0x38>;
200*f126890aSEmmanuel Vadot		pinctrl-names = "default";
201*f126890aSEmmanuel Vadot		pinctrl-0 = <&pinctrl_ts_edt>;
202*f126890aSEmmanuel Vadot		interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
203*f126890aSEmmanuel Vadot
204*f126890aSEmmanuel Vadot		touchscreen-size-x = <1792>;
205*f126890aSEmmanuel Vadot		touchscreen-size-y = <1024>;
206*f126890aSEmmanuel Vadot
207*f126890aSEmmanuel Vadot		touchscreen-fuzz-x = <0>;
208*f126890aSEmmanuel Vadot		touchscreen-fuzz-y = <0>;
209*f126890aSEmmanuel Vadot
210*f126890aSEmmanuel Vadot		/* Touch screen calibration */
211*f126890aSEmmanuel Vadot		threshold = <50>;
212*f126890aSEmmanuel Vadot		gain = <5>;
213*f126890aSEmmanuel Vadot		offset = <10>;
214*f126890aSEmmanuel Vadot	};
215*f126890aSEmmanuel Vadot
216*f126890aSEmmanuel Vadot	rtc@51 {
217*f126890aSEmmanuel Vadot		compatible = "nxp,pcf8563";
218*f126890aSEmmanuel Vadot		reg = <0x51>;
219*f126890aSEmmanuel Vadot	};
220*f126890aSEmmanuel Vadot};
221*f126890aSEmmanuel Vadot
222*f126890aSEmmanuel Vadot&ipu1_di0_disp0 {
223*f126890aSEmmanuel Vadot	remote-endpoint = <&display_in>;
224*f126890aSEmmanuel Vadot};
225*f126890aSEmmanuel Vadot
226*f126890aSEmmanuel Vadot&pwm1 {
227*f126890aSEmmanuel Vadot	pinctrl-names = "default";
228*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_pwm1>;
229*f126890aSEmmanuel Vadot	status = "okay";
230*f126890aSEmmanuel Vadot};
231*f126890aSEmmanuel Vadot
232*f126890aSEmmanuel Vadot&uart2 {
233*f126890aSEmmanuel Vadot	pinctrl-names = "default";
234*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart2>;
235*f126890aSEmmanuel Vadot	linux,rs485-enabled-at-boot-time;
236*f126890aSEmmanuel Vadot	uart-has-rtscts;
237*f126890aSEmmanuel Vadot	status = "okay";
238*f126890aSEmmanuel Vadot};
239*f126890aSEmmanuel Vadot
240*f126890aSEmmanuel Vadot&uart3 {
241*f126890aSEmmanuel Vadot	pinctrl-names = "default";
242*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart3>;
243*f126890aSEmmanuel Vadot	linux,rs485-enabled-at-boot-time;
244*f126890aSEmmanuel Vadot	uart-has-rtscts;
245*f126890aSEmmanuel Vadot	status = "okay";
246*f126890aSEmmanuel Vadot};
247*f126890aSEmmanuel Vadot
248*f126890aSEmmanuel Vadot&uart4 {
249*f126890aSEmmanuel Vadot	pinctrl-names = "default";
250*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_uart4>;
251*f126890aSEmmanuel Vadot	status = "okay";
252*f126890aSEmmanuel Vadot};
253*f126890aSEmmanuel Vadot
254*f126890aSEmmanuel Vadot&usbotg {
255*f126890aSEmmanuel Vadot	vbus-supply = <&reg_otg_vbus>;
256*f126890aSEmmanuel Vadot	pinctrl-names = "default";
257*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usbotg>;
258*f126890aSEmmanuel Vadot	phy_type = "utmi";
259*f126890aSEmmanuel Vadot	dr_mode = "host";
260*f126890aSEmmanuel Vadot	over-current-active-low;
261*f126890aSEmmanuel Vadot	status = "okay";
262*f126890aSEmmanuel Vadot};
263*f126890aSEmmanuel Vadot
264*f126890aSEmmanuel Vadot&usbphynop1 {
265*f126890aSEmmanuel Vadot	status = "disabled";
266*f126890aSEmmanuel Vadot};
267*f126890aSEmmanuel Vadot
268*f126890aSEmmanuel Vadot&usbphynop2 {
269*f126890aSEmmanuel Vadot	status = "disabled";
270*f126890aSEmmanuel Vadot};
271*f126890aSEmmanuel Vadot
272*f126890aSEmmanuel Vadot&usdhc1 {
273*f126890aSEmmanuel Vadot	pinctrl-names = "default";
274*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc1>;
275*f126890aSEmmanuel Vadot	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
276*f126890aSEmmanuel Vadot	no-1-8-v;
277*f126890aSEmmanuel Vadot	disable-wp;
278*f126890aSEmmanuel Vadot	cap-sd-highspeed;
279*f126890aSEmmanuel Vadot	no-mmc;
280*f126890aSEmmanuel Vadot	no-sdio;
281*f126890aSEmmanuel Vadot	status = "okay";
282*f126890aSEmmanuel Vadot};
283*f126890aSEmmanuel Vadot
284*f126890aSEmmanuel Vadot&usdhc2 {
285*f126890aSEmmanuel Vadot	pinctrl-names = "default";
286*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc2>;
287*f126890aSEmmanuel Vadot	no-1-8-v;
288*f126890aSEmmanuel Vadot	non-removable;
289*f126890aSEmmanuel Vadot	mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
290*f126890aSEmmanuel Vadot	#address-cells = <1>;
291*f126890aSEmmanuel Vadot	#size-cells = <0>;
292*f126890aSEmmanuel Vadot	status = "okay";
293*f126890aSEmmanuel Vadot
294*f126890aSEmmanuel Vadot	wifi@1 {
295*f126890aSEmmanuel Vadot		reg = <1>;
296*f126890aSEmmanuel Vadot		compatible = "brcm,bcm4329-fmac";
297*f126890aSEmmanuel Vadot	};
298*f126890aSEmmanuel Vadot};
299*f126890aSEmmanuel Vadot
300*f126890aSEmmanuel Vadot&usdhc3 {
301*f126890aSEmmanuel Vadot	pinctrl-names = "default";
302*f126890aSEmmanuel Vadot	pinctrl-0 = <&pinctrl_usdhc3>;
303*f126890aSEmmanuel Vadot	bus-width = <8>;
304*f126890aSEmmanuel Vadot	no-1-8-v;
305*f126890aSEmmanuel Vadot	non-removable;
306*f126890aSEmmanuel Vadot	no-sd;
307*f126890aSEmmanuel Vadot	no-sdio;
308*f126890aSEmmanuel Vadot	status = "okay";
309*f126890aSEmmanuel Vadot};
310*f126890aSEmmanuel Vadot
311*f126890aSEmmanuel Vadot&iomuxc {
312*f126890aSEmmanuel Vadot	pinctrl_can1: can1grp {
313*f126890aSEmmanuel Vadot		fsl,pins = <
314*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
315*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
316*f126890aSEmmanuel Vadot		>;
317*f126890aSEmmanuel Vadot	};
318*f126890aSEmmanuel Vadot
319*f126890aSEmmanuel Vadot	pinctrl_can2: can2grp {
320*f126890aSEmmanuel Vadot		fsl,pins = <
321*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b000
322*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x3008
323*f126890aSEmmanuel Vadot		>;
324*f126890aSEmmanuel Vadot	};
325*f126890aSEmmanuel Vadot
326*f126890aSEmmanuel Vadot	pinctrl_enet: enetgrp {
327*f126890aSEmmanuel Vadot		fsl,pins = <
328*f126890aSEmmanuel Vadot			/* MX6QDL_ENET_PINGRP4 */
329*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b0b0
330*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b0b0
331*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0		0x1b0b0
332*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1		0x1b0b0
333*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER		0x1b0b0
334*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN		0x1b0b0
335*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0		0x1b0b0
336*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1		0x1b0b0
337*f126890aSEmmanuel Vadot			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN		0x1b0b0
338*f126890aSEmmanuel Vadot
339*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_16__ENET_REF_CLK		0x1b0b0
340*f126890aSEmmanuel Vadot			/* Phy reset */
341*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22		0x1b0b0
342*f126890aSEmmanuel Vadot			/* nINTRP */
343*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23		0x1b0b0
344*f126890aSEmmanuel Vadot		>;
345*f126890aSEmmanuel Vadot	};
346*f126890aSEmmanuel Vadot
347*f126890aSEmmanuel Vadot	pinctrl_i2c1: i2c1grp {
348*f126890aSEmmanuel Vadot		fsl,pins = <
349*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA			0x4001f8b1
350*f126890aSEmmanuel Vadot			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL			0x4001f8b1
351*f126890aSEmmanuel Vadot		>;
352*f126890aSEmmanuel Vadot	};
353*f126890aSEmmanuel Vadot
354*f126890aSEmmanuel Vadot	pinctrl_i2c3: i2c3grp {
355*f126890aSEmmanuel Vadot		fsl,pins = <
356*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_5__I2C3_SCL			0x4001b8b1
357*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_6__I2C3_SDA			0x4001b8b1
358*f126890aSEmmanuel Vadot		>;
359*f126890aSEmmanuel Vadot	};
360*f126890aSEmmanuel Vadot
361*f126890aSEmmanuel Vadot	pinctrl_ipu1_disp: ipudisp1grp {
362*f126890aSEmmanuel Vadot		fsl,pins = <
363*f126890aSEmmanuel Vadot			/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
364*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x30
365*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x30
366*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x30
367*f126890aSEmmanuel Vadot			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x30
368*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x30
369*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x30
370*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x30
371*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x30
372*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x30
373*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x30
374*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x30
375*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x30
376*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x30
377*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x30
378*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x30
379*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x30
380*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x30
381*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x30
382*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x30
383*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x30
384*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x30
385*f126890aSEmmanuel Vadot			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x30
386*f126890aSEmmanuel Vadot		>;
387*f126890aSEmmanuel Vadot	};
388*f126890aSEmmanuel Vadot
389*f126890aSEmmanuel Vadot	pinctrl_leds: ledsgrp {
390*f126890aSEmmanuel Vadot		fsl,pins = <
391*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x1b0b0
392*f126890aSEmmanuel Vadot		>;
393*f126890aSEmmanuel Vadot	};
394*f126890aSEmmanuel Vadot
395*f126890aSEmmanuel Vadot	pinctrl_pwm1: pwm1grp {
396*f126890aSEmmanuel Vadot		fsl,pins = <
397*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x8
398*f126890aSEmmanuel Vadot		>;
399*f126890aSEmmanuel Vadot	};
400*f126890aSEmmanuel Vadot
401*f126890aSEmmanuel Vadot	pinctrl_ts_edt: ts1grp {
402*f126890aSEmmanuel Vadot		fsl,pins = <
403*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x1b0b0
404*f126890aSEmmanuel Vadot		>;
405*f126890aSEmmanuel Vadot	};
406*f126890aSEmmanuel Vadot
407*f126890aSEmmanuel Vadot	pinctrl_uart2: uart2grp {
408*f126890aSEmmanuel Vadot		fsl,pins = <
409*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D26__UART2_RX_DATA		0x1b0b1
410*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D27__UART2_TX_DATA		0x1b0b1
411*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D28__UART2_CTS_B			0x130b1
412*f126890aSEmmanuel Vadot		>;
413*f126890aSEmmanuel Vadot	};
414*f126890aSEmmanuel Vadot
415*f126890aSEmmanuel Vadot	pinctrl_uart3: uart3grp {
416*f126890aSEmmanuel Vadot		fsl,pins = <
417*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
418*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
419*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D30__UART3_CTS_B			0x130b1
420*f126890aSEmmanuel Vadot		>;
421*f126890aSEmmanuel Vadot	};
422*f126890aSEmmanuel Vadot
423*f126890aSEmmanuel Vadot	pinctrl_uart4: uart4grp {
424*f126890aSEmmanuel Vadot		fsl,pins = <
425*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
426*f126890aSEmmanuel Vadot			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
427*f126890aSEmmanuel Vadot		>;
428*f126890aSEmmanuel Vadot	};
429*f126890aSEmmanuel Vadot
430*f126890aSEmmanuel Vadot	pinctrl_usbotg: usbotggrp {
431*f126890aSEmmanuel Vadot		fsl,pins = <
432*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D21__USB_OTG_OC			0x1b0b0
433*f126890aSEmmanuel Vadot			/* power enable, high active */
434*f126890aSEmmanuel Vadot			MX6QDL_PAD_EIM_D22__GPIO3_IO22			0x1b0b0
435*f126890aSEmmanuel Vadot		>;
436*f126890aSEmmanuel Vadot	};
437*f126890aSEmmanuel Vadot
438*f126890aSEmmanuel Vadot	pinctrl_usdhc1: usdhc1grp {
439*f126890aSEmmanuel Vadot		fsl,pins = <
440*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
441*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
442*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
443*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
444*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
445*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
446*f126890aSEmmanuel Vadot			MX6QDL_PAD_GPIO_1__SD1_CD_B			0x1b0b0
447*f126890aSEmmanuel Vadot		>;
448*f126890aSEmmanuel Vadot	};
449*f126890aSEmmanuel Vadot
450*f126890aSEmmanuel Vadot	pinctrl_usdhc2: usdhc2grp {
451*f126890aSEmmanuel Vadot		fsl,pins = <
452*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_CMD__SD2_CMD			0x170b9
453*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_CLK__SD2_CLK			0x100b9
454*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x170b9
455*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x170b9
456*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x170b9
457*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x170b9
458*f126890aSEmmanuel Vadot		>;
459*f126890aSEmmanuel Vadot	};
460*f126890aSEmmanuel Vadot
461*f126890aSEmmanuel Vadot	pinctrl_usdhc3: usdhc3grp {
462*f126890aSEmmanuel Vadot		fsl,pins = <
463*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
464*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
465*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
466*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
467*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
468*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
469*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
470*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
471*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
472*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
473*f126890aSEmmanuel Vadot			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
474*f126890aSEmmanuel Vadot		>;
475*f126890aSEmmanuel Vadot	};
476*f126890aSEmmanuel Vadot
477*f126890aSEmmanuel Vadot	pinctrl_wifi_npd: wifigrp {
478*f126890aSEmmanuel Vadot		fsl,pins = <
479*f126890aSEmmanuel Vadot			/* WL_REG_ON */
480*f126890aSEmmanuel Vadot			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10		0x13069
481*f126890aSEmmanuel Vadot		>;
482*f126890aSEmmanuel Vadot	};
483*f126890aSEmmanuel Vadot};
484