1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Copyright (c) 2016 Protonic Holland 4*f126890aSEmmanuel Vadot * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix 5*f126890aSEmmanuel Vadot */ 6*f126890aSEmmanuel Vadot 7*f126890aSEmmanuel Vadot/dts-v1/; 8*f126890aSEmmanuel Vadot#include <dt-bindings/gpio/gpio.h> 9*f126890aSEmmanuel Vadot#include <dt-bindings/leds/common.h> 10*f126890aSEmmanuel Vadot#include <dt-bindings/sound/fsl-imx-audmux.h> 11*f126890aSEmmanuel Vadot#include "imx6dl.dtsi" 12*f126890aSEmmanuel Vadot 13*f126890aSEmmanuel Vadot/ { 14*f126890aSEmmanuel Vadot model = "Altesco I6P Board"; 15*f126890aSEmmanuel Vadot compatible = "alt,alti6p", "fsl,imx6dl"; 16*f126890aSEmmanuel Vadot 17*f126890aSEmmanuel Vadot chosen { 18*f126890aSEmmanuel Vadot stdout-path = &uart4; 19*f126890aSEmmanuel Vadot }; 20*f126890aSEmmanuel Vadot 21*f126890aSEmmanuel Vadot clock_ksz8081: clock-ksz8081 { 22*f126890aSEmmanuel Vadot compatible = "fixed-clock"; 23*f126890aSEmmanuel Vadot #clock-cells = <0>; 24*f126890aSEmmanuel Vadot clock-frequency = <50000000>; 25*f126890aSEmmanuel Vadot clock-output-names = "enet_ref_pad"; 26*f126890aSEmmanuel Vadot }; 27*f126890aSEmmanuel Vadot 28*f126890aSEmmanuel Vadot i2c2-mux { 29*f126890aSEmmanuel Vadot compatible = "i2c-mux"; 30*f126890aSEmmanuel Vadot i2c-parent = <&i2c2>; 31*f126890aSEmmanuel Vadot mux-controls = <&i2c_mux>; 32*f126890aSEmmanuel Vadot #address-cells = <1>; 33*f126890aSEmmanuel Vadot #size-cells = <0>; 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadot i2c@1 { 36*f126890aSEmmanuel Vadot reg = <1>; 37*f126890aSEmmanuel Vadot #address-cells = <1>; 38*f126890aSEmmanuel Vadot #size-cells = <0>; 39*f126890aSEmmanuel Vadot }; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot i2c@2 { 42*f126890aSEmmanuel Vadot reg = <2>; 43*f126890aSEmmanuel Vadot #address-cells = <1>; 44*f126890aSEmmanuel Vadot #size-cells = <0>; 45*f126890aSEmmanuel Vadot }; 46*f126890aSEmmanuel Vadot }; 47*f126890aSEmmanuel Vadot 48*f126890aSEmmanuel Vadot i2c4-mux { 49*f126890aSEmmanuel Vadot compatible = "i2c-mux"; 50*f126890aSEmmanuel Vadot i2c-parent = <&i2c4>; 51*f126890aSEmmanuel Vadot mux-controls = <&i2c_mux>; 52*f126890aSEmmanuel Vadot #address-cells = <1>; 53*f126890aSEmmanuel Vadot #size-cells = <0>; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot i2c@1 { 56*f126890aSEmmanuel Vadot reg = <1>; 57*f126890aSEmmanuel Vadot #address-cells = <1>; 58*f126890aSEmmanuel Vadot #size-cells = <0>; 59*f126890aSEmmanuel Vadot }; 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadot i2c@2 { 62*f126890aSEmmanuel Vadot reg = <2>; 63*f126890aSEmmanuel Vadot #address-cells = <1>; 64*f126890aSEmmanuel Vadot #size-cells = <0>; 65*f126890aSEmmanuel Vadot }; 66*f126890aSEmmanuel Vadot }; 67*f126890aSEmmanuel Vadot 68*f126890aSEmmanuel Vadot leds { 69*f126890aSEmmanuel Vadot compatible = "gpio-leds"; 70*f126890aSEmmanuel Vadot pinctrl-names = "default"; 71*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_leds>; 72*f126890aSEmmanuel Vadot 73*f126890aSEmmanuel Vadot led-debug0 { 74*f126890aSEmmanuel Vadot function = LED_FUNCTION_STATUS; 75*f126890aSEmmanuel Vadot gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 76*f126890aSEmmanuel Vadot linux,default-trigger = "heartbeat"; 77*f126890aSEmmanuel Vadot }; 78*f126890aSEmmanuel Vadot 79*f126890aSEmmanuel Vadot led-debug1 { 80*f126890aSEmmanuel Vadot function = LED_FUNCTION_SD; 81*f126890aSEmmanuel Vadot gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 82*f126890aSEmmanuel Vadot linux,default-trigger = "disk-activity"; 83*f126890aSEmmanuel Vadot }; 84*f126890aSEmmanuel Vadot }; 85*f126890aSEmmanuel Vadot 86*f126890aSEmmanuel Vadot i2c_mux: mux-controller { 87*f126890aSEmmanuel Vadot compatible = "gpio-mux"; 88*f126890aSEmmanuel Vadot #mux-control-cells = <0>; 89*f126890aSEmmanuel Vadot pinctrl-names = "default"; 90*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2cmux>; 91*f126890aSEmmanuel Vadot 92*f126890aSEmmanuel Vadot mux-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>, 93*f126890aSEmmanuel Vadot <&gpio5 11 GPIO_ACTIVE_HIGH>; 94*f126890aSEmmanuel Vadot }; 95*f126890aSEmmanuel Vadot 96*f126890aSEmmanuel Vadot reg_1v8: regulator-1v8 { 97*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 98*f126890aSEmmanuel Vadot regulator-name = "1v8"; 99*f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 100*f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 101*f126890aSEmmanuel Vadot }; 102*f126890aSEmmanuel Vadot 103*f126890aSEmmanuel Vadot reg_3v3: regulator-3v3 { 104*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 105*f126890aSEmmanuel Vadot regulator-name = "3v3"; 106*f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 107*f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 108*f126890aSEmmanuel Vadot }; 109*f126890aSEmmanuel Vadot 110*f126890aSEmmanuel Vadot reg_5v0: regulator-5v0 { 111*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 112*f126890aSEmmanuel Vadot regulator-name = "5v0"; 113*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 114*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 115*f126890aSEmmanuel Vadot }; 116*f126890aSEmmanuel Vadot 117*f126890aSEmmanuel Vadot reg_h1_vbus: regulator-h1-vbus { 118*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 119*f126890aSEmmanuel Vadot regulator-name = "h1-vbus"; 120*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 121*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 122*f126890aSEmmanuel Vadot gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 123*f126890aSEmmanuel Vadot enable-active-high; 124*f126890aSEmmanuel Vadot }; 125*f126890aSEmmanuel Vadot 126*f126890aSEmmanuel Vadot reg_otg_vbus: regulator-otg-vbus { 127*f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 128*f126890aSEmmanuel Vadot regulator-name = "otg-vbus"; 129*f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 130*f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 131*f126890aSEmmanuel Vadot gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 132*f126890aSEmmanuel Vadot enable-active-high; 133*f126890aSEmmanuel Vadot }; 134*f126890aSEmmanuel Vadot 135*f126890aSEmmanuel Vadot sound { 136*f126890aSEmmanuel Vadot compatible = "simple-audio-card"; 137*f126890aSEmmanuel Vadot simple-audio-card,name = "prti6q-sgtl5000"; 138*f126890aSEmmanuel Vadot simple-audio-card,format = "i2s"; 139*f126890aSEmmanuel Vadot simple-audio-card,widgets = 140*f126890aSEmmanuel Vadot "Microphone", "Microphone Jack", 141*f126890aSEmmanuel Vadot "Line", "Line In Jack", 142*f126890aSEmmanuel Vadot "Headphone", "Headphone Jack", 143*f126890aSEmmanuel Vadot "Speaker", "External Speaker"; 144*f126890aSEmmanuel Vadot simple-audio-card,routing = 145*f126890aSEmmanuel Vadot "MIC_IN", "Microphone Jack", 146*f126890aSEmmanuel Vadot "LINE_IN", "Line In Jack", 147*f126890aSEmmanuel Vadot "Headphone Jack", "HP_OUT", 148*f126890aSEmmanuel Vadot "External Speaker", "LINE_OUT"; 149*f126890aSEmmanuel Vadot 150*f126890aSEmmanuel Vadot simple-audio-card,cpu { 151*f126890aSEmmanuel Vadot sound-dai = <&ssi1>; 152*f126890aSEmmanuel Vadot system-clock-frequency = <0>; 153*f126890aSEmmanuel Vadot }; 154*f126890aSEmmanuel Vadot 155*f126890aSEmmanuel Vadot simple-audio-card,codec { 156*f126890aSEmmanuel Vadot sound-dai = <&sgtl5000>; 157*f126890aSEmmanuel Vadot bitclock-master; 158*f126890aSEmmanuel Vadot frame-master; 159*f126890aSEmmanuel Vadot }; 160*f126890aSEmmanuel Vadot }; 161*f126890aSEmmanuel Vadot}; 162*f126890aSEmmanuel Vadot 163*f126890aSEmmanuel Vadot&audmux { 164*f126890aSEmmanuel Vadot pinctrl-names = "default"; 165*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_audmux>; 166*f126890aSEmmanuel Vadot status = "okay"; 167*f126890aSEmmanuel Vadot 168*f126890aSEmmanuel Vadot mux-ssi1 { 169*f126890aSEmmanuel Vadot fsl,audmux-port = <0>; 170*f126890aSEmmanuel Vadot fsl,port-config = < 171*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_SYN 0 172*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSEL(2) 0 173*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCSEL(2) 0 174*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TFSDIR 0 175*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2) 176*f126890aSEmmanuel Vadot >; 177*f126890aSEmmanuel Vadot }; 178*f126890aSEmmanuel Vadot 179*f126890aSEmmanuel Vadot mux-pins3 { 180*f126890aSEmmanuel Vadot fsl,audmux-port = <2>; 181*f126890aSEmmanuel Vadot fsl,port-config = < 182*f126890aSEmmanuel Vadot IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0) 183*f126890aSEmmanuel Vadot 0 IMX_AUDMUX_V2_PDCR_TXRXEN 184*f126890aSEmmanuel Vadot >; 185*f126890aSEmmanuel Vadot }; 186*f126890aSEmmanuel Vadot}; 187*f126890aSEmmanuel Vadot 188*f126890aSEmmanuel Vadot&can1 { 189*f126890aSEmmanuel Vadot pinctrl-names = "default"; 190*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_can1>; 191*f126890aSEmmanuel Vadot xceiver-supply = <®_5v0>; 192*f126890aSEmmanuel Vadot status = "okay"; 193*f126890aSEmmanuel Vadot}; 194*f126890aSEmmanuel Vadot 195*f126890aSEmmanuel Vadot&clks { 196*f126890aSEmmanuel Vadot clocks = <&clock_ksz8081>; 197*f126890aSEmmanuel Vadot clock-names = "enet_ref_pad"; 198*f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; 199*f126890aSEmmanuel Vadot assigned-clock-parents = <&clock_ksz8081>; 200*f126890aSEmmanuel Vadot}; 201*f126890aSEmmanuel Vadot 202*f126890aSEmmanuel Vadot&ecspi1 { 203*f126890aSEmmanuel Vadot cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 204*f126890aSEmmanuel Vadot pinctrl-names = "default"; 205*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi1>; 206*f126890aSEmmanuel Vadot status = "okay"; 207*f126890aSEmmanuel Vadot 208*f126890aSEmmanuel Vadot flash@0 { 209*f126890aSEmmanuel Vadot compatible = "jedec,spi-nor"; 210*f126890aSEmmanuel Vadot reg = <0>; 211*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 212*f126890aSEmmanuel Vadot }; 213*f126890aSEmmanuel Vadot}; 214*f126890aSEmmanuel Vadot 215*f126890aSEmmanuel Vadot&fec { 216*f126890aSEmmanuel Vadot pinctrl-names = "default"; 217*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet>; 218*f126890aSEmmanuel Vadot phy-mode = "rmii"; 219*f126890aSEmmanuel Vadot status = "okay"; 220*f126890aSEmmanuel Vadot 221*f126890aSEmmanuel Vadot mdio { 222*f126890aSEmmanuel Vadot #address-cells = <1>; 223*f126890aSEmmanuel Vadot #size-cells = <0>; 224*f126890aSEmmanuel Vadot 225*f126890aSEmmanuel Vadot /* Microchip KSZ8081RNA PHY */ 226*f126890aSEmmanuel Vadot rgmii_phy: ethernet-phy@0 { 227*f126890aSEmmanuel Vadot reg = <0>; 228*f126890aSEmmanuel Vadot interrupts-extended = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>; 229*f126890aSEmmanuel Vadot reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; 230*f126890aSEmmanuel Vadot reset-assert-us = <10000>; 231*f126890aSEmmanuel Vadot reset-deassert-us = <300>; 232*f126890aSEmmanuel Vadot }; 233*f126890aSEmmanuel Vadot }; 234*f126890aSEmmanuel Vadot}; 235*f126890aSEmmanuel Vadot 236*f126890aSEmmanuel Vadot&gpio1 { 237*f126890aSEmmanuel Vadot gpio-line-names = 238*f126890aSEmmanuel Vadot "", "SD1_CD", "", "USB_H1_OC", "", "", "", "", 239*f126890aSEmmanuel Vadot "DEBUG_0", "DEBUG_1", "", "", "", "", "", "", 240*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 241*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 242*f126890aSEmmanuel Vadot}; 243*f126890aSEmmanuel Vadot 244*f126890aSEmmanuel Vadot&gpio3 { 245*f126890aSEmmanuel Vadot gpio-line-names = 246*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 247*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 248*f126890aSEmmanuel Vadot "", "", "", "ECSPI1_SS1", "", "USB_EXT1_OC", "USB_EXT1_PWR", "", 249*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 250*f126890aSEmmanuel Vadot}; 251*f126890aSEmmanuel Vadot 252*f126890aSEmmanuel Vadot&gpio4 { 253*f126890aSEmmanuel Vadot gpio-line-names = 254*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 255*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 256*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 257*f126890aSEmmanuel Vadot "", "", "ETH_RESET", "", "", "BUZZER", "ETH_INTRP", ""; 258*f126890aSEmmanuel Vadot}; 259*f126890aSEmmanuel Vadot 260*f126890aSEmmanuel Vadot&gpio5 { 261*f126890aSEmmanuel Vadot gpio-line-names = 262*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", "", 263*f126890aSEmmanuel Vadot "", "", "I2C_EN13", "I2C_EN24", "", "", "", "", 264*f126890aSEmmanuel Vadot "", "", "", "", "", "AUDIO_RESET", "", "", 265*f126890aSEmmanuel Vadot "", "", "", "", "", "", "", ""; 266*f126890aSEmmanuel Vadot}; 267*f126890aSEmmanuel Vadot 268*f126890aSEmmanuel Vadot&hdmi { 269*f126890aSEmmanuel Vadot pinctrl-names = "default"; 270*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_hdmi>; 271*f126890aSEmmanuel Vadot ddc-i2c-bus = <&i2c1>; 272*f126890aSEmmanuel Vadot status = "okay"; 273*f126890aSEmmanuel Vadot}; 274*f126890aSEmmanuel Vadot 275*f126890aSEmmanuel Vadot/* DDC */ 276*f126890aSEmmanuel Vadot&i2c1 { 277*f126890aSEmmanuel Vadot clock-frequency = <100000>; 278*f126890aSEmmanuel Vadot pinctrl-names = "default"; 279*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 280*f126890aSEmmanuel Vadot status = "okay"; 281*f126890aSEmmanuel Vadot 282*f126890aSEmmanuel Vadot sgtl5000: audio-codec@a { 283*f126890aSEmmanuel Vadot compatible = "fsl,sgtl5000"; 284*f126890aSEmmanuel Vadot reg = <0xa>; 285*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 286*f126890aSEmmanuel Vadot clocks = <&clks 201>; 287*f126890aSEmmanuel Vadot VDDA-supply = <®_3v3>; 288*f126890aSEmmanuel Vadot VDDIO-supply = <®_3v3>; 289*f126890aSEmmanuel Vadot VDDD-supply = <®_1v8>; 290*f126890aSEmmanuel Vadot }; 291*f126890aSEmmanuel Vadot 292*f126890aSEmmanuel Vadot /* additional i2c devices are added automatically by the boot loader */ 293*f126890aSEmmanuel Vadot}; 294*f126890aSEmmanuel Vadot 295*f126890aSEmmanuel Vadot&i2c2 { 296*f126890aSEmmanuel Vadot clock-frequency = <50000>; 297*f126890aSEmmanuel Vadot pinctrl-names = "default"; 298*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 299*f126890aSEmmanuel Vadot status = "okay"; 300*f126890aSEmmanuel Vadot 301*f126890aSEmmanuel Vadot /* external interface, device are configured from user space */ 302*f126890aSEmmanuel Vadot}; 303*f126890aSEmmanuel Vadot 304*f126890aSEmmanuel Vadot&i2c3 { 305*f126890aSEmmanuel Vadot clock-frequency = <100000>; 306*f126890aSEmmanuel Vadot pinctrl-names = "default"; 307*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c3>; 308*f126890aSEmmanuel Vadot status = "okay"; 309*f126890aSEmmanuel Vadot 310*f126890aSEmmanuel Vadot rtc@51 { 311*f126890aSEmmanuel Vadot compatible = "nxp,pcf8563"; 312*f126890aSEmmanuel Vadot reg = <0x51>; 313*f126890aSEmmanuel Vadot }; 314*f126890aSEmmanuel Vadot 315*f126890aSEmmanuel Vadot temperature-sensor@70 { 316*f126890aSEmmanuel Vadot compatible = "ti,tmp103"; 317*f126890aSEmmanuel Vadot reg = <0x70>; 318*f126890aSEmmanuel Vadot }; 319*f126890aSEmmanuel Vadot}; 320*f126890aSEmmanuel Vadot 321*f126890aSEmmanuel Vadot&i2c4 { 322*f126890aSEmmanuel Vadot clock-frequency = <50000>; 323*f126890aSEmmanuel Vadot pinctrl-names = "default"; 324*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c4>; 325*f126890aSEmmanuel Vadot status = "okay"; 326*f126890aSEmmanuel Vadot}; 327*f126890aSEmmanuel Vadot 328*f126890aSEmmanuel Vadot&pwm1 { 329*f126890aSEmmanuel Vadot pinctrl-names = "default"; 330*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm1>; 331*f126890aSEmmanuel Vadot status = "okay"; 332*f126890aSEmmanuel Vadot}; 333*f126890aSEmmanuel Vadot 334*f126890aSEmmanuel Vadot&ssi1 { 335*f126890aSEmmanuel Vadot #sound-dai-cells = <0>; 336*f126890aSEmmanuel Vadot fsl,mode = "ac97-slave"; 337*f126890aSEmmanuel Vadot status = "okay"; 338*f126890aSEmmanuel Vadot}; 339*f126890aSEmmanuel Vadot 340*f126890aSEmmanuel Vadot&uart2 { 341*f126890aSEmmanuel Vadot pinctrl-names = "default"; 342*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 343*f126890aSEmmanuel Vadot status = "okay"; 344*f126890aSEmmanuel Vadot}; 345*f126890aSEmmanuel Vadot 346*f126890aSEmmanuel Vadot&uart4 { 347*f126890aSEmmanuel Vadot pinctrl-names = "default"; 348*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart4>; 349*f126890aSEmmanuel Vadot status = "okay"; 350*f126890aSEmmanuel Vadot}; 351*f126890aSEmmanuel Vadot 352*f126890aSEmmanuel Vadot&uart5 { 353*f126890aSEmmanuel Vadot pinctrl-names = "default"; 354*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5>; 355*f126890aSEmmanuel Vadot status = "okay"; 356*f126890aSEmmanuel Vadot}; 357*f126890aSEmmanuel Vadot 358*f126890aSEmmanuel Vadot&usbh1 { 359*f126890aSEmmanuel Vadot vbus-supply = <®_h1_vbus>; 360*f126890aSEmmanuel Vadot pinctrl-names = "default"; 361*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbh1>; 362*f126890aSEmmanuel Vadot phy_type = "utmi"; 363*f126890aSEmmanuel Vadot dr_mode = "host"; 364*f126890aSEmmanuel Vadot over-current-active-low; 365*f126890aSEmmanuel Vadot status = "okay"; 366*f126890aSEmmanuel Vadot}; 367*f126890aSEmmanuel Vadot 368*f126890aSEmmanuel Vadot&usbotg { 369*f126890aSEmmanuel Vadot vbus-supply = <®_otg_vbus>; 370*f126890aSEmmanuel Vadot pinctrl-names = "default"; 371*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg>; 372*f126890aSEmmanuel Vadot phy_type = "utmi"; 373*f126890aSEmmanuel Vadot dr_mode = "host"; 374*f126890aSEmmanuel Vadot over-current-active-low; 375*f126890aSEmmanuel Vadot status = "okay"; 376*f126890aSEmmanuel Vadot}; 377*f126890aSEmmanuel Vadot 378*f126890aSEmmanuel Vadot&usbphynop1 { 379*f126890aSEmmanuel Vadot status = "disabled"; 380*f126890aSEmmanuel Vadot}; 381*f126890aSEmmanuel Vadot 382*f126890aSEmmanuel Vadot&usbphynop2 { 383*f126890aSEmmanuel Vadot status = "disabled"; 384*f126890aSEmmanuel Vadot}; 385*f126890aSEmmanuel Vadot 386*f126890aSEmmanuel Vadot&usdhc1 { 387*f126890aSEmmanuel Vadot pinctrl-names = "default"; 388*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 389*f126890aSEmmanuel Vadot cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 390*f126890aSEmmanuel Vadot no-1-8-v; 391*f126890aSEmmanuel Vadot disable-wp; 392*f126890aSEmmanuel Vadot cap-sd-highspeed; 393*f126890aSEmmanuel Vadot no-mmc; 394*f126890aSEmmanuel Vadot no-sdio; 395*f126890aSEmmanuel Vadot status = "okay"; 396*f126890aSEmmanuel Vadot}; 397*f126890aSEmmanuel Vadot 398*f126890aSEmmanuel Vadot&usdhc3 { 399*f126890aSEmmanuel Vadot pinctrl-names = "default"; 400*f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 401*f126890aSEmmanuel Vadot bus-width = <8>; 402*f126890aSEmmanuel Vadot no-1-8-v; 403*f126890aSEmmanuel Vadot non-removable; 404*f126890aSEmmanuel Vadot no-sd; 405*f126890aSEmmanuel Vadot no-sdio; 406*f126890aSEmmanuel Vadot status = "okay"; 407*f126890aSEmmanuel Vadot}; 408*f126890aSEmmanuel Vadot 409*f126890aSEmmanuel Vadot&iomuxc { 410*f126890aSEmmanuel Vadot pinctrl_audmux: audmuxgrp { 411*f126890aSEmmanuel Vadot fsl,pins = < 412*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0 413*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 414*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 415*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 416*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 417*f126890aSEmmanuel Vadot >; 418*f126890aSEmmanuel Vadot }; 419*f126890aSEmmanuel Vadot 420*f126890aSEmmanuel Vadot pinctrl_can1: can1grp { 421*f126890aSEmmanuel Vadot fsl,pins = < 422*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000 423*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008 424*f126890aSEmmanuel Vadot >; 425*f126890aSEmmanuel Vadot }; 426*f126890aSEmmanuel Vadot 427*f126890aSEmmanuel Vadot pinctrl_ecspi1: ecspi1grp { 428*f126890aSEmmanuel Vadot fsl,pins = < 429*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000 430*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008 431*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008 432*f126890aSEmmanuel Vadot /* CS */ 433*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008 434*f126890aSEmmanuel Vadot >; 435*f126890aSEmmanuel Vadot }; 436*f126890aSEmmanuel Vadot 437*f126890aSEmmanuel Vadot pinctrl_enet: enetgrp { 438*f126890aSEmmanuel Vadot fsl,pins = < 439*f126890aSEmmanuel Vadot /* MX6QDL_ENET_PINGRP4 */ 440*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 441*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 442*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 443*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 444*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 445*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 446*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 447*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 448*f126890aSEmmanuel Vadot MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 449*f126890aSEmmanuel Vadot 450*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0 451*f126890aSEmmanuel Vadot /* Phy reset */ 452*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b0b0 453*f126890aSEmmanuel Vadot /* nINTRP */ 454*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 455*f126890aSEmmanuel Vadot >; 456*f126890aSEmmanuel Vadot }; 457*f126890aSEmmanuel Vadot 458*f126890aSEmmanuel Vadot pinctrl_hdmi: hdmigrp { 459*f126890aSEmmanuel Vadot fsl,pins = < 460*f126890aSEmmanuel Vadot /* NOTE: DDC is done via I2C2, so DON'T configure DDC 461*f126890aSEmmanuel Vadot * pins for HDMI! 462*f126890aSEmmanuel Vadot */ 463*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 464*f126890aSEmmanuel Vadot >; 465*f126890aSEmmanuel Vadot }; 466*f126890aSEmmanuel Vadot 467*f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 468*f126890aSEmmanuel Vadot fsl,pins = < 469*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1 470*f126890aSEmmanuel Vadot MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1 471*f126890aSEmmanuel Vadot >; 472*f126890aSEmmanuel Vadot }; 473*f126890aSEmmanuel Vadot 474*f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 475*f126890aSEmmanuel Vadot fsl,pins = < 476*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 477*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 478*f126890aSEmmanuel Vadot >; 479*f126890aSEmmanuel Vadot }; 480*f126890aSEmmanuel Vadot 481*f126890aSEmmanuel Vadot pinctrl_i2c3: i2c3grp { 482*f126890aSEmmanuel Vadot fsl,pins = < 483*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 484*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 485*f126890aSEmmanuel Vadot >; 486*f126890aSEmmanuel Vadot }; 487*f126890aSEmmanuel Vadot 488*f126890aSEmmanuel Vadot pinctrl_i2c4: i2c4grp { 489*f126890aSEmmanuel Vadot fsl,pins = < 490*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_CS3__I2C4_SDA 0x4001f8b1 491*f126890aSEmmanuel Vadot MX6QDL_PAD_NANDF_WP_B__I2C4_SCL 0x4001f8b1 492*f126890aSEmmanuel Vadot >; 493*f126890aSEmmanuel Vadot }; 494*f126890aSEmmanuel Vadot 495*f126890aSEmmanuel Vadot pinctrl_i2cmux: i2cmuxgrp { 496*f126890aSEmmanuel Vadot fsl,pins = < 497*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b0 498*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b0 499*f126890aSEmmanuel Vadot >; 500*f126890aSEmmanuel Vadot }; 501*f126890aSEmmanuel Vadot 502*f126890aSEmmanuel Vadot pinctrl_leds: ledsgrp { 503*f126890aSEmmanuel Vadot fsl,pins = < 504*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 505*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 506*f126890aSEmmanuel Vadot >; 507*f126890aSEmmanuel Vadot }; 508*f126890aSEmmanuel Vadot 509*f126890aSEmmanuel Vadot pinctrl_pwm1: pwm1grp { 510*f126890aSEmmanuel Vadot fsl,pins = < 511*f126890aSEmmanuel Vadot MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x8 512*f126890aSEmmanuel Vadot >; 513*f126890aSEmmanuel Vadot }; 514*f126890aSEmmanuel Vadot 515*f126890aSEmmanuel Vadot pinctrl_uart2: uart2grp { 516*f126890aSEmmanuel Vadot fsl,pins = < 517*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 518*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 519*f126890aSEmmanuel Vadot >; 520*f126890aSEmmanuel Vadot }; 521*f126890aSEmmanuel Vadot 522*f126890aSEmmanuel Vadot pinctrl_uart4: uart4grp { 523*f126890aSEmmanuel Vadot fsl,pins = < 524*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 525*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 526*f126890aSEmmanuel Vadot >; 527*f126890aSEmmanuel Vadot }; 528*f126890aSEmmanuel Vadot 529*f126890aSEmmanuel Vadot pinctrl_uart5: uart5grp { 530*f126890aSEmmanuel Vadot fsl,pins = < 531*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 532*f126890aSEmmanuel Vadot MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 533*f126890aSEmmanuel Vadot >; 534*f126890aSEmmanuel Vadot }; 535*f126890aSEmmanuel Vadot 536*f126890aSEmmanuel Vadot pinctrl_usbh1: usbh1grp { 537*f126890aSEmmanuel Vadot fsl,pins = < 538*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1B058 539*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1B058 540*f126890aSEmmanuel Vadot 541*f126890aSEmmanuel Vadot >; 542*f126890aSEmmanuel Vadot }; 543*f126890aSEmmanuel Vadot 544*f126890aSEmmanuel Vadot pinctrl_usbotg: usbotggrp { 545*f126890aSEmmanuel Vadot fsl,pins = < 546*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 547*f126890aSEmmanuel Vadot MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 548*f126890aSEmmanuel Vadot >; 549*f126890aSEmmanuel Vadot }; 550*f126890aSEmmanuel Vadot 551*f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 552*f126890aSEmmanuel Vadot fsl,pins = < 553*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 554*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 555*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 556*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 557*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 558*f126890aSEmmanuel Vadot MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 559*f126890aSEmmanuel Vadot MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 560*f126890aSEmmanuel Vadot >; 561*f126890aSEmmanuel Vadot }; 562*f126890aSEmmanuel Vadot 563*f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 564*f126890aSEmmanuel Vadot fsl,pins = < 565*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099 566*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099 567*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099 568*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099 569*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099 570*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099 571*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099 572*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099 573*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099 574*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099 575*f126890aSEmmanuel Vadot MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 576*f126890aSEmmanuel Vadot >; 577*f126890aSEmmanuel Vadot }; 578*f126890aSEmmanuel Vadot}; 579