xref: /freebsd-src/sys/contrib/device-tree/src/arm/nvidia/tegra30-beaver.dts (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/dts-v1/;
3f126890aSEmmanuel Vadot
4f126890aSEmmanuel Vadot#include "tegra30.dtsi"
5f126890aSEmmanuel Vadot#include "tegra30-cpu-opp.dtsi"
6f126890aSEmmanuel Vadot#include "tegra30-cpu-opp-microvolt.dtsi"
7f126890aSEmmanuel Vadot
8f126890aSEmmanuel Vadot/ {
9f126890aSEmmanuel Vadot	model = "NVIDIA Tegra30 Beaver evaluation board";
10f126890aSEmmanuel Vadot	compatible = "nvidia,beaver", "nvidia,tegra30";
11f126890aSEmmanuel Vadot
12f126890aSEmmanuel Vadot	aliases {
13f126890aSEmmanuel Vadot		rtc0 = "/i2c@7000d000/tps65911@2d";
14f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
15f126890aSEmmanuel Vadot		serial0 = &uarta;
16f126890aSEmmanuel Vadot	};
17f126890aSEmmanuel Vadot
18f126890aSEmmanuel Vadot	chosen {
19f126890aSEmmanuel Vadot		stdout-path = "serial0:115200n8";
20f126890aSEmmanuel Vadot	};
21f126890aSEmmanuel Vadot
22f126890aSEmmanuel Vadot	memory@80000000 {
23f126890aSEmmanuel Vadot		reg = <0x80000000 0x7ff00000>;
24f126890aSEmmanuel Vadot	};
25f126890aSEmmanuel Vadot
26f126890aSEmmanuel Vadot	pcie@3000 {
27f126890aSEmmanuel Vadot		status = "okay";
28f126890aSEmmanuel Vadot
29f126890aSEmmanuel Vadot		avdd-pexa-supply = <&ldo1_reg>;
30f126890aSEmmanuel Vadot		vdd-pexa-supply = <&ldo1_reg>;
31f126890aSEmmanuel Vadot		avdd-pexb-supply = <&ldo1_reg>;
32f126890aSEmmanuel Vadot		vdd-pexb-supply = <&ldo1_reg>;
33f126890aSEmmanuel Vadot		avdd-pex-pll-supply = <&ldo1_reg>;
34f126890aSEmmanuel Vadot		avdd-plle-supply = <&ldo1_reg>;
35f126890aSEmmanuel Vadot		vddio-pex-ctl-supply = <&sys_3v3_reg>;
36f126890aSEmmanuel Vadot		hvdd-pex-supply = <&sys_3v3_pexs_reg>;
37f126890aSEmmanuel Vadot
38f126890aSEmmanuel Vadot		pci@1,0 {
39f126890aSEmmanuel Vadot			status = "okay";
40f126890aSEmmanuel Vadot			nvidia,num-lanes = <2>;
41f126890aSEmmanuel Vadot		};
42f126890aSEmmanuel Vadot
43f126890aSEmmanuel Vadot		pci@2,0 {
44f126890aSEmmanuel Vadot			nvidia,num-lanes = <2>;
45f126890aSEmmanuel Vadot		};
46f126890aSEmmanuel Vadot
47f126890aSEmmanuel Vadot		pci@3,0 {
48f126890aSEmmanuel Vadot			status = "okay";
49f126890aSEmmanuel Vadot			nvidia,num-lanes = <2>;
50f126890aSEmmanuel Vadot		};
51f126890aSEmmanuel Vadot	};
52f126890aSEmmanuel Vadot
53f126890aSEmmanuel Vadot	host1x@50000000 {
54f126890aSEmmanuel Vadot		hdmi@54280000 {
55f126890aSEmmanuel Vadot			status = "okay";
56f126890aSEmmanuel Vadot
57f126890aSEmmanuel Vadot			hdmi-supply = <&vdd_5v0_hdmi>;
58f126890aSEmmanuel Vadot			vdd-supply = <&sys_3v3_reg>;
59f126890aSEmmanuel Vadot			pll-supply = <&vio_reg>;
60f126890aSEmmanuel Vadot
61f126890aSEmmanuel Vadot			nvidia,hpd-gpio =
62f126890aSEmmanuel Vadot				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
63f126890aSEmmanuel Vadot			nvidia,ddc-i2c-bus = <&hdmiddc>;
64f126890aSEmmanuel Vadot		};
65f126890aSEmmanuel Vadot	};
66f126890aSEmmanuel Vadot
67f126890aSEmmanuel Vadot	pinmux@70000868 {
68f126890aSEmmanuel Vadot		pinctrl-names = "default";
69f126890aSEmmanuel Vadot		pinctrl-0 = <&state_default>;
70f126890aSEmmanuel Vadot
71f126890aSEmmanuel Vadot		state_default: pinmux {
72f126890aSEmmanuel Vadot			clk_32k_out_pa0 {
73f126890aSEmmanuel Vadot				nvidia,pins = "clk_32k_out_pa0";
74f126890aSEmmanuel Vadot				nvidia,function = "blink";
75f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
76f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
77f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
78f126890aSEmmanuel Vadot			};
79f126890aSEmmanuel Vadot			uart3_cts_n_pa1 {
80f126890aSEmmanuel Vadot				nvidia,pins = "uart3_cts_n_pa1";
81f126890aSEmmanuel Vadot				nvidia,function = "uartc";
82f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
84f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85f126890aSEmmanuel Vadot			};
86f126890aSEmmanuel Vadot			dap2_fs_pa2 {
87f126890aSEmmanuel Vadot				nvidia,pins = "dap2_fs_pa2";
88f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
89f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
91f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92f126890aSEmmanuel Vadot			};
93f126890aSEmmanuel Vadot			dap2_sclk_pa3 {
94f126890aSEmmanuel Vadot				nvidia,pins = "dap2_sclk_pa3";
95f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
96f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
97f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
98f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
99f126890aSEmmanuel Vadot			};
100f126890aSEmmanuel Vadot			dap2_din_pa4 {
101f126890aSEmmanuel Vadot				nvidia,pins = "dap2_din_pa4";
102f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
103f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
105f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106f126890aSEmmanuel Vadot			};
107f126890aSEmmanuel Vadot			dap2_dout_pa5 {
108f126890aSEmmanuel Vadot				nvidia,pins = "dap2_dout_pa5";
109f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
110f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
112f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
113f126890aSEmmanuel Vadot			};
114f126890aSEmmanuel Vadot			sdmmc3_clk_pa6 {
115f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_pa6";
116f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
117f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
119f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
120f126890aSEmmanuel Vadot			};
121f126890aSEmmanuel Vadot			sdmmc3_cmd_pa7 {
122f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_cmd_pa7";
123f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
124f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
125f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
126f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127f126890aSEmmanuel Vadot			};
128f126890aSEmmanuel Vadot			gmi_a17_pb0 {
129f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a17_pb0";
130f126890aSEmmanuel Vadot				nvidia,function = "spi4";
131f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
133f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134f126890aSEmmanuel Vadot			};
135f126890aSEmmanuel Vadot			gmi_a18_pb1 {
136f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a18_pb1";
137f126890aSEmmanuel Vadot				nvidia,function = "spi4";
138f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
139f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
140f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141f126890aSEmmanuel Vadot			};
142f126890aSEmmanuel Vadot			lcd_pwr0_pb2 {
143f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pwr0_pb2";
144f126890aSEmmanuel Vadot				nvidia,function = "displaya";
145f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
147f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
148f126890aSEmmanuel Vadot			};
149f126890aSEmmanuel Vadot			lcd_pclk_pb3 {
150f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pclk_pb3";
151f126890aSEmmanuel Vadot				nvidia,function = "displaya";
152f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
154f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
155f126890aSEmmanuel Vadot			};
156f126890aSEmmanuel Vadot			sdmmc3_dat3_pb4 {
157f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat3_pb4";
158f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
159f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
160f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
161f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
162f126890aSEmmanuel Vadot			};
163f126890aSEmmanuel Vadot			sdmmc3_dat2_pb5 {
164f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat2_pb5";
165f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
166f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
167f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
168f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
169f126890aSEmmanuel Vadot			};
170f126890aSEmmanuel Vadot			sdmmc3_dat1_pb6 {
171f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat1_pb6";
172f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
173f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
174f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
175f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
176f126890aSEmmanuel Vadot			};
177f126890aSEmmanuel Vadot			sdmmc3_dat0_pb7 {
178f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat0_pb7";
179f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
180f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
181f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
182f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
183f126890aSEmmanuel Vadot			};
184f126890aSEmmanuel Vadot			uart3_rts_n_pc0 {
185f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rts_n_pc0";
186f126890aSEmmanuel Vadot				nvidia,function = "uartc";
187f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
189f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
190f126890aSEmmanuel Vadot			};
191f126890aSEmmanuel Vadot			lcd_pwr1_pc1 {
192f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pwr1_pc1";
193f126890aSEmmanuel Vadot				nvidia,function = "displaya";
194f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
195f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
196f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
197f126890aSEmmanuel Vadot			};
198f126890aSEmmanuel Vadot			uart2_txd_pc2 {
199f126890aSEmmanuel Vadot				nvidia,pins = "uart2_txd_pc2";
200f126890aSEmmanuel Vadot				nvidia,function = "uartb";
201f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
203f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
204f126890aSEmmanuel Vadot			};
205f126890aSEmmanuel Vadot			uart2_rxd_pc3 {
206f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rxd_pc3";
207f126890aSEmmanuel Vadot				nvidia,function = "uartb";
208f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
210f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
211f126890aSEmmanuel Vadot			};
212f126890aSEmmanuel Vadot			gen1_i2c_scl_pc4 {
213f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_scl_pc4";
214f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
215f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
219f126890aSEmmanuel Vadot			};
220f126890aSEmmanuel Vadot			gen1_i2c_sda_pc5 {
221f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_sda_pc5";
222f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
223f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
225f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
227f126890aSEmmanuel Vadot			};
228f126890aSEmmanuel Vadot			lcd_pwr2_pc6 {
229f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pwr2_pc6";
230f126890aSEmmanuel Vadot				nvidia,function = "displaya";
231f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
232f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
233f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
234f126890aSEmmanuel Vadot			};
235f126890aSEmmanuel Vadot			gmi_wp_n_pc7 {
236f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wp_n_pc7";
237f126890aSEmmanuel Vadot				nvidia,function = "gmi";
238f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
239f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
240f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241f126890aSEmmanuel Vadot			};
242f126890aSEmmanuel Vadot			sdmmc3_dat5_pd0 {
243f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat5_pd0";
244f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
245f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
246f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
247f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248f126890aSEmmanuel Vadot			};
249f126890aSEmmanuel Vadot			sdmmc3_dat4_pd1 {
250f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat4_pd1";
251f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
252f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
253f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
254f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255f126890aSEmmanuel Vadot			};
256f126890aSEmmanuel Vadot			lcd_dc1_pd2 {
257f126890aSEmmanuel Vadot				nvidia,pins = "lcd_dc1_pd2";
258f126890aSEmmanuel Vadot				nvidia,function = "displaya";
259f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
261f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
262f126890aSEmmanuel Vadot			};
263f126890aSEmmanuel Vadot			sdmmc3_dat6_pd3 {
264f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat6_pd3";
265f126890aSEmmanuel Vadot				nvidia,function = "spdif";
266f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269f126890aSEmmanuel Vadot			};
270f126890aSEmmanuel Vadot			sdmmc3_dat7_pd4 {
271f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat7_pd4";
272f126890aSEmmanuel Vadot				nvidia,function = "spdif";
273f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
275f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276f126890aSEmmanuel Vadot			};
277f126890aSEmmanuel Vadot			vi_d1_pd5 {
278f126890aSEmmanuel Vadot				nvidia,pins = "vi_d1_pd5";
279f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
280f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
281f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
282f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
283f126890aSEmmanuel Vadot			};
284f126890aSEmmanuel Vadot			vi_vsync_pd6 {
285f126890aSEmmanuel Vadot				nvidia,pins = "vi_vsync_pd6";
286f126890aSEmmanuel Vadot				nvidia,function = "ddr";
287f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
289f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
290f126890aSEmmanuel Vadot			};
291f126890aSEmmanuel Vadot			vi_hsync_pd7 {
292f126890aSEmmanuel Vadot				nvidia,pins = "vi_hsync_pd7";
293f126890aSEmmanuel Vadot				nvidia,function = "ddr";
294f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
295f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
296f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
297f126890aSEmmanuel Vadot			};
298f126890aSEmmanuel Vadot			lcd_d0_pe0 {
299f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d0_pe0";
300f126890aSEmmanuel Vadot				nvidia,function = "displaya";
301f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
302f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
303f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
304f126890aSEmmanuel Vadot			};
305f126890aSEmmanuel Vadot			lcd_d1_pe1 {
306f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d1_pe1";
307f126890aSEmmanuel Vadot				nvidia,function = "displaya";
308f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
310f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
311f126890aSEmmanuel Vadot			};
312f126890aSEmmanuel Vadot			lcd_d2_pe2 {
313f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d2_pe2";
314f126890aSEmmanuel Vadot				nvidia,function = "displaya";
315f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
317f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318f126890aSEmmanuel Vadot			};
319f126890aSEmmanuel Vadot			lcd_d3_pe3 {
320f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d3_pe3";
321f126890aSEmmanuel Vadot				nvidia,function = "displaya";
322f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
324f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325f126890aSEmmanuel Vadot			};
326f126890aSEmmanuel Vadot			lcd_d4_pe4 {
327f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d4_pe4";
328f126890aSEmmanuel Vadot				nvidia,function = "displaya";
329f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
331f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332f126890aSEmmanuel Vadot			};
333f126890aSEmmanuel Vadot			lcd_d5_pe5 {
334f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d5_pe5";
335f126890aSEmmanuel Vadot				nvidia,function = "displaya";
336f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
337f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
338f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339f126890aSEmmanuel Vadot			};
340f126890aSEmmanuel Vadot			lcd_d6_pe6 {
341f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d6_pe6";
342f126890aSEmmanuel Vadot				nvidia,function = "displaya";
343f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
344f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
345f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
346f126890aSEmmanuel Vadot			};
347f126890aSEmmanuel Vadot			lcd_d7_pe7 {
348f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d7_pe7";
349f126890aSEmmanuel Vadot				nvidia,function = "displaya";
350f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
351f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
352f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
353f126890aSEmmanuel Vadot			};
354f126890aSEmmanuel Vadot			lcd_d8_pf0 {
355f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d8_pf0";
356f126890aSEmmanuel Vadot				nvidia,function = "displaya";
357f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
358f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
359f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
360f126890aSEmmanuel Vadot			};
361f126890aSEmmanuel Vadot			lcd_d9_pf1 {
362f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d9_pf1";
363f126890aSEmmanuel Vadot				nvidia,function = "displaya";
364f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
365f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
366f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
367f126890aSEmmanuel Vadot			};
368f126890aSEmmanuel Vadot			lcd_d10_pf2 {
369f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d10_pf2";
370f126890aSEmmanuel Vadot				nvidia,function = "displaya";
371f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
373f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374f126890aSEmmanuel Vadot			};
375f126890aSEmmanuel Vadot			lcd_d11_pf3 {
376f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d11_pf3";
377f126890aSEmmanuel Vadot				nvidia,function = "displaya";
378f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
379f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
380f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381f126890aSEmmanuel Vadot			};
382f126890aSEmmanuel Vadot			lcd_d12_pf4 {
383f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d12_pf4";
384f126890aSEmmanuel Vadot				nvidia,function = "displaya";
385f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
387f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388f126890aSEmmanuel Vadot			};
389f126890aSEmmanuel Vadot			lcd_d13_pf5 {
390f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d13_pf5";
391f126890aSEmmanuel Vadot				nvidia,function = "displaya";
392f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
393f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
395f126890aSEmmanuel Vadot			};
396f126890aSEmmanuel Vadot			lcd_d14_pf6 {
397f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d14_pf6";
398f126890aSEmmanuel Vadot				nvidia,function = "displaya";
399f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
401f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402f126890aSEmmanuel Vadot			};
403f126890aSEmmanuel Vadot			lcd_d15_pf7 {
404f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d15_pf7";
405f126890aSEmmanuel Vadot				nvidia,function = "displaya";
406f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
408f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409f126890aSEmmanuel Vadot			};
410f126890aSEmmanuel Vadot			gmi_ad0_pg0 {
411f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad0_pg0";
412f126890aSEmmanuel Vadot				nvidia,function = "nand";
413f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
415f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416f126890aSEmmanuel Vadot			};
417f126890aSEmmanuel Vadot			gmi_ad1_pg1 {
418f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad1_pg1";
419f126890aSEmmanuel Vadot				nvidia,function = "nand";
420f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
421f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
422f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423f126890aSEmmanuel Vadot			};
424f126890aSEmmanuel Vadot			gmi_ad2_pg2 {
425f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad2_pg2";
426f126890aSEmmanuel Vadot				nvidia,function = "nand";
427f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
429f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
430f126890aSEmmanuel Vadot			};
431f126890aSEmmanuel Vadot			gmi_ad3_pg3 {
432f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad3_pg3";
433f126890aSEmmanuel Vadot				nvidia,function = "nand";
434f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
436f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
437f126890aSEmmanuel Vadot			};
438f126890aSEmmanuel Vadot			gmi_ad4_pg4 {
439f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad4_pg4";
440f126890aSEmmanuel Vadot				nvidia,function = "nand";
441f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
442f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
443f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
444f126890aSEmmanuel Vadot			};
445f126890aSEmmanuel Vadot			gmi_ad5_pg5 {
446f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad5_pg5";
447f126890aSEmmanuel Vadot				nvidia,function = "nand";
448f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
449f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
450f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
451f126890aSEmmanuel Vadot			};
452f126890aSEmmanuel Vadot			gmi_ad6_pg6 {
453f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad6_pg6";
454f126890aSEmmanuel Vadot				nvidia,function = "nand";
455f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
457f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
458f126890aSEmmanuel Vadot			};
459f126890aSEmmanuel Vadot			gmi_ad7_pg7 {
460f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad7_pg7";
461f126890aSEmmanuel Vadot				nvidia,function = "nand";
462f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
463f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
464f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465f126890aSEmmanuel Vadot			};
466f126890aSEmmanuel Vadot			gmi_ad8_ph0 {
467f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad8_ph0";
468f126890aSEmmanuel Vadot				nvidia,function = "pwm0";
469f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
471f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
472f126890aSEmmanuel Vadot			};
473f126890aSEmmanuel Vadot			gmi_ad9_ph1 {
474f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad9_ph1";
475f126890aSEmmanuel Vadot				nvidia,function = "pwm1";
476f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
478f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
479f126890aSEmmanuel Vadot			};
480f126890aSEmmanuel Vadot			gmi_ad10_ph2 {
481f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad10_ph2";
482f126890aSEmmanuel Vadot				nvidia,function = "nand";
483f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
484f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
485f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
486f126890aSEmmanuel Vadot			};
487f126890aSEmmanuel Vadot			gmi_ad11_ph3 {
488f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad11_ph3";
489f126890aSEmmanuel Vadot				nvidia,function = "nand";
490f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
491f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
492f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
493f126890aSEmmanuel Vadot			};
494f126890aSEmmanuel Vadot			gmi_ad12_ph4 {
495f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad12_ph4";
496f126890aSEmmanuel Vadot				nvidia,function = "nand";
497f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
498f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
499f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500f126890aSEmmanuel Vadot			};
501f126890aSEmmanuel Vadot			gmi_ad13_ph5 {
502f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad13_ph5";
503f126890aSEmmanuel Vadot				nvidia,function = "nand";
504f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
505f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
506f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507f126890aSEmmanuel Vadot			};
508f126890aSEmmanuel Vadot			gmi_ad14_ph6 {
509f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad14_ph6";
510f126890aSEmmanuel Vadot				nvidia,function = "nand";
511f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
512f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
513f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
514f126890aSEmmanuel Vadot			};
515f126890aSEmmanuel Vadot			gmi_wr_n_pi0 {
516f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wr_n_pi0";
517f126890aSEmmanuel Vadot				nvidia,function = "nand";
518f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
519f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
520f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
521f126890aSEmmanuel Vadot			};
522f126890aSEmmanuel Vadot			gmi_oe_n_pi1 {
523f126890aSEmmanuel Vadot				nvidia,pins = "gmi_oe_n_pi1";
524f126890aSEmmanuel Vadot				nvidia,function = "nand";
525f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
526f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
527f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
528f126890aSEmmanuel Vadot			};
529f126890aSEmmanuel Vadot			gmi_dqs_pi2 {
530f126890aSEmmanuel Vadot				nvidia,pins = "gmi_dqs_pi2";
531f126890aSEmmanuel Vadot				nvidia,function = "nand";
532f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
533f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
534f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
535f126890aSEmmanuel Vadot			};
536f126890aSEmmanuel Vadot			gmi_iordy_pi5 {
537f126890aSEmmanuel Vadot				nvidia,pins = "gmi_iordy_pi5";
538f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
539f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
540f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
541f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
542f126890aSEmmanuel Vadot			};
543f126890aSEmmanuel Vadot			gmi_cs7_n_pi6 {
544f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs7_n_pi6";
545f126890aSEmmanuel Vadot				nvidia,function = "nand";
546f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
547f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
548f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
549f126890aSEmmanuel Vadot			};
550f126890aSEmmanuel Vadot			gmi_wait_pi7 {
551f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wait_pi7";
552f126890aSEmmanuel Vadot				nvidia,function = "nand";
553f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
554f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
555f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
556f126890aSEmmanuel Vadot			};
557f126890aSEmmanuel Vadot			lcd_de_pj1 {
558f126890aSEmmanuel Vadot				nvidia,pins = "lcd_de_pj1";
559f126890aSEmmanuel Vadot				nvidia,function = "displaya";
560f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
561f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
562f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
563f126890aSEmmanuel Vadot			};
564f126890aSEmmanuel Vadot			lcd_hsync_pj3 {
565f126890aSEmmanuel Vadot				nvidia,pins = "lcd_hsync_pj3";
566f126890aSEmmanuel Vadot				nvidia,function = "displaya";
567f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
568f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
569f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
570f126890aSEmmanuel Vadot			};
571f126890aSEmmanuel Vadot			lcd_vsync_pj4 {
572f126890aSEmmanuel Vadot				nvidia,pins = "lcd_vsync_pj4";
573f126890aSEmmanuel Vadot				nvidia,function = "displaya";
574f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
575f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
576f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
577f126890aSEmmanuel Vadot			};
578f126890aSEmmanuel Vadot			uart2_cts_n_pj5 {
579f126890aSEmmanuel Vadot				nvidia,pins = "uart2_cts_n_pj5";
580f126890aSEmmanuel Vadot				nvidia,function = "uartb";
581f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
582f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
583f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
584f126890aSEmmanuel Vadot			};
585f126890aSEmmanuel Vadot			uart2_rts_n_pj6 {
586f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rts_n_pj6";
587f126890aSEmmanuel Vadot				nvidia,function = "uartb";
588f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
589f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
590f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591f126890aSEmmanuel Vadot			};
592f126890aSEmmanuel Vadot			gmi_a16_pj7 {
593f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a16_pj7";
594f126890aSEmmanuel Vadot				nvidia,function = "spi4";
595f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
596f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
597f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
598f126890aSEmmanuel Vadot			};
599f126890aSEmmanuel Vadot			gmi_adv_n_pk0 {
600f126890aSEmmanuel Vadot				nvidia,pins = "gmi_adv_n_pk0";
601f126890aSEmmanuel Vadot				nvidia,function = "nand";
602f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
603f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
604f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
605f126890aSEmmanuel Vadot			};
606f126890aSEmmanuel Vadot			gmi_clk_pk1 {
607f126890aSEmmanuel Vadot				nvidia,pins = "gmi_clk_pk1";
608f126890aSEmmanuel Vadot				nvidia,function = "nand";
609f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
610f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
611f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
612f126890aSEmmanuel Vadot			};
613f126890aSEmmanuel Vadot			gmi_cs2_n_pk3 {
614f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs2_n_pk3";
615f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
616f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
617f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
618f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
619f126890aSEmmanuel Vadot			};
620f126890aSEmmanuel Vadot			gmi_cs3_n_pk4 {
621f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs3_n_pk4";
622f126890aSEmmanuel Vadot				nvidia,function = "nand";
623f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
624f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
625f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
626f126890aSEmmanuel Vadot			};
627f126890aSEmmanuel Vadot			spdif_out_pk5 {
628f126890aSEmmanuel Vadot				nvidia,pins = "spdif_out_pk5";
629f126890aSEmmanuel Vadot				nvidia,function = "spdif";
630f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
631f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
632f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
633f126890aSEmmanuel Vadot			};
634f126890aSEmmanuel Vadot			spdif_in_pk6 {
635f126890aSEmmanuel Vadot				nvidia,pins = "spdif_in_pk6";
636f126890aSEmmanuel Vadot				nvidia,function = "spdif";
637f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
638f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
639f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640f126890aSEmmanuel Vadot			};
641f126890aSEmmanuel Vadot			gmi_a19_pk7 {
642f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a19_pk7";
643f126890aSEmmanuel Vadot				nvidia,function = "spi4";
644f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
645f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
646f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
647f126890aSEmmanuel Vadot			};
648f126890aSEmmanuel Vadot			vi_d2_pl0 {
649f126890aSEmmanuel Vadot				nvidia,pins = "vi_d2_pl0";
650f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
651f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
653f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654f126890aSEmmanuel Vadot			};
655f126890aSEmmanuel Vadot			vi_d3_pl1 {
656f126890aSEmmanuel Vadot				nvidia,pins = "vi_d3_pl1";
657f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
658f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
659f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
660f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
661f126890aSEmmanuel Vadot			};
662f126890aSEmmanuel Vadot			vi_d4_pl2 {
663f126890aSEmmanuel Vadot				nvidia,pins = "vi_d4_pl2";
664f126890aSEmmanuel Vadot				nvidia,function = "vi";
665f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
666f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
667f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
668f126890aSEmmanuel Vadot			};
669f126890aSEmmanuel Vadot			vi_d5_pl3 {
670f126890aSEmmanuel Vadot				nvidia,pins = "vi_d5_pl3";
671f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
672f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
673f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
674f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
675f126890aSEmmanuel Vadot			};
676f126890aSEmmanuel Vadot			vi_d6_pl4 {
677f126890aSEmmanuel Vadot				nvidia,pins = "vi_d6_pl4";
678f126890aSEmmanuel Vadot				nvidia,function = "vi";
679f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
680f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
681f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
682f126890aSEmmanuel Vadot			};
683f126890aSEmmanuel Vadot			vi_d7_pl5 {
684f126890aSEmmanuel Vadot				nvidia,pins = "vi_d7_pl5";
685f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
686f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
687f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
688f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
689f126890aSEmmanuel Vadot			};
690f126890aSEmmanuel Vadot			vi_d8_pl6 {
691f126890aSEmmanuel Vadot				nvidia,pins = "vi_d8_pl6";
692f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
693f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
694f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
695f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
696f126890aSEmmanuel Vadot			};
697f126890aSEmmanuel Vadot			vi_d9_pl7 {
698f126890aSEmmanuel Vadot				nvidia,pins = "vi_d9_pl7";
699f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
700f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
701f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
702f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
703f126890aSEmmanuel Vadot			};
704f126890aSEmmanuel Vadot			lcd_d16_pm0 {
705f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d16_pm0";
706f126890aSEmmanuel Vadot				nvidia,function = "displaya";
707f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
709f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710f126890aSEmmanuel Vadot			};
711f126890aSEmmanuel Vadot			lcd_d17_pm1 {
712f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d17_pm1";
713f126890aSEmmanuel Vadot				nvidia,function = "displaya";
714f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
715f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
716f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717f126890aSEmmanuel Vadot			};
718f126890aSEmmanuel Vadot			lcd_d18_pm2 {
719f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d18_pm2";
720f126890aSEmmanuel Vadot				nvidia,function = "displaya";
721f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
722f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
723f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
724f126890aSEmmanuel Vadot			};
725f126890aSEmmanuel Vadot			lcd_d19_pm3 {
726f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d19_pm3";
727f126890aSEmmanuel Vadot				nvidia,function = "displaya";
728f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
729f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
730f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
731f126890aSEmmanuel Vadot			};
732f126890aSEmmanuel Vadot			lcd_d20_pm4 {
733f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d20_pm4";
734f126890aSEmmanuel Vadot				nvidia,function = "displaya";
735f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
736f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
737f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
738f126890aSEmmanuel Vadot			};
739f126890aSEmmanuel Vadot			lcd_d21_pm5 {
740f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d21_pm5";
741f126890aSEmmanuel Vadot				nvidia,function = "displaya";
742f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
743f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
744f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
745f126890aSEmmanuel Vadot			};
746f126890aSEmmanuel Vadot			lcd_d22_pm6 {
747f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d22_pm6";
748f126890aSEmmanuel Vadot				nvidia,function = "displaya";
749f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
751f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
752f126890aSEmmanuel Vadot			};
753f126890aSEmmanuel Vadot			lcd_d23_pm7 {
754f126890aSEmmanuel Vadot				nvidia,pins = "lcd_d23_pm7";
755f126890aSEmmanuel Vadot				nvidia,function = "displaya";
756f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
757f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
758f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
759f126890aSEmmanuel Vadot			};
760f126890aSEmmanuel Vadot			dap1_fs_pn0 {
761f126890aSEmmanuel Vadot				nvidia,pins = "dap1_fs_pn0";
762f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
763f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
764f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
765f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
766f126890aSEmmanuel Vadot			};
767f126890aSEmmanuel Vadot			dap1_din_pn1 {
768f126890aSEmmanuel Vadot				nvidia,pins = "dap1_din_pn1";
769f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
770f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
771f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
772f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
773f126890aSEmmanuel Vadot			};
774f126890aSEmmanuel Vadot			dap1_dout_pn2 {
775f126890aSEmmanuel Vadot				nvidia,pins = "dap1_dout_pn2";
776f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
777f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
778f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
779f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
780f126890aSEmmanuel Vadot			};
781f126890aSEmmanuel Vadot			dap1_sclk_pn3 {
782f126890aSEmmanuel Vadot				nvidia,pins = "dap1_sclk_pn3";
783f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
784f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
785f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
786f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
787f126890aSEmmanuel Vadot			};
788f126890aSEmmanuel Vadot			lcd_cs0_n_pn4 {
789f126890aSEmmanuel Vadot				nvidia,pins = "lcd_cs0_n_pn4";
790f126890aSEmmanuel Vadot				nvidia,function = "displaya";
791f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
792f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
793f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
794f126890aSEmmanuel Vadot			};
795f126890aSEmmanuel Vadot			lcd_sdout_pn5 {
796f126890aSEmmanuel Vadot				nvidia,pins = "lcd_sdout_pn5";
797f126890aSEmmanuel Vadot				nvidia,function = "displaya";
798f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
799f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
800f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
801f126890aSEmmanuel Vadot			};
802f126890aSEmmanuel Vadot			lcd_dc0_pn6 {
803f126890aSEmmanuel Vadot				nvidia,pins = "lcd_dc0_pn6";
804f126890aSEmmanuel Vadot				nvidia,function = "displaya";
805f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
806f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
807f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
808f126890aSEmmanuel Vadot			};
809f126890aSEmmanuel Vadot			hdmi_int_pn7 {
810f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_int_pn7";
811f126890aSEmmanuel Vadot				nvidia,function = "hdmi";
812f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
813f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
814f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
815f126890aSEmmanuel Vadot			};
816f126890aSEmmanuel Vadot			ulpi_data7_po0 {
817f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data7_po0";
818f126890aSEmmanuel Vadot				nvidia,function = "uarta";
819f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
820f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
821f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
822f126890aSEmmanuel Vadot			};
823f126890aSEmmanuel Vadot			ulpi_data0_po1 {
824f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data0_po1";
825f126890aSEmmanuel Vadot				nvidia,function = "uarta";
826f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
828f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
829f126890aSEmmanuel Vadot			};
830f126890aSEmmanuel Vadot			ulpi_data1_po2 {
831f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data1_po2";
832f126890aSEmmanuel Vadot				nvidia,function = "uarta";
833f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
834f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
835f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
836f126890aSEmmanuel Vadot			};
837f126890aSEmmanuel Vadot			ulpi_data2_po3 {
838f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data2_po3";
839f126890aSEmmanuel Vadot				nvidia,function = "uarta";
840f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
841f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
842f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
843f126890aSEmmanuel Vadot			};
844f126890aSEmmanuel Vadot			ulpi_data3_po4 {
845f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data3_po4";
846f126890aSEmmanuel Vadot				nvidia,function = "uarta";
847f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
848f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
849f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
850f126890aSEmmanuel Vadot			};
851f126890aSEmmanuel Vadot			ulpi_data4_po5 {
852f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data4_po5";
853f126890aSEmmanuel Vadot				nvidia,function = "uarta";
854f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
855f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
856f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
857f126890aSEmmanuel Vadot			};
858f126890aSEmmanuel Vadot			ulpi_data5_po6 {
859f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data5_po6";
860f126890aSEmmanuel Vadot				nvidia,function = "uarta";
861f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
862f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
863f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
864f126890aSEmmanuel Vadot			};
865f126890aSEmmanuel Vadot			ulpi_data6_po7 {
866f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data6_po7";
867f126890aSEmmanuel Vadot				nvidia,function = "uarta";
868f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
870f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871f126890aSEmmanuel Vadot			};
872f126890aSEmmanuel Vadot			dap3_fs_pp0 {
873f126890aSEmmanuel Vadot				nvidia,pins = "dap3_fs_pp0";
874f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
875f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
876f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
877f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
878f126890aSEmmanuel Vadot			};
879f126890aSEmmanuel Vadot			dap3_din_pp1 {
880f126890aSEmmanuel Vadot				nvidia,pins = "dap3_din_pp1";
881f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
882f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
883f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
884f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
885f126890aSEmmanuel Vadot			};
886f126890aSEmmanuel Vadot			dap3_dout_pp2 {
887f126890aSEmmanuel Vadot				nvidia,pins = "dap3_dout_pp2";
888f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
889f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
890f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
891f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
892f126890aSEmmanuel Vadot			};
893f126890aSEmmanuel Vadot			dap3_sclk_pp3 {
894f126890aSEmmanuel Vadot				nvidia,pins = "dap3_sclk_pp3";
895f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
896f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
897f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
898f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
899f126890aSEmmanuel Vadot			};
900f126890aSEmmanuel Vadot			dap4_fs_pp4 {
901f126890aSEmmanuel Vadot				nvidia,pins = "dap4_fs_pp4";
902f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
903f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
904f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
905f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906f126890aSEmmanuel Vadot			};
907f126890aSEmmanuel Vadot			dap4_din_pp5 {
908f126890aSEmmanuel Vadot				nvidia,pins = "dap4_din_pp5";
909f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
910f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
911f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
912f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
913f126890aSEmmanuel Vadot			};
914f126890aSEmmanuel Vadot			dap4_dout_pp6 {
915f126890aSEmmanuel Vadot				nvidia,pins = "dap4_dout_pp6";
916f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
917f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
918f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
919f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
920f126890aSEmmanuel Vadot			};
921f126890aSEmmanuel Vadot			dap4_sclk_pp7 {
922f126890aSEmmanuel Vadot				nvidia,pins = "dap4_sclk_pp7";
923f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
924f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
925f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
926f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
927f126890aSEmmanuel Vadot			};
928f126890aSEmmanuel Vadot			kb_col0_pq0 {
929f126890aSEmmanuel Vadot				nvidia,pins = "kb_col0_pq0";
930f126890aSEmmanuel Vadot				nvidia,function = "kbc";
931f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
932f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
933f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
934f126890aSEmmanuel Vadot			};
935f126890aSEmmanuel Vadot			kb_col1_pq1 {
936f126890aSEmmanuel Vadot				nvidia,pins = "kb_col1_pq1";
937f126890aSEmmanuel Vadot				nvidia,function = "kbc";
938f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
939f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
940f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
941f126890aSEmmanuel Vadot			};
942f126890aSEmmanuel Vadot			kb_col2_pq2 {
943f126890aSEmmanuel Vadot				nvidia,pins = "kb_col2_pq2";
944f126890aSEmmanuel Vadot				nvidia,function = "kbc";
945f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
946f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
947f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
948f126890aSEmmanuel Vadot			};
949f126890aSEmmanuel Vadot			kb_col3_pq3 {
950f126890aSEmmanuel Vadot				nvidia,pins = "kb_col3_pq3";
951f126890aSEmmanuel Vadot				nvidia,function = "kbc";
952f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
953f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
954f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
955f126890aSEmmanuel Vadot			};
956f126890aSEmmanuel Vadot			kb_col4_pq4 {
957f126890aSEmmanuel Vadot				nvidia,pins = "kb_col4_pq4";
958f126890aSEmmanuel Vadot				nvidia,function = "kbc";
959f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
960f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
961f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
962f126890aSEmmanuel Vadot			};
963f126890aSEmmanuel Vadot			kb_col5_pq5 {
964f126890aSEmmanuel Vadot				nvidia,pins = "kb_col5_pq5";
965f126890aSEmmanuel Vadot				nvidia,function = "kbc";
966f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
967f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
968f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
969f126890aSEmmanuel Vadot			};
970f126890aSEmmanuel Vadot			kb_col6_pq6 {
971f126890aSEmmanuel Vadot				nvidia,pins = "kb_col6_pq6";
972f126890aSEmmanuel Vadot				nvidia,function = "kbc";
973f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
974f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
975f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
976f126890aSEmmanuel Vadot			};
977f126890aSEmmanuel Vadot			kb_col7_pq7 {
978f126890aSEmmanuel Vadot				nvidia,pins = "kb_col7_pq7";
979f126890aSEmmanuel Vadot				nvidia,function = "kbc";
980f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
981f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
982f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
983f126890aSEmmanuel Vadot			};
984f126890aSEmmanuel Vadot			kb_row0_pr0 {
985f126890aSEmmanuel Vadot				nvidia,pins = "kb_row0_pr0";
986f126890aSEmmanuel Vadot				nvidia,function = "kbc";
987f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
988f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
989f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
990f126890aSEmmanuel Vadot			};
991f126890aSEmmanuel Vadot			kb_row1_pr1 {
992f126890aSEmmanuel Vadot				nvidia,pins = "kb_row1_pr1";
993f126890aSEmmanuel Vadot				nvidia,function = "kbc";
994f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
995f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
996f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
997f126890aSEmmanuel Vadot			};
998f126890aSEmmanuel Vadot			kb_row2_pr2 {
999f126890aSEmmanuel Vadot				nvidia,pins = "kb_row2_pr2";
1000f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1001f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1002f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1003f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1004f126890aSEmmanuel Vadot			};
1005f126890aSEmmanuel Vadot			kb_row3_pr3 {
1006f126890aSEmmanuel Vadot				nvidia,pins = "kb_row3_pr3";
1007f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1008f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1009f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1010f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1011f126890aSEmmanuel Vadot			};
1012f126890aSEmmanuel Vadot			kb_row4_pr4 {
1013f126890aSEmmanuel Vadot				nvidia,pins = "kb_row4_pr4";
1014f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1015f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1016f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1017f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1018f126890aSEmmanuel Vadot			};
1019f126890aSEmmanuel Vadot			kb_row5_pr5 {
1020f126890aSEmmanuel Vadot				nvidia,pins = "kb_row5_pr5";
1021f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1022f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1023f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1024f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1025f126890aSEmmanuel Vadot			};
1026f126890aSEmmanuel Vadot			kb_row6_pr6 {
1027f126890aSEmmanuel Vadot				nvidia,pins = "kb_row6_pr6";
1028f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1029f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1030f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1031f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1032f126890aSEmmanuel Vadot			};
1033f126890aSEmmanuel Vadot			kb_row7_pr7 {
1034f126890aSEmmanuel Vadot				nvidia,pins = "kb_row7_pr7";
1035f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1036f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1037f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1038f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1039f126890aSEmmanuel Vadot			};
1040f126890aSEmmanuel Vadot			kb_row8_ps0 {
1041f126890aSEmmanuel Vadot				nvidia,pins = "kb_row8_ps0";
1042f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1043f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1044f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1046f126890aSEmmanuel Vadot			};
1047f126890aSEmmanuel Vadot			kb_row9_ps1 {
1048f126890aSEmmanuel Vadot				nvidia,pins = "kb_row9_ps1";
1049f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1050f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1051f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1052f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1053f126890aSEmmanuel Vadot			};
1054f126890aSEmmanuel Vadot			kb_row10_ps2 {
1055f126890aSEmmanuel Vadot				nvidia,pins = "kb_row10_ps2";
1056f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1057f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1058f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1059f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1060f126890aSEmmanuel Vadot			};
1061f126890aSEmmanuel Vadot			kb_row11_ps3 {
1062f126890aSEmmanuel Vadot				nvidia,pins = "kb_row11_ps3";
1063f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1064f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1065f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1066f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1067f126890aSEmmanuel Vadot			};
1068f126890aSEmmanuel Vadot			kb_row12_ps4 {
1069f126890aSEmmanuel Vadot				nvidia,pins = "kb_row12_ps4";
1070f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1071f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1072f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1073f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1074f126890aSEmmanuel Vadot			};
1075f126890aSEmmanuel Vadot			kb_row13_ps5 {
1076f126890aSEmmanuel Vadot				nvidia,pins = "kb_row13_ps5";
1077f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1078f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1079f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1080f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1081f126890aSEmmanuel Vadot			};
1082f126890aSEmmanuel Vadot			kb_row14_ps6 {
1083f126890aSEmmanuel Vadot				nvidia,pins = "kb_row14_ps6";
1084f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1085f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1086f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088f126890aSEmmanuel Vadot			};
1089f126890aSEmmanuel Vadot			kb_row15_ps7 {
1090f126890aSEmmanuel Vadot				nvidia,pins = "kb_row15_ps7";
1091f126890aSEmmanuel Vadot				nvidia,function = "kbc";
1092f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095f126890aSEmmanuel Vadot			};
1096f126890aSEmmanuel Vadot			vi_pclk_pt0 {
1097f126890aSEmmanuel Vadot				nvidia,pins = "vi_pclk_pt0";
1098f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
1099f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102f126890aSEmmanuel Vadot			};
1103f126890aSEmmanuel Vadot			vi_mclk_pt1 {
1104f126890aSEmmanuel Vadot				nvidia,pins = "vi_mclk_pt1";
1105f126890aSEmmanuel Vadot				nvidia,function = "vi";
1106f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109f126890aSEmmanuel Vadot			};
1110f126890aSEmmanuel Vadot			vi_d10_pt2 {
1111f126890aSEmmanuel Vadot				nvidia,pins = "vi_d10_pt2";
1112f126890aSEmmanuel Vadot				nvidia,function = "ddr";
1113f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1114f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116f126890aSEmmanuel Vadot			};
1117f126890aSEmmanuel Vadot			vi_d11_pt3 {
1118f126890aSEmmanuel Vadot				nvidia,pins = "vi_d11_pt3";
1119f126890aSEmmanuel Vadot				nvidia,function = "ddr";
1120f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123f126890aSEmmanuel Vadot			};
1124f126890aSEmmanuel Vadot			vi_d0_pt4 {
1125f126890aSEmmanuel Vadot				nvidia,pins = "vi_d0_pt4";
1126f126890aSEmmanuel Vadot				nvidia,function = "ddr";
1127f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1128f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130f126890aSEmmanuel Vadot			};
1131f126890aSEmmanuel Vadot			gen2_i2c_scl_pt5 {
1132f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_scl_pt5";
1133f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
1134f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1135f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1138f126890aSEmmanuel Vadot			};
1139f126890aSEmmanuel Vadot			gen2_i2c_sda_pt6 {
1140f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_sda_pt6";
1141f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
1142f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1143f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1144f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1145f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1146f126890aSEmmanuel Vadot			};
1147f126890aSEmmanuel Vadot			sdmmc4_cmd_pt7 {
1148f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_cmd_pt7";
1149f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1150f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1151f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1152f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1153f126890aSEmmanuel Vadot			};
1154f126890aSEmmanuel Vadot			pu0 {
1155f126890aSEmmanuel Vadot				nvidia,pins = "pu0";
1156f126890aSEmmanuel Vadot				nvidia,function = "owr";
1157f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1158f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1159f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1160f126890aSEmmanuel Vadot			};
1161f126890aSEmmanuel Vadot			pu1 {
1162f126890aSEmmanuel Vadot				nvidia,pins = "pu1";
1163f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
1164f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1165f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1166f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1167f126890aSEmmanuel Vadot			};
1168f126890aSEmmanuel Vadot			pu2 {
1169f126890aSEmmanuel Vadot				nvidia,pins = "pu2";
1170f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
1171f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1172f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1173f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1174f126890aSEmmanuel Vadot			};
1175f126890aSEmmanuel Vadot			pu3 {
1176f126890aSEmmanuel Vadot				nvidia,pins = "pu3";
1177f126890aSEmmanuel Vadot				nvidia,function = "pwm0";
1178f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1179f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1180f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1181f126890aSEmmanuel Vadot			};
1182f126890aSEmmanuel Vadot			pu4 {
1183f126890aSEmmanuel Vadot				nvidia,pins = "pu4";
1184f126890aSEmmanuel Vadot				nvidia,function = "pwm1";
1185f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1186f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1187f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1188f126890aSEmmanuel Vadot			};
1189f126890aSEmmanuel Vadot			pu5 {
1190f126890aSEmmanuel Vadot				nvidia,pins = "pu5";
1191f126890aSEmmanuel Vadot				nvidia,function = "pwm2";
1192f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1193f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1194f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1195f126890aSEmmanuel Vadot			};
1196f126890aSEmmanuel Vadot			pu6 {
1197f126890aSEmmanuel Vadot				nvidia,pins = "pu6";
1198f126890aSEmmanuel Vadot				nvidia,function = "pwm3";
1199f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1200f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1201f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1202f126890aSEmmanuel Vadot			};
1203f126890aSEmmanuel Vadot			jtag_rtck_pu7 {
1204f126890aSEmmanuel Vadot				nvidia,pins = "jtag_rtck_pu7";
1205f126890aSEmmanuel Vadot				nvidia,function = "rtck";
1206f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1207f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1208f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1209f126890aSEmmanuel Vadot			};
1210f126890aSEmmanuel Vadot			pv0 {
1211f126890aSEmmanuel Vadot				nvidia,pins = "pv0";
1212f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
1213f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1214f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1215f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1216f126890aSEmmanuel Vadot			};
1217f126890aSEmmanuel Vadot			pv2 {
1218f126890aSEmmanuel Vadot				nvidia,pins = "pv2";
1219f126890aSEmmanuel Vadot				nvidia,function = "owr";
1220f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1221f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1222f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1223f126890aSEmmanuel Vadot			};
1224f126890aSEmmanuel Vadot			pv3 {
1225f126890aSEmmanuel Vadot				nvidia,pins = "pv3";
1226f126890aSEmmanuel Vadot				nvidia,function = "clk_12m_out";
1227f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1228f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1229f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1230f126890aSEmmanuel Vadot			};
1231f126890aSEmmanuel Vadot			ddc_scl_pv4 {
1232f126890aSEmmanuel Vadot				nvidia,pins = "ddc_scl_pv4";
1233f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
1234f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1235f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1236f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1237f126890aSEmmanuel Vadot			};
1238f126890aSEmmanuel Vadot			ddc_sda_pv5 {
1239f126890aSEmmanuel Vadot				nvidia,pins = "ddc_sda_pv5";
1240f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
1241f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1242f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1243f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1244f126890aSEmmanuel Vadot			};
1245f126890aSEmmanuel Vadot			crt_hsync_pv6 {
1246f126890aSEmmanuel Vadot				nvidia,pins = "crt_hsync_pv6";
1247f126890aSEmmanuel Vadot				nvidia,function = "crt";
1248f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1249f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1250f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1251f126890aSEmmanuel Vadot			};
1252f126890aSEmmanuel Vadot			crt_vsync_pv7 {
1253f126890aSEmmanuel Vadot				nvidia,pins = "crt_vsync_pv7";
1254f126890aSEmmanuel Vadot				nvidia,function = "crt";
1255f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1256f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1257f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1258f126890aSEmmanuel Vadot			};
1259f126890aSEmmanuel Vadot			lcd_cs1_n_pw0 {
1260f126890aSEmmanuel Vadot				nvidia,pins = "lcd_cs1_n_pw0";
1261f126890aSEmmanuel Vadot				nvidia,function = "displaya";
1262f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1263f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1264f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1265f126890aSEmmanuel Vadot			};
1266f126890aSEmmanuel Vadot			lcd_m1_pw1 {
1267f126890aSEmmanuel Vadot				nvidia,pins = "lcd_m1_pw1";
1268f126890aSEmmanuel Vadot				nvidia,function = "displaya";
1269f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1270f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1271f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1272f126890aSEmmanuel Vadot			};
1273f126890aSEmmanuel Vadot			spi2_cs1_n_pw2 {
1274f126890aSEmmanuel Vadot				nvidia,pins = "spi2_cs1_n_pw2";
1275f126890aSEmmanuel Vadot				nvidia,function = "spi2";
1276f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1277f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1278f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1279f126890aSEmmanuel Vadot			};
1280f126890aSEmmanuel Vadot			clk1_out_pw4 {
1281f126890aSEmmanuel Vadot				nvidia,pins = "clk1_out_pw4";
1282f126890aSEmmanuel Vadot				nvidia,function = "extperiph1";
1283f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1286f126890aSEmmanuel Vadot			};
1287f126890aSEmmanuel Vadot			clk2_out_pw5 {
1288f126890aSEmmanuel Vadot				nvidia,pins = "clk2_out_pw5";
1289f126890aSEmmanuel Vadot				nvidia,function = "extperiph2";
1290f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1291f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1292f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1293f126890aSEmmanuel Vadot			};
1294f126890aSEmmanuel Vadot			uart3_txd_pw6 {
1295f126890aSEmmanuel Vadot				nvidia,pins = "uart3_txd_pw6";
1296f126890aSEmmanuel Vadot				nvidia,function = "uartc";
1297f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1298f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1299f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1300f126890aSEmmanuel Vadot			};
1301f126890aSEmmanuel Vadot			uart3_rxd_pw7 {
1302f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rxd_pw7";
1303f126890aSEmmanuel Vadot				nvidia,function = "uartc";
1304f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1305f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1306f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1307f126890aSEmmanuel Vadot			};
1308f126890aSEmmanuel Vadot			spi2_sck_px2 {
1309f126890aSEmmanuel Vadot				nvidia,pins = "spi2_sck_px2";
1310f126890aSEmmanuel Vadot				nvidia,function = "gmi";
1311f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1312f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1313f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1314f126890aSEmmanuel Vadot			};
1315f126890aSEmmanuel Vadot			spi1_mosi_px4 {
1316f126890aSEmmanuel Vadot				nvidia,pins = "spi1_mosi_px4";
1317f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1318f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1319f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1320f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1321f126890aSEmmanuel Vadot			};
1322f126890aSEmmanuel Vadot			spi1_sck_px5 {
1323f126890aSEmmanuel Vadot				nvidia,pins = "spi1_sck_px5";
1324f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1325f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1326f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1327f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1328f126890aSEmmanuel Vadot			};
1329f126890aSEmmanuel Vadot			spi1_cs0_n_px6 {
1330f126890aSEmmanuel Vadot				nvidia,pins = "spi1_cs0_n_px6";
1331f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1332f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1333f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1334f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1335f126890aSEmmanuel Vadot			};
1336f126890aSEmmanuel Vadot			spi1_miso_px7 {
1337f126890aSEmmanuel Vadot				nvidia,pins = "spi1_miso_px7";
1338f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1339f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1340f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1341f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1342f126890aSEmmanuel Vadot			};
1343f126890aSEmmanuel Vadot			ulpi_clk_py0 {
1344f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_clk_py0";
1345f126890aSEmmanuel Vadot				nvidia,function = "uartd";
1346f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1347f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1348f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1349f126890aSEmmanuel Vadot			};
1350f126890aSEmmanuel Vadot			ulpi_dir_py1 {
1351f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_dir_py1";
1352f126890aSEmmanuel Vadot				nvidia,function = "uartd";
1353f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1354f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1355f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1356f126890aSEmmanuel Vadot			};
1357f126890aSEmmanuel Vadot			ulpi_nxt_py2 {
1358f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_nxt_py2";
1359f126890aSEmmanuel Vadot				nvidia,function = "uartd";
1360f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1361f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1362f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1363f126890aSEmmanuel Vadot			};
1364f126890aSEmmanuel Vadot			ulpi_stp_py3 {
1365f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_stp_py3";
1366f126890aSEmmanuel Vadot				nvidia,function = "uartd";
1367f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1368f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1369f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1370f126890aSEmmanuel Vadot			};
1371f126890aSEmmanuel Vadot			sdmmc1_dat3_py4 {
1372f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat3_py4";
1373f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1374f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1375f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1376f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1377f126890aSEmmanuel Vadot			};
1378f126890aSEmmanuel Vadot			sdmmc1_dat2_py5 {
1379f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat2_py5";
1380f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1381f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1382f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1383f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1384f126890aSEmmanuel Vadot			};
1385f126890aSEmmanuel Vadot			sdmmc1_dat1_py6 {
1386f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat1_py6";
1387f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1388f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1389f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1390f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1391f126890aSEmmanuel Vadot			};
1392f126890aSEmmanuel Vadot			sdmmc1_dat0_py7 {
1393f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat0_py7";
1394f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1395f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1396f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1397f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1398f126890aSEmmanuel Vadot			};
1399f126890aSEmmanuel Vadot			sdmmc1_clk_pz0 {
1400f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_clk_pz0";
1401f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1402f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1403f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1404f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1405f126890aSEmmanuel Vadot			};
1406f126890aSEmmanuel Vadot			sdmmc1_cmd_pz1 {
1407f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_cmd_pz1";
1408f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1409f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1410f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1411f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1412f126890aSEmmanuel Vadot			};
1413f126890aSEmmanuel Vadot			lcd_sdin_pz2 {
1414f126890aSEmmanuel Vadot				nvidia,pins = "lcd_sdin_pz2";
1415f126890aSEmmanuel Vadot				nvidia,function = "displaya";
1416f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1417f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1418f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1419f126890aSEmmanuel Vadot			};
1420f126890aSEmmanuel Vadot			lcd_wr_n_pz3 {
1421f126890aSEmmanuel Vadot				nvidia,pins = "lcd_wr_n_pz3";
1422f126890aSEmmanuel Vadot				nvidia,function = "displaya";
1423f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1424f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1425f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1426f126890aSEmmanuel Vadot			};
1427f126890aSEmmanuel Vadot			lcd_sck_pz4 {
1428f126890aSEmmanuel Vadot				nvidia,pins = "lcd_sck_pz4";
1429f126890aSEmmanuel Vadot				nvidia,function = "displaya";
1430f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1431f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1432f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1433f126890aSEmmanuel Vadot			};
1434f126890aSEmmanuel Vadot			sys_clk_req_pz5 {
1435f126890aSEmmanuel Vadot				nvidia,pins = "sys_clk_req_pz5";
1436f126890aSEmmanuel Vadot				nvidia,function = "sysclk";
1437f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1438f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1439f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1440f126890aSEmmanuel Vadot			};
1441f126890aSEmmanuel Vadot			pwr_i2c_scl_pz6 {
1442f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_scl_pz6";
1443f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
1444f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1445f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1446f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1447f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1448f126890aSEmmanuel Vadot			};
1449f126890aSEmmanuel Vadot			pwr_i2c_sda_pz7 {
1450f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_sda_pz7";
1451f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
1452f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1453f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1454f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1455f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1456f126890aSEmmanuel Vadot			};
1457f126890aSEmmanuel Vadot			sdmmc4_dat0_paa0 {
1458f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat0_paa0";
1459f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1460f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1461f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1462f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1463f126890aSEmmanuel Vadot			};
1464f126890aSEmmanuel Vadot			sdmmc4_dat1_paa1 {
1465f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat1_paa1";
1466f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1467f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1468f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1469f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1470f126890aSEmmanuel Vadot			};
1471f126890aSEmmanuel Vadot			sdmmc4_dat2_paa2 {
1472f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat2_paa2";
1473f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1474f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1475f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1476f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1477f126890aSEmmanuel Vadot			};
1478f126890aSEmmanuel Vadot			sdmmc4_dat3_paa3 {
1479f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat3_paa3";
1480f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1481f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1482f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1483f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1484f126890aSEmmanuel Vadot			};
1485f126890aSEmmanuel Vadot			sdmmc4_dat4_paa4 {
1486f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat4_paa4";
1487f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1488f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1489f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1490f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1491f126890aSEmmanuel Vadot			};
1492f126890aSEmmanuel Vadot			sdmmc4_dat5_paa5 {
1493f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat5_paa5";
1494f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1495f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1496f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1497f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1498f126890aSEmmanuel Vadot			};
1499f126890aSEmmanuel Vadot			sdmmc4_dat6_paa6 {
1500f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat6_paa6";
1501f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1502f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1503f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1504f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1505f126890aSEmmanuel Vadot			};
1506f126890aSEmmanuel Vadot			sdmmc4_dat7_paa7 {
1507f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat7_paa7";
1508f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1509f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1510f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1511f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1512f126890aSEmmanuel Vadot			};
1513f126890aSEmmanuel Vadot			pbb0 {
1514f126890aSEmmanuel Vadot				nvidia,pins = "pbb0";
1515f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
1516f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1517f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1518f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1519f126890aSEmmanuel Vadot			};
1520f126890aSEmmanuel Vadot			cam_i2c_scl_pbb1 {
1521f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_scl_pbb1";
1522f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
1523f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1524f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1525f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1526f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1527f126890aSEmmanuel Vadot			};
1528f126890aSEmmanuel Vadot			cam_i2c_sda_pbb2 {
1529f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_sda_pbb2";
1530f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
1531f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1532f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1533f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1534f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1535f126890aSEmmanuel Vadot			};
1536f126890aSEmmanuel Vadot			pbb3 {
1537f126890aSEmmanuel Vadot				nvidia,pins = "pbb3";
1538f126890aSEmmanuel Vadot				nvidia,function = "vgp3";
1539f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1540f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1541f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1542f126890aSEmmanuel Vadot			};
1543f126890aSEmmanuel Vadot			pbb4 {
1544f126890aSEmmanuel Vadot				nvidia,pins = "pbb4";
1545f126890aSEmmanuel Vadot				nvidia,function = "vgp4";
1546f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1547f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1548f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1549f126890aSEmmanuel Vadot			};
1550f126890aSEmmanuel Vadot			pbb5 {
1551f126890aSEmmanuel Vadot				nvidia,pins = "pbb5";
1552f126890aSEmmanuel Vadot				nvidia,function = "vgp5";
1553f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1554f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1555f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1556f126890aSEmmanuel Vadot			};
1557f126890aSEmmanuel Vadot			pbb6 {
1558f126890aSEmmanuel Vadot				nvidia,pins = "pbb6";
1559f126890aSEmmanuel Vadot				nvidia,function = "vgp6";
1560f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1561f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1562f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1563f126890aSEmmanuel Vadot			};
1564f126890aSEmmanuel Vadot			pbb7 {
1565f126890aSEmmanuel Vadot				nvidia,pins = "pbb7";
1566f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
1567f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1568f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1569f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1570f126890aSEmmanuel Vadot			};
1571f126890aSEmmanuel Vadot			cam_mclk_pcc0 {
1572f126890aSEmmanuel Vadot				nvidia,pins = "cam_mclk_pcc0";
1573f126890aSEmmanuel Vadot				nvidia,function = "vi_alt3";
1574f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1575f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1576f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1577f126890aSEmmanuel Vadot			};
1578f126890aSEmmanuel Vadot			pcc1 {
1579f126890aSEmmanuel Vadot				nvidia,pins = "pcc1";
1580f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
1581f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1582f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1583f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1584f126890aSEmmanuel Vadot			};
1585f126890aSEmmanuel Vadot			pcc2 {
1586f126890aSEmmanuel Vadot				nvidia,pins = "pcc2";
1587f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
1588f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1589f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1590f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1591f126890aSEmmanuel Vadot			};
1592f126890aSEmmanuel Vadot			sdmmc4_rst_n_pcc3 {
1593f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_rst_n_pcc3";
1594f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1595f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1596f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1597f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1598f126890aSEmmanuel Vadot			};
1599f126890aSEmmanuel Vadot			sdmmc4_clk_pcc4 {
1600f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_clk_pcc4";
1601f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1602f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1603f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1604f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1605f126890aSEmmanuel Vadot			};
1606f126890aSEmmanuel Vadot			clk2_req_pcc5 {
1607f126890aSEmmanuel Vadot				nvidia,pins = "clk2_req_pcc5";
1608f126890aSEmmanuel Vadot				nvidia,function = "dap";
1609f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1610f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1611f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1612f126890aSEmmanuel Vadot			};
1613f126890aSEmmanuel Vadot			pex_l2_rst_n_pcc6 {
1614f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_rst_n_pcc6";
1615f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1616f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1617f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1618f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1619f126890aSEmmanuel Vadot			};
1620f126890aSEmmanuel Vadot			pex_l2_clkreq_n_pcc7 {
1621f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_clkreq_n_pcc7";
1622f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1623f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1624f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1625f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1626f126890aSEmmanuel Vadot			};
1627f126890aSEmmanuel Vadot			pex_l0_prsnt_n_pdd0 {
1628f126890aSEmmanuel Vadot				nvidia,pins = "pex_l0_prsnt_n_pdd0";
1629f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1630f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1631f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1632f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1633f126890aSEmmanuel Vadot			};
1634f126890aSEmmanuel Vadot			pex_l0_rst_n_pdd1 {
1635f126890aSEmmanuel Vadot				nvidia,pins = "pex_l0_rst_n_pdd1";
1636f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1637f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1638f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1639f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1640f126890aSEmmanuel Vadot			};
1641f126890aSEmmanuel Vadot			pex_l0_clkreq_n_pdd2 {
1642f126890aSEmmanuel Vadot				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1643f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1644f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1645f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1646f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1647f126890aSEmmanuel Vadot			};
1648f126890aSEmmanuel Vadot			pex_wake_n_pdd3 {
1649f126890aSEmmanuel Vadot				nvidia,pins = "pex_wake_n_pdd3";
1650f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1651f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1652f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1653f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1654f126890aSEmmanuel Vadot			};
1655f126890aSEmmanuel Vadot			pex_l1_prsnt_n_pdd4 {
1656f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_prsnt_n_pdd4";
1657f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1658f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1659f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1660f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1661f126890aSEmmanuel Vadot			};
1662f126890aSEmmanuel Vadot			pex_l1_rst_n_pdd5 {
1663f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_rst_n_pdd5";
1664f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1665f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1666f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1667f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1668f126890aSEmmanuel Vadot			};
1669f126890aSEmmanuel Vadot			pex_l1_clkreq_n_pdd6 {
1670f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1671f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1672f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1673f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1674f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1675f126890aSEmmanuel Vadot			};
1676f126890aSEmmanuel Vadot			pex_l2_prsnt_n_pdd7 {
1677f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_prsnt_n_pdd7";
1678f126890aSEmmanuel Vadot				nvidia,function = "pcie";
1679f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1680f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1681f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1682f126890aSEmmanuel Vadot			};
1683f126890aSEmmanuel Vadot			clk3_out_pee0 {
1684f126890aSEmmanuel Vadot				nvidia,pins = "clk3_out_pee0";
1685f126890aSEmmanuel Vadot				nvidia,function = "extperiph3";
1686f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1687f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1688f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1689f126890aSEmmanuel Vadot			};
1690f126890aSEmmanuel Vadot			clk3_req_pee1 {
1691f126890aSEmmanuel Vadot				nvidia,pins = "clk3_req_pee1";
1692f126890aSEmmanuel Vadot				nvidia,function = "dev3";
1693f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1694f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1695f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1696f126890aSEmmanuel Vadot			};
1697f126890aSEmmanuel Vadot			clk1_req_pee2 {
1698f126890aSEmmanuel Vadot				nvidia,pins = "clk1_req_pee2";
1699f126890aSEmmanuel Vadot				nvidia,function = "dap";
1700f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1701f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1702f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1703f126890aSEmmanuel Vadot			};
1704f126890aSEmmanuel Vadot			hdmi_cec_pee3 {
1705f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_cec_pee3";
1706f126890aSEmmanuel Vadot				nvidia,function = "cec";
1707f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1708f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1709f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1710f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1711f126890aSEmmanuel Vadot			};
1712f126890aSEmmanuel Vadot			owr {
1713f126890aSEmmanuel Vadot				nvidia,pins = "owr";
1714f126890aSEmmanuel Vadot				nvidia,function = "owr";
1715f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1716f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1717f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1718f126890aSEmmanuel Vadot			};
1719f126890aSEmmanuel Vadot			sdio3 {
1720f126890aSEmmanuel Vadot				nvidia,pins = "drive_sdio3";
1721f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
1722f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1723f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <46>;
1724f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <42>;
1725f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <1>;
1726f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <1>;
1727f126890aSEmmanuel Vadot			};
1728f126890aSEmmanuel Vadot			gpv {
1729f126890aSEmmanuel Vadot				nvidia,pins = "drive_gpv";
1730f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <16>;
1731f126890aSEmmanuel Vadot			};
1732f126890aSEmmanuel Vadot		};
1733f126890aSEmmanuel Vadot	};
1734f126890aSEmmanuel Vadot
1735f126890aSEmmanuel Vadot	serial@70006000 {
1736*aa1a8ff2SEmmanuel Vadot		/delete-property/ dmas;
1737*aa1a8ff2SEmmanuel Vadot		/delete-property/ dma-names;
1738f126890aSEmmanuel Vadot		status = "okay";
1739f126890aSEmmanuel Vadot	};
1740f126890aSEmmanuel Vadot
1741f126890aSEmmanuel Vadot	i2c@7000c000 {
1742f126890aSEmmanuel Vadot		status = "okay";
1743f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1744f126890aSEmmanuel Vadot	};
1745f126890aSEmmanuel Vadot
1746f126890aSEmmanuel Vadot	i2c@7000c400 {
1747f126890aSEmmanuel Vadot		status = "okay";
1748f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1749f126890aSEmmanuel Vadot	};
1750f126890aSEmmanuel Vadot
1751f126890aSEmmanuel Vadot	i2c@7000c500 {
1752f126890aSEmmanuel Vadot		status = "okay";
1753f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1754f126890aSEmmanuel Vadot	};
1755f126890aSEmmanuel Vadot
1756f126890aSEmmanuel Vadot	hdmiddc: i2c@7000c700 {
1757f126890aSEmmanuel Vadot		status = "okay";
1758f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1759f126890aSEmmanuel Vadot	};
1760f126890aSEmmanuel Vadot
1761f126890aSEmmanuel Vadot	i2c@7000d000 {
1762f126890aSEmmanuel Vadot		status = "okay";
1763f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1764f126890aSEmmanuel Vadot
1765f126890aSEmmanuel Vadot		rt5640: rt5640@1c {
1766f126890aSEmmanuel Vadot			compatible = "realtek,rt5640";
1767f126890aSEmmanuel Vadot			reg = <0x1c>;
1768f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1769f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_FALLING>;
1770f126890aSEmmanuel Vadot			realtek,ldo1-en-gpios =
1771f126890aSEmmanuel Vadot				<&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
1772f126890aSEmmanuel Vadot		};
1773f126890aSEmmanuel Vadot
1774f126890aSEmmanuel Vadot		pmic: tps65911@2d {
1775f126890aSEmmanuel Vadot			compatible = "ti,tps65911";
1776f126890aSEmmanuel Vadot			reg = <0x2d>;
1777f126890aSEmmanuel Vadot
1778f126890aSEmmanuel Vadot			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1779f126890aSEmmanuel Vadot			#interrupt-cells = <2>;
1780f126890aSEmmanuel Vadot			interrupt-controller;
1781f126890aSEmmanuel Vadot			wakeup-source;
1782f126890aSEmmanuel Vadot
1783f126890aSEmmanuel Vadot			ti,system-power-controller;
1784f126890aSEmmanuel Vadot
1785f126890aSEmmanuel Vadot			#gpio-cells = <2>;
1786f126890aSEmmanuel Vadot			gpio-controller;
1787f126890aSEmmanuel Vadot
1788f126890aSEmmanuel Vadot			vcc1-supply = <&vdd_5v_in_reg>;
1789f126890aSEmmanuel Vadot			vcc2-supply = <&vdd_5v_in_reg>;
1790f126890aSEmmanuel Vadot			vcc3-supply = <&vio_reg>;
1791f126890aSEmmanuel Vadot			vcc4-supply = <&vdd_5v_in_reg>;
1792f126890aSEmmanuel Vadot			vcc5-supply = <&vdd_5v_in_reg>;
1793f126890aSEmmanuel Vadot			vcc6-supply = <&vdd2_reg>;
1794f126890aSEmmanuel Vadot			vcc7-supply = <&vdd_5v_in_reg>;
1795f126890aSEmmanuel Vadot			vccio-supply = <&vdd_5v_in_reg>;
1796f126890aSEmmanuel Vadot
1797f126890aSEmmanuel Vadot			regulators {
1798f126890aSEmmanuel Vadot				vdd1_reg: vdd1 {
1799f126890aSEmmanuel Vadot					regulator-name = "vddio_ddr_1v2";
1800f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1801f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1802f126890aSEmmanuel Vadot					regulator-always-on;
1803f126890aSEmmanuel Vadot				};
1804f126890aSEmmanuel Vadot
1805f126890aSEmmanuel Vadot				vdd2_reg: vdd2 {
1806f126890aSEmmanuel Vadot					regulator-name = "vdd_1v5_gen";
1807f126890aSEmmanuel Vadot					regulator-min-microvolt = <1500000>;
1808f126890aSEmmanuel Vadot					regulator-max-microvolt = <1500000>;
1809f126890aSEmmanuel Vadot					regulator-always-on;
1810f126890aSEmmanuel Vadot				};
1811f126890aSEmmanuel Vadot
1812f126890aSEmmanuel Vadot				vddctrl_reg: vddctrl {
1813f126890aSEmmanuel Vadot					regulator-name = "vdd_cpu,vdd_sys";
1814f126890aSEmmanuel Vadot					regulator-min-microvolt = <800000>;
1815f126890aSEmmanuel Vadot					regulator-max-microvolt = <1250000>;
1816f126890aSEmmanuel Vadot					regulator-coupled-with = <&core_vdd_reg>;
1817f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <300000>;
1818f126890aSEmmanuel Vadot					regulator-max-step-microvolt = <100000>;
1819f126890aSEmmanuel Vadot					regulator-always-on;
1820f126890aSEmmanuel Vadot
1821f126890aSEmmanuel Vadot					nvidia,tegra-cpu-regulator;
1822f126890aSEmmanuel Vadot				};
1823f126890aSEmmanuel Vadot
1824f126890aSEmmanuel Vadot				vio_reg: vio {
1825f126890aSEmmanuel Vadot					regulator-name = "vdd_1v8_gen";
1826f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1827f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
1828f126890aSEmmanuel Vadot					regulator-always-on;
1829f126890aSEmmanuel Vadot				};
1830f126890aSEmmanuel Vadot
1831f126890aSEmmanuel Vadot				ldo1_reg: ldo1 {
1832f126890aSEmmanuel Vadot					regulator-name = "vdd_pexa,vdd_pexb";
1833f126890aSEmmanuel Vadot					regulator-min-microvolt = <1050000>;
1834f126890aSEmmanuel Vadot					regulator-max-microvolt = <1050000>;
1835f126890aSEmmanuel Vadot				};
1836f126890aSEmmanuel Vadot
1837f126890aSEmmanuel Vadot				ldo2_reg: ldo2 {
1838f126890aSEmmanuel Vadot					regulator-name = "vdd_sata,avdd_plle";
1839f126890aSEmmanuel Vadot					regulator-min-microvolt = <1050000>;
1840f126890aSEmmanuel Vadot					regulator-max-microvolt = <1050000>;
1841f126890aSEmmanuel Vadot				};
1842f126890aSEmmanuel Vadot
1843f126890aSEmmanuel Vadot				/* LDO3 is not connected to anything */
1844f126890aSEmmanuel Vadot
1845f126890aSEmmanuel Vadot				ldo4_reg: ldo4 {
1846f126890aSEmmanuel Vadot					regulator-name = "vdd_rtc";
1847f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1848f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1849f126890aSEmmanuel Vadot					regulator-always-on;
1850f126890aSEmmanuel Vadot				};
1851f126890aSEmmanuel Vadot
1852f126890aSEmmanuel Vadot				ldo5_reg: ldo5 {
1853f126890aSEmmanuel Vadot					regulator-name = "vddio_sdmmc,avdd_vdac";
1854f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1855f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
1856f126890aSEmmanuel Vadot					regulator-always-on;
1857f126890aSEmmanuel Vadot				};
1858f126890aSEmmanuel Vadot
1859f126890aSEmmanuel Vadot				ldo6_reg: ldo6 {
1860f126890aSEmmanuel Vadot					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
1861f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1862f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1863f126890aSEmmanuel Vadot				};
1864f126890aSEmmanuel Vadot
1865f126890aSEmmanuel Vadot				ldo7_reg: ldo7 {
1866f126890aSEmmanuel Vadot					regulator-name = "vdd_pllm,x,u,a_p_c_s";
1867f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1868f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1869f126890aSEmmanuel Vadot					regulator-always-on;
1870f126890aSEmmanuel Vadot				};
1871f126890aSEmmanuel Vadot
1872f126890aSEmmanuel Vadot				ldo8_reg: ldo8 {
1873f126890aSEmmanuel Vadot					regulator-name = "vdd_ddr_hs";
1874f126890aSEmmanuel Vadot					regulator-min-microvolt = <1000000>;
1875f126890aSEmmanuel Vadot					regulator-max-microvolt = <1000000>;
1876f126890aSEmmanuel Vadot					regulator-always-on;
1877f126890aSEmmanuel Vadot				};
1878f126890aSEmmanuel Vadot			};
1879f126890aSEmmanuel Vadot		};
1880f126890aSEmmanuel Vadot
1881f126890aSEmmanuel Vadot		core_vdd_reg: tps62361@60 {
1882f126890aSEmmanuel Vadot			compatible = "ti,tps62361";
1883f126890aSEmmanuel Vadot			reg = <0x60>;
1884f126890aSEmmanuel Vadot
1885f126890aSEmmanuel Vadot			regulator-name = "tps62361-vout";
1886f126890aSEmmanuel Vadot			regulator-min-microvolt = <500000>;
1887f126890aSEmmanuel Vadot			regulator-max-microvolt = <1500000>;
1888f126890aSEmmanuel Vadot			regulator-coupled-with = <&vddctrl_reg>;
1889f126890aSEmmanuel Vadot			regulator-coupled-max-spread = <300000>;
1890f126890aSEmmanuel Vadot			regulator-max-step-microvolt = <100000>;
1891f126890aSEmmanuel Vadot			regulator-boot-on;
1892f126890aSEmmanuel Vadot			regulator-always-on;
1893f126890aSEmmanuel Vadot			ti,vsel0-state-high;
1894f126890aSEmmanuel Vadot			ti,vsel1-state-high;
1895f126890aSEmmanuel Vadot
1896f126890aSEmmanuel Vadot			nvidia,tegra-core-regulator;
1897f126890aSEmmanuel Vadot		};
1898f126890aSEmmanuel Vadot	};
1899f126890aSEmmanuel Vadot
1900f126890aSEmmanuel Vadot	spi@7000da00 {
1901f126890aSEmmanuel Vadot		status = "okay";
1902f126890aSEmmanuel Vadot		spi-max-frequency = <25000000>;
1903f126890aSEmmanuel Vadot
1904f126890aSEmmanuel Vadot		flash@1 {
1905f126890aSEmmanuel Vadot			compatible = "winbond,w25q32", "jedec,spi-nor";
1906f126890aSEmmanuel Vadot			reg = <1>;
1907f126890aSEmmanuel Vadot			spi-max-frequency = <20000000>;
1908f126890aSEmmanuel Vadot		};
1909f126890aSEmmanuel Vadot	};
1910f126890aSEmmanuel Vadot
1911f126890aSEmmanuel Vadot	pmc@7000e400 {
1912f126890aSEmmanuel Vadot		status = "okay";
1913f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
1914f126890aSEmmanuel Vadot		nvidia,suspend-mode = <1>;
1915f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <2000>;
1916f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <200>;
1917f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <3845 3845>;
1918f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <0>;
1919f126890aSEmmanuel Vadot		nvidia,core-power-req-active-high;
1920f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
1921f126890aSEmmanuel Vadot		core-supply = <&core_vdd_reg>;
1922f126890aSEmmanuel Vadot	};
1923f126890aSEmmanuel Vadot
1924f126890aSEmmanuel Vadot	ahub@70080000 {
1925f126890aSEmmanuel Vadot		i2s@70080400 {
1926f126890aSEmmanuel Vadot			status = "okay";
1927f126890aSEmmanuel Vadot		};
1928f126890aSEmmanuel Vadot	};
1929f126890aSEmmanuel Vadot
1930f126890aSEmmanuel Vadot	mmc@78000000 {
1931f126890aSEmmanuel Vadot		status = "okay";
1932f126890aSEmmanuel Vadot		vqmmc-supply = <&ldo5_reg>;
1933f126890aSEmmanuel Vadot		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1934f126890aSEmmanuel Vadot		wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
1935f126890aSEmmanuel Vadot		power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
1936f126890aSEmmanuel Vadot		bus-width = <4>;
1937f126890aSEmmanuel Vadot	};
1938f126890aSEmmanuel Vadot
1939f126890aSEmmanuel Vadot	mmc@78000600 {
1940f126890aSEmmanuel Vadot		status = "okay";
1941f126890aSEmmanuel Vadot		bus-width = <8>;
1942f126890aSEmmanuel Vadot		non-removable;
1943f126890aSEmmanuel Vadot	};
1944f126890aSEmmanuel Vadot
1945f126890aSEmmanuel Vadot	usb@7d000000 {
1946f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-udc";
1947f126890aSEmmanuel Vadot		status = "okay";
1948f126890aSEmmanuel Vadot		dr_mode = "peripheral";
1949f126890aSEmmanuel Vadot	};
1950f126890aSEmmanuel Vadot
1951f126890aSEmmanuel Vadot	usb-phy@7d000000 {
1952f126890aSEmmanuel Vadot		status = "okay";
1953f126890aSEmmanuel Vadot	};
1954f126890aSEmmanuel Vadot
1955f126890aSEmmanuel Vadot	usb@7d004000 {
1956f126890aSEmmanuel Vadot		status = "okay";
1957f126890aSEmmanuel Vadot	};
1958f126890aSEmmanuel Vadot
1959f126890aSEmmanuel Vadot	phy2: usb-phy@7d004000 {
1960f126890aSEmmanuel Vadot		vbus-supply = <&sys_3v3_reg>;
1961f126890aSEmmanuel Vadot		status = "okay";
1962f126890aSEmmanuel Vadot	};
1963f126890aSEmmanuel Vadot
1964f126890aSEmmanuel Vadot	usb@7d008000 {
1965f126890aSEmmanuel Vadot		status = "okay";
1966f126890aSEmmanuel Vadot	};
1967f126890aSEmmanuel Vadot
1968f126890aSEmmanuel Vadot	usb-phy@7d008000 {
1969f126890aSEmmanuel Vadot		vbus-supply = <&usb3_vbus_reg>;
1970f126890aSEmmanuel Vadot		status = "okay";
1971f126890aSEmmanuel Vadot	};
1972f126890aSEmmanuel Vadot
1973f126890aSEmmanuel Vadot	clk32k_in: clock-32k {
1974f126890aSEmmanuel Vadot		compatible = "fixed-clock";
1975f126890aSEmmanuel Vadot		clock-frequency = <32768>;
1976f126890aSEmmanuel Vadot		#clock-cells = <0>;
1977f126890aSEmmanuel Vadot	};
1978f126890aSEmmanuel Vadot
1979f126890aSEmmanuel Vadot	cpus {
1980f126890aSEmmanuel Vadot		cpu0: cpu@0 {
1981f126890aSEmmanuel Vadot			cpu-supply = <&vddctrl_reg>;
1982f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1983f126890aSEmmanuel Vadot		};
1984f126890aSEmmanuel Vadot
1985f126890aSEmmanuel Vadot		cpu@1 {
1986f126890aSEmmanuel Vadot			cpu-supply = <&vddctrl_reg>;
1987f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1988f126890aSEmmanuel Vadot		};
1989f126890aSEmmanuel Vadot
1990f126890aSEmmanuel Vadot		cpu@2 {
1991f126890aSEmmanuel Vadot			cpu-supply = <&vddctrl_reg>;
1992f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1993f126890aSEmmanuel Vadot		};
1994f126890aSEmmanuel Vadot
1995f126890aSEmmanuel Vadot		cpu@3 {
1996f126890aSEmmanuel Vadot			cpu-supply = <&vddctrl_reg>;
1997f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1998f126890aSEmmanuel Vadot		};
1999f126890aSEmmanuel Vadot	};
2000f126890aSEmmanuel Vadot
2001f126890aSEmmanuel Vadot	gpio-leds {
2002f126890aSEmmanuel Vadot		compatible = "gpio-leds";
2003f126890aSEmmanuel Vadot
2004f126890aSEmmanuel Vadot		gpled1 {
2005f126890aSEmmanuel Vadot			label = "LED1"; /* CR5A1 (blue) */
2006f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
2007f126890aSEmmanuel Vadot		};
2008f126890aSEmmanuel Vadot		gpled2 {
2009f126890aSEmmanuel Vadot			label = "LED2"; /* CR4A2 (green) */
2010f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
2011f126890aSEmmanuel Vadot		};
2012f126890aSEmmanuel Vadot	};
2013f126890aSEmmanuel Vadot
2014f126890aSEmmanuel Vadot	vdd_5v_in_reg: regulator-5v0 {
2015f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2016f126890aSEmmanuel Vadot		regulator-name = "vdd_5v_in";
2017f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2018f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2019f126890aSEmmanuel Vadot		regulator-always-on;
2020f126890aSEmmanuel Vadot	};
2021f126890aSEmmanuel Vadot
2022f126890aSEmmanuel Vadot	chargepump_5v_reg: regulator-chargepump {
2023f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2024f126890aSEmmanuel Vadot		regulator-name = "chargepump_5v";
2025f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2026f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2027f126890aSEmmanuel Vadot		regulator-boot-on;
2028f126890aSEmmanuel Vadot		regulator-always-on;
2029f126890aSEmmanuel Vadot		enable-active-high;
2030f126890aSEmmanuel Vadot		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
2031f126890aSEmmanuel Vadot	};
2032f126890aSEmmanuel Vadot
2033f126890aSEmmanuel Vadot	ddr_reg: regulator-ddr {
2034f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2035f126890aSEmmanuel Vadot		regulator-name = "vdd_ddr";
2036f126890aSEmmanuel Vadot		regulator-min-microvolt = <1500000>;
2037f126890aSEmmanuel Vadot		regulator-max-microvolt = <1500000>;
2038f126890aSEmmanuel Vadot		regulator-always-on;
2039f126890aSEmmanuel Vadot		regulator-boot-on;
2040f126890aSEmmanuel Vadot		enable-active-high;
2041f126890aSEmmanuel Vadot		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
2042f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v_in_reg>;
2043f126890aSEmmanuel Vadot	};
2044f126890aSEmmanuel Vadot
2045f126890aSEmmanuel Vadot	vdd_5v_sata_reg: regulator-sata {
2046f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2047f126890aSEmmanuel Vadot		regulator-name = "vdd_5v_sata";
2048f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2049f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2050f126890aSEmmanuel Vadot		regulator-always-on;
2051f126890aSEmmanuel Vadot		regulator-boot-on;
2052f126890aSEmmanuel Vadot		enable-active-high;
2053f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
2054f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v_in_reg>;
2055f126890aSEmmanuel Vadot	};
2056f126890aSEmmanuel Vadot
2057f126890aSEmmanuel Vadot	usb1_vbus_reg: regulator-usb1 {
2058f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2059f126890aSEmmanuel Vadot		regulator-name = "usb1_vbus";
2060f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2061f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2062f126890aSEmmanuel Vadot		enable-active-high;
2063f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
2064f126890aSEmmanuel Vadot		gpio-open-drain;
2065f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v_in_reg>;
2066f126890aSEmmanuel Vadot	};
2067f126890aSEmmanuel Vadot
2068f126890aSEmmanuel Vadot	usb3_vbus_reg: regulator-usb3 {
2069f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2070f126890aSEmmanuel Vadot		regulator-name = "usb3_vbus";
2071f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2072f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2073f126890aSEmmanuel Vadot		enable-active-high;
2074f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
2075f126890aSEmmanuel Vadot		gpio-open-drain;
2076f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v_in_reg>;
2077f126890aSEmmanuel Vadot	};
2078f126890aSEmmanuel Vadot
2079f126890aSEmmanuel Vadot	sys_3v3_reg: regulator-3v3 {
2080f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2081f126890aSEmmanuel Vadot		regulator-name = "sys_3v3,vdd_3v3_alw";
2082f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
2083f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
2084f126890aSEmmanuel Vadot		regulator-always-on;
2085f126890aSEmmanuel Vadot		regulator-boot-on;
2086f126890aSEmmanuel Vadot		enable-active-high;
2087f126890aSEmmanuel Vadot		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
2088f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v_in_reg>;
2089f126890aSEmmanuel Vadot	};
2090f126890aSEmmanuel Vadot
2091f126890aSEmmanuel Vadot	sys_3v3_pexs_reg: regulator-pexs {
2092f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2093f126890aSEmmanuel Vadot		regulator-name = "sys_3v3_pexs";
2094f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
2095f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
2096f126890aSEmmanuel Vadot		regulator-always-on;
2097f126890aSEmmanuel Vadot		regulator-boot-on;
2098f126890aSEmmanuel Vadot		enable-active-high;
2099f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
2100f126890aSEmmanuel Vadot		vin-supply = <&sys_3v3_reg>;
2101f126890aSEmmanuel Vadot	};
2102f126890aSEmmanuel Vadot
2103f126890aSEmmanuel Vadot	vdd_5v0_hdmi: regulator-hdmi {
2104f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2105f126890aSEmmanuel Vadot		regulator-name = "+VDD_5V_HDMI";
2106f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2107f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2108f126890aSEmmanuel Vadot		regulator-always-on;
2109f126890aSEmmanuel Vadot		regulator-boot-on;
2110f126890aSEmmanuel Vadot		vin-supply = <&sys_3v3_reg>;
2111f126890aSEmmanuel Vadot	};
2112f126890aSEmmanuel Vadot
2113f126890aSEmmanuel Vadot	sound {
2114f126890aSEmmanuel Vadot		compatible = "nvidia,tegra-audio-rt5640-beaver",
2115f126890aSEmmanuel Vadot			     "nvidia,tegra-audio-rt5640";
2116f126890aSEmmanuel Vadot		nvidia,model = "NVIDIA Tegra Beaver";
2117f126890aSEmmanuel Vadot
2118f126890aSEmmanuel Vadot		nvidia,audio-routing =
2119f126890aSEmmanuel Vadot			"Headphones", "HPOR",
2120f126890aSEmmanuel Vadot			"Headphones", "HPOL",
2121f126890aSEmmanuel Vadot			"Mic Jack", "MICBIAS1",
2122f126890aSEmmanuel Vadot			"IN2P", "Mic Jack";
2123f126890aSEmmanuel Vadot
2124f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
2125f126890aSEmmanuel Vadot		nvidia,audio-codec = <&rt5640>;
2126f126890aSEmmanuel Vadot
2127f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
2128f126890aSEmmanuel Vadot
2129f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
2130f126890aSEmmanuel Vadot			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2131f126890aSEmmanuel Vadot			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2132f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
2133f126890aSEmmanuel Vadot
2134f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
2135f126890aSEmmanuel Vadot				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2136f126890aSEmmanuel Vadot
2137f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2138f126890aSEmmanuel Vadot					 <&tegra_car TEGRA30_CLK_EXTERN1>;
2139f126890aSEmmanuel Vadot	};
2140f126890aSEmmanuel Vadot};
2141