1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*f126890aSEmmanuel Vadot 3*f126890aSEmmanuel Vadot/ { 4*f126890aSEmmanuel Vadot memory-controller@7000f000 { 5*f126890aSEmmanuel Vadot emc-timings-0 { 6*f126890aSEmmanuel Vadot nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 7*f126890aSEmmanuel Vadot 8*f126890aSEmmanuel Vadot timing-25500000 { 9*f126890aSEmmanuel Vadot clock-frequency = <25500000>; 10*f126890aSEmmanuel Vadot 11*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 12*f126890aSEmmanuel Vadot 0x00020001 /* MC_EMEM_ARB_CFG */ 13*f126890aSEmmanuel Vadot 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 14*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 15*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 16*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 17*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 18*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 19*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 20*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 21*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 22*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 23*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 24*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 25*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 26*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 27*f126890aSEmmanuel Vadot 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 28*f126890aSEmmanuel Vadot 0x74830303 /* MC_EMEM_ARB_MISC0 */ 29*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 30*f126890aSEmmanuel Vadot >; 31*f126890aSEmmanuel Vadot }; 32*f126890aSEmmanuel Vadot 33*f126890aSEmmanuel Vadot timing-51000000 { 34*f126890aSEmmanuel Vadot clock-frequency = <51000000>; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 37*f126890aSEmmanuel Vadot 0x00010001 /* MC_EMEM_ARB_CFG */ 38*f126890aSEmmanuel Vadot 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 39*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 40*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 41*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 42*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 43*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 44*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 45*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 46*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 47*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 48*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 49*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 50*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 51*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 52*f126890aSEmmanuel Vadot 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 53*f126890aSEmmanuel Vadot 0x73430303 /* MC_EMEM_ARB_MISC0 */ 54*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 55*f126890aSEmmanuel Vadot >; 56*f126890aSEmmanuel Vadot }; 57*f126890aSEmmanuel Vadot 58*f126890aSEmmanuel Vadot timing-102000000 { 59*f126890aSEmmanuel Vadot clock-frequency = <102000000>; 60*f126890aSEmmanuel Vadot 61*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 62*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_CFG */ 63*f126890aSEmmanuel Vadot 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 64*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 65*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 66*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 67*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 68*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 69*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 70*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 71*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 72*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 73*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 74*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 75*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 76*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 77*f126890aSEmmanuel Vadot 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */ 78*f126890aSEmmanuel Vadot 0x72830504 /* MC_EMEM_ARB_MISC0 */ 79*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 80*f126890aSEmmanuel Vadot >; 81*f126890aSEmmanuel Vadot }; 82*f126890aSEmmanuel Vadot 83*f126890aSEmmanuel Vadot timing-204000000 { 84*f126890aSEmmanuel Vadot clock-frequency = <204000000>; 85*f126890aSEmmanuel Vadot 86*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 87*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_CFG */ 88*f126890aSEmmanuel Vadot 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 89*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 90*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 91*f126890aSEmmanuel Vadot 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 92*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 93*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */ 94*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 95*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 96*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 97*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 98*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 99*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 100*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 101*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 102*f126890aSEmmanuel Vadot 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */ 103*f126890aSEmmanuel Vadot 0x72440a06 /* MC_EMEM_ARB_MISC0 */ 104*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 105*f126890aSEmmanuel Vadot >; 106*f126890aSEmmanuel Vadot }; 107*f126890aSEmmanuel Vadot 108*f126890aSEmmanuel Vadot timing-333500000 { 109*f126890aSEmmanuel Vadot clock-frequency = <333500000>; 110*f126890aSEmmanuel Vadot 111*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 112*f126890aSEmmanuel Vadot 0x00000005 /* MC_EMEM_ARB_CFG */ 113*f126890aSEmmanuel Vadot 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */ 114*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 115*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 116*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_RC */ 117*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 118*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 119*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 120*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 121*f126890aSEmmanuel Vadot 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 122*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 123*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 124*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 125*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 126*f126890aSEmmanuel Vadot 0x06030202 /* MC_EMEM_ARB_DA_TURNS */ 127*f126890aSEmmanuel Vadot 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */ 128*f126890aSEmmanuel Vadot 0x70850f09 /* MC_EMEM_ARB_MISC0 */ 129*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 130*f126890aSEmmanuel Vadot >; 131*f126890aSEmmanuel Vadot }; 132*f126890aSEmmanuel Vadot 133*f126890aSEmmanuel Vadot timing-667000000 { 134*f126890aSEmmanuel Vadot clock-frequency = <667000000>; 135*f126890aSEmmanuel Vadot 136*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 137*f126890aSEmmanuel Vadot 0x0000000a /* MC_EMEM_ARB_CFG */ 138*f126890aSEmmanuel Vadot 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 139*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 140*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 141*f126890aSEmmanuel Vadot 0x00000010 /* MC_EMEM_ARB_TIMING_RC */ 142*f126890aSEmmanuel Vadot 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */ 143*f126890aSEmmanuel Vadot 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 144*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 145*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 146*f126890aSEmmanuel Vadot 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 147*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 148*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 149*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 150*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 151*f126890aSEmmanuel Vadot 0x08040202 /* MC_EMEM_ARB_DA_TURNS */ 152*f126890aSEmmanuel Vadot 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */ 153*f126890aSEmmanuel Vadot 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */ 154*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 155*f126890aSEmmanuel Vadot >; 156*f126890aSEmmanuel Vadot }; 157*f126890aSEmmanuel Vadot }; 158*f126890aSEmmanuel Vadot 159*f126890aSEmmanuel Vadot emc-timings-1 { 160*f126890aSEmmanuel Vadot nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */ 161*f126890aSEmmanuel Vadot 162*f126890aSEmmanuel Vadot timing-25500000 { 163*f126890aSEmmanuel Vadot clock-frequency = <25500000>; 164*f126890aSEmmanuel Vadot 165*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 166*f126890aSEmmanuel Vadot 0x00020001 /* MC_EMEM_ARB_CFG */ 167*f126890aSEmmanuel Vadot 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 168*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 169*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 170*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 171*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 172*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 173*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 174*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 175*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 176*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 177*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 178*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 179*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 180*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 181*f126890aSEmmanuel Vadot 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 182*f126890aSEmmanuel Vadot 0x74830303 /* MC_EMEM_ARB_MISC0 */ 183*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 184*f126890aSEmmanuel Vadot >; 185*f126890aSEmmanuel Vadot }; 186*f126890aSEmmanuel Vadot 187*f126890aSEmmanuel Vadot timing-51000000 { 188*f126890aSEmmanuel Vadot clock-frequency = <51000000>; 189*f126890aSEmmanuel Vadot 190*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 191*f126890aSEmmanuel Vadot 0x00010001 /* MC_EMEM_ARB_CFG */ 192*f126890aSEmmanuel Vadot 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 193*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 194*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 195*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RC */ 196*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 197*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 198*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 199*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 200*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 201*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 202*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 203*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 204*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 205*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 206*f126890aSEmmanuel Vadot 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */ 207*f126890aSEmmanuel Vadot 0x73430303 /* MC_EMEM_ARB_MISC0 */ 208*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 209*f126890aSEmmanuel Vadot >; 210*f126890aSEmmanuel Vadot }; 211*f126890aSEmmanuel Vadot 212*f126890aSEmmanuel Vadot timing-102000000 { 213*f126890aSEmmanuel Vadot clock-frequency = <102000000>; 214*f126890aSEmmanuel Vadot 215*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 216*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_CFG */ 217*f126890aSEmmanuel Vadot 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 218*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 219*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 220*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RC */ 221*f126890aSEmmanuel Vadot 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */ 222*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */ 223*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 224*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 225*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 226*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 227*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 228*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 229*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 230*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 231*f126890aSEmmanuel Vadot 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */ 232*f126890aSEmmanuel Vadot 0x72830504 /* MC_EMEM_ARB_MISC0 */ 233*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 234*f126890aSEmmanuel Vadot >; 235*f126890aSEmmanuel Vadot }; 236*f126890aSEmmanuel Vadot 237*f126890aSEmmanuel Vadot timing-204000000 { 238*f126890aSEmmanuel Vadot clock-frequency = <204000000>; 239*f126890aSEmmanuel Vadot 240*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 241*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_CFG */ 242*f126890aSEmmanuel Vadot 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 243*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 244*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RP */ 245*f126890aSEmmanuel Vadot 0x00000005 /* MC_EMEM_ARB_TIMING_RC */ 246*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */ 247*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */ 248*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 249*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 250*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 251*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 252*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */ 253*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */ 254*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 255*f126890aSEmmanuel Vadot 0x06020102 /* MC_EMEM_ARB_DA_TURNS */ 256*f126890aSEmmanuel Vadot 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */ 257*f126890aSEmmanuel Vadot 0x72440a06 /* MC_EMEM_ARB_MISC0 */ 258*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 259*f126890aSEmmanuel Vadot >; 260*f126890aSEmmanuel Vadot }; 261*f126890aSEmmanuel Vadot 262*f126890aSEmmanuel Vadot timing-333500000 { 263*f126890aSEmmanuel Vadot clock-frequency = <333500000>; 264*f126890aSEmmanuel Vadot 265*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 266*f126890aSEmmanuel Vadot 0x00000005 /* MC_EMEM_ARB_CFG */ 267*f126890aSEmmanuel Vadot 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */ 268*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */ 269*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RP */ 270*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_RC */ 271*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */ 272*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */ 273*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 274*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 275*f126890aSEmmanuel Vadot 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */ 276*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 277*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 278*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */ 279*f126890aSEmmanuel Vadot 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */ 280*f126890aSEmmanuel Vadot 0x06030202 /* MC_EMEM_ARB_DA_TURNS */ 281*f126890aSEmmanuel Vadot 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */ 282*f126890aSEmmanuel Vadot 0x70850f09 /* MC_EMEM_ARB_MISC0 */ 283*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 284*f126890aSEmmanuel Vadot >; 285*f126890aSEmmanuel Vadot }; 286*f126890aSEmmanuel Vadot 287*f126890aSEmmanuel Vadot timing-667000000 { 288*f126890aSEmmanuel Vadot clock-frequency = <667000000>; 289*f126890aSEmmanuel Vadot 290*f126890aSEmmanuel Vadot nvidia,emem-configuration = < 291*f126890aSEmmanuel Vadot 0x0000000a /* MC_EMEM_ARB_CFG */ 292*f126890aSEmmanuel Vadot 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */ 293*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */ 294*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_RP */ 295*f126890aSEmmanuel Vadot 0x00000010 /* MC_EMEM_ARB_TIMING_RC */ 296*f126890aSEmmanuel Vadot 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */ 297*f126890aSEmmanuel Vadot 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */ 298*f126890aSEmmanuel Vadot 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */ 299*f126890aSEmmanuel Vadot 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */ 300*f126890aSEmmanuel Vadot 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */ 301*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */ 302*f126890aSEmmanuel Vadot 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */ 303*f126890aSEmmanuel Vadot 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */ 304*f126890aSEmmanuel Vadot 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */ 305*f126890aSEmmanuel Vadot 0x08040202 /* MC_EMEM_ARB_DA_TURNS */ 306*f126890aSEmmanuel Vadot 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */ 307*f126890aSEmmanuel Vadot 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */ 308*f126890aSEmmanuel Vadot 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */ 309*f126890aSEmmanuel Vadot >; 310*f126890aSEmmanuel Vadot }; 311*f126890aSEmmanuel Vadot }; 312*f126890aSEmmanuel Vadot }; 313*f126890aSEmmanuel Vadot 314*f126890aSEmmanuel Vadot memory-controller@7000f400 { 315*f126890aSEmmanuel Vadot emc-timings-0 { 316*f126890aSEmmanuel Vadot nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */ 317*f126890aSEmmanuel Vadot 318*f126890aSEmmanuel Vadot timing-25500000 { 319*f126890aSEmmanuel Vadot clock-frequency = <25500000>; 320*f126890aSEmmanuel Vadot 321*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 322*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 323*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 324*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 325*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 326*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 327*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 328*f126890aSEmmanuel Vadot 329*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 330*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RC */ 331*f126890aSEmmanuel Vadot 0x00000004 /* EMC_RFC */ 332*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RAS */ 333*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RP */ 334*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 335*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 336*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 337*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 338*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RD_RCD */ 339*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WR_RCD */ 340*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 341*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 342*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 343*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 344*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 345*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 346*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 347*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 348*f126890aSEmmanuel Vadot 0x000000c0 /* EMC_REFRESH */ 349*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 350*f126890aSEmmanuel Vadot 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */ 351*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 352*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 353*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 354*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 355*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 356*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 357*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TXSR */ 358*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TXSRDLL */ 359*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 360*f126890aSEmmanuel Vadot 0x00000001 /* EMC_TFAW */ 361*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 362*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 363*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 364*f126890aSEmmanuel Vadot 0x000000c7 /* EMC_TREFBW */ 365*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 366*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 367*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 368*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 369*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 370*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 371*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 372*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 373*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 374*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 375*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 376*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 377*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 378*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 379*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 380*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 381*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 382*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 383*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 384*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 385*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 386*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 387*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 388*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 389*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 390*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 391*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 392*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 393*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 394*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 395*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 396*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 397*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 398*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 399*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 400*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 401*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 402*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 403*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 404*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 405*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 406*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 407*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 408*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 409*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 410*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 411*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 412*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 413*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 414*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 415*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 416*f126890aSEmmanuel Vadot 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */ 417*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 418*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 419*f126890aSEmmanuel Vadot >; 420*f126890aSEmmanuel Vadot }; 421*f126890aSEmmanuel Vadot 422*f126890aSEmmanuel Vadot timing-51000000 { 423*f126890aSEmmanuel Vadot clock-frequency = <51000000>; 424*f126890aSEmmanuel Vadot 425*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 426*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 427*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 428*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 429*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 430*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 431*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 432*f126890aSEmmanuel Vadot 433*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 434*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RC */ 435*f126890aSEmmanuel Vadot 0x00000008 /* EMC_RFC */ 436*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RAS */ 437*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RP */ 438*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 439*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 440*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 441*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 442*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RD_RCD */ 443*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WR_RCD */ 444*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 445*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 446*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 447*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 448*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 449*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 450*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 451*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 452*f126890aSEmmanuel Vadot 0x00000181 /* EMC_REFRESH */ 453*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 454*f126890aSEmmanuel Vadot 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */ 455*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 456*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 457*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 458*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 459*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 460*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 461*f126890aSEmmanuel Vadot 0x00000009 /* EMC_TXSR */ 462*f126890aSEmmanuel Vadot 0x00000009 /* EMC_TXSRDLL */ 463*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 464*f126890aSEmmanuel Vadot 0x00000002 /* EMC_TFAW */ 465*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 466*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 467*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 468*f126890aSEmmanuel Vadot 0x0000018e /* EMC_TREFBW */ 469*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 470*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 471*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 472*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 473*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 474*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 475*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 476*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 477*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 478*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 479*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 480*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 481*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 482*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 483*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 484*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 485*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 486*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 487*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 488*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 489*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 490*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 491*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 492*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 493*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 494*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 495*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 496*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 497*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 498*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 499*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 500*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 501*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 502*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 503*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 504*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 505*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 506*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 507*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 508*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 509*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 510*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 511*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 512*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 513*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 514*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 515*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 516*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 517*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 518*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 519*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 520*f126890aSEmmanuel Vadot 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */ 521*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 522*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 523*f126890aSEmmanuel Vadot >; 524*f126890aSEmmanuel Vadot }; 525*f126890aSEmmanuel Vadot 526*f126890aSEmmanuel Vadot timing-102000000 { 527*f126890aSEmmanuel Vadot clock-frequency = <102000000>; 528*f126890aSEmmanuel Vadot 529*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 530*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 531*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 532*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 533*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 534*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 535*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 536*f126890aSEmmanuel Vadot 537*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 538*f126890aSEmmanuel Vadot 0x00000005 /* EMC_RC */ 539*f126890aSEmmanuel Vadot 0x00000010 /* EMC_RFC */ 540*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RAS */ 541*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RP */ 542*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 543*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 544*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 545*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 546*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RD_RCD */ 547*f126890aSEmmanuel Vadot 0x00000001 /* EMC_WR_RCD */ 548*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 549*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 550*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 551*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 552*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 553*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 554*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 555*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 556*f126890aSEmmanuel Vadot 0x00000303 /* EMC_REFRESH */ 557*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 558*f126890aSEmmanuel Vadot 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */ 559*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 560*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 561*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 562*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 563*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 564*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 565*f126890aSEmmanuel Vadot 0x00000012 /* EMC_TXSR */ 566*f126890aSEmmanuel Vadot 0x00000012 /* EMC_TXSRDLL */ 567*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 568*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TFAW */ 569*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 570*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 571*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 572*f126890aSEmmanuel Vadot 0x0000031c /* EMC_TREFBW */ 573*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 574*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 575*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 576*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 577*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 578*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 579*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 580*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 581*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 582*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 583*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 584*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 585*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 586*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 587*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 588*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 589*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 590*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 591*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 592*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 593*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 594*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 595*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 596*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 597*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 598*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 599*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 600*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 601*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 602*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 603*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 604*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 605*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 606*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 607*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 608*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 609*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 610*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 611*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 612*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 613*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 614*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 615*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 616*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 617*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 618*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 619*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 620*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 621*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 622*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 623*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 624*f126890aSEmmanuel Vadot 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */ 625*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 626*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 627*f126890aSEmmanuel Vadot >; 628*f126890aSEmmanuel Vadot }; 629*f126890aSEmmanuel Vadot 630*f126890aSEmmanuel Vadot timing-204000000 { 631*f126890aSEmmanuel Vadot clock-frequency = <204000000>; 632*f126890aSEmmanuel Vadot 633*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 634*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 635*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 636*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 637*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 638*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 639*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 640*f126890aSEmmanuel Vadot 641*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 642*f126890aSEmmanuel Vadot 0x0000000a /* EMC_RC */ 643*f126890aSEmmanuel Vadot 0x00000020 /* EMC_RFC */ 644*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RAS */ 645*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RP */ 646*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 647*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 648*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 649*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 650*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RD_RCD */ 651*f126890aSEmmanuel Vadot 0x00000002 /* EMC_WR_RCD */ 652*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 653*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 654*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 655*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 656*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 657*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 658*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 659*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 660*f126890aSEmmanuel Vadot 0x00000607 /* EMC_REFRESH */ 661*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 662*f126890aSEmmanuel Vadot 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */ 663*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 664*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 665*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 666*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 667*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 668*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 669*f126890aSEmmanuel Vadot 0x00000023 /* EMC_TXSR */ 670*f126890aSEmmanuel Vadot 0x00000023 /* EMC_TXSRDLL */ 671*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 672*f126890aSEmmanuel Vadot 0x00000007 /* EMC_TFAW */ 673*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 674*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 675*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 676*f126890aSEmmanuel Vadot 0x00000638 /* EMC_TREFBW */ 677*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 678*f126890aSEmmanuel Vadot 0x00000006 /* EMC_FBIO_CFG6 */ 679*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 680*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 681*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 682*f126890aSEmmanuel Vadot 0x004400a4 /* EMC_CFG_DIG_DLL */ 683*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 684*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS0 */ 685*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS1 */ 686*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS2 */ 687*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS3 */ 688*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS4 */ 689*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS5 */ 690*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS6 */ 691*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS7 */ 692*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 693*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 694*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 695*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 696*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 697*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 698*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 699*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 700*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 701*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 702*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 703*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 704*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 705*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 706*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 707*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 708*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ0 */ 709*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ1 */ 710*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ2 */ 711*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ3 */ 712*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 713*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 714*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 715*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 716*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 717*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 718*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 719*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 720*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 721*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 722*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 723*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 724*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 725*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 726*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 727*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 728*f126890aSEmmanuel Vadot 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */ 729*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 730*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 731*f126890aSEmmanuel Vadot >; 732*f126890aSEmmanuel Vadot }; 733*f126890aSEmmanuel Vadot 734*f126890aSEmmanuel Vadot timing-333500000 { 735*f126890aSEmmanuel Vadot clock-frequency = <333500000>; 736*f126890aSEmmanuel Vadot 737*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 738*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 739*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200000>; 740*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80000321>; 741*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 742*f126890aSEmmanuel Vadot 743*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 744*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RC */ 745*f126890aSEmmanuel Vadot 0x00000034 /* EMC_RFC */ 746*f126890aSEmmanuel Vadot 0x0000000a /* EMC_RAS */ 747*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RP */ 748*f126890aSEmmanuel Vadot 0x00000003 /* EMC_R2W */ 749*f126890aSEmmanuel Vadot 0x00000008 /* EMC_W2R */ 750*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2P */ 751*f126890aSEmmanuel Vadot 0x00000009 /* EMC_W2P */ 752*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RD_RCD */ 753*f126890aSEmmanuel Vadot 0x00000003 /* EMC_WR_RCD */ 754*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RRD */ 755*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 756*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 757*f126890aSEmmanuel Vadot 0x00000004 /* EMC_WDV */ 758*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE */ 759*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 760*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 761*f126890aSEmmanuel Vadot 0x0000000c /* EMC_RDV */ 762*f126890aSEmmanuel Vadot 0x000009e9 /* EMC_REFRESH */ 763*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 764*f126890aSEmmanuel Vadot 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */ 765*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PDEX2WR */ 766*f126890aSEmmanuel Vadot 0x00000008 /* EMC_PDEX2RD */ 767*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 768*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 769*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 770*f126890aSEmmanuel Vadot 0x0000000e /* EMC_RW2PDEN */ 771*f126890aSEmmanuel Vadot 0x00000039 /* EMC_TXSR */ 772*f126890aSEmmanuel Vadot 0x00000200 /* EMC_TXSRDLL */ 773*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 774*f126890aSEmmanuel Vadot 0x0000000a /* EMC_TFAW */ 775*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 776*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 777*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 778*f126890aSEmmanuel Vadot 0x00000a2a /* EMC_TREFBW */ 779*f126890aSEmmanuel Vadot 0x00000000 /* EMC_QUSE_EXTRA */ 780*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 781*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 782*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 783*f126890aSEmmanuel Vadot 0x00007088 /* EMC_FBIO_CFG5 */ 784*f126890aSEmmanuel Vadot 0x002600a4 /* EMC_CFG_DIG_DLL */ 785*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 786*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS0 */ 787*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS1 */ 788*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS2 */ 789*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS3 */ 790*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS4 */ 791*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS5 */ 792*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS6 */ 793*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS7 */ 794*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 795*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 796*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 797*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 798*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 799*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 800*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 801*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 802*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 803*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 804*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 805*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 806*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 807*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 808*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 809*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 810*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ0 */ 811*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ1 */ 812*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ2 */ 813*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ3 */ 814*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 815*f126890aSEmmanuel Vadot 0x0800013d /* EMC_XM2DQSPADCTRL2 */ 816*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 817*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 818*f126890aSEmmanuel Vadot 0x01f1f508 /* EMC_XM2COMPPADCTRL */ 819*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 820*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 821*f126890aSEmmanuel Vadot 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 822*f126890aSEmmanuel Vadot 0x08000021 /* EMC_XM2DQSPADCTRL3 */ 823*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 824*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 825*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 826*f126890aSEmmanuel Vadot 0x018b000c /* EMC_MRS_WAIT_CNT */ 827*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 828*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 829*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 830*f126890aSEmmanuel Vadot 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */ 831*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 832*f126890aSEmmanuel Vadot 0xff00ff89 /* EMC_CFG_RSV */ 833*f126890aSEmmanuel Vadot >; 834*f126890aSEmmanuel Vadot }; 835*f126890aSEmmanuel Vadot 836*f126890aSEmmanuel Vadot timing-667000000 { 837*f126890aSEmmanuel Vadot clock-frequency = <667000000>; 838*f126890aSEmmanuel Vadot 839*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 840*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 841*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200018>; 842*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80000b71>; 843*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 844*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 845*f126890aSEmmanuel Vadot 846*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 847*f126890aSEmmanuel Vadot 0x0000001f /* EMC_RC */ 848*f126890aSEmmanuel Vadot 0x00000069 /* EMC_RFC */ 849*f126890aSEmmanuel Vadot 0x00000017 /* EMC_RAS */ 850*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RP */ 851*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2W */ 852*f126890aSEmmanuel Vadot 0x0000000c /* EMC_W2R */ 853*f126890aSEmmanuel Vadot 0x00000003 /* EMC_R2P */ 854*f126890aSEmmanuel Vadot 0x00000011 /* EMC_W2P */ 855*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RD_RCD */ 856*f126890aSEmmanuel Vadot 0x00000007 /* EMC_WR_RCD */ 857*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RRD */ 858*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 859*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 860*f126890aSEmmanuel Vadot 0x00000007 /* EMC_WDV */ 861*f126890aSEmmanuel Vadot 0x0000000b /* EMC_QUSE */ 862*f126890aSEmmanuel Vadot 0x00000009 /* EMC_QRST */ 863*f126890aSEmmanuel Vadot 0x0000000b /* EMC_QSAFE */ 864*f126890aSEmmanuel Vadot 0x00000011 /* EMC_RDV */ 865*f126890aSEmmanuel Vadot 0x00001412 /* EMC_REFRESH */ 866*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 867*f126890aSEmmanuel Vadot 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */ 868*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 869*f126890aSEmmanuel Vadot 0x0000000e /* EMC_PDEX2RD */ 870*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 871*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 872*f126890aSEmmanuel Vadot 0x0000000c /* EMC_AR2PDEN */ 873*f126890aSEmmanuel Vadot 0x00000016 /* EMC_RW2PDEN */ 874*f126890aSEmmanuel Vadot 0x00000072 /* EMC_TXSR */ 875*f126890aSEmmanuel Vadot 0x00000200 /* EMC_TXSRDLL */ 876*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCKE */ 877*f126890aSEmmanuel Vadot 0x00000015 /* EMC_TFAW */ 878*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 879*f126890aSEmmanuel Vadot 0x00000006 /* EMC_TCLKSTABLE */ 880*f126890aSEmmanuel Vadot 0x00000007 /* EMC_TCLKSTOP */ 881*f126890aSEmmanuel Vadot 0x00001453 /* EMC_TREFBW */ 882*f126890aSEmmanuel Vadot 0x0000000c /* EMC_QUSE_EXTRA */ 883*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 884*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 885*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 886*f126890aSEmmanuel Vadot 0x00005088 /* EMC_FBIO_CFG5 */ 887*f126890aSEmmanuel Vadot 0xf00b0191 /* EMC_CFG_DIG_DLL */ 888*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 889*f126890aSEmmanuel Vadot 0x00000008 /* EMC_DLL_XFORM_DQS0 */ 890*f126890aSEmmanuel Vadot 0x00000008 /* EMC_DLL_XFORM_DQS1 */ 891*f126890aSEmmanuel Vadot 0x00000008 /* EMC_DLL_XFORM_DQS2 */ 892*f126890aSEmmanuel Vadot 0x00000008 /* EMC_DLL_XFORM_DQS3 */ 893*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS4 */ 894*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS5 */ 895*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS6 */ 896*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS7 */ 897*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 898*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 899*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 900*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 901*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 902*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 903*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 904*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 905*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 906*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 907*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 908*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 909*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 910*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 911*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 912*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 913*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ0 */ 914*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ1 */ 915*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ2 */ 916*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ3 */ 917*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 918*f126890aSEmmanuel Vadot 0x0600013d /* EMC_XM2DQSPADCTRL2 */ 919*f126890aSEmmanuel Vadot 0x22220000 /* EMC_XM2DQPADCTRL2 */ 920*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 921*f126890aSEmmanuel Vadot 0x01f1f501 /* EMC_XM2COMPPADCTRL */ 922*f126890aSEmmanuel Vadot 0x07077404 /* EMC_XM2VTTGENPADCTRL */ 923*f126890aSEmmanuel Vadot 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */ 924*f126890aSEmmanuel Vadot 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 925*f126890aSEmmanuel Vadot 0x0a000021 /* EMC_XM2DQSPADCTRL3 */ 926*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 927*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 928*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 929*f126890aSEmmanuel Vadot 0x0156000c /* EMC_MRS_WAIT_CNT */ 930*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 931*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 932*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 933*f126890aSEmmanuel Vadot 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */ 934*f126890aSEmmanuel Vadot 0xf8000000 /* EMC_FBIO_SPARE */ 935*f126890aSEmmanuel Vadot 0xff00ff49 /* EMC_CFG_RSV */ 936*f126890aSEmmanuel Vadot >; 937*f126890aSEmmanuel Vadot }; 938*f126890aSEmmanuel Vadot }; 939*f126890aSEmmanuel Vadot 940*f126890aSEmmanuel Vadot emc-timings-1 { 941*f126890aSEmmanuel Vadot nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */ 942*f126890aSEmmanuel Vadot 943*f126890aSEmmanuel Vadot timing-25500000 { 944*f126890aSEmmanuel Vadot clock-frequency = <25500000>; 945*f126890aSEmmanuel Vadot 946*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 947*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 948*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 949*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 950*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 951*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 952*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 953*f126890aSEmmanuel Vadot 954*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 955*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RC */ 956*f126890aSEmmanuel Vadot 0x00000004 /* EMC_RFC */ 957*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RAS */ 958*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RP */ 959*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 960*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 961*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 962*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 963*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RD_RCD */ 964*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WR_RCD */ 965*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 966*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 967*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 968*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 969*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 970*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 971*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 972*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 973*f126890aSEmmanuel Vadot 0x000000c0 /* EMC_REFRESH */ 974*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 975*f126890aSEmmanuel Vadot 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */ 976*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 977*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 978*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 979*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 980*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 981*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 982*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TXSR */ 983*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TXSRDLL */ 984*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 985*f126890aSEmmanuel Vadot 0x00000001 /* EMC_TFAW */ 986*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 987*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 988*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 989*f126890aSEmmanuel Vadot 0x000000c7 /* EMC_TREFBW */ 990*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 991*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 992*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 993*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 994*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 995*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 996*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 997*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 998*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 999*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1000*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1001*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1002*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1003*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1004*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1005*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1006*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1007*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1008*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1009*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1010*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1011*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1012*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1013*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1014*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1015*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1016*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1017*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1018*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1019*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1020*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1021*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1022*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1023*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1024*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1025*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1026*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1027*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1028*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1029*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1030*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1031*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1032*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1033*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1034*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1035*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 1036*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1037*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 1038*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1039*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1040*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1041*f126890aSEmmanuel Vadot 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */ 1042*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 1043*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 1044*f126890aSEmmanuel Vadot >; 1045*f126890aSEmmanuel Vadot }; 1046*f126890aSEmmanuel Vadot 1047*f126890aSEmmanuel Vadot timing-51000000 { 1048*f126890aSEmmanuel Vadot clock-frequency = <51000000>; 1049*f126890aSEmmanuel Vadot 1050*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1051*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1052*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1053*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1054*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1055*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1056*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1057*f126890aSEmmanuel Vadot 1058*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 1059*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RC */ 1060*f126890aSEmmanuel Vadot 0x00000008 /* EMC_RFC */ 1061*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RAS */ 1062*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RP */ 1063*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 1064*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 1065*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 1066*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 1067*f126890aSEmmanuel Vadot 0x00000000 /* EMC_RD_RCD */ 1068*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WR_RCD */ 1069*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 1070*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 1071*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 1072*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 1073*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 1074*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 1075*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 1076*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 1077*f126890aSEmmanuel Vadot 0x00000181 /* EMC_REFRESH */ 1078*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1079*f126890aSEmmanuel Vadot 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */ 1080*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 1081*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 1082*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 1083*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 1084*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 1085*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 1086*f126890aSEmmanuel Vadot 0x00000009 /* EMC_TXSR */ 1087*f126890aSEmmanuel Vadot 0x00000009 /* EMC_TXSRDLL */ 1088*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 1089*f126890aSEmmanuel Vadot 0x00000002 /* EMC_TFAW */ 1090*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 1091*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 1092*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 1093*f126890aSEmmanuel Vadot 0x0000018e /* EMC_TREFBW */ 1094*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 1095*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 1096*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 1097*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 1098*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 1099*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 1100*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1101*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 1102*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 1103*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1104*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1105*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1106*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1107*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1108*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1109*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1110*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1111*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1112*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1113*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1114*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1115*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1116*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1117*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1118*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1119*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1120*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1121*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1122*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1123*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1124*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1125*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1126*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1127*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1128*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1129*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1130*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1131*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1132*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1133*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1134*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1135*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1136*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1137*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1138*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1139*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 1140*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1141*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 1142*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1143*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1144*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1145*f126890aSEmmanuel Vadot 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */ 1146*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 1147*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 1148*f126890aSEmmanuel Vadot >; 1149*f126890aSEmmanuel Vadot }; 1150*f126890aSEmmanuel Vadot 1151*f126890aSEmmanuel Vadot timing-102000000 { 1152*f126890aSEmmanuel Vadot clock-frequency = <102000000>; 1153*f126890aSEmmanuel Vadot 1154*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1155*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1156*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1157*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1158*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1159*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1160*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1161*f126890aSEmmanuel Vadot 1162*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 1163*f126890aSEmmanuel Vadot 0x00000005 /* EMC_RC */ 1164*f126890aSEmmanuel Vadot 0x00000010 /* EMC_RFC */ 1165*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RAS */ 1166*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RP */ 1167*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 1168*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 1169*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 1170*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 1171*f126890aSEmmanuel Vadot 0x00000001 /* EMC_RD_RCD */ 1172*f126890aSEmmanuel Vadot 0x00000001 /* EMC_WR_RCD */ 1173*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 1174*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 1175*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 1176*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 1177*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 1178*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 1179*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 1180*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 1181*f126890aSEmmanuel Vadot 0x00000303 /* EMC_REFRESH */ 1182*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1183*f126890aSEmmanuel Vadot 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */ 1184*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 1185*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 1186*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 1187*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 1188*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 1189*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 1190*f126890aSEmmanuel Vadot 0x00000012 /* EMC_TXSR */ 1191*f126890aSEmmanuel Vadot 0x00000012 /* EMC_TXSRDLL */ 1192*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 1193*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TFAW */ 1194*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 1195*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 1196*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 1197*f126890aSEmmanuel Vadot 0x0000031c /* EMC_TREFBW */ 1198*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 1199*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 1200*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 1201*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 1202*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 1203*f126890aSEmmanuel Vadot 0x007800a4 /* EMC_CFG_DIG_DLL */ 1204*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1205*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS0 */ 1206*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS1 */ 1207*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS2 */ 1208*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS3 */ 1209*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS4 */ 1210*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS5 */ 1211*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS6 */ 1212*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQS7 */ 1213*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1214*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1215*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1216*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1217*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1218*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1219*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1220*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1221*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1222*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1223*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1224*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1225*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1226*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1227*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1228*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1229*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ0 */ 1230*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ1 */ 1231*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ2 */ 1232*f126890aSEmmanuel Vadot 0x000fc000 /* EMC_DLL_XFORM_DQ3 */ 1233*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1234*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1235*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1236*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1237*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1238*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1239*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1240*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1241*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1242*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1243*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ZCAL_INTERVAL */ 1244*f126890aSEmmanuel Vadot 0x00000040 /* EMC_ZCAL_WAIT_CNT */ 1245*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 1246*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1247*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1248*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1249*f126890aSEmmanuel Vadot 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */ 1250*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 1251*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 1252*f126890aSEmmanuel Vadot >; 1253*f126890aSEmmanuel Vadot }; 1254*f126890aSEmmanuel Vadot 1255*f126890aSEmmanuel Vadot timing-204000000 { 1256*f126890aSEmmanuel Vadot clock-frequency = <204000000>; 1257*f126890aSEmmanuel Vadot 1258*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1259*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100003>; 1260*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200008>; 1261*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80001221>; 1262*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1263*f126890aSEmmanuel Vadot nvidia,emc-cfg-dyn-self-ref; 1264*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1265*f126890aSEmmanuel Vadot 1266*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 1267*f126890aSEmmanuel Vadot 0x0000000a /* EMC_RC */ 1268*f126890aSEmmanuel Vadot 0x00000020 /* EMC_RFC */ 1269*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RAS */ 1270*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RP */ 1271*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2W */ 1272*f126890aSEmmanuel Vadot 0x0000000a /* EMC_W2R */ 1273*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2P */ 1274*f126890aSEmmanuel Vadot 0x0000000b /* EMC_W2P */ 1275*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RD_RCD */ 1276*f126890aSEmmanuel Vadot 0x00000002 /* EMC_WR_RCD */ 1277*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RRD */ 1278*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 1279*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 1280*f126890aSEmmanuel Vadot 0x00000005 /* EMC_WDV */ 1281*f126890aSEmmanuel Vadot 0x00000005 /* EMC_QUSE */ 1282*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 1283*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 1284*f126890aSEmmanuel Vadot 0x0000000b /* EMC_RDV */ 1285*f126890aSEmmanuel Vadot 0x00000607 /* EMC_REFRESH */ 1286*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1287*f126890aSEmmanuel Vadot 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */ 1288*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 1289*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2RD */ 1290*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 1291*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 1292*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 1293*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RW2PDEN */ 1294*f126890aSEmmanuel Vadot 0x00000023 /* EMC_TXSR */ 1295*f126890aSEmmanuel Vadot 0x00000023 /* EMC_TXSRDLL */ 1296*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 1297*f126890aSEmmanuel Vadot 0x00000007 /* EMC_TFAW */ 1298*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 1299*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 1300*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 1301*f126890aSEmmanuel Vadot 0x00000638 /* EMC_TREFBW */ 1302*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE_EXTRA */ 1303*f126890aSEmmanuel Vadot 0x00000006 /* EMC_FBIO_CFG6 */ 1304*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 1305*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 1306*f126890aSEmmanuel Vadot 0x00004288 /* EMC_FBIO_CFG5 */ 1307*f126890aSEmmanuel Vadot 0x004400a4 /* EMC_CFG_DIG_DLL */ 1308*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1309*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS0 */ 1310*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS1 */ 1311*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS2 */ 1312*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS3 */ 1313*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS4 */ 1314*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS5 */ 1315*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS6 */ 1316*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQS7 */ 1317*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1318*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1319*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1320*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1321*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1322*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1323*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1324*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1325*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1326*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1327*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1328*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1329*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1330*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1331*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1332*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1333*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ0 */ 1334*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ1 */ 1335*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ2 */ 1336*f126890aSEmmanuel Vadot 0x00080000 /* EMC_DLL_XFORM_DQ3 */ 1337*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1338*f126890aSEmmanuel Vadot 0x0800211c /* EMC_XM2DQSPADCTRL2 */ 1339*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1340*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1341*f126890aSEmmanuel Vadot 0x01f1f108 /* EMC_XM2COMPPADCTRL */ 1342*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1343*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1344*f126890aSEmmanuel Vadot 0x08000168 /* EMC_XM2QUSEPADCTRL */ 1345*f126890aSEmmanuel Vadot 0x08000000 /* EMC_XM2DQSPADCTRL3 */ 1346*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1347*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 1348*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1349*f126890aSEmmanuel Vadot 0x000c000c /* EMC_MRS_WAIT_CNT */ 1350*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1351*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1352*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1353*f126890aSEmmanuel Vadot 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */ 1354*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 1355*f126890aSEmmanuel Vadot 0xff00ff00 /* EMC_CFG_RSV */ 1356*f126890aSEmmanuel Vadot >; 1357*f126890aSEmmanuel Vadot }; 1358*f126890aSEmmanuel Vadot 1359*f126890aSEmmanuel Vadot timing-333500000 { 1360*f126890aSEmmanuel Vadot clock-frequency = <333500000>; 1361*f126890aSEmmanuel Vadot 1362*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1363*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1364*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200000>; 1365*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80000321>; 1366*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1367*f126890aSEmmanuel Vadot 1368*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 1369*f126890aSEmmanuel Vadot 0x0000000f /* EMC_RC */ 1370*f126890aSEmmanuel Vadot 0x00000034 /* EMC_RFC */ 1371*f126890aSEmmanuel Vadot 0x0000000a /* EMC_RAS */ 1372*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RP */ 1373*f126890aSEmmanuel Vadot 0x00000003 /* EMC_R2W */ 1374*f126890aSEmmanuel Vadot 0x00000008 /* EMC_W2R */ 1375*f126890aSEmmanuel Vadot 0x00000002 /* EMC_R2P */ 1376*f126890aSEmmanuel Vadot 0x00000009 /* EMC_W2P */ 1377*f126890aSEmmanuel Vadot 0x00000003 /* EMC_RD_RCD */ 1378*f126890aSEmmanuel Vadot 0x00000003 /* EMC_WR_RCD */ 1379*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RRD */ 1380*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 1381*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 1382*f126890aSEmmanuel Vadot 0x00000004 /* EMC_WDV */ 1383*f126890aSEmmanuel Vadot 0x00000006 /* EMC_QUSE */ 1384*f126890aSEmmanuel Vadot 0x00000004 /* EMC_QRST */ 1385*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QSAFE */ 1386*f126890aSEmmanuel Vadot 0x0000000c /* EMC_RDV */ 1387*f126890aSEmmanuel Vadot 0x000009e9 /* EMC_REFRESH */ 1388*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1389*f126890aSEmmanuel Vadot 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */ 1390*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PDEX2WR */ 1391*f126890aSEmmanuel Vadot 0x00000008 /* EMC_PDEX2RD */ 1392*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 1393*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 1394*f126890aSEmmanuel Vadot 0x00000007 /* EMC_AR2PDEN */ 1395*f126890aSEmmanuel Vadot 0x0000000e /* EMC_RW2PDEN */ 1396*f126890aSEmmanuel Vadot 0x00000039 /* EMC_TXSR */ 1397*f126890aSEmmanuel Vadot 0x00000200 /* EMC_TXSRDLL */ 1398*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCKE */ 1399*f126890aSEmmanuel Vadot 0x0000000a /* EMC_TFAW */ 1400*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 1401*f126890aSEmmanuel Vadot 0x00000004 /* EMC_TCLKSTABLE */ 1402*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCLKSTOP */ 1403*f126890aSEmmanuel Vadot 0x00000a2a /* EMC_TREFBW */ 1404*f126890aSEmmanuel Vadot 0x00000000 /* EMC_QUSE_EXTRA */ 1405*f126890aSEmmanuel Vadot 0x00000004 /* EMC_FBIO_CFG6 */ 1406*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 1407*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 1408*f126890aSEmmanuel Vadot 0x00007088 /* EMC_FBIO_CFG5 */ 1409*f126890aSEmmanuel Vadot 0x002600a4 /* EMC_CFG_DIG_DLL */ 1410*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1411*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS0 */ 1412*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS1 */ 1413*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS2 */ 1414*f126890aSEmmanuel Vadot 0x0003c000 /* EMC_DLL_XFORM_DQS3 */ 1415*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS4 */ 1416*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS5 */ 1417*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS6 */ 1418*f126890aSEmmanuel Vadot 0x00014000 /* EMC_DLL_XFORM_DQS7 */ 1419*f126890aSEmmanuel Vadot 0x00018000 /* EMC_DLL_XFORM_QUSE0 */ 1420*f126890aSEmmanuel Vadot 0x00018000 /* EMC_DLL_XFORM_QUSE1 */ 1421*f126890aSEmmanuel Vadot 0x00018000 /* EMC_DLL_XFORM_QUSE2 */ 1422*f126890aSEmmanuel Vadot 0x00018000 /* EMC_DLL_XFORM_QUSE3 */ 1423*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1424*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1425*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1426*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1427*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1428*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1429*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1430*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1431*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1432*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1433*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1434*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1435*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ0 */ 1436*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ1 */ 1437*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ2 */ 1438*f126890aSEmmanuel Vadot 0x00048000 /* EMC_DLL_XFORM_DQ3 */ 1439*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1440*f126890aSEmmanuel Vadot 0x0600013d /* EMC_XM2DQSPADCTRL2 */ 1441*f126890aSEmmanuel Vadot 0x00000000 /* EMC_XM2DQPADCTRL2 */ 1442*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1443*f126890aSEmmanuel Vadot 0x01f1f508 /* EMC_XM2COMPPADCTRL */ 1444*f126890aSEmmanuel Vadot 0x05057404 /* EMC_XM2VTTGENPADCTRL */ 1445*f126890aSEmmanuel Vadot 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */ 1446*f126890aSEmmanuel Vadot 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 1447*f126890aSEmmanuel Vadot 0x08000021 /* EMC_XM2DQSPADCTRL3 */ 1448*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1449*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 1450*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1451*f126890aSEmmanuel Vadot 0x018b000c /* EMC_MRS_WAIT_CNT */ 1452*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1453*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1454*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1455*f126890aSEmmanuel Vadot 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */ 1456*f126890aSEmmanuel Vadot 0xf8000000 /* EMC_FBIO_SPARE */ 1457*f126890aSEmmanuel Vadot 0xff00ff89 /* EMC_CFG_RSV */ 1458*f126890aSEmmanuel Vadot >; 1459*f126890aSEmmanuel Vadot }; 1460*f126890aSEmmanuel Vadot 1461*f126890aSEmmanuel Vadot timing-667000000 { 1462*f126890aSEmmanuel Vadot clock-frequency = <667000000>; 1463*f126890aSEmmanuel Vadot 1464*f126890aSEmmanuel Vadot nvidia,emc-auto-cal-interval = <0x001fffff>; 1465*f126890aSEmmanuel Vadot nvidia,emc-mode-1 = <0x80100002>; 1466*f126890aSEmmanuel Vadot nvidia,emc-mode-2 = <0x80200018>; 1467*f126890aSEmmanuel Vadot nvidia,emc-mode-reset = <0x80000b71>; 1468*f126890aSEmmanuel Vadot nvidia,emc-zcal-cnt-long = <0x00000040>; 1469*f126890aSEmmanuel Vadot nvidia,emc-cfg-periodic-qrst; 1470*f126890aSEmmanuel Vadot 1471*f126890aSEmmanuel Vadot nvidia,emc-configuration = < 1472*f126890aSEmmanuel Vadot 0x00000020 /* EMC_RC */ 1473*f126890aSEmmanuel Vadot 0x0000006a /* EMC_RFC */ 1474*f126890aSEmmanuel Vadot 0x00000017 /* EMC_RAS */ 1475*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RP */ 1476*f126890aSEmmanuel Vadot 0x00000005 /* EMC_R2W */ 1477*f126890aSEmmanuel Vadot 0x0000000c /* EMC_W2R */ 1478*f126890aSEmmanuel Vadot 0x00000003 /* EMC_R2P */ 1479*f126890aSEmmanuel Vadot 0x00000011 /* EMC_W2P */ 1480*f126890aSEmmanuel Vadot 0x00000007 /* EMC_RD_RCD */ 1481*f126890aSEmmanuel Vadot 0x00000007 /* EMC_WR_RCD */ 1482*f126890aSEmmanuel Vadot 0x00000002 /* EMC_RRD */ 1483*f126890aSEmmanuel Vadot 0x00000001 /* EMC_REXT */ 1484*f126890aSEmmanuel Vadot 0x00000000 /* EMC_WEXT */ 1485*f126890aSEmmanuel Vadot 0x00000007 /* EMC_WDV */ 1486*f126890aSEmmanuel Vadot 0x0000000a /* EMC_QUSE */ 1487*f126890aSEmmanuel Vadot 0x00000009 /* EMC_QRST */ 1488*f126890aSEmmanuel Vadot 0x0000000b /* EMC_QSAFE */ 1489*f126890aSEmmanuel Vadot 0x00000011 /* EMC_RDV */ 1490*f126890aSEmmanuel Vadot 0x00001412 /* EMC_REFRESH */ 1491*f126890aSEmmanuel Vadot 0x00000000 /* EMC_BURST_REFRESH_NUM */ 1492*f126890aSEmmanuel Vadot 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */ 1493*f126890aSEmmanuel Vadot 0x00000002 /* EMC_PDEX2WR */ 1494*f126890aSEmmanuel Vadot 0x0000000e /* EMC_PDEX2RD */ 1495*f126890aSEmmanuel Vadot 0x00000001 /* EMC_PCHG2PDEN */ 1496*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ACT2PDEN */ 1497*f126890aSEmmanuel Vadot 0x0000000c /* EMC_AR2PDEN */ 1498*f126890aSEmmanuel Vadot 0x00000016 /* EMC_RW2PDEN */ 1499*f126890aSEmmanuel Vadot 0x00000072 /* EMC_TXSR */ 1500*f126890aSEmmanuel Vadot 0x00000200 /* EMC_TXSRDLL */ 1501*f126890aSEmmanuel Vadot 0x00000005 /* EMC_TCKE */ 1502*f126890aSEmmanuel Vadot 0x00000015 /* EMC_TFAW */ 1503*f126890aSEmmanuel Vadot 0x00000000 /* EMC_TRPAB */ 1504*f126890aSEmmanuel Vadot 0x00000006 /* EMC_TCLKSTABLE */ 1505*f126890aSEmmanuel Vadot 0x00000007 /* EMC_TCLKSTOP */ 1506*f126890aSEmmanuel Vadot 0x00001453 /* EMC_TREFBW */ 1507*f126890aSEmmanuel Vadot 0x0000000b /* EMC_QUSE_EXTRA */ 1508*f126890aSEmmanuel Vadot 0x00000006 /* EMC_FBIO_CFG6 */ 1509*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_WRITE */ 1510*f126890aSEmmanuel Vadot 0x00000000 /* EMC_ODT_READ */ 1511*f126890aSEmmanuel Vadot 0x00005088 /* EMC_FBIO_CFG5 */ 1512*f126890aSEmmanuel Vadot 0xf00b0191 /* EMC_CFG_DIG_DLL */ 1513*f126890aSEmmanuel Vadot 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */ 1514*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS0 */ 1515*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS1 */ 1516*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS2 */ 1517*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS3 */ 1518*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS4 */ 1519*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS5 */ 1520*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS6 */ 1521*f126890aSEmmanuel Vadot 0x0000000a /* EMC_DLL_XFORM_DQS7 */ 1522*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE0 */ 1523*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE1 */ 1524*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE2 */ 1525*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE3 */ 1526*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE4 */ 1527*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE5 */ 1528*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE6 */ 1529*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLL_XFORM_QUSE7 */ 1530*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */ 1531*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */ 1532*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */ 1533*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */ 1534*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */ 1535*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */ 1536*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */ 1537*f126890aSEmmanuel Vadot 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */ 1538*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ0 */ 1539*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ1 */ 1540*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ2 */ 1541*f126890aSEmmanuel Vadot 0x0000000c /* EMC_DLL_XFORM_DQ3 */ 1542*f126890aSEmmanuel Vadot 0x000002a0 /* EMC_XM2CMDPADCTRL */ 1543*f126890aSEmmanuel Vadot 0x0400013d /* EMC_XM2DQSPADCTRL2 */ 1544*f126890aSEmmanuel Vadot 0x22220000 /* EMC_XM2DQPADCTRL2 */ 1545*f126890aSEmmanuel Vadot 0x77fff884 /* EMC_XM2CLKPADCTRL */ 1546*f126890aSEmmanuel Vadot 0x01f1f501 /* EMC_XM2COMPPADCTRL */ 1547*f126890aSEmmanuel Vadot 0x07077404 /* EMC_XM2VTTGENPADCTRL */ 1548*f126890aSEmmanuel Vadot 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */ 1549*f126890aSEmmanuel Vadot 0x080001e8 /* EMC_XM2QUSEPADCTRL */ 1550*f126890aSEmmanuel Vadot 0x0a000021 /* EMC_XM2DQSPADCTRL3 */ 1551*f126890aSEmmanuel Vadot 0x00000802 /* EMC_CTT_TERM_CTRL */ 1552*f126890aSEmmanuel Vadot 0x00020000 /* EMC_ZCAL_INTERVAL */ 1553*f126890aSEmmanuel Vadot 0x00000100 /* EMC_ZCAL_WAIT_CNT */ 1554*f126890aSEmmanuel Vadot 0x0155000c /* EMC_MRS_WAIT_CNT */ 1555*f126890aSEmmanuel Vadot 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */ 1556*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT */ 1557*f126890aSEmmanuel Vadot 0x00000000 /* EMC_CTT_DURATION */ 1558*f126890aSEmmanuel Vadot 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */ 1559*f126890aSEmmanuel Vadot 0xe8000000 /* EMC_FBIO_SPARE */ 1560*f126890aSEmmanuel Vadot 0xff00ff49 /* EMC_CFG_RSV */ 1561*f126890aSEmmanuel Vadot >; 1562*f126890aSEmmanuel Vadot }; 1563*f126890aSEmmanuel Vadot }; 1564*f126890aSEmmanuel Vadot }; 1565*f126890aSEmmanuel Vadot 1566*f126890aSEmmanuel Vadot opp-table-actmon { 1567*f126890aSEmmanuel Vadot /delete-node/ opp-750000000; 1568*f126890aSEmmanuel Vadot /delete-node/ opp-800000000; 1569*f126890aSEmmanuel Vadot /delete-node/ opp-900000000; 1570*f126890aSEmmanuel Vadot }; 1571*f126890aSEmmanuel Vadot 1572*f126890aSEmmanuel Vadot opp-table-emc { 1573*f126890aSEmmanuel Vadot /delete-node/ opp-750000000-1300; 1574*f126890aSEmmanuel Vadot /delete-node/ opp-800000000-1300; 1575*f126890aSEmmanuel Vadot /delete-node/ opp-900000000-1350; 1576*f126890aSEmmanuel Vadot }; 1577*f126890aSEmmanuel Vadot}; 1578