xref: /freebsd-src/sys/contrib/device-tree/src/arm/nvidia/tegra20-paz00.dts (revision 7d0873ebb83b19ba1e8a89e679470d885efe12e3)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/dts-v1/;
3f126890aSEmmanuel Vadot
4f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
5f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h>
6f126890aSEmmanuel Vadot
7f126890aSEmmanuel Vadot#include "tegra20.dtsi"
8f126890aSEmmanuel Vadot#include "tegra20-cpu-opp.dtsi"
9f126890aSEmmanuel Vadot#include "tegra20-cpu-opp-microvolt.dtsi"
10f126890aSEmmanuel Vadot
11f126890aSEmmanuel Vadot/ {
12f126890aSEmmanuel Vadot	model = "Toshiba AC100 / Dynabook AZ";
13f126890aSEmmanuel Vadot	compatible = "compal,paz00", "nvidia,tegra20";
14f126890aSEmmanuel Vadot
15f126890aSEmmanuel Vadot	aliases {
16f126890aSEmmanuel Vadot		mmc0 = &sdmmc4; /* eMMC */
17f126890aSEmmanuel Vadot		mmc1 = &sdmmc1; /* MicroSD */
18f126890aSEmmanuel Vadot		rtc0 = "/i2c@7000d000/tps6586x@34";
19f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
20f126890aSEmmanuel Vadot		serial0 = &uarta;
21f126890aSEmmanuel Vadot		serial1 = &uartc;
22f126890aSEmmanuel Vadot	};
23f126890aSEmmanuel Vadot
24f126890aSEmmanuel Vadot	chosen {
25f126890aSEmmanuel Vadot		stdout-path = "serial0:115200n8";
26f126890aSEmmanuel Vadot	};
27f126890aSEmmanuel Vadot
28f126890aSEmmanuel Vadot	memory@0 {
29f126890aSEmmanuel Vadot		reg = <0x00000000 0x20000000>;
30f126890aSEmmanuel Vadot	};
31f126890aSEmmanuel Vadot
32f126890aSEmmanuel Vadot	host1x@50000000 {
33f126890aSEmmanuel Vadot		dc@54200000 {
34f126890aSEmmanuel Vadot			rgb {
35f126890aSEmmanuel Vadot				status = "okay";
36f126890aSEmmanuel Vadot
37f126890aSEmmanuel Vadot				nvidia,panel = <&panel>;
38f126890aSEmmanuel Vadot			};
39f126890aSEmmanuel Vadot		};
40f126890aSEmmanuel Vadot
41f126890aSEmmanuel Vadot		hdmi@54280000 {
42f126890aSEmmanuel Vadot			status = "okay";
43f126890aSEmmanuel Vadot
44f126890aSEmmanuel Vadot			vdd-supply = <&hdmi_vdd_reg>;
45f126890aSEmmanuel Vadot			pll-supply = <&hdmi_pll_reg>;
46f126890aSEmmanuel Vadot
47f126890aSEmmanuel Vadot			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
48f126890aSEmmanuel Vadot			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
49f126890aSEmmanuel Vadot				GPIO_ACTIVE_HIGH>;
50f126890aSEmmanuel Vadot		};
51f126890aSEmmanuel Vadot	};
52f126890aSEmmanuel Vadot
53f126890aSEmmanuel Vadot	pinmux@70000014 {
54f126890aSEmmanuel Vadot		pinctrl-names = "default";
55f126890aSEmmanuel Vadot		pinctrl-0 = <&state_default>;
56f126890aSEmmanuel Vadot
57f126890aSEmmanuel Vadot		state_default: pinmux {
58f126890aSEmmanuel Vadot			ata {
59f126890aSEmmanuel Vadot				nvidia,pins = "ata", "atc", "atd", "ate",
60f126890aSEmmanuel Vadot					"dap2", "gmb", "gmc", "gmd", "spia",
61f126890aSEmmanuel Vadot					"spib", "spic", "spid", "spie";
62f126890aSEmmanuel Vadot				nvidia,function = "gmi";
63f126890aSEmmanuel Vadot			};
64f126890aSEmmanuel Vadot			atb {
65f126890aSEmmanuel Vadot				nvidia,pins = "atb", "gma", "gme";
66f126890aSEmmanuel Vadot				nvidia,function = "sdio4";
67f126890aSEmmanuel Vadot			};
68f126890aSEmmanuel Vadot			cdev1 {
69f126890aSEmmanuel Vadot				nvidia,pins = "cdev1";
70f126890aSEmmanuel Vadot				nvidia,function = "plla_out";
71f126890aSEmmanuel Vadot			};
72f126890aSEmmanuel Vadot			cdev2 {
73f126890aSEmmanuel Vadot				nvidia,pins = "cdev2";
74f126890aSEmmanuel Vadot				nvidia,function = "pllp_out4";
75f126890aSEmmanuel Vadot			};
76f126890aSEmmanuel Vadot			crtp {
77f126890aSEmmanuel Vadot				nvidia,pins = "crtp";
78f126890aSEmmanuel Vadot				nvidia,function = "crt";
79f126890aSEmmanuel Vadot			};
80f126890aSEmmanuel Vadot			csus {
81f126890aSEmmanuel Vadot				nvidia,pins = "csus";
82f126890aSEmmanuel Vadot				nvidia,function = "pllc_out1";
83f126890aSEmmanuel Vadot			};
84f126890aSEmmanuel Vadot			dap1 {
85f126890aSEmmanuel Vadot				nvidia,pins = "dap1";
86f126890aSEmmanuel Vadot				nvidia,function = "dap1";
87f126890aSEmmanuel Vadot			};
88f126890aSEmmanuel Vadot			dap3 {
89f126890aSEmmanuel Vadot				nvidia,pins = "dap3";
90f126890aSEmmanuel Vadot				nvidia,function = "dap3";
91f126890aSEmmanuel Vadot			};
92f126890aSEmmanuel Vadot			dap4 {
93f126890aSEmmanuel Vadot				nvidia,pins = "dap4";
94f126890aSEmmanuel Vadot				nvidia,function = "dap4";
95f126890aSEmmanuel Vadot			};
96f126890aSEmmanuel Vadot			ddc {
97f126890aSEmmanuel Vadot				nvidia,pins = "ddc";
98f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
99f126890aSEmmanuel Vadot			};
100f126890aSEmmanuel Vadot			dta {
101f126890aSEmmanuel Vadot				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
103f126890aSEmmanuel Vadot			};
104f126890aSEmmanuel Vadot			dtf {
105f126890aSEmmanuel Vadot				nvidia,pins = "dtf";
106f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
107f126890aSEmmanuel Vadot			};
108f126890aSEmmanuel Vadot			gpu {
109f126890aSEmmanuel Vadot				nvidia,pins = "gpu", "sdb", "sdd";
110f126890aSEmmanuel Vadot				nvidia,function = "pwm";
111f126890aSEmmanuel Vadot			};
112f126890aSEmmanuel Vadot			gpu7 {
113f126890aSEmmanuel Vadot				nvidia,pins = "gpu7";
114f126890aSEmmanuel Vadot				nvidia,function = "rtck";
115f126890aSEmmanuel Vadot			};
116f126890aSEmmanuel Vadot			gpv {
117f126890aSEmmanuel Vadot				nvidia,pins = "gpv", "slxa", "slxk";
118f126890aSEmmanuel Vadot				nvidia,function = "pcie";
119f126890aSEmmanuel Vadot			};
120f126890aSEmmanuel Vadot			hdint {
121f126890aSEmmanuel Vadot				nvidia,pins = "hdint", "pta";
122f126890aSEmmanuel Vadot				nvidia,function = "hdmi";
123f126890aSEmmanuel Vadot			};
124f126890aSEmmanuel Vadot			i2cp {
125f126890aSEmmanuel Vadot				nvidia,pins = "i2cp";
126f126890aSEmmanuel Vadot				nvidia,function = "i2cp";
127f126890aSEmmanuel Vadot			};
128f126890aSEmmanuel Vadot			irrx {
129f126890aSEmmanuel Vadot				nvidia,pins = "irrx", "irtx";
130f126890aSEmmanuel Vadot				nvidia,function = "uarta";
131f126890aSEmmanuel Vadot			};
132f126890aSEmmanuel Vadot			kbca {
133f126890aSEmmanuel Vadot				nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
134f126890aSEmmanuel Vadot				nvidia,function = "kbc";
135f126890aSEmmanuel Vadot			};
136f126890aSEmmanuel Vadot			kbcb {
137f126890aSEmmanuel Vadot				nvidia,pins = "kbcb", "kbcd";
138f126890aSEmmanuel Vadot				nvidia,function = "sdio2";
139f126890aSEmmanuel Vadot			};
140f126890aSEmmanuel Vadot			lcsn {
141f126890aSEmmanuel Vadot				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
142f126890aSEmmanuel Vadot					"ld3", "ld4", "ld5", "ld6", "ld7",
143f126890aSEmmanuel Vadot					"ld8", "ld9", "ld10", "ld11", "ld12",
144f126890aSEmmanuel Vadot					"ld13", "ld14", "ld15", "ld16", "ld17",
145f126890aSEmmanuel Vadot					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
146f126890aSEmmanuel Vadot					"lhs", "lm0", "lm1", "lpp", "lpw0",
147f126890aSEmmanuel Vadot					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
148f126890aSEmmanuel Vadot					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
149f126890aSEmmanuel Vadot					"lvs";
150f126890aSEmmanuel Vadot				nvidia,function = "displaya";
151f126890aSEmmanuel Vadot			};
152f126890aSEmmanuel Vadot			owc {
153f126890aSEmmanuel Vadot				nvidia,pins = "owc";
154f126890aSEmmanuel Vadot				nvidia,function = "owr";
155f126890aSEmmanuel Vadot			};
156f126890aSEmmanuel Vadot			pmc {
157f126890aSEmmanuel Vadot				nvidia,pins = "pmc";
158f126890aSEmmanuel Vadot				nvidia,function = "pwr_on";
159f126890aSEmmanuel Vadot			};
160f126890aSEmmanuel Vadot			rm {
161f126890aSEmmanuel Vadot				nvidia,pins = "rm";
162f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
163f126890aSEmmanuel Vadot			};
164f126890aSEmmanuel Vadot			sdc {
165f126890aSEmmanuel Vadot				nvidia,pins = "sdc";
166f126890aSEmmanuel Vadot				nvidia,function = "twc";
167f126890aSEmmanuel Vadot			};
168f126890aSEmmanuel Vadot			sdio1 {
169f126890aSEmmanuel Vadot				nvidia,pins = "sdio1";
170f126890aSEmmanuel Vadot				nvidia,function = "sdio1";
171f126890aSEmmanuel Vadot			};
172f126890aSEmmanuel Vadot			slxc {
173f126890aSEmmanuel Vadot				nvidia,pins = "slxc", "slxd";
174f126890aSEmmanuel Vadot				nvidia,function = "spi4";
175f126890aSEmmanuel Vadot			};
176f126890aSEmmanuel Vadot			spdi {
177f126890aSEmmanuel Vadot				nvidia,pins = "spdi", "spdo";
178f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
179f126890aSEmmanuel Vadot			};
180f126890aSEmmanuel Vadot			spif {
181f126890aSEmmanuel Vadot				nvidia,pins = "spif", "uac";
182f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
183f126890aSEmmanuel Vadot			};
184f126890aSEmmanuel Vadot			spig {
185f126890aSEmmanuel Vadot				nvidia,pins = "spig", "spih";
186f126890aSEmmanuel Vadot				nvidia,function = "spi2_alt";
187f126890aSEmmanuel Vadot			};
188f126890aSEmmanuel Vadot			uaa {
189f126890aSEmmanuel Vadot				nvidia,pins = "uaa", "uab", "uda";
190f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
191f126890aSEmmanuel Vadot			};
192f126890aSEmmanuel Vadot			uad {
193f126890aSEmmanuel Vadot				nvidia,pins = "uad";
194f126890aSEmmanuel Vadot				nvidia,function = "spdif";
195f126890aSEmmanuel Vadot			};
196f126890aSEmmanuel Vadot			uca {
197f126890aSEmmanuel Vadot				nvidia,pins = "uca", "ucb";
198f126890aSEmmanuel Vadot				nvidia,function = "uartc";
199f126890aSEmmanuel Vadot			};
200f126890aSEmmanuel Vadot			conf_ata {
201f126890aSEmmanuel Vadot				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
202f126890aSEmmanuel Vadot					"cdev1", "cdev2", "dap1", "dap2", "dtf",
203f126890aSEmmanuel Vadot					"gma", "gmb", "gmc", "gmd", "gme",
204f126890aSEmmanuel Vadot					"gpu", "gpu7", "gpv", "i2cp", "pta",
205f126890aSEmmanuel Vadot					"rm", "sdio1", "slxk", "spdo", "uac",
206f126890aSEmmanuel Vadot					"uda";
207f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
209f126890aSEmmanuel Vadot			};
210f126890aSEmmanuel Vadot			conf_ck32 {
211f126890aSEmmanuel Vadot				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
212f126890aSEmmanuel Vadot					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
213f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214f126890aSEmmanuel Vadot			};
215f126890aSEmmanuel Vadot			conf_crtp {
216f126890aSEmmanuel Vadot				nvidia,pins = "crtp", "dap3", "dap4", "dtb",
217f126890aSEmmanuel Vadot					"dtc", "dte", "slxa", "slxc", "slxd",
218f126890aSEmmanuel Vadot					"spdi";
219f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
221f126890aSEmmanuel Vadot			};
222f126890aSEmmanuel Vadot			conf_csus {
223f126890aSEmmanuel Vadot				nvidia,pins = "csus", "spia", "spib", "spid",
224f126890aSEmmanuel Vadot					"spif";
225f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
227f126890aSEmmanuel Vadot			};
228f126890aSEmmanuel Vadot			conf_ddc {
229f126890aSEmmanuel Vadot				nvidia,pins = "ddc", "irrx", "irtx", "kbca",
230f126890aSEmmanuel Vadot					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
231f126890aSEmmanuel Vadot					"spic", "spig", "uaa", "uab";
232f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
233f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
234f126890aSEmmanuel Vadot			};
235f126890aSEmmanuel Vadot			conf_dta {
236f126890aSEmmanuel Vadot				nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
237f126890aSEmmanuel Vadot					"spie", "spih", "uad", "uca", "ucb";
238f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
239f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
240f126890aSEmmanuel Vadot			};
241f126890aSEmmanuel Vadot			conf_hdint {
242f126890aSEmmanuel Vadot				nvidia,pins = "hdint", "ld0", "ld1", "ld2",
243f126890aSEmmanuel Vadot					"ld3", "ld4", "ld5", "ld6", "ld7",
244f126890aSEmmanuel Vadot					"ld8", "ld9", "ld10", "ld11", "ld12",
245f126890aSEmmanuel Vadot					"ld13", "ld14", "ld15", "ld16", "ld17",
246f126890aSEmmanuel Vadot					"ldc", "ldi", "lhs", "lsc0", "lspi",
247f126890aSEmmanuel Vadot					"lvs", "pmc";
248f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
249f126890aSEmmanuel Vadot			};
250f126890aSEmmanuel Vadot			conf_lc {
251f126890aSEmmanuel Vadot				nvidia,pins = "lc", "ls";
252f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
253f126890aSEmmanuel Vadot			};
254f126890aSEmmanuel Vadot			conf_lcsn {
255f126890aSEmmanuel Vadot				nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
256f126890aSEmmanuel Vadot					"lm0", "lm1", "lpp", "lpw0", "lpw1",
257f126890aSEmmanuel Vadot					"lpw2", "lsc1", "lsck", "lsda", "lsdi",
258f126890aSEmmanuel Vadot					"lvp0", "lvp1", "sdb";
259f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
260f126890aSEmmanuel Vadot			};
261f126890aSEmmanuel Vadot			conf_ld17_0 {
262f126890aSEmmanuel Vadot				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
263f126890aSEmmanuel Vadot					"ld23_22";
264f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
265f126890aSEmmanuel Vadot			};
266f126890aSEmmanuel Vadot		};
267f126890aSEmmanuel Vadot	};
268f126890aSEmmanuel Vadot
269f126890aSEmmanuel Vadot	spdif@70002400 {
270f126890aSEmmanuel Vadot		status = "okay";
271f126890aSEmmanuel Vadot
272f126890aSEmmanuel Vadot		nvidia,fixed-parent-rate;
273f126890aSEmmanuel Vadot	};
274f126890aSEmmanuel Vadot
275f126890aSEmmanuel Vadot	i2s@70002800 {
276f126890aSEmmanuel Vadot		status = "okay";
277f126890aSEmmanuel Vadot
278f126890aSEmmanuel Vadot		nvidia,fixed-parent-rate;
279f126890aSEmmanuel Vadot	};
280f126890aSEmmanuel Vadot
281f126890aSEmmanuel Vadot	serial@70006000 {
282aa1a8ff2SEmmanuel Vadot		/delete-property/ dmas;
283aa1a8ff2SEmmanuel Vadot		/delete-property/ dma-names;
284f126890aSEmmanuel Vadot		status = "okay";
285f126890aSEmmanuel Vadot	};
286f126890aSEmmanuel Vadot
287f126890aSEmmanuel Vadot	serial@70006200 {
288aa1a8ff2SEmmanuel Vadot		/delete-property/ dmas;
289aa1a8ff2SEmmanuel Vadot		/delete-property/ dma-names;
290f126890aSEmmanuel Vadot		status = "okay";
291f126890aSEmmanuel Vadot	};
292f126890aSEmmanuel Vadot
293f126890aSEmmanuel Vadot	pwm: pwm@7000a000 {
294f126890aSEmmanuel Vadot		status = "okay";
295f126890aSEmmanuel Vadot	};
296f126890aSEmmanuel Vadot
297f126890aSEmmanuel Vadot	lvds_ddc: i2c@7000c000 {
298f126890aSEmmanuel Vadot		status = "okay";
299f126890aSEmmanuel Vadot		clock-frequency = <400000>;
300f126890aSEmmanuel Vadot
301f126890aSEmmanuel Vadot		alc5632: alc5632@1e {
302f126890aSEmmanuel Vadot			compatible = "realtek,alc5632";
303f126890aSEmmanuel Vadot			reg = <0x1e>;
304f126890aSEmmanuel Vadot			gpio-controller;
305f126890aSEmmanuel Vadot			#gpio-cells = <2>;
306f126890aSEmmanuel Vadot		};
307f126890aSEmmanuel Vadot	};
308f126890aSEmmanuel Vadot
309f126890aSEmmanuel Vadot	hdmi_ddc: i2c@7000c400 {
310f126890aSEmmanuel Vadot		status = "okay";
311f126890aSEmmanuel Vadot		clock-frequency = <100000>;
312f126890aSEmmanuel Vadot	};
313f126890aSEmmanuel Vadot
314aa1a8ff2SEmmanuel Vadot	i2c@7000c500 {
315f126890aSEmmanuel Vadot		compatible = "nvidia,nvec";
316aa1a8ff2SEmmanuel Vadot
317aa1a8ff2SEmmanuel Vadot		/delete-property/ #address-cells;
318aa1a8ff2SEmmanuel Vadot		/delete-property/ #size-cells;
319aa1a8ff2SEmmanuel Vadot		/delete-property/ dmas;
320aa1a8ff2SEmmanuel Vadot		/delete-property/ dma-names;
321aa1a8ff2SEmmanuel Vadot
322f126890aSEmmanuel Vadot		clock-frequency = <80000>;
323f126890aSEmmanuel Vadot		request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
324f126890aSEmmanuel Vadot		slave-addr = <138>;
325aa1a8ff2SEmmanuel Vadot
326aa1a8ff2SEmmanuel Vadot		status = "okay";
327f126890aSEmmanuel Vadot	};
328f126890aSEmmanuel Vadot
329f126890aSEmmanuel Vadot	i2c@7000d000 {
330f126890aSEmmanuel Vadot		status = "okay";
331f126890aSEmmanuel Vadot		clock-frequency = <400000>;
332f126890aSEmmanuel Vadot
333f126890aSEmmanuel Vadot		pmic: tps6586x@34 {
334f126890aSEmmanuel Vadot			compatible = "ti,tps6586x";
335f126890aSEmmanuel Vadot			reg = <0x34>;
336f126890aSEmmanuel Vadot			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
337f126890aSEmmanuel Vadot
338f126890aSEmmanuel Vadot			#gpio-cells = <2>;
339f126890aSEmmanuel Vadot			gpio-controller;
340f126890aSEmmanuel Vadot
341f126890aSEmmanuel Vadot			sys-supply = <&p5valw_reg>;
342f126890aSEmmanuel Vadot			vin-sm0-supply = <&sys_reg>;
343f126890aSEmmanuel Vadot			vin-sm1-supply = <&sys_reg>;
344f126890aSEmmanuel Vadot			vin-sm2-supply = <&sys_reg>;
345f126890aSEmmanuel Vadot			vinldo01-supply = <&sm2_reg>;
346f126890aSEmmanuel Vadot			vinldo23-supply = <&sm2_reg>;
347f126890aSEmmanuel Vadot			vinldo4-supply = <&sm2_reg>;
348f126890aSEmmanuel Vadot			vinldo678-supply = <&sm2_reg>;
349f126890aSEmmanuel Vadot			vinldo9-supply = <&sm2_reg>;
350f126890aSEmmanuel Vadot
351f126890aSEmmanuel Vadot			regulators {
352f126890aSEmmanuel Vadot				sys_reg: sys {
353f126890aSEmmanuel Vadot					regulator-name = "vdd_sys";
354f126890aSEmmanuel Vadot					regulator-always-on;
355f126890aSEmmanuel Vadot				};
356f126890aSEmmanuel Vadot
357f126890aSEmmanuel Vadot				core_vdd_reg: sm0 {
358f126890aSEmmanuel Vadot					regulator-name = "+1.2vs_sm0,vdd_core";
359f126890aSEmmanuel Vadot					regulator-min-microvolt = <950000>;
360f126890aSEmmanuel Vadot					regulator-max-microvolt = <1300000>;
361f126890aSEmmanuel Vadot					regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>;
362f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <170000 550000>;
363f126890aSEmmanuel Vadot					regulator-always-on;
364f126890aSEmmanuel Vadot
365f126890aSEmmanuel Vadot					nvidia,tegra-core-regulator;
366f126890aSEmmanuel Vadot				};
367f126890aSEmmanuel Vadot
368f126890aSEmmanuel Vadot				cpu_vdd_reg: sm1 {
369f126890aSEmmanuel Vadot					regulator-name = "+1.0vs_sm1,vdd_cpu";
370f126890aSEmmanuel Vadot					regulator-min-microvolt = <750000>;
371f126890aSEmmanuel Vadot					regulator-max-microvolt = <1100000>;
372f126890aSEmmanuel Vadot					regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>;
373f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <550000 550000>;
374f126890aSEmmanuel Vadot					regulator-always-on;
375f126890aSEmmanuel Vadot
376f126890aSEmmanuel Vadot					nvidia,tegra-cpu-regulator;
377f126890aSEmmanuel Vadot				};
378f126890aSEmmanuel Vadot
379f126890aSEmmanuel Vadot				sm2_reg: sm2 {
380f126890aSEmmanuel Vadot					regulator-name = "+3.7vs_sm2,vin_ldo*";
381f126890aSEmmanuel Vadot					regulator-min-microvolt = <3700000>;
382f126890aSEmmanuel Vadot					regulator-max-microvolt = <3700000>;
383f126890aSEmmanuel Vadot					regulator-always-on;
384f126890aSEmmanuel Vadot				};
385f126890aSEmmanuel Vadot
386f126890aSEmmanuel Vadot				/* LDO0 is not connected to anything */
387f126890aSEmmanuel Vadot
388f126890aSEmmanuel Vadot				ldo1 {
389f126890aSEmmanuel Vadot					regulator-name = "+1.1vs_ldo1,avdd_pll*";
390f126890aSEmmanuel Vadot					regulator-min-microvolt = <1100000>;
391f126890aSEmmanuel Vadot					regulator-max-microvolt = <1100000>;
392f126890aSEmmanuel Vadot					regulator-always-on;
393f126890aSEmmanuel Vadot				};
394f126890aSEmmanuel Vadot
395f126890aSEmmanuel Vadot				rtc_vdd_reg: ldo2 {
396f126890aSEmmanuel Vadot					regulator-name = "+1.2vs_ldo2,vdd_rtc";
397f126890aSEmmanuel Vadot					regulator-min-microvolt = <950000>;
398f126890aSEmmanuel Vadot					regulator-max-microvolt = <1300000>;
399f126890aSEmmanuel Vadot					regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>;
400f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <170000 550000>;
401f126890aSEmmanuel Vadot					regulator-always-on;
402f126890aSEmmanuel Vadot
403f126890aSEmmanuel Vadot					nvidia,tegra-rtc-regulator;
404f126890aSEmmanuel Vadot				};
405f126890aSEmmanuel Vadot
406f126890aSEmmanuel Vadot				ldo3 {
407f126890aSEmmanuel Vadot					regulator-name = "+3.3vs_ldo3,avdd_usb*";
408f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
409f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
410f126890aSEmmanuel Vadot					regulator-always-on;
411f126890aSEmmanuel Vadot				};
412f126890aSEmmanuel Vadot
413f126890aSEmmanuel Vadot				ldo4 {
414f126890aSEmmanuel Vadot					regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
415f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
416f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
417f126890aSEmmanuel Vadot					regulator-always-on;
418f126890aSEmmanuel Vadot				};
419f126890aSEmmanuel Vadot
420f126890aSEmmanuel Vadot				ldo5 {
421f126890aSEmmanuel Vadot					regulator-name = "+2.85vs_ldo5,vcore_mmc";
422f126890aSEmmanuel Vadot					regulator-min-microvolt = <2850000>;
423f126890aSEmmanuel Vadot					regulator-max-microvolt = <2850000>;
424f126890aSEmmanuel Vadot					regulator-always-on;
425f126890aSEmmanuel Vadot				};
426f126890aSEmmanuel Vadot
427f126890aSEmmanuel Vadot				ldo6 {
428f126890aSEmmanuel Vadot					/*
429f126890aSEmmanuel Vadot					 * Research indicates this should be
430f126890aSEmmanuel Vadot					 * 1.8v; other boards that use this
431f126890aSEmmanuel Vadot					 * rail for the same purpose need it
432f126890aSEmmanuel Vadot					 * set to 1.8v. The schematic signal
433f126890aSEmmanuel Vadot					 * name is incorrect; perhaps copied
434f126890aSEmmanuel Vadot					 * from an incorrect NVIDIA reference.
435f126890aSEmmanuel Vadot					 */
436f126890aSEmmanuel Vadot					regulator-name = "+2.85vs_ldo6,avdd_vdac";
437f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
438f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
439f126890aSEmmanuel Vadot				};
440f126890aSEmmanuel Vadot
441f126890aSEmmanuel Vadot				hdmi_vdd_reg: ldo7 {
442f126890aSEmmanuel Vadot					regulator-name = "+3.3vs_ldo7,avdd_hdmi";
443f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
444f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
445f126890aSEmmanuel Vadot				};
446f126890aSEmmanuel Vadot
447f126890aSEmmanuel Vadot				hdmi_pll_reg: ldo8 {
448f126890aSEmmanuel Vadot					regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
449f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
450f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
451f126890aSEmmanuel Vadot				};
452f126890aSEmmanuel Vadot
453f126890aSEmmanuel Vadot				ldo9 {
454f126890aSEmmanuel Vadot					regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
455f126890aSEmmanuel Vadot					regulator-min-microvolt = <2850000>;
456f126890aSEmmanuel Vadot					regulator-max-microvolt = <2850000>;
457f126890aSEmmanuel Vadot					regulator-always-on;
458f126890aSEmmanuel Vadot				};
459f126890aSEmmanuel Vadot
460f126890aSEmmanuel Vadot				ldo_rtc {
461f126890aSEmmanuel Vadot					regulator-name = "+3.3vs_rtc";
462f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
463f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
464f126890aSEmmanuel Vadot					regulator-always-on;
465f126890aSEmmanuel Vadot				};
466f126890aSEmmanuel Vadot			};
467f126890aSEmmanuel Vadot		};
468f126890aSEmmanuel Vadot
469f126890aSEmmanuel Vadot		adt7461: temperature-sensor@4c {
470f126890aSEmmanuel Vadot			compatible = "adi,adt7461";
471f126890aSEmmanuel Vadot			reg = <0x4c>;
472f126890aSEmmanuel Vadot
473f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
474f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
475f126890aSEmmanuel Vadot
476f126890aSEmmanuel Vadot			#thermal-sensor-cells = <1>;
477f126890aSEmmanuel Vadot		};
478f126890aSEmmanuel Vadot	};
479f126890aSEmmanuel Vadot
480f126890aSEmmanuel Vadot	pmc@7000e400 {
481f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
482f126890aSEmmanuel Vadot		nvidia,suspend-mode = <1>;
483f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <2000>;
484f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <0>;
485f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <3845 3845>;
486f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <0>;
487f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
488f126890aSEmmanuel Vadot		core-supply = <&core_vdd_reg>;
489f126890aSEmmanuel Vadot	};
490f126890aSEmmanuel Vadot
491f126890aSEmmanuel Vadot	memory-controller@7000f400 {
492f126890aSEmmanuel Vadot		nvidia,use-ram-code;
493f126890aSEmmanuel Vadot
494f126890aSEmmanuel Vadot		emc-tables@0 {
495f126890aSEmmanuel Vadot			nvidia,ram-code = <0x0>;
496f126890aSEmmanuel Vadot			#address-cells = <1>;
497f126890aSEmmanuel Vadot			#size-cells = <0>;
498f126890aSEmmanuel Vadot			reg = <0>;
499f126890aSEmmanuel Vadot
500f126890aSEmmanuel Vadot			emc-table@166500 {
501f126890aSEmmanuel Vadot				reg = <166500>;
502f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
503f126890aSEmmanuel Vadot				clock-frequency = <166500>;
504f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x0000000a 0x00000016
505f126890aSEmmanuel Vadot					0x00000008 0x00000003 0x00000004 0x00000004
506f126890aSEmmanuel Vadot					0x00000002 0x0000000c 0x00000003 0x00000003
507f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000004 0x00000005
508f126890aSEmmanuel Vadot					0x00000004 0x00000009 0x0000000d 0x000004df
509f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
510f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x0000000a 0x000000c8
511f126890aSEmmanuel Vadot					0x00000003 0x00000006 0x00000004 0x00000008
512f126890aSEmmanuel Vadot					0x00000002 0x00000000 0x00000000 0x00000002
513f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000083 0xe03b0323
514f126890aSEmmanuel Vadot					0x007fe010 0x00001414 0x00000000 0x00000000
515f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
516f126890aSEmmanuel Vadot			};
517f126890aSEmmanuel Vadot
518f126890aSEmmanuel Vadot			emc-table@333000 {
519f126890aSEmmanuel Vadot				reg = <333000>;
520f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
521f126890aSEmmanuel Vadot				clock-frequency = <333000>;
522f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000018 0x00000033
523f126890aSEmmanuel Vadot					0x00000012 0x00000004 0x00000004 0x00000005
524f126890aSEmmanuel Vadot					0x00000003 0x0000000c 0x00000006 0x00000006
525f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000004 0x00000005
526f126890aSEmmanuel Vadot					0x00000004 0x00000009 0x0000000d 0x00000bff
527f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000006
528f126890aSEmmanuel Vadot					0x00000006 0x00000001 0x00000011 0x000000c8
529f126890aSEmmanuel Vadot					0x00000003 0x0000000e 0x00000007 0x00000008
530f126890aSEmmanuel Vadot					0x00000002 0x00000000 0x00000000 0x00000002
531f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000083 0xf0440303
532f126890aSEmmanuel Vadot					0x007fe010 0x00001414 0x00000000 0x00000000
533f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
534f126890aSEmmanuel Vadot			};
535f126890aSEmmanuel Vadot		};
536*7d0873ebSEmmanuel Vadot
537*7d0873ebSEmmanuel Vadot		emc-tables@1 {
538*7d0873ebSEmmanuel Vadot			nvidia,ram-code = <0x1>;
539*7d0873ebSEmmanuel Vadot			#address-cells = <1>;
540*7d0873ebSEmmanuel Vadot			#size-cells = <0>;
541*7d0873ebSEmmanuel Vadot			reg = <1>;
542*7d0873ebSEmmanuel Vadot
543*7d0873ebSEmmanuel Vadot			emc-table@166500 {
544*7d0873ebSEmmanuel Vadot				reg = <166500>;
545*7d0873ebSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
546*7d0873ebSEmmanuel Vadot				clock-frequency = <166500>;
547*7d0873ebSEmmanuel Vadot				nvidia,emc-registers = <0x0000000a 0x00000016
548*7d0873ebSEmmanuel Vadot					0x00000008 0x00000003 0x00000004 0x00000004
549*7d0873ebSEmmanuel Vadot					0x00000002 0x0000000c 0x00000003 0x00000003
550*7d0873ebSEmmanuel Vadot					0x00000002 0x00000001 0x00000004 0x00000005
551*7d0873ebSEmmanuel Vadot					0x00000004 0x00000009 0x0000000d 0x000004df
552*7d0873ebSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
553*7d0873ebSEmmanuel Vadot					0x00000003 0x00000001 0x0000000a 0x000000c8
554*7d0873ebSEmmanuel Vadot					0x00000003 0x00000006 0x00000004 0x00000008
555*7d0873ebSEmmanuel Vadot					0x00000002 0x00000000 0x00000000 0x00000002
556*7d0873ebSEmmanuel Vadot					0x00000000 0x00000000 0x00000083 0xe03b0323
557*7d0873ebSEmmanuel Vadot					0x007fe010 0x00001414 0x00000000 0x00000000
558*7d0873ebSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
559*7d0873ebSEmmanuel Vadot			};
560*7d0873ebSEmmanuel Vadot
561*7d0873ebSEmmanuel Vadot			emc-table@333000 {
562*7d0873ebSEmmanuel Vadot				reg = <333000>;
563*7d0873ebSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
564*7d0873ebSEmmanuel Vadot				clock-frequency = <333000>;
565*7d0873ebSEmmanuel Vadot				nvidia,emc-registers = <0x00000018 0x00000033
566*7d0873ebSEmmanuel Vadot					0x00000012 0x00000004 0x00000004 0x00000005
567*7d0873ebSEmmanuel Vadot					0x00000003 0x0000000c 0x00000006 0x00000006
568*7d0873ebSEmmanuel Vadot					0x00000003 0x00000001 0x00000004 0x00000005
569*7d0873ebSEmmanuel Vadot					0x00000004 0x00000009 0x0000000d 0x00000bff
570*7d0873ebSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000006
571*7d0873ebSEmmanuel Vadot					0x00000006 0x00000001 0x00000011 0x000000c8
572*7d0873ebSEmmanuel Vadot					0x00000003 0x0000000e 0x00000007 0x00000008
573*7d0873ebSEmmanuel Vadot					0x00000002 0x00000000 0x00000000 0x00000002
574*7d0873ebSEmmanuel Vadot					0x00000000 0x00000000 0x00000083 0xf0440303
575*7d0873ebSEmmanuel Vadot					0x007fe010 0x00001414 0x00000000 0x00000000
576*7d0873ebSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
577*7d0873ebSEmmanuel Vadot			};
578*7d0873ebSEmmanuel Vadot		};
579f126890aSEmmanuel Vadot	};
580f126890aSEmmanuel Vadot
581f126890aSEmmanuel Vadot	usb@c5000000 {
582f126890aSEmmanuel Vadot		compatible = "nvidia,tegra20-udc";
583f126890aSEmmanuel Vadot		status = "okay";
584f126890aSEmmanuel Vadot		dr_mode = "peripheral";
585f126890aSEmmanuel Vadot	};
586f126890aSEmmanuel Vadot
587f126890aSEmmanuel Vadot	usb-phy@c5000000 {
588f126890aSEmmanuel Vadot		status = "okay";
589f126890aSEmmanuel Vadot	};
590f126890aSEmmanuel Vadot
591f126890aSEmmanuel Vadot	usb@c5004000 {
592f126890aSEmmanuel Vadot		status = "okay";
593f126890aSEmmanuel Vadot	};
594f126890aSEmmanuel Vadot
595f126890aSEmmanuel Vadot	usb-phy@c5004000 {
596f126890aSEmmanuel Vadot		status = "okay";
597f126890aSEmmanuel Vadot		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
598f126890aSEmmanuel Vadot			GPIO_ACTIVE_LOW>;
599f126890aSEmmanuel Vadot	};
600f126890aSEmmanuel Vadot
601f126890aSEmmanuel Vadot	usb@c5008000 {
602f126890aSEmmanuel Vadot		status = "okay";
603f126890aSEmmanuel Vadot	};
604f126890aSEmmanuel Vadot
605f126890aSEmmanuel Vadot	usb-phy@c5008000 {
606f126890aSEmmanuel Vadot		status = "okay";
607f126890aSEmmanuel Vadot	};
608f126890aSEmmanuel Vadot
609f126890aSEmmanuel Vadot	sdmmc1: mmc@c8000000 {
610f126890aSEmmanuel Vadot		status = "okay";
611f126890aSEmmanuel Vadot		cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
612f126890aSEmmanuel Vadot		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
613f126890aSEmmanuel Vadot		power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
614f126890aSEmmanuel Vadot		bus-width = <4>;
615f126890aSEmmanuel Vadot	};
616f126890aSEmmanuel Vadot
617f126890aSEmmanuel Vadot	sdmmc4: mmc@c8000600 {
618f126890aSEmmanuel Vadot		status = "okay";
619f126890aSEmmanuel Vadot		bus-width = <8>;
620f126890aSEmmanuel Vadot		non-removable;
621f126890aSEmmanuel Vadot	};
622f126890aSEmmanuel Vadot
623f126890aSEmmanuel Vadot	backlight: backlight {
624f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
625f126890aSEmmanuel Vadot
626f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
627f126890aSEmmanuel Vadot		pwms = <&pwm 0 5000000>;
628f126890aSEmmanuel Vadot
629f126890aSEmmanuel Vadot		brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
630f126890aSEmmanuel Vadot		default-brightness-level = <10>;
631f126890aSEmmanuel Vadot
632f126890aSEmmanuel Vadot		/* close enough */
633f126890aSEmmanuel Vadot		power-supply = <&vdd_pnl_reg>;
634f126890aSEmmanuel Vadot	};
635f126890aSEmmanuel Vadot
636f126890aSEmmanuel Vadot	clk32k_in: clock-32k {
637f126890aSEmmanuel Vadot		compatible = "fixed-clock";
638f126890aSEmmanuel Vadot		clock-frequency = <32768>;
639f126890aSEmmanuel Vadot		#clock-cells = <0>;
640f126890aSEmmanuel Vadot	};
641f126890aSEmmanuel Vadot
642f126890aSEmmanuel Vadot	cpus {
643f126890aSEmmanuel Vadot		cpu0: cpu@0 {
644f126890aSEmmanuel Vadot			cpu-supply = <&cpu_vdd_reg>;
645f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
646f126890aSEmmanuel Vadot			#cooling-cells = <2>;
647f126890aSEmmanuel Vadot		};
648f126890aSEmmanuel Vadot
649f126890aSEmmanuel Vadot		cpu1: cpu@1 {
650f126890aSEmmanuel Vadot			cpu-supply = <&cpu_vdd_reg>;
651f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
652f126890aSEmmanuel Vadot			#cooling-cells = <2>;
653f126890aSEmmanuel Vadot		};
654f126890aSEmmanuel Vadot	};
655f126890aSEmmanuel Vadot
656f126890aSEmmanuel Vadot	gpio-keys {
657f126890aSEmmanuel Vadot		compatible = "gpio-keys";
658f126890aSEmmanuel Vadot
659f126890aSEmmanuel Vadot		key-wakeup {
660f126890aSEmmanuel Vadot			label = "Wakeup";
661f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
662f126890aSEmmanuel Vadot			linux,code = <KEY_WAKEUP>;
663f126890aSEmmanuel Vadot			wakeup-source;
664f126890aSEmmanuel Vadot		};
665f126890aSEmmanuel Vadot	};
666f126890aSEmmanuel Vadot
667f126890aSEmmanuel Vadot	gpio-leds {
668f126890aSEmmanuel Vadot		compatible = "gpio-leds";
669f126890aSEmmanuel Vadot
670f126890aSEmmanuel Vadot		led-0 {
671f126890aSEmmanuel Vadot			label = "wifi-led";
672f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
673f126890aSEmmanuel Vadot			linux,default-trigger = "rfkill0";
674f126890aSEmmanuel Vadot		};
675f126890aSEmmanuel Vadot	};
676f126890aSEmmanuel Vadot
677f126890aSEmmanuel Vadot	opp-table-emc {
678f126890aSEmmanuel Vadot		/delete-node/ opp-760000000;
679f126890aSEmmanuel Vadot	};
680f126890aSEmmanuel Vadot
681f126890aSEmmanuel Vadot	panel: panel {
682f126890aSEmmanuel Vadot		compatible = "samsung,ltn101nt05";
683f126890aSEmmanuel Vadot
684f126890aSEmmanuel Vadot		ddc-i2c-bus = <&lvds_ddc>;
685f126890aSEmmanuel Vadot		power-supply = <&vdd_pnl_reg>;
686f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
687f126890aSEmmanuel Vadot
688f126890aSEmmanuel Vadot		backlight = <&backlight>;
689f126890aSEmmanuel Vadot	};
690f126890aSEmmanuel Vadot
691f126890aSEmmanuel Vadot	p5valw_reg: regulator-5v0alw {
692f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
693f126890aSEmmanuel Vadot		regulator-name = "+5valw";
694f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
695f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
696f126890aSEmmanuel Vadot		regulator-always-on;
697f126890aSEmmanuel Vadot	};
698f126890aSEmmanuel Vadot
699f126890aSEmmanuel Vadot	vdd_pnl_reg: regulator-3v0 {
700f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
701f126890aSEmmanuel Vadot		regulator-name = "+3VS,vdd_pnl";
702f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
703f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
704f126890aSEmmanuel Vadot		regulator-boot-on;
705f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
706f126890aSEmmanuel Vadot		enable-active-high;
707f126890aSEmmanuel Vadot	};
708f126890aSEmmanuel Vadot
709f126890aSEmmanuel Vadot	sound {
710f126890aSEmmanuel Vadot		compatible = "nvidia,tegra-audio-alc5632-paz00",
711f126890aSEmmanuel Vadot			"nvidia,tegra-audio-alc5632";
712f126890aSEmmanuel Vadot
713f126890aSEmmanuel Vadot		nvidia,model = "Compal PAZ00";
714f126890aSEmmanuel Vadot
715f126890aSEmmanuel Vadot		nvidia,audio-routing =
716f126890aSEmmanuel Vadot			"Int Spk", "SPKOUT",
717f126890aSEmmanuel Vadot			"Int Spk", "SPKOUTN",
718f126890aSEmmanuel Vadot			"Headset Mic", "MICBIAS1",
719f126890aSEmmanuel Vadot			"MIC1", "Headset Mic",
720f126890aSEmmanuel Vadot			"Headset Stereophone", "HPR",
721f126890aSEmmanuel Vadot			"Headset Stereophone", "HPL",
722f126890aSEmmanuel Vadot			"DMICDAT", "Digital Mic";
723f126890aSEmmanuel Vadot
724f126890aSEmmanuel Vadot		nvidia,audio-codec = <&alc5632>;
725f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
726f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
727f126890aSEmmanuel Vadot			GPIO_ACTIVE_HIGH>;
728f126890aSEmmanuel Vadot
729f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
730f126890aSEmmanuel Vadot			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
731f126890aSEmmanuel Vadot			 <&tegra_car TEGRA20_CLK_CDEV1>;
732f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
733f126890aSEmmanuel Vadot	};
734f126890aSEmmanuel Vadot
735f126890aSEmmanuel Vadot	thermal-zones {
736f126890aSEmmanuel Vadot		cpu-thermal {
737f126890aSEmmanuel Vadot			polling-delay-passive = <500>; /* milliseconds */
738f126890aSEmmanuel Vadot			polling-delay = <1500>; /* milliseconds */
739f126890aSEmmanuel Vadot
740f126890aSEmmanuel Vadot			thermal-sensors = <&adt7461 1>;
741f126890aSEmmanuel Vadot
742f126890aSEmmanuel Vadot			trips {
743f126890aSEmmanuel Vadot				trip0: cpu-alert0 {
744f126890aSEmmanuel Vadot					/* start throttling at 80C */
745f126890aSEmmanuel Vadot					temperature = <80000>;
746f126890aSEmmanuel Vadot					hysteresis = <200>;
747f126890aSEmmanuel Vadot					type = "passive";
748f126890aSEmmanuel Vadot				};
749f126890aSEmmanuel Vadot
750f126890aSEmmanuel Vadot				trip1: cpu-crit {
751f126890aSEmmanuel Vadot					/* shut down at 85C */
752f126890aSEmmanuel Vadot					temperature = <85000>;
753f126890aSEmmanuel Vadot					hysteresis = <2000>;
754f126890aSEmmanuel Vadot					type = "critical";
755f126890aSEmmanuel Vadot				};
756f126890aSEmmanuel Vadot			};
757f126890aSEmmanuel Vadot
758f126890aSEmmanuel Vadot			cooling-maps {
759f126890aSEmmanuel Vadot				map0 {
760f126890aSEmmanuel Vadot					trip = <&trip0>;
761f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
762f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
763f126890aSEmmanuel Vadot				};
764f126890aSEmmanuel Vadot			};
765f126890aSEmmanuel Vadot		};
766f126890aSEmmanuel Vadot	};
767f126890aSEmmanuel Vadot};
768