xref: /freebsd-src/sys/contrib/device-tree/src/arm/nvidia/tegra20-acer-a500-picasso.dts (revision 84943d6f38e936ac3b7a3947ca26eeb27a39f938)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/dts-v1/;
3f126890aSEmmanuel Vadot
4f126890aSEmmanuel Vadot#include <dt-bindings/input/atmel-maxtouch.h>
5f126890aSEmmanuel Vadot#include <dt-bindings/input/gpio-keys.h>
6f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
7f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h>
8f126890aSEmmanuel Vadot
9f126890aSEmmanuel Vadot#include "tegra20.dtsi"
10f126890aSEmmanuel Vadot#include "tegra20-cpu-opp.dtsi"
11f126890aSEmmanuel Vadot#include "tegra20-cpu-opp-microvolt.dtsi"
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot/ {
14f126890aSEmmanuel Vadot	model = "Acer Iconia Tab A500";
15f126890aSEmmanuel Vadot	compatible = "acer,picasso", "nvidia,tegra20";
16f126890aSEmmanuel Vadot
17f126890aSEmmanuel Vadot	aliases {
18f126890aSEmmanuel Vadot		mmc0 = &sdmmc4; /* eMMC */
19f126890aSEmmanuel Vadot		mmc1 = &sdmmc3; /* MicroSD */
20f126890aSEmmanuel Vadot		mmc2 = &sdmmc1; /* WiFi */
21f126890aSEmmanuel Vadot
22f126890aSEmmanuel Vadot		rtc0 = &pmic;
23f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
24f126890aSEmmanuel Vadot
25f126890aSEmmanuel Vadot		serial0 = &uartd; /* Docking station */
26f126890aSEmmanuel Vadot		serial1 = &uartc; /* Bluetooth */
27f126890aSEmmanuel Vadot		serial2 = &uartb; /* GPS */
28f126890aSEmmanuel Vadot	};
29f126890aSEmmanuel Vadot
30f126890aSEmmanuel Vadot	/*
31f126890aSEmmanuel Vadot	 * The decompressor and also some bootloaders rely on a
32f126890aSEmmanuel Vadot	 * pre-existing /chosen node to be available to insert the
33f126890aSEmmanuel Vadot	 * command line and merge other ATAGS info.
34f126890aSEmmanuel Vadot	 */
35f126890aSEmmanuel Vadot	chosen {};
36f126890aSEmmanuel Vadot
37f126890aSEmmanuel Vadot	memory@0 {
38f126890aSEmmanuel Vadot		reg = <0x00000000 0x40000000>;
39f126890aSEmmanuel Vadot	};
40f126890aSEmmanuel Vadot
41f126890aSEmmanuel Vadot	reserved-memory {
42f126890aSEmmanuel Vadot		#address-cells = <1>;
43f126890aSEmmanuel Vadot		#size-cells = <1>;
44f126890aSEmmanuel Vadot		ranges;
45f126890aSEmmanuel Vadot
46f126890aSEmmanuel Vadot		ramoops@2ffe0000 {
47f126890aSEmmanuel Vadot			compatible = "ramoops";
48f126890aSEmmanuel Vadot			reg = <0x2ffe0000 0x10000>;	/* 64kB */
49f126890aSEmmanuel Vadot			console-size = <0x8000>;	/* 32kB */
50f126890aSEmmanuel Vadot			record-size = <0x400>;		/*  1kB */
51f126890aSEmmanuel Vadot			ecc-size = <16>;
52f126890aSEmmanuel Vadot		};
53f126890aSEmmanuel Vadot
54f126890aSEmmanuel Vadot		linux,cma@30000000 {
55f126890aSEmmanuel Vadot			compatible = "shared-dma-pool";
56f126890aSEmmanuel Vadot			alloc-ranges = <0x30000000 0x10000000>;
57f126890aSEmmanuel Vadot			size = <0x10000000>; /* 256MiB */
58f126890aSEmmanuel Vadot			linux,cma-default;
59f126890aSEmmanuel Vadot			reusable;
60f126890aSEmmanuel Vadot		};
61f126890aSEmmanuel Vadot	};
62f126890aSEmmanuel Vadot
63f126890aSEmmanuel Vadot	host1x@50000000 {
64f126890aSEmmanuel Vadot		dc@54200000 {
65f126890aSEmmanuel Vadot			rgb {
66f126890aSEmmanuel Vadot				status = "okay";
67f126890aSEmmanuel Vadot
68*84943d6fSEmmanuel Vadot				port {
69f126890aSEmmanuel Vadot					lcd_output: endpoint {
70f126890aSEmmanuel Vadot						remote-endpoint = <&lvds_encoder_input>;
71f126890aSEmmanuel Vadot						bus-width = <18>;
72f126890aSEmmanuel Vadot					};
73f126890aSEmmanuel Vadot				};
74f126890aSEmmanuel Vadot			};
75f126890aSEmmanuel Vadot		};
76f126890aSEmmanuel Vadot
77f126890aSEmmanuel Vadot		hdmi@54280000 {
78f126890aSEmmanuel Vadot			status = "okay";
79f126890aSEmmanuel Vadot
80f126890aSEmmanuel Vadot			vdd-supply = <&hdmi_vdd_reg>;
81f126890aSEmmanuel Vadot			pll-supply = <&hdmi_pll_reg>;
82f126890aSEmmanuel Vadot			hdmi-supply = <&vdd_5v0_sys>;
83f126890aSEmmanuel Vadot
84f126890aSEmmanuel Vadot			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
85f126890aSEmmanuel Vadot			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
86f126890aSEmmanuel Vadot				GPIO_ACTIVE_HIGH>;
87f126890aSEmmanuel Vadot		};
88f126890aSEmmanuel Vadot	};
89f126890aSEmmanuel Vadot
90f126890aSEmmanuel Vadot	pinmux@70000014 {
91f126890aSEmmanuel Vadot		pinctrl-names = "default";
92f126890aSEmmanuel Vadot		pinctrl-0 = <&state_default>;
93f126890aSEmmanuel Vadot
94f126890aSEmmanuel Vadot		state_default: pinmux {
95f126890aSEmmanuel Vadot			ata {
96f126890aSEmmanuel Vadot				nvidia,pins = "ata";
97f126890aSEmmanuel Vadot				nvidia,function = "ide";
98f126890aSEmmanuel Vadot			};
99f126890aSEmmanuel Vadot			atb {
100f126890aSEmmanuel Vadot				nvidia,pins = "atb", "gma", "gme";
101f126890aSEmmanuel Vadot				nvidia,function = "sdio4";
102f126890aSEmmanuel Vadot			};
103f126890aSEmmanuel Vadot			atc {
104f126890aSEmmanuel Vadot				nvidia,pins = "atc";
105f126890aSEmmanuel Vadot				nvidia,function = "nand";
106f126890aSEmmanuel Vadot			};
107f126890aSEmmanuel Vadot			atd {
108f126890aSEmmanuel Vadot				nvidia,pins = "atd", "ate", "gmb", "spia",
109f126890aSEmmanuel Vadot					"spib", "spic";
110f126890aSEmmanuel Vadot				nvidia,function = "gmi";
111f126890aSEmmanuel Vadot			};
112f126890aSEmmanuel Vadot			cdev1 {
113f126890aSEmmanuel Vadot				nvidia,pins = "cdev1";
114f126890aSEmmanuel Vadot				nvidia,function = "plla_out";
115f126890aSEmmanuel Vadot			};
116f126890aSEmmanuel Vadot			cdev2 {
117f126890aSEmmanuel Vadot				nvidia,pins = "cdev2";
118f126890aSEmmanuel Vadot				nvidia,function = "pllp_out4";
119f126890aSEmmanuel Vadot			};
120f126890aSEmmanuel Vadot			crtp {
121f126890aSEmmanuel Vadot				nvidia,pins = "crtp", "lm1";
122f126890aSEmmanuel Vadot				nvidia,function = "crt";
123f126890aSEmmanuel Vadot			};
124f126890aSEmmanuel Vadot			csus {
125f126890aSEmmanuel Vadot				nvidia,pins = "csus";
126f126890aSEmmanuel Vadot				nvidia,function = "vi_sensor_clk";
127f126890aSEmmanuel Vadot			};
128f126890aSEmmanuel Vadot			dap1 {
129f126890aSEmmanuel Vadot				nvidia,pins = "dap1";
130f126890aSEmmanuel Vadot				nvidia,function = "dap1";
131f126890aSEmmanuel Vadot			};
132f126890aSEmmanuel Vadot			dap2 {
133f126890aSEmmanuel Vadot				nvidia,pins = "dap2";
134f126890aSEmmanuel Vadot				nvidia,function = "dap2";
135f126890aSEmmanuel Vadot			};
136f126890aSEmmanuel Vadot			dap3 {
137f126890aSEmmanuel Vadot				nvidia,pins = "dap3";
138f126890aSEmmanuel Vadot				nvidia,function = "dap3";
139f126890aSEmmanuel Vadot			};
140f126890aSEmmanuel Vadot			dap4 {
141f126890aSEmmanuel Vadot				nvidia,pins = "dap4";
142f126890aSEmmanuel Vadot				nvidia,function = "dap4";
143f126890aSEmmanuel Vadot			};
144f126890aSEmmanuel Vadot			dta {
145f126890aSEmmanuel Vadot				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
146f126890aSEmmanuel Vadot				nvidia,function = "vi";
147f126890aSEmmanuel Vadot			};
148f126890aSEmmanuel Vadot			dtf {
149f126890aSEmmanuel Vadot				nvidia,pins = "dtf";
150f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
151f126890aSEmmanuel Vadot			};
152f126890aSEmmanuel Vadot			gmc {
153f126890aSEmmanuel Vadot				nvidia,pins = "gmc";
154f126890aSEmmanuel Vadot				nvidia,function = "uartd";
155f126890aSEmmanuel Vadot			};
156f126890aSEmmanuel Vadot			gmd {
157f126890aSEmmanuel Vadot				nvidia,pins = "gmd";
158f126890aSEmmanuel Vadot				nvidia,function = "sflash";
159f126890aSEmmanuel Vadot			};
160f126890aSEmmanuel Vadot			gpu {
161f126890aSEmmanuel Vadot				nvidia,pins = "gpu";
162f126890aSEmmanuel Vadot				nvidia,function = "pwm";
163f126890aSEmmanuel Vadot			};
164f126890aSEmmanuel Vadot			gpu7 {
165f126890aSEmmanuel Vadot				nvidia,pins = "gpu7";
166f126890aSEmmanuel Vadot				nvidia,function = "rtck";
167f126890aSEmmanuel Vadot			};
168f126890aSEmmanuel Vadot			gpv {
169f126890aSEmmanuel Vadot				nvidia,pins = "gpv", "slxa";
170f126890aSEmmanuel Vadot				nvidia,function = "pcie";
171f126890aSEmmanuel Vadot			};
172f126890aSEmmanuel Vadot			hdint {
173f126890aSEmmanuel Vadot				nvidia,pins = "hdint";
174f126890aSEmmanuel Vadot				nvidia,function = "hdmi";
175f126890aSEmmanuel Vadot			};
176f126890aSEmmanuel Vadot			i2cp {
177f126890aSEmmanuel Vadot				nvidia,pins = "i2cp";
178f126890aSEmmanuel Vadot				nvidia,function = "i2cp";
179f126890aSEmmanuel Vadot			};
180f126890aSEmmanuel Vadot			irrx {
181f126890aSEmmanuel Vadot				nvidia,pins = "irrx", "irtx";
182f126890aSEmmanuel Vadot				nvidia,function = "uartb";
183f126890aSEmmanuel Vadot			};
184f126890aSEmmanuel Vadot			kbca {
185f126890aSEmmanuel Vadot				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
186f126890aSEmmanuel Vadot					"kbce", "kbcf";
187f126890aSEmmanuel Vadot				nvidia,function = "kbc";
188f126890aSEmmanuel Vadot			};
189f126890aSEmmanuel Vadot			lcsn {
190f126890aSEmmanuel Vadot				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
191f126890aSEmmanuel Vadot					"lsdi", "lvp0";
192f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
193f126890aSEmmanuel Vadot			};
194f126890aSEmmanuel Vadot			ld0 {
195f126890aSEmmanuel Vadot				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
196f126890aSEmmanuel Vadot					"ld5", "ld6", "ld7", "ld8", "ld9",
197f126890aSEmmanuel Vadot					"ld10", "ld11", "ld12", "ld13", "ld14",
198f126890aSEmmanuel Vadot					"ld15", "ld16", "ld17", "ldi", "lhp0",
199f126890aSEmmanuel Vadot					"lhp1", "lhp2", "lhs", "lpp", "lsc0",
200f126890aSEmmanuel Vadot					"lsc1", "lsck", "lsda", "lspi", "lvp1",
201f126890aSEmmanuel Vadot					"lvs";
202f126890aSEmmanuel Vadot				nvidia,function = "displaya";
203f126890aSEmmanuel Vadot			};
204f126890aSEmmanuel Vadot			owc {
205f126890aSEmmanuel Vadot				nvidia,pins = "owc", "spdi", "spdo", "uac";
206f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
207f126890aSEmmanuel Vadot			};
208f126890aSEmmanuel Vadot			pmc {
209f126890aSEmmanuel Vadot				nvidia,pins = "pmc";
210f126890aSEmmanuel Vadot				nvidia,function = "pwr_on";
211f126890aSEmmanuel Vadot			};
212f126890aSEmmanuel Vadot			rm {
213f126890aSEmmanuel Vadot				nvidia,pins = "rm";
214f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
215f126890aSEmmanuel Vadot			};
216f126890aSEmmanuel Vadot			sdb {
217f126890aSEmmanuel Vadot				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
218f126890aSEmmanuel Vadot				nvidia,function = "sdio3";
219f126890aSEmmanuel Vadot			};
220f126890aSEmmanuel Vadot			sdio1 {
221f126890aSEmmanuel Vadot				nvidia,pins = "sdio1";
222f126890aSEmmanuel Vadot				nvidia,function = "sdio1";
223f126890aSEmmanuel Vadot			};
224f126890aSEmmanuel Vadot			slxd {
225f126890aSEmmanuel Vadot				nvidia,pins = "slxd";
226f126890aSEmmanuel Vadot				nvidia,function = "spdif";
227f126890aSEmmanuel Vadot			};
228f126890aSEmmanuel Vadot			spid {
229f126890aSEmmanuel Vadot				nvidia,pins = "spid", "spie", "spif";
230f126890aSEmmanuel Vadot				nvidia,function = "spi1";
231f126890aSEmmanuel Vadot			};
232f126890aSEmmanuel Vadot			spig {
233f126890aSEmmanuel Vadot				nvidia,pins = "spig", "spih";
234f126890aSEmmanuel Vadot				nvidia,function = "spi2_alt";
235f126890aSEmmanuel Vadot			};
236f126890aSEmmanuel Vadot			uaa {
237f126890aSEmmanuel Vadot				nvidia,pins = "uaa", "uab", "uda";
238f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
239f126890aSEmmanuel Vadot			};
240f126890aSEmmanuel Vadot			uad {
241f126890aSEmmanuel Vadot				nvidia,pins = "uad";
242f126890aSEmmanuel Vadot				nvidia,function = "irda";
243f126890aSEmmanuel Vadot			};
244f126890aSEmmanuel Vadot			uca {
245f126890aSEmmanuel Vadot				nvidia,pins = "uca", "ucb";
246f126890aSEmmanuel Vadot				nvidia,function = "uartc";
247f126890aSEmmanuel Vadot			};
248f126890aSEmmanuel Vadot			conf_ata {
249f126890aSEmmanuel Vadot				nvidia,pins = "ata", "atb", "atc", "atd",
250f126890aSEmmanuel Vadot					"cdev1", "cdev2", "csus", "dap1",
251f126890aSEmmanuel Vadot					"dap4", "dte", "dtf", "gma", "gmc",
252f126890aSEmmanuel Vadot					"gme", "gpu", "gpu7", "gpv", "i2cp",
253f126890aSEmmanuel Vadot					"irrx", "irtx", "pta", "rm",
254f126890aSEmmanuel Vadot					"sdc", "sdd", "slxc", "slxd", "slxk",
255f126890aSEmmanuel Vadot					"spdi", "spdo", "uac", "uad", "uda";
256f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
257f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
258f126890aSEmmanuel Vadot			};
259f126890aSEmmanuel Vadot			conf_ate {
260f126890aSEmmanuel Vadot				nvidia,pins = "ate", "dap2", "dap3",
261f126890aSEmmanuel Vadot					"gmd", "owc", "spia", "spib", "spic",
262f126890aSEmmanuel Vadot					"spid", "spie";
263f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
264f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
265f126890aSEmmanuel Vadot			};
266f126890aSEmmanuel Vadot			conf_ck32 {
267f126890aSEmmanuel Vadot				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
268f126890aSEmmanuel Vadot					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
269f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
270f126890aSEmmanuel Vadot			};
271f126890aSEmmanuel Vadot			conf_crtp {
272f126890aSEmmanuel Vadot				nvidia,pins = "crtp", "gmb", "slxa", "spig",
273f126890aSEmmanuel Vadot					"spih";
274f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
275f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
276f126890aSEmmanuel Vadot			};
277f126890aSEmmanuel Vadot			conf_dta {
278f126890aSEmmanuel Vadot				nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
279f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
280f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
281f126890aSEmmanuel Vadot			};
282f126890aSEmmanuel Vadot			conf_dte {
283f126890aSEmmanuel Vadot				nvidia,pins = "spif";
284f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
285f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
286f126890aSEmmanuel Vadot			};
287f126890aSEmmanuel Vadot			conf_hdint {
288f126890aSEmmanuel Vadot				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
289f126890aSEmmanuel Vadot					"lpw1", "lsck", "lsda", "lsdi",
290f126890aSEmmanuel Vadot					"lvp0";
291f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
292f126890aSEmmanuel Vadot			};
293f126890aSEmmanuel Vadot			conf_kbca {
294f126890aSEmmanuel Vadot				nvidia,pins = "kbca", "kbcc", "kbcd",
295f126890aSEmmanuel Vadot					"kbce", "kbcf", "sdio1", "uaa",
296f126890aSEmmanuel Vadot					"uab", "uca", "ucb";
297f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
298f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
299f126890aSEmmanuel Vadot			};
300f126890aSEmmanuel Vadot			conf_lc {
301f126890aSEmmanuel Vadot				nvidia,pins = "lc", "ls";
302f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
303f126890aSEmmanuel Vadot			};
304f126890aSEmmanuel Vadot			conf_ld0 {
305f126890aSEmmanuel Vadot				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
306f126890aSEmmanuel Vadot					"ld5", "ld6", "ld7", "ld8", "ld9",
307f126890aSEmmanuel Vadot					"ld10", "ld11", "ld12", "ld13", "ld14",
308f126890aSEmmanuel Vadot					"ld15", "ld16", "ld17", "ldi", "lhp0",
309f126890aSEmmanuel Vadot					"lhp1", "lhp2", "lhs", "lm0", "lpp",
310f126890aSEmmanuel Vadot					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
311f126890aSEmmanuel Vadot					"lvp1", "lvs", "pmc", "sdb";
312f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
313f126890aSEmmanuel Vadot			};
314f126890aSEmmanuel Vadot			conf_ld17_0 {
315f126890aSEmmanuel Vadot				nvidia,pins = "ld17_0";
316f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
317f126890aSEmmanuel Vadot			};
318f126890aSEmmanuel Vadot			drive_ddc {
319f126890aSEmmanuel Vadot				nvidia,pins = "drive_ddc",
320f126890aSEmmanuel Vadot						"drive_vi1",
321f126890aSEmmanuel Vadot						"drive_sdio1";
322f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <31>;
323f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <31>;
324f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
325f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
326f126890aSEmmanuel Vadot				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
327f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
328f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
329f126890aSEmmanuel Vadot			};
330f126890aSEmmanuel Vadot			drive_dbg {
331f126890aSEmmanuel Vadot				nvidia,pins = "drive_dbg",
332f126890aSEmmanuel Vadot						"drive_vi2",
333f126890aSEmmanuel Vadot						"drive_at1",
334f126890aSEmmanuel Vadot						"drive_ao1";
335f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <31>;
336f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <31>;
337f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
338f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
339f126890aSEmmanuel Vadot				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
340f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
341f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
342f126890aSEmmanuel Vadot			};
343f126890aSEmmanuel Vadot		};
344f126890aSEmmanuel Vadot
345f126890aSEmmanuel Vadot		state_i2cmux_ddc: pinmux-i2cmux-ddc {
346f126890aSEmmanuel Vadot			ddc {
347f126890aSEmmanuel Vadot				nvidia,pins = "ddc";
348f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
349f126890aSEmmanuel Vadot			};
350f126890aSEmmanuel Vadot
351f126890aSEmmanuel Vadot			pta {
352f126890aSEmmanuel Vadot				nvidia,pins = "pta";
353f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
354f126890aSEmmanuel Vadot			};
355f126890aSEmmanuel Vadot		};
356f126890aSEmmanuel Vadot
357f126890aSEmmanuel Vadot		state_i2cmux_idle: pinmux-i2cmux-idle {
358f126890aSEmmanuel Vadot			ddc {
359f126890aSEmmanuel Vadot				nvidia,pins = "ddc";
360f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
361f126890aSEmmanuel Vadot			};
362f126890aSEmmanuel Vadot
363f126890aSEmmanuel Vadot			pta {
364f126890aSEmmanuel Vadot				nvidia,pins = "pta";
365f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
366f126890aSEmmanuel Vadot			};
367f126890aSEmmanuel Vadot		};
368f126890aSEmmanuel Vadot
369f126890aSEmmanuel Vadot		state_i2cmux_pta: pinmux-i2cmux-pta {
370f126890aSEmmanuel Vadot			ddc {
371f126890aSEmmanuel Vadot				nvidia,pins = "ddc";
372f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
373f126890aSEmmanuel Vadot			};
374f126890aSEmmanuel Vadot
375f126890aSEmmanuel Vadot			pta {
376f126890aSEmmanuel Vadot				nvidia,pins = "pta";
377f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
378f126890aSEmmanuel Vadot			};
379f126890aSEmmanuel Vadot		};
380f126890aSEmmanuel Vadot	};
381f126890aSEmmanuel Vadot
382f126890aSEmmanuel Vadot	tegra_spdif: spdif@70002400 {
383f126890aSEmmanuel Vadot		status = "okay";
384f126890aSEmmanuel Vadot
385f126890aSEmmanuel Vadot		nvidia,fixed-parent-rate;
386f126890aSEmmanuel Vadot	};
387f126890aSEmmanuel Vadot
388f126890aSEmmanuel Vadot	tegra_i2s1: i2s@70002800 {
389f126890aSEmmanuel Vadot		status = "okay";
390f126890aSEmmanuel Vadot
391f126890aSEmmanuel Vadot		nvidia,fixed-parent-rate;
392f126890aSEmmanuel Vadot	};
393f126890aSEmmanuel Vadot
394f126890aSEmmanuel Vadot	uartb: serial@70006040 {
395f126890aSEmmanuel Vadot		compatible = "nvidia,tegra20-hsuart";
396aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
397f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
398f126890aSEmmanuel Vadot		/* GPS BCM4751 */
399f126890aSEmmanuel Vadot	};
400f126890aSEmmanuel Vadot
401f126890aSEmmanuel Vadot	uartc: serial@70006200 {
402f126890aSEmmanuel Vadot		compatible = "nvidia,tegra20-hsuart";
403aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
404f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
405f126890aSEmmanuel Vadot		status = "okay";
406f126890aSEmmanuel Vadot
407f126890aSEmmanuel Vadot		/* Azurewave AW-NH665 BCM4329B1 */
408f126890aSEmmanuel Vadot		bluetooth {
409f126890aSEmmanuel Vadot			compatible = "brcm,bcm4329-bt";
410f126890aSEmmanuel Vadot
411f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
412f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
413f126890aSEmmanuel Vadot			interrupt-names = "host-wakeup";
414f126890aSEmmanuel Vadot
415f126890aSEmmanuel Vadot			/* PLLP 216MHz / 16 / 4 */
416f126890aSEmmanuel Vadot			max-speed = <3375000>;
417f126890aSEmmanuel Vadot
418f126890aSEmmanuel Vadot			clocks = <&rtc_32k_wifi>;
419f126890aSEmmanuel Vadot			clock-names = "txco";
420f126890aSEmmanuel Vadot
421f126890aSEmmanuel Vadot			vbat-supply  = <&vdd_3v3_sys>;
422f126890aSEmmanuel Vadot			vddio-supply = <&vdd_1v8_sys>;
423f126890aSEmmanuel Vadot
424f126890aSEmmanuel Vadot			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
425f126890aSEmmanuel Vadot			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
426f126890aSEmmanuel Vadot		};
427f126890aSEmmanuel Vadot	};
428f126890aSEmmanuel Vadot
429f126890aSEmmanuel Vadot	uartd: serial@70006300 {
430f126890aSEmmanuel Vadot		/* Docking station */
431f126890aSEmmanuel Vadot	};
432f126890aSEmmanuel Vadot
433f126890aSEmmanuel Vadot	pwm: pwm@7000a000 {
434f126890aSEmmanuel Vadot		status = "okay";
435f126890aSEmmanuel Vadot	};
436f126890aSEmmanuel Vadot
437f126890aSEmmanuel Vadot	i2c@7000c000 {
438f126890aSEmmanuel Vadot		clock-frequency = <400000>;
439f126890aSEmmanuel Vadot		status = "okay";
440f126890aSEmmanuel Vadot
441f126890aSEmmanuel Vadot		wm8903: audio-codec@1a {
442f126890aSEmmanuel Vadot			compatible = "wlf,wm8903";
443f126890aSEmmanuel Vadot			reg = <0x1a>;
444f126890aSEmmanuel Vadot
445f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
446f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
447f126890aSEmmanuel Vadot
448f126890aSEmmanuel Vadot			gpio-controller;
449f126890aSEmmanuel Vadot			#gpio-cells = <2>;
450f126890aSEmmanuel Vadot
451f126890aSEmmanuel Vadot			micdet-cfg = <0>;
452f126890aSEmmanuel Vadot			micdet-delay = <100>;
453f126890aSEmmanuel Vadot
454f126890aSEmmanuel Vadot			gpio-cfg = <
455f126890aSEmmanuel Vadot				0x0000 /* MIC_LR_OUT#    GPIO, output, low */
456f126890aSEmmanuel Vadot				0x0000 /* FM2018-enable  GPIO, output, low */
457f126890aSEmmanuel Vadot				0x0000 /* Speaker-enable GPIO, output, low */
458f126890aSEmmanuel Vadot				0x0200 /* Interrupt, output */
459f126890aSEmmanuel Vadot				0x01a0 /* BCLK, input, active high */
460f126890aSEmmanuel Vadot			>;
461f126890aSEmmanuel Vadot
462f126890aSEmmanuel Vadot			AVDD-supply  = <&vdd_1v8_sys>;
463f126890aSEmmanuel Vadot			CPVDD-supply = <&vdd_1v8_sys>;
464f126890aSEmmanuel Vadot			DBVDD-supply = <&vdd_1v8_sys>;
465f126890aSEmmanuel Vadot			DCVDD-supply = <&vdd_1v8_sys>;
466f126890aSEmmanuel Vadot		};
467f126890aSEmmanuel Vadot
468f126890aSEmmanuel Vadot		touchscreen@4c {
469f126890aSEmmanuel Vadot			compatible = "atmel,maxtouch";
470f126890aSEmmanuel Vadot			reg = <0x4c>;
471f126890aSEmmanuel Vadot
472f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
473f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
474f126890aSEmmanuel Vadot
475f126890aSEmmanuel Vadot			reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
476f126890aSEmmanuel Vadot
477f126890aSEmmanuel Vadot			vdda-supply = <&vdd_3v3_sys>;
478f126890aSEmmanuel Vadot			vdd-supply  = <&vdd_3v3_sys>;
479f126890aSEmmanuel Vadot
480f126890aSEmmanuel Vadot			atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
481f126890aSEmmanuel Vadot		};
482f126890aSEmmanuel Vadot
483f126890aSEmmanuel Vadot		gyroscope@68 {
484f126890aSEmmanuel Vadot			compatible = "invensense,mpu3050";
485f126890aSEmmanuel Vadot			reg = <0x68>;
486f126890aSEmmanuel Vadot
487f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
488f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
489f126890aSEmmanuel Vadot
490f126890aSEmmanuel Vadot			vdd-supply    = <&vdd_3v3_sys>;
491f126890aSEmmanuel Vadot			vlogic-supply = <&vdd_1v8_sys>;
492f126890aSEmmanuel Vadot
493f126890aSEmmanuel Vadot			mount-matrix =	 "0",  "1",  "0",
494f126890aSEmmanuel Vadot					 "1",  "0",  "0",
495f126890aSEmmanuel Vadot					 "0",  "0", "-1";
496f126890aSEmmanuel Vadot
497f126890aSEmmanuel Vadot			i2c-gate {
498f126890aSEmmanuel Vadot				#address-cells = <1>;
499f126890aSEmmanuel Vadot				#size-cells = <0>;
500f126890aSEmmanuel Vadot
501f126890aSEmmanuel Vadot				accelerometer@f {
502f126890aSEmmanuel Vadot					compatible = "kionix,kxtf9";
503f126890aSEmmanuel Vadot					reg = <0x0f>;
504f126890aSEmmanuel Vadot
505f126890aSEmmanuel Vadot					interrupt-parent = <&gpio>;
506f126890aSEmmanuel Vadot					interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
507f126890aSEmmanuel Vadot
508f126890aSEmmanuel Vadot					vdd-supply   = <&vdd_1v8_sys>;
509f126890aSEmmanuel Vadot					vddio-supply = <&vdd_1v8_sys>;
510f126890aSEmmanuel Vadot
511f126890aSEmmanuel Vadot					mount-matrix =	 "0",  "1",  "0",
512f126890aSEmmanuel Vadot							 "1",  "0",  "0",
513f126890aSEmmanuel Vadot							 "0",  "0", "-1";
514f126890aSEmmanuel Vadot				};
515f126890aSEmmanuel Vadot			};
516f126890aSEmmanuel Vadot		};
517f126890aSEmmanuel Vadot	};
518f126890aSEmmanuel Vadot
519f126890aSEmmanuel Vadot	i2c@7000c400 {
520f126890aSEmmanuel Vadot		clock-frequency = <10000>;
521f126890aSEmmanuel Vadot		status = "okay";
522f126890aSEmmanuel Vadot	};
523f126890aSEmmanuel Vadot
524f126890aSEmmanuel Vadot	i2c@7000d000 {
525f126890aSEmmanuel Vadot		clock-frequency = <100000>;
526f126890aSEmmanuel Vadot		status = "okay";
527f126890aSEmmanuel Vadot
528f126890aSEmmanuel Vadot		magnetometer@c {
529f126890aSEmmanuel Vadot			compatible = "asahi-kasei,ak8975";
530f126890aSEmmanuel Vadot			reg = <0x0c>;
531f126890aSEmmanuel Vadot
532f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
533f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
534f126890aSEmmanuel Vadot
535f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_sys>;
536f126890aSEmmanuel Vadot			vid-supply = <&vdd_1v8_sys>;
537f126890aSEmmanuel Vadot
538f126890aSEmmanuel Vadot			mount-matrix =	"1",  "0",  "0",
539f126890aSEmmanuel Vadot					"0", "-1",  "0",
540f126890aSEmmanuel Vadot					"0",  "0", "-1";
541f126890aSEmmanuel Vadot		};
542f126890aSEmmanuel Vadot
543f126890aSEmmanuel Vadot		pmic: pmic@34 {
544f126890aSEmmanuel Vadot			compatible = "ti,tps6586x";
545f126890aSEmmanuel Vadot			reg = <0x34>;
546f126890aSEmmanuel Vadot
547f126890aSEmmanuel Vadot			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
548f126890aSEmmanuel Vadot
549f126890aSEmmanuel Vadot			#gpio-cells = <2>;
550f126890aSEmmanuel Vadot			gpio-controller;
551f126890aSEmmanuel Vadot
552f126890aSEmmanuel Vadot			sys-supply       = <&vdd_5v0_sys>;
553f126890aSEmmanuel Vadot			vin-sm0-supply   = <&sys_reg>;
554f126890aSEmmanuel Vadot			vin-sm1-supply   = <&sys_reg>;
555f126890aSEmmanuel Vadot			vin-sm2-supply   = <&sys_reg>;
556f126890aSEmmanuel Vadot			vinldo01-supply  = <&sm2_reg>;
557f126890aSEmmanuel Vadot			vinldo23-supply  = <&sm2_reg>;
558f126890aSEmmanuel Vadot			vinldo4-supply   = <&sm2_reg>;
559f126890aSEmmanuel Vadot			vinldo678-supply = <&sm2_reg>;
560f126890aSEmmanuel Vadot			vinldo9-supply   = <&sm2_reg>;
561f126890aSEmmanuel Vadot
562f126890aSEmmanuel Vadot			regulators {
563f126890aSEmmanuel Vadot				sys_reg: sys {
564f126890aSEmmanuel Vadot					regulator-name = "vdd_sys";
565f126890aSEmmanuel Vadot					regulator-always-on;
566f126890aSEmmanuel Vadot				};
567f126890aSEmmanuel Vadot
568f126890aSEmmanuel Vadot				vdd_core: sm0 {
569f126890aSEmmanuel Vadot					regulator-name = "vdd_sm0,vdd_core";
570f126890aSEmmanuel Vadot					regulator-min-microvolt = <950000>;
571f126890aSEmmanuel Vadot					regulator-max-microvolt = <1300000>;
572f126890aSEmmanuel Vadot					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
573f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <170000 550000>;
574f126890aSEmmanuel Vadot					regulator-always-on;
575f126890aSEmmanuel Vadot					regulator-boot-on;
576f126890aSEmmanuel Vadot
577f126890aSEmmanuel Vadot					nvidia,tegra-core-regulator;
578f126890aSEmmanuel Vadot				};
579f126890aSEmmanuel Vadot
580f126890aSEmmanuel Vadot				vdd_cpu: sm1 {
581f126890aSEmmanuel Vadot					regulator-name = "vdd_sm1,vdd_cpu";
582f126890aSEmmanuel Vadot					regulator-min-microvolt = <750000>;
583f126890aSEmmanuel Vadot					regulator-max-microvolt = <1125000>;
584f126890aSEmmanuel Vadot					regulator-coupled-with = <&vdd_core &rtc_vdd>;
585f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <550000 550000>;
586f126890aSEmmanuel Vadot					regulator-always-on;
587f126890aSEmmanuel Vadot					regulator-boot-on;
588f126890aSEmmanuel Vadot
589f126890aSEmmanuel Vadot					nvidia,tegra-cpu-regulator;
590f126890aSEmmanuel Vadot				};
591f126890aSEmmanuel Vadot
592f126890aSEmmanuel Vadot				sm2_reg: sm2 {
593f126890aSEmmanuel Vadot					regulator-name = "vdd_sm2,vin_ldo*";
594f126890aSEmmanuel Vadot					regulator-min-microvolt = <3700000>;
595f126890aSEmmanuel Vadot					regulator-max-microvolt = <3700000>;
596f126890aSEmmanuel Vadot					regulator-always-on;
597f126890aSEmmanuel Vadot				};
598f126890aSEmmanuel Vadot
599f126890aSEmmanuel Vadot				/* LDO0 is not connected to anything */
600f126890aSEmmanuel Vadot
601f126890aSEmmanuel Vadot				ldo1 {
602f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo1,avdd_pll*";
603f126890aSEmmanuel Vadot					regulator-min-microvolt = <1100000>;
604f126890aSEmmanuel Vadot					regulator-max-microvolt = <1100000>;
605f126890aSEmmanuel Vadot					regulator-always-on;
606f126890aSEmmanuel Vadot					regulator-boot-on;
607f126890aSEmmanuel Vadot				};
608f126890aSEmmanuel Vadot
609f126890aSEmmanuel Vadot				rtc_vdd: ldo2 {
610f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo2,vdd_rtc";
611f126890aSEmmanuel Vadot					regulator-min-microvolt = <950000>;
612f126890aSEmmanuel Vadot					regulator-max-microvolt = <1300000>;
613f126890aSEmmanuel Vadot					regulator-coupled-with = <&vdd_core &vdd_cpu>;
614f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <170000 550000>;
615f126890aSEmmanuel Vadot					regulator-always-on;
616f126890aSEmmanuel Vadot					regulator-boot-on;
617f126890aSEmmanuel Vadot
618f126890aSEmmanuel Vadot					nvidia,tegra-rtc-regulator;
619f126890aSEmmanuel Vadot				};
620f126890aSEmmanuel Vadot
621f126890aSEmmanuel Vadot				ldo3 {
622f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo3,avdd_usb*";
623f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
624f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
625f126890aSEmmanuel Vadot					regulator-always-on;
626f126890aSEmmanuel Vadot				};
627f126890aSEmmanuel Vadot
628f126890aSEmmanuel Vadot				ldo4 {
629f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
630f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
631f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
632f126890aSEmmanuel Vadot					regulator-always-on;
633f126890aSEmmanuel Vadot					regulator-boot-on;
634f126890aSEmmanuel Vadot				};
635f126890aSEmmanuel Vadot
636f126890aSEmmanuel Vadot				vcore_emmc: ldo5 {
637f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo5,vcore_mmc";
638f126890aSEmmanuel Vadot					regulator-min-microvolt = <2850000>;
639f126890aSEmmanuel Vadot					regulator-max-microvolt = <2850000>;
640f126890aSEmmanuel Vadot					regulator-always-on;
641f126890aSEmmanuel Vadot				};
642f126890aSEmmanuel Vadot
643f126890aSEmmanuel Vadot				avdd_vdac_reg: ldo6 {
644f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo6,avdd_vdac";
645f126890aSEmmanuel Vadot					regulator-min-microvolt = <2850000>;
646f126890aSEmmanuel Vadot					regulator-max-microvolt = <2850000>;
647f126890aSEmmanuel Vadot				};
648f126890aSEmmanuel Vadot
649f126890aSEmmanuel Vadot				hdmi_vdd_reg: ldo7 {
650f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo7,avdd_hdmi";
651f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
652f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
653f126890aSEmmanuel Vadot				};
654f126890aSEmmanuel Vadot
655f126890aSEmmanuel Vadot				hdmi_pll_reg: ldo8 {
656f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
657f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
658f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
659f126890aSEmmanuel Vadot				};
660f126890aSEmmanuel Vadot
661f126890aSEmmanuel Vadot				ldo9 {
662f126890aSEmmanuel Vadot					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
663f126890aSEmmanuel Vadot					regulator-min-microvolt = <2850000>;
664f126890aSEmmanuel Vadot					regulator-max-microvolt = <2850000>;
665f126890aSEmmanuel Vadot					regulator-always-on;
666f126890aSEmmanuel Vadot					regulator-boot-on;
667f126890aSEmmanuel Vadot				};
668f126890aSEmmanuel Vadot
669f126890aSEmmanuel Vadot				ldo_rtc {
670f126890aSEmmanuel Vadot					regulator-name = "vdd_rtc_out,vdd_cell";
671f126890aSEmmanuel Vadot					regulator-min-microvolt = <3300000>;
672f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
673f126890aSEmmanuel Vadot					regulator-always-on;
674f126890aSEmmanuel Vadot					regulator-boot-on;
675f126890aSEmmanuel Vadot				};
676f126890aSEmmanuel Vadot			};
677f126890aSEmmanuel Vadot		};
678f126890aSEmmanuel Vadot
679f126890aSEmmanuel Vadot		nct1008: temperature-sensor@4c {
680f126890aSEmmanuel Vadot			compatible = "onnn,nct1008";
681f126890aSEmmanuel Vadot			reg = <0x4c>;
682f126890aSEmmanuel Vadot			vcc-supply = <&vdd_3v3_sys>;
683f126890aSEmmanuel Vadot
684f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
685f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
686f126890aSEmmanuel Vadot
687f126890aSEmmanuel Vadot			#thermal-sensor-cells = <1>;
688f126890aSEmmanuel Vadot		};
689f126890aSEmmanuel Vadot	};
690f126890aSEmmanuel Vadot
691f126890aSEmmanuel Vadot	pmc@7000e400 {
692f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
693f126890aSEmmanuel Vadot		nvidia,suspend-mode = <1>;
694f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <2000>;
695f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <100>;
696f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <3845 3845>;
697f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <458>;
698f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
699f126890aSEmmanuel Vadot		core-supply = <&vdd_core>;
700f126890aSEmmanuel Vadot	};
701f126890aSEmmanuel Vadot
702f126890aSEmmanuel Vadot	memory-controller@7000f400 {
703f126890aSEmmanuel Vadot		nvidia,use-ram-code;
704f126890aSEmmanuel Vadot
705f126890aSEmmanuel Vadot		emc-tables@0 {
706f126890aSEmmanuel Vadot			nvidia,ram-code = <0>; /* elpida-8gb */
707f126890aSEmmanuel Vadot			reg = <0>;
708f126890aSEmmanuel Vadot
709f126890aSEmmanuel Vadot			#address-cells = <1>;
710f126890aSEmmanuel Vadot			#size-cells = <0>;
711f126890aSEmmanuel Vadot
712f126890aSEmmanuel Vadot			emc-table@25000 {
713f126890aSEmmanuel Vadot				reg = <25000>;
714f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
715f126890aSEmmanuel Vadot				clock-frequency = <25000>;
716f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000002 0x00000006
717f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
718f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
719f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000004
720f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000004d
721f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
722f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000004
723f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
724f126890aSEmmanuel Vadot					0x00000002 0x00000068 0x00000000 0x00000003
725f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
726f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000003
727f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
728f126890aSEmmanuel Vadot			};
729f126890aSEmmanuel Vadot
730f126890aSEmmanuel Vadot			emc-table@50000 {
731f126890aSEmmanuel Vadot				reg = <50000>;
732f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
733f126890aSEmmanuel Vadot				clock-frequency = <50000>;
734f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000003 0x00000007
735f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
736f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
737f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
738f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000009f
739f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
740f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000007
741f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
742f126890aSEmmanuel Vadot					0x00000002 0x000000d0 0x00000000 0x00000000
743f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
744f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000005
745f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
746f126890aSEmmanuel Vadot			};
747f126890aSEmmanuel Vadot
748f126890aSEmmanuel Vadot			emc-table@75000 {
749f126890aSEmmanuel Vadot				reg = <75000>;
750f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
751f126890aSEmmanuel Vadot				clock-frequency = <75000>;
752f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000005 0x0000000a
753f126890aSEmmanuel Vadot					0x00000004 0x00000003 0x00000006 0x00000004
754f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
755f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
756f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x000000ff
757f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
758f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x0000000b
759f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
760f126890aSEmmanuel Vadot					0x00000002 0x00000138 0x00000000 0x00000000
761f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
762f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000007
763f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
764f126890aSEmmanuel Vadot			};
765f126890aSEmmanuel Vadot
766f126890aSEmmanuel Vadot			emc-table@150000 {
767f126890aSEmmanuel Vadot				reg = <150000>;
768f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
769f126890aSEmmanuel Vadot				clock-frequency = <150000>;
770f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000009 0x00000014
771f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000006 0x00000004
772f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
773f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
774f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000021f
775f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
776f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000015
777f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
778f126890aSEmmanuel Vadot					0x00000002 0x00000270 0x00000000 0x00000001
779f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa07c04ae
780f126890aSEmmanuel Vadot					0x007dd510 0x00000000 0x00000000 0x0000000e
781f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
782f126890aSEmmanuel Vadot			};
783f126890aSEmmanuel Vadot
784f126890aSEmmanuel Vadot			emc-table@300000 {
785f126890aSEmmanuel Vadot				reg = <300000>;
786f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
787f126890aSEmmanuel Vadot				clock-frequency = <300000>;
788f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000012 0x00000027
789f126890aSEmmanuel Vadot					0x0000000d 0x00000006 0x00000007 0x00000005
790f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x00000006 0x00000006
791f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000002 0x00000006
792f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x0000000c 0x0000045f
793f126890aSEmmanuel Vadot					0x00000000 0x00000004 0x00000004 0x00000006
794f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000e 0x0000002a
795f126890aSEmmanuel Vadot					0x00000003 0x0000000f 0x00000007 0x00000005
796f126890aSEmmanuel Vadot					0x00000002 0x000004e1 0x00000005 0x00000002
797f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xe059048b
798f126890aSEmmanuel Vadot					0x007e1510 0x00000000 0x00000000 0x0000001b
799f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
800f126890aSEmmanuel Vadot			};
801f126890aSEmmanuel Vadot		};
802f126890aSEmmanuel Vadot
803f126890aSEmmanuel Vadot		emc-tables@1 {
804f126890aSEmmanuel Vadot			nvidia,ram-code = <1>; /* elpida-4gb */
805f126890aSEmmanuel Vadot			reg = <1>;
806f126890aSEmmanuel Vadot
807f126890aSEmmanuel Vadot			#address-cells = <1>;
808f126890aSEmmanuel Vadot			#size-cells = <0>;
809f126890aSEmmanuel Vadot
810f126890aSEmmanuel Vadot			emc-table@25000 {
811f126890aSEmmanuel Vadot				reg = <25000>;
812f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
813f126890aSEmmanuel Vadot				clock-frequency = <25000>;
814f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000002 0x00000006
815f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
816f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
817f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000004
818f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000004d
819f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
820f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000004
821f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
822f126890aSEmmanuel Vadot					0x00000002 0x00000068 0x00000000 0x00000003
823f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
824f126890aSEmmanuel Vadot					0x0007c000 0x00000000 0x00000000 0x00000003
825f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
826f126890aSEmmanuel Vadot			};
827f126890aSEmmanuel Vadot
828f126890aSEmmanuel Vadot			emc-table@50000 {
829f126890aSEmmanuel Vadot				reg = <50000>;
830f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
831f126890aSEmmanuel Vadot				clock-frequency = <50000>;
832f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000003 0x00000007
833f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
834f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
835f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
836f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000009f
837f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
838f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000007
839f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
840f126890aSEmmanuel Vadot					0x00000002 0x000000d0 0x00000000 0x00000000
841f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
842f126890aSEmmanuel Vadot					0x0007c000 0x00000000 0x00000000 0x00000005
843f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
844f126890aSEmmanuel Vadot			};
845f126890aSEmmanuel Vadot
846f126890aSEmmanuel Vadot			emc-table@75000 {
847f126890aSEmmanuel Vadot				reg = <75000>;
848f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
849f126890aSEmmanuel Vadot				clock-frequency = <75000>;
850f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000005 0x0000000a
851f126890aSEmmanuel Vadot					0x00000004 0x00000003 0x00000006 0x00000004
852f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
853f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
854f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x000000ff
855f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
856f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x0000000b
857f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
858f126890aSEmmanuel Vadot					0x00000002 0x00000138 0x00000000 0x00000000
859f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
860f126890aSEmmanuel Vadot					0x0007c000 0x00000000 0x00000000 0x00000007
861f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
862f126890aSEmmanuel Vadot			};
863f126890aSEmmanuel Vadot
864f126890aSEmmanuel Vadot			emc-table@150000 {
865f126890aSEmmanuel Vadot				reg = <150000>;
866f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
867f126890aSEmmanuel Vadot				clock-frequency = <150000>;
868f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000009 0x00000014
869f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000006 0x00000004
870f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
871f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
872f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000021f
873f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
874f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000015
875f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
876f126890aSEmmanuel Vadot					0x00000002 0x00000270 0x00000000 0x00000001
877f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa07c04ae
878f126890aSEmmanuel Vadot					0x007e4010 0x00000000 0x00000000 0x0000000e
879f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
880f126890aSEmmanuel Vadot			};
881f126890aSEmmanuel Vadot
882f126890aSEmmanuel Vadot			emc-table@300000 {
883f126890aSEmmanuel Vadot				reg = <300000>;
884f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
885f126890aSEmmanuel Vadot				clock-frequency = <300000>;
886f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000012 0x00000027
887f126890aSEmmanuel Vadot					0x0000000d 0x00000006 0x00000007 0x00000005
888f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x00000006 0x00000006
889f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000002 0x00000006
890f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x0000000c 0x0000045f
891f126890aSEmmanuel Vadot					0x00000000 0x00000004 0x00000004 0x00000006
892f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000e 0x0000002a
893f126890aSEmmanuel Vadot					0x00000003 0x0000000f 0x00000007 0x00000005
894f126890aSEmmanuel Vadot					0x00000002 0x000004e1 0x00000005 0x00000002
895f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xe059048b
896f126890aSEmmanuel Vadot					0x007e0010 0x00000000 0x00000000 0x0000001b
897f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
898f126890aSEmmanuel Vadot			};
899f126890aSEmmanuel Vadot		};
900f126890aSEmmanuel Vadot
901f126890aSEmmanuel Vadot		emc-tables@2 {
902f126890aSEmmanuel Vadot			nvidia,ram-code = <2>; /* hynix-8gb */
903f126890aSEmmanuel Vadot			reg = <2>;
904f126890aSEmmanuel Vadot
905f126890aSEmmanuel Vadot			#address-cells = <1>;
906f126890aSEmmanuel Vadot			#size-cells = <0>;
907f126890aSEmmanuel Vadot
908f126890aSEmmanuel Vadot			emc-table@25000 {
909f126890aSEmmanuel Vadot				reg = <25000>;
910f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
911f126890aSEmmanuel Vadot				clock-frequency = <25000>;
912f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000002 0x00000006
913f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
914f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
915f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000004
916f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000004d
917f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
918f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000004
919f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
920f126890aSEmmanuel Vadot					0x00000002 0x00000068 0x00000000 0x00000003
921f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
922f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000003
923f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
924f126890aSEmmanuel Vadot			};
925f126890aSEmmanuel Vadot
926f126890aSEmmanuel Vadot			emc-table@50000 {
927f126890aSEmmanuel Vadot				reg = <50000>;
928f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
929f126890aSEmmanuel Vadot				clock-frequency = <50000>;
930f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000003 0x00000007
931f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
932f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
933f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
934f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000009f
935f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
936f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000007
937f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
938f126890aSEmmanuel Vadot					0x00000002 0x000000d0 0x00000000 0x00000000
939f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
940f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000005
941f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
942f126890aSEmmanuel Vadot			};
943f126890aSEmmanuel Vadot
944f126890aSEmmanuel Vadot			emc-table@75000 {
945f126890aSEmmanuel Vadot				reg = <75000>;
946f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
947f126890aSEmmanuel Vadot				clock-frequency = <75000>;
948f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000005 0x0000000a
949f126890aSEmmanuel Vadot					0x00000004 0x00000003 0x00000006 0x00000004
950f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
951f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
952f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x000000ff
953f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
954f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x0000000b
955f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
956f126890aSEmmanuel Vadot					0x00000002 0x00000138 0x00000000 0x00000000
957f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
958f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000007
959f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
960f126890aSEmmanuel Vadot			};
961f126890aSEmmanuel Vadot
962f126890aSEmmanuel Vadot			emc-table@150000 {
963f126890aSEmmanuel Vadot				reg = <150000>;
964f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
965f126890aSEmmanuel Vadot				clock-frequency = <150000>;
966f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000009 0x00000014
967f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000006 0x00000004
968f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
969f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
970f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000021f
971f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
972f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000015
973f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
974f126890aSEmmanuel Vadot					0x00000002 0x00000270 0x00000000 0x00000001
975f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa07c04ae
976f126890aSEmmanuel Vadot					0x007dd010 0x00000000 0x00000000 0x0000000e
977f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
978f126890aSEmmanuel Vadot			};
979f126890aSEmmanuel Vadot
980f126890aSEmmanuel Vadot			emc-table@300000 {
981f126890aSEmmanuel Vadot				reg = <300000>;
982f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
983f126890aSEmmanuel Vadot				clock-frequency = <300000>;
984f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000012 0x00000027
985f126890aSEmmanuel Vadot					0x0000000d 0x00000006 0x00000007 0x00000005
986f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x00000006 0x00000006
987f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000002 0x00000006
988f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x0000000c 0x0000045f
989f126890aSEmmanuel Vadot					0x00000000 0x00000004 0x00000004 0x00000006
990f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000e 0x0000002a
991f126890aSEmmanuel Vadot					0x00000003 0x0000000f 0x00000007 0x00000005
992f126890aSEmmanuel Vadot					0x00000002 0x000004e1 0x00000005 0x00000002
993f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xe059048b
994f126890aSEmmanuel Vadot					0x007e2010 0x00000000 0x00000000 0x0000001b
995f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
996f126890aSEmmanuel Vadot			};
997f126890aSEmmanuel Vadot		};
998f126890aSEmmanuel Vadot
999f126890aSEmmanuel Vadot		emc-tables@3 {
1000f126890aSEmmanuel Vadot			nvidia,ram-code = <3>; /* hynix-4gb */
1001f126890aSEmmanuel Vadot			reg = <3>;
1002f126890aSEmmanuel Vadot
1003f126890aSEmmanuel Vadot			#address-cells = <1>;
1004f126890aSEmmanuel Vadot			#size-cells = <0>;
1005f126890aSEmmanuel Vadot
1006f126890aSEmmanuel Vadot			emc-table@25000 {
1007f126890aSEmmanuel Vadot				reg = <25000>;
1008f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
1009f126890aSEmmanuel Vadot				clock-frequency = <25000>;
1010f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000002 0x00000006
1011f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
1012f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
1013f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000004
1014f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000004d
1015f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
1016f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000004
1017f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
1018f126890aSEmmanuel Vadot					0x00000002 0x00000068 0x00000000 0x00000003
1019f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1020f126890aSEmmanuel Vadot					0x0007c000 0x00000000 0x00000000 0x00000003
1021f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
1022f126890aSEmmanuel Vadot			};
1023f126890aSEmmanuel Vadot
1024f126890aSEmmanuel Vadot			emc-table@50000 {
1025f126890aSEmmanuel Vadot				reg = <50000>;
1026f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
1027f126890aSEmmanuel Vadot				clock-frequency = <50000>;
1028f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000003 0x00000007
1029f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000006 0x00000004
1030f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
1031f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
1032f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000009f
1033f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
1034f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000007
1035f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
1036f126890aSEmmanuel Vadot					0x00000002 0x000000d0 0x00000000 0x00000000
1037f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1038f126890aSEmmanuel Vadot					0x0007c000 0x00078000 0x00000000 0x00000005
1039f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
1040f126890aSEmmanuel Vadot			};
1041f126890aSEmmanuel Vadot
1042f126890aSEmmanuel Vadot			emc-table@75000 {
1043f126890aSEmmanuel Vadot				reg = <75000>;
1044f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
1045f126890aSEmmanuel Vadot				clock-frequency = <75000>;
1046f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000005 0x0000000a
1047f126890aSEmmanuel Vadot					0x00000004 0x00000003 0x00000006 0x00000004
1048f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
1049f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
1050f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x000000ff
1051f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
1052f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x0000000b
1053f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
1054f126890aSEmmanuel Vadot					0x00000002 0x00000138 0x00000000 0x00000000
1055f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa0ae04ae
1056f126890aSEmmanuel Vadot					0x0007c000 0x00000000 0x00000000 0x00000007
1057f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
1058f126890aSEmmanuel Vadot			};
1059f126890aSEmmanuel Vadot
1060f126890aSEmmanuel Vadot			emc-table@150000 {
1061f126890aSEmmanuel Vadot				reg = <150000>;
1062f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
1063f126890aSEmmanuel Vadot				clock-frequency = <150000>;
1064f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000009 0x00000014
1065f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000006 0x00000004
1066f126890aSEmmanuel Vadot					0x00000002 0x00000009 0x00000003 0x00000003
1067f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000002 0x00000005
1068f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x0000000b 0x0000021f
1069f126890aSEmmanuel Vadot					0x00000000 0x00000003 0x00000003 0x00000003
1070f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000a 0x00000015
1071f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000006
1072f126890aSEmmanuel Vadot					0x00000002 0x00000270 0x00000000 0x00000001
1073f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xa07c04ae
1074f126890aSEmmanuel Vadot					0x007e4010 0x00000000 0x00000000 0x0000000e
1075f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
1076f126890aSEmmanuel Vadot			};
1077f126890aSEmmanuel Vadot
1078f126890aSEmmanuel Vadot			emc-table@300000 {
1079f126890aSEmmanuel Vadot				reg = <300000>;
1080f126890aSEmmanuel Vadot				compatible = "nvidia,tegra20-emc-table";
1081f126890aSEmmanuel Vadot				clock-frequency = <300000>;
1082f126890aSEmmanuel Vadot				nvidia,emc-registers = <0x00000012 0x00000027
1083f126890aSEmmanuel Vadot					0x0000000d 0x00000006 0x00000007 0x00000005
1084f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x00000006 0x00000006
1085f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000002 0x00000006
1086f126890aSEmmanuel Vadot					0x00000003 0x00000009 0x0000000c 0x0000045f
1087f126890aSEmmanuel Vadot					0x00000000 0x00000004 0x00000004 0x00000006
1088f126890aSEmmanuel Vadot					0x00000008 0x00000001 0x0000000e 0x0000002a
1089f126890aSEmmanuel Vadot					0x00000003 0x0000000f 0x00000007 0x00000005
1090f126890aSEmmanuel Vadot					0x00000002 0x000004e1 0x00000005 0x00000002
1091f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000282 0xe059048b
1092f126890aSEmmanuel Vadot					0x007e0010 0x00000000 0x00000000 0x0000001b
1093f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000>;
1094f126890aSEmmanuel Vadot			};
1095f126890aSEmmanuel Vadot		};
1096f126890aSEmmanuel Vadot	};
1097f126890aSEmmanuel Vadot
1098f126890aSEmmanuel Vadot	usb@c5000000 {
1099f126890aSEmmanuel Vadot		compatible = "nvidia,tegra20-udc";
1100f126890aSEmmanuel Vadot		status = "okay";
1101f126890aSEmmanuel Vadot		dr_mode = "peripheral";
1102f126890aSEmmanuel Vadot	};
1103f126890aSEmmanuel Vadot
1104f126890aSEmmanuel Vadot	usb-phy@c5000000 {
1105f126890aSEmmanuel Vadot		status = "okay";
1106f126890aSEmmanuel Vadot		dr_mode = "peripheral";
1107f126890aSEmmanuel Vadot		nvidia,xcvr-setup-use-fuses;
1108f126890aSEmmanuel Vadot		nvidia,xcvr-lsfslew = <2>;
1109f126890aSEmmanuel Vadot		nvidia,xcvr-lsrslew = <2>;
1110f126890aSEmmanuel Vadot	};
1111f126890aSEmmanuel Vadot
1112f126890aSEmmanuel Vadot	usb@c5008000 {
1113f126890aSEmmanuel Vadot		status = "okay";
1114f126890aSEmmanuel Vadot	};
1115f126890aSEmmanuel Vadot
1116f126890aSEmmanuel Vadot	usb-phy@c5008000 {
1117f126890aSEmmanuel Vadot		status = "okay";
1118f126890aSEmmanuel Vadot		nvidia,xcvr-setup-use-fuses;
1119f126890aSEmmanuel Vadot		nvidia,xcvr-lsfslew = <2>;
1120f126890aSEmmanuel Vadot		nvidia,xcvr-lsrslew = <2>;
1121f126890aSEmmanuel Vadot		vbus-supply = <&vdd_5v0_sys>;
1122f126890aSEmmanuel Vadot	};
1123f126890aSEmmanuel Vadot
1124f126890aSEmmanuel Vadot	sdmmc1: mmc@c8000000 {
1125f126890aSEmmanuel Vadot		status = "okay";
1126f126890aSEmmanuel Vadot
1127f126890aSEmmanuel Vadot		#address-cells = <1>;
1128f126890aSEmmanuel Vadot		#size-cells = <0>;
1129f126890aSEmmanuel Vadot
1130f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
1131f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
1132f126890aSEmmanuel Vadot		assigned-clock-rates = <50000000>;
1133f126890aSEmmanuel Vadot
1134f126890aSEmmanuel Vadot		max-frequency = <50000000>;
1135f126890aSEmmanuel Vadot		keep-power-in-suspend;
1136f126890aSEmmanuel Vadot		bus-width = <4>;
1137f126890aSEmmanuel Vadot		non-removable;
1138f126890aSEmmanuel Vadot
1139f126890aSEmmanuel Vadot		mmc-pwrseq = <&brcm_wifi_pwrseq>;
1140f126890aSEmmanuel Vadot		vmmc-supply = <&vdd_3v3_sys>;
1141f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_1v8_sys>;
1142f126890aSEmmanuel Vadot
1143f126890aSEmmanuel Vadot		/* Azurewave AW-NH611 BCM4329 */
1144f126890aSEmmanuel Vadot		wifi@1 {
1145f126890aSEmmanuel Vadot			reg = <1>;
1146f126890aSEmmanuel Vadot			compatible = "brcm,bcm4329-fmac";
1147f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1148f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
1149f126890aSEmmanuel Vadot			interrupt-names = "host-wake";
1150f126890aSEmmanuel Vadot		};
1151f126890aSEmmanuel Vadot	};
1152f126890aSEmmanuel Vadot
1153f126890aSEmmanuel Vadot	sdmmc3: mmc@c8000400 {
1154f126890aSEmmanuel Vadot		status = "okay";
1155f126890aSEmmanuel Vadot		bus-width = <4>;
1156f126890aSEmmanuel Vadot		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1157f126890aSEmmanuel Vadot		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
1158f126890aSEmmanuel Vadot		vmmc-supply = <&vdd_3v3_sys>;
1159f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_3v3_sys>;
1160f126890aSEmmanuel Vadot	};
1161f126890aSEmmanuel Vadot
1162f126890aSEmmanuel Vadot	sdmmc4: mmc@c8000600 {
1163f126890aSEmmanuel Vadot		status = "okay";
1164f126890aSEmmanuel Vadot		bus-width = <8>;
1165f126890aSEmmanuel Vadot		vmmc-supply = <&vcore_emmc>;
1166f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_3v3_sys>;
1167f126890aSEmmanuel Vadot		non-removable;
1168f126890aSEmmanuel Vadot	};
1169f126890aSEmmanuel Vadot
1170f126890aSEmmanuel Vadot	mains: ac-adapter-detect {
1171f126890aSEmmanuel Vadot		compatible = "gpio-charger";
1172f126890aSEmmanuel Vadot		charger-type = "mains";
1173f126890aSEmmanuel Vadot		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
1174f126890aSEmmanuel Vadot	};
1175f126890aSEmmanuel Vadot
1176f126890aSEmmanuel Vadot	backlight: backlight {
1177f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
1178f126890aSEmmanuel Vadot
1179f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
1180f126890aSEmmanuel Vadot		power-supply = <&vdd_3v3_sys>;
1181f126890aSEmmanuel Vadot		pwms = <&pwm 2 41667>;
1182f126890aSEmmanuel Vadot
1183f126890aSEmmanuel Vadot		brightness-levels = <7 255>;
1184f126890aSEmmanuel Vadot		num-interpolated-steps = <248>;
1185f126890aSEmmanuel Vadot		default-brightness-level = <20>;
1186f126890aSEmmanuel Vadot	};
1187f126890aSEmmanuel Vadot
1188f126890aSEmmanuel Vadot	bat1010: battery-2s1p {
1189f126890aSEmmanuel Vadot		compatible = "simple-battery";
1190f126890aSEmmanuel Vadot		charge-full-design-microamp-hours = <3260000>;
1191f126890aSEmmanuel Vadot		energy-full-design-microwatt-hours = <24000000>;
1192f126890aSEmmanuel Vadot		operating-range-celsius = <0 40>;
1193f126890aSEmmanuel Vadot	};
1194f126890aSEmmanuel Vadot
1195f126890aSEmmanuel Vadot	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
1196f126890aSEmmanuel Vadot	clk32k_in: clock-32k-in {
1197f126890aSEmmanuel Vadot		compatible = "fixed-clock";
1198f126890aSEmmanuel Vadot		#clock-cells = <0>;
1199f126890aSEmmanuel Vadot		clock-frequency = <32768>;
1200f126890aSEmmanuel Vadot		clock-output-names = "tps658621-out32k";
1201f126890aSEmmanuel Vadot	};
1202f126890aSEmmanuel Vadot
1203f126890aSEmmanuel Vadot	/*
1204f126890aSEmmanuel Vadot	 * This standalone onboard fixed-clock always-ON 32KHz
1205f126890aSEmmanuel Vadot	 * oscillator is used as a reference clock-source by the
1206f126890aSEmmanuel Vadot	 * Azurewave WiFi/BT module.
1207f126890aSEmmanuel Vadot	 */
1208f126890aSEmmanuel Vadot	rtc_32k_wifi: clock-32k-wifi {
1209f126890aSEmmanuel Vadot		compatible = "fixed-clock";
1210f126890aSEmmanuel Vadot		#clock-cells = <0>;
1211f126890aSEmmanuel Vadot		clock-frequency = <32768>;
1212f126890aSEmmanuel Vadot		clock-output-names = "kk3270032";
1213f126890aSEmmanuel Vadot	};
1214f126890aSEmmanuel Vadot
1215f126890aSEmmanuel Vadot	cpus {
1216f126890aSEmmanuel Vadot		cpu0: cpu@0 {
1217f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1218f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1219f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1220f126890aSEmmanuel Vadot		};
1221f126890aSEmmanuel Vadot
1222f126890aSEmmanuel Vadot		cpu1: cpu@1 {
1223f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1224f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1225f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1226f126890aSEmmanuel Vadot		};
1227f126890aSEmmanuel Vadot	};
1228f126890aSEmmanuel Vadot
1229f126890aSEmmanuel Vadot	display-panel {
1230f126890aSEmmanuel Vadot		compatible = "auo,b101ew05", "panel-lvds";
1231f126890aSEmmanuel Vadot
1232f126890aSEmmanuel Vadot		ddc-i2c-bus = <&panel_ddc>;
1233f126890aSEmmanuel Vadot		power-supply = <&vdd_pnl>;
1234f126890aSEmmanuel Vadot		backlight = <&backlight>;
1235f126890aSEmmanuel Vadot
1236f126890aSEmmanuel Vadot		width-mm = <218>;
1237f126890aSEmmanuel Vadot		height-mm = <135>;
1238f126890aSEmmanuel Vadot
1239f126890aSEmmanuel Vadot		data-mapping = "jeida-18";
1240f126890aSEmmanuel Vadot
1241f126890aSEmmanuel Vadot		panel-timing {
1242f126890aSEmmanuel Vadot			clock-frequency = <71200000>;
1243f126890aSEmmanuel Vadot			hactive = <1280>;
1244f126890aSEmmanuel Vadot			vactive = <800>;
1245f126890aSEmmanuel Vadot			hfront-porch = <8>;
1246f126890aSEmmanuel Vadot			hback-porch = <18>;
1247f126890aSEmmanuel Vadot			hsync-len = <184>;
1248f126890aSEmmanuel Vadot			vsync-len = <3>;
1249f126890aSEmmanuel Vadot			vfront-porch = <4>;
1250f126890aSEmmanuel Vadot			vback-porch = <8>;
1251f126890aSEmmanuel Vadot		};
1252f126890aSEmmanuel Vadot
1253f126890aSEmmanuel Vadot		port {
1254f126890aSEmmanuel Vadot			panel_input: endpoint {
1255f126890aSEmmanuel Vadot				remote-endpoint = <&lvds_encoder_output>;
1256f126890aSEmmanuel Vadot			};
1257f126890aSEmmanuel Vadot		};
1258f126890aSEmmanuel Vadot	};
1259f126890aSEmmanuel Vadot
1260f126890aSEmmanuel Vadot	gpio-keys {
1261f126890aSEmmanuel Vadot		compatible = "gpio-keys";
1262f126890aSEmmanuel Vadot
1263f126890aSEmmanuel Vadot		key-power {
1264f126890aSEmmanuel Vadot			label = "Power";
1265f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
1266f126890aSEmmanuel Vadot			linux,code = <KEY_POWER>;
1267f126890aSEmmanuel Vadot			debounce-interval = <10>;
1268f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1269f126890aSEmmanuel Vadot			wakeup-source;
1270f126890aSEmmanuel Vadot		};
1271f126890aSEmmanuel Vadot
1272f126890aSEmmanuel Vadot		key-rotation-lock {
1273f126890aSEmmanuel Vadot			label = "Rotate-lock";
1274f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
1275f126890aSEmmanuel Vadot			linux,code = <SW_ROTATE_LOCK>;
1276f126890aSEmmanuel Vadot			linux,input-type = <EV_SW>;
1277f126890aSEmmanuel Vadot			debounce-interval = <10>;
1278f126890aSEmmanuel Vadot		};
1279f126890aSEmmanuel Vadot
1280f126890aSEmmanuel Vadot		key-volume-down {
1281f126890aSEmmanuel Vadot			label = "Volume Down";
1282f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
1283f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEDOWN>;
1284f126890aSEmmanuel Vadot			debounce-interval = <10>;
1285f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1286f126890aSEmmanuel Vadot			wakeup-source;
1287f126890aSEmmanuel Vadot		};
1288f126890aSEmmanuel Vadot
1289f126890aSEmmanuel Vadot		key-volume-up {
1290f126890aSEmmanuel Vadot			label = "Volume Up";
1291f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1292f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEUP>;
1293f126890aSEmmanuel Vadot			debounce-interval = <10>;
1294f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1295f126890aSEmmanuel Vadot			wakeup-source;
1296f126890aSEmmanuel Vadot		};
1297f126890aSEmmanuel Vadot	};
1298f126890aSEmmanuel Vadot
1299f126890aSEmmanuel Vadot	haptic-feedback {
1300f126890aSEmmanuel Vadot		compatible = "gpio-vibrator";
1301f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
1302f126890aSEmmanuel Vadot		vcc-supply = <&vdd_3v3_sys>;
1303f126890aSEmmanuel Vadot	};
1304f126890aSEmmanuel Vadot
1305f126890aSEmmanuel Vadot	i2cmux {
1306f126890aSEmmanuel Vadot		compatible = "i2c-mux-pinctrl";
1307f126890aSEmmanuel Vadot		#address-cells = <1>;
1308f126890aSEmmanuel Vadot		#size-cells = <0>;
1309f126890aSEmmanuel Vadot
1310f126890aSEmmanuel Vadot		i2c-parent = <&{/i2c@7000c400}>;
1311f126890aSEmmanuel Vadot
1312f126890aSEmmanuel Vadot		pinctrl-names = "ddc", "pta", "idle";
1313f126890aSEmmanuel Vadot		pinctrl-0 = <&state_i2cmux_ddc>;
1314f126890aSEmmanuel Vadot		pinctrl-1 = <&state_i2cmux_pta>;
1315f126890aSEmmanuel Vadot		pinctrl-2 = <&state_i2cmux_idle>;
1316f126890aSEmmanuel Vadot
1317f126890aSEmmanuel Vadot		hdmi_ddc: i2c@0 {
1318f126890aSEmmanuel Vadot			reg = <0>;
1319f126890aSEmmanuel Vadot			#address-cells = <1>;
1320f126890aSEmmanuel Vadot			#size-cells = <0>;
1321f126890aSEmmanuel Vadot		};
1322f126890aSEmmanuel Vadot
1323f126890aSEmmanuel Vadot		panel_ddc: i2c@1 {
1324f126890aSEmmanuel Vadot			reg = <1>;
1325f126890aSEmmanuel Vadot			#address-cells = <1>;
1326f126890aSEmmanuel Vadot			#size-cells = <0>;
1327f126890aSEmmanuel Vadot
1328f126890aSEmmanuel Vadot			embedded-controller@58 {
1329f126890aSEmmanuel Vadot				compatible = "acer,a500-iconia-ec", "ene,kb930";
1330f126890aSEmmanuel Vadot				reg = <0x58>;
1331f126890aSEmmanuel Vadot
1332f126890aSEmmanuel Vadot				system-power-controller;
1333f126890aSEmmanuel Vadot
1334f126890aSEmmanuel Vadot				monitored-battery = <&bat1010>;
1335f126890aSEmmanuel Vadot				power-supplies = <&mains>;
1336f126890aSEmmanuel Vadot			};
1337f126890aSEmmanuel Vadot		};
1338f126890aSEmmanuel Vadot	};
1339f126890aSEmmanuel Vadot
1340f126890aSEmmanuel Vadot	lvds-encoder {
1341f126890aSEmmanuel Vadot		compatible = "ti,sn75lvds83", "lvds-encoder";
1342f126890aSEmmanuel Vadot
1343f126890aSEmmanuel Vadot		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
1344f126890aSEmmanuel Vadot		power-supply = <&vdd_3v3_sys>;
1345f126890aSEmmanuel Vadot
1346f126890aSEmmanuel Vadot		ports {
1347f126890aSEmmanuel Vadot			#address-cells = <1>;
1348f126890aSEmmanuel Vadot			#size-cells = <0>;
1349f126890aSEmmanuel Vadot
1350f126890aSEmmanuel Vadot			port@0 {
1351f126890aSEmmanuel Vadot				reg = <0>;
1352f126890aSEmmanuel Vadot
1353f126890aSEmmanuel Vadot				lvds_encoder_input: endpoint {
1354f126890aSEmmanuel Vadot					remote-endpoint = <&lcd_output>;
1355f126890aSEmmanuel Vadot				};
1356f126890aSEmmanuel Vadot			};
1357f126890aSEmmanuel Vadot
1358f126890aSEmmanuel Vadot			port@1 {
1359f126890aSEmmanuel Vadot				reg = <1>;
1360f126890aSEmmanuel Vadot
1361f126890aSEmmanuel Vadot				lvds_encoder_output: endpoint {
1362f126890aSEmmanuel Vadot					remote-endpoint = <&panel_input>;
1363f126890aSEmmanuel Vadot				};
1364f126890aSEmmanuel Vadot			};
1365f126890aSEmmanuel Vadot		};
1366f126890aSEmmanuel Vadot	};
1367f126890aSEmmanuel Vadot
1368f126890aSEmmanuel Vadot	opp-table-emc {
1369f126890aSEmmanuel Vadot		/delete-node/ opp-666000000;
1370f126890aSEmmanuel Vadot		/delete-node/ opp-760000000;
1371f126890aSEmmanuel Vadot	};
1372f126890aSEmmanuel Vadot
1373f126890aSEmmanuel Vadot	vdd_5v0_sys: regulator-5v0 {
1374f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1375f126890aSEmmanuel Vadot		regulator-name = "vdd_5v0";
1376f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1377f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1378f126890aSEmmanuel Vadot		regulator-always-on;
1379f126890aSEmmanuel Vadot	};
1380f126890aSEmmanuel Vadot
1381f126890aSEmmanuel Vadot	vdd_3v3_sys: regulator-3v3 {
1382f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1383f126890aSEmmanuel Vadot		regulator-name = "vdd_3v3_vs";
1384f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1385f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1386f126890aSEmmanuel Vadot		regulator-always-on;
1387f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1388f126890aSEmmanuel Vadot	};
1389f126890aSEmmanuel Vadot
1390f126890aSEmmanuel Vadot	vdd_1v8_sys: regulator-1v8 {
1391f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1392f126890aSEmmanuel Vadot		regulator-name = "vdd_1v8_vs";
1393f126890aSEmmanuel Vadot		regulator-min-microvolt = <1800000>;
1394f126890aSEmmanuel Vadot		regulator-max-microvolt = <1800000>;
1395f126890aSEmmanuel Vadot		regulator-always-on;
1396f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1397f126890aSEmmanuel Vadot	};
1398f126890aSEmmanuel Vadot
1399f126890aSEmmanuel Vadot	vdd_pnl: regulator-panel {
1400f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1401f126890aSEmmanuel Vadot		regulator-name = "vdd_panel";
1402f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1403f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1404f126890aSEmmanuel Vadot		regulator-enable-ramp-delay = <300000>;
1405f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1406f126890aSEmmanuel Vadot		enable-active-high;
1407f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1408f126890aSEmmanuel Vadot	};
1409f126890aSEmmanuel Vadot
1410f126890aSEmmanuel Vadot	sound {
1411f126890aSEmmanuel Vadot		compatible = "nvidia,tegra-audio-wm8903-picasso",
1412f126890aSEmmanuel Vadot			     "nvidia,tegra-audio-wm8903";
1413f126890aSEmmanuel Vadot		nvidia,model = "Acer Iconia Tab A500 WM8903";
1414f126890aSEmmanuel Vadot
1415f126890aSEmmanuel Vadot		nvidia,audio-routing =
1416f126890aSEmmanuel Vadot			"Headphone Jack", "HPOUTR",
1417f126890aSEmmanuel Vadot			"Headphone Jack", "HPOUTL",
1418f126890aSEmmanuel Vadot			"Int Spk", "LINEOUTL",
1419f126890aSEmmanuel Vadot			"Int Spk", "LINEOUTR",
1420f126890aSEmmanuel Vadot			"Mic Jack", "MICBIAS",
1421f126890aSEmmanuel Vadot			"IN2L", "Mic Jack",
1422f126890aSEmmanuel Vadot			"IN2R", "Mic Jack",
1423f126890aSEmmanuel Vadot			"IN1L", "Int Mic",
1424f126890aSEmmanuel Vadot			"IN1R", "Int Mic";
1425f126890aSEmmanuel Vadot
1426f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
1427f126890aSEmmanuel Vadot		nvidia,audio-codec = <&wm8903>;
1428f126890aSEmmanuel Vadot
1429f126890aSEmmanuel Vadot		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1430f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1431f126890aSEmmanuel Vadot		nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
1432f126890aSEmmanuel Vadot		nvidia,headset;
1433f126890aSEmmanuel Vadot
1434f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1435f126890aSEmmanuel Vadot			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1436f126890aSEmmanuel Vadot			 <&tegra_car TEGRA20_CLK_CDEV1>;
1437f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
1438f126890aSEmmanuel Vadot	};
1439f126890aSEmmanuel Vadot
1440f126890aSEmmanuel Vadot	thermal-zones {
1441f126890aSEmmanuel Vadot		/*
1442f126890aSEmmanuel Vadot		 * NCT1008 has two sensors:
1443f126890aSEmmanuel Vadot		 *
1444f126890aSEmmanuel Vadot		 *	0: internal that monitors ambient/skin temperature
1445f126890aSEmmanuel Vadot		 *	1: external that is connected to the CPU's diode
1446f126890aSEmmanuel Vadot		 *
1447f126890aSEmmanuel Vadot		 * Ideally we should use userspace thermal governor,
1448f126890aSEmmanuel Vadot		 * but it's a much more complex solution.  The "skin"
1449f126890aSEmmanuel Vadot		 * zone is a simpler solution which prevents A500 from
1450f126890aSEmmanuel Vadot		 * getting too hot from a user's tactile perspective.
1451f126890aSEmmanuel Vadot		 * The CPU zone is intended to protect silicon from damage.
1452f126890aSEmmanuel Vadot		 */
1453f126890aSEmmanuel Vadot
1454f126890aSEmmanuel Vadot		skin-thermal {
1455f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
1456f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
1457f126890aSEmmanuel Vadot
1458f126890aSEmmanuel Vadot			thermal-sensors = <&nct1008 0>;
1459f126890aSEmmanuel Vadot
1460f126890aSEmmanuel Vadot			trips {
1461f126890aSEmmanuel Vadot				trip0: skin-alert {
1462f126890aSEmmanuel Vadot					/* start throttling at 60C */
1463f126890aSEmmanuel Vadot					temperature = <60000>;
1464f126890aSEmmanuel Vadot					hysteresis = <200>;
1465f126890aSEmmanuel Vadot					type = "passive";
1466f126890aSEmmanuel Vadot				};
1467f126890aSEmmanuel Vadot
1468f126890aSEmmanuel Vadot				trip1: skin-crit {
1469f126890aSEmmanuel Vadot					/* shut down at 70C */
1470f126890aSEmmanuel Vadot					temperature = <70000>;
1471f126890aSEmmanuel Vadot					hysteresis = <2000>;
1472f126890aSEmmanuel Vadot					type = "critical";
1473f126890aSEmmanuel Vadot				};
1474f126890aSEmmanuel Vadot			};
1475f126890aSEmmanuel Vadot
1476f126890aSEmmanuel Vadot			cooling-maps {
1477f126890aSEmmanuel Vadot				map0 {
1478f126890aSEmmanuel Vadot					trip = <&trip0>;
1479f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1480f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1481f126890aSEmmanuel Vadot				};
1482f126890aSEmmanuel Vadot			};
1483f126890aSEmmanuel Vadot		};
1484f126890aSEmmanuel Vadot
1485f126890aSEmmanuel Vadot		cpu-thermal {
1486f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
1487f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
1488f126890aSEmmanuel Vadot
1489f126890aSEmmanuel Vadot			thermal-sensors = <&nct1008 1>;
1490f126890aSEmmanuel Vadot
1491f126890aSEmmanuel Vadot			trips {
1492f126890aSEmmanuel Vadot				trip2: cpu-alert {
1493f126890aSEmmanuel Vadot					/* throttle at 85C until temperature drops to 84.8C */
1494f126890aSEmmanuel Vadot					temperature = <85000>;
1495f126890aSEmmanuel Vadot					hysteresis = <200>;
1496f126890aSEmmanuel Vadot					type = "passive";
1497f126890aSEmmanuel Vadot				};
1498f126890aSEmmanuel Vadot
1499f126890aSEmmanuel Vadot				trip3: cpu-crit {
1500f126890aSEmmanuel Vadot					/* shut down at 90C */
1501f126890aSEmmanuel Vadot					temperature = <90000>;
1502f126890aSEmmanuel Vadot					hysteresis = <2000>;
1503f126890aSEmmanuel Vadot					type = "critical";
1504f126890aSEmmanuel Vadot				};
1505f126890aSEmmanuel Vadot			};
1506f126890aSEmmanuel Vadot
1507f126890aSEmmanuel Vadot			cooling-maps {
1508f126890aSEmmanuel Vadot				map1 {
1509f126890aSEmmanuel Vadot					trip = <&trip2>;
1510f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1511f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1512f126890aSEmmanuel Vadot				};
1513f126890aSEmmanuel Vadot			};
1514f126890aSEmmanuel Vadot		};
1515f126890aSEmmanuel Vadot	};
1516f126890aSEmmanuel Vadot
1517f126890aSEmmanuel Vadot	brcm_wifi_pwrseq: wifi-pwrseq {
1518f126890aSEmmanuel Vadot		compatible = "mmc-pwrseq-simple";
1519f126890aSEmmanuel Vadot
1520f126890aSEmmanuel Vadot		clocks = <&rtc_32k_wifi>;
1521f126890aSEmmanuel Vadot		clock-names = "ext_clock";
1522f126890aSEmmanuel Vadot
1523f126890aSEmmanuel Vadot		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
1524f126890aSEmmanuel Vadot		post-power-on-delay-ms = <300>;
1525f126890aSEmmanuel Vadot		power-off-delay-us = <300>;
1526f126890aSEmmanuel Vadot	};
1527f126890aSEmmanuel Vadot};
1528