xref: /freebsd-src/sys/contrib/device-tree/src/arm/nvidia/tegra124-jetson-tk1.dts (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/dts-v1/;
3f126890aSEmmanuel Vadot
4f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
5f126890aSEmmanuel Vadot#include "tegra124.dtsi"
6f126890aSEmmanuel Vadot
7f126890aSEmmanuel Vadot#include "tegra124-jetson-tk1-emc.dtsi"
8f126890aSEmmanuel Vadot
9f126890aSEmmanuel Vadot/ {
10f126890aSEmmanuel Vadot	model = "NVIDIA Tegra124 Jetson TK1";
11f126890aSEmmanuel Vadot	compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot	aliases {
14f126890aSEmmanuel Vadot		rtc0 = "/i2c@7000d000/pmic@40";
15f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
16f126890aSEmmanuel Vadot
17f126890aSEmmanuel Vadot		/* This order keeps the mapping DB9 connector <-> ttyS0 */
18f126890aSEmmanuel Vadot		serial0 = &uartd;
19f126890aSEmmanuel Vadot		serial1 = &uarta;
20f126890aSEmmanuel Vadot		serial2 = &uartb;
21f126890aSEmmanuel Vadot	};
22f126890aSEmmanuel Vadot
23f126890aSEmmanuel Vadot	chosen {
24f126890aSEmmanuel Vadot		stdout-path = "serial0:115200n8";
25f126890aSEmmanuel Vadot	};
26f126890aSEmmanuel Vadot
27f126890aSEmmanuel Vadot	memory@80000000 {
28f126890aSEmmanuel Vadot		reg = <0x0 0x80000000 0x0 0x80000000>;
29f126890aSEmmanuel Vadot	};
30f126890aSEmmanuel Vadot
31f126890aSEmmanuel Vadot	pcie@1003000 {
32f126890aSEmmanuel Vadot		status = "okay";
33f126890aSEmmanuel Vadot
34f126890aSEmmanuel Vadot		avddio-pex-supply = <&vdd_1v05_run>;
35f126890aSEmmanuel Vadot		dvddio-pex-supply = <&vdd_1v05_run>;
36f126890aSEmmanuel Vadot		avdd-pex-pll-supply = <&vdd_1v05_run>;
37f126890aSEmmanuel Vadot		hvdd-pex-supply = <&vdd_3v3_lp0>;
38f126890aSEmmanuel Vadot		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
39f126890aSEmmanuel Vadot		vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
40f126890aSEmmanuel Vadot		avdd-pll-erefe-supply = <&avdd_1v05_run>;
41f126890aSEmmanuel Vadot
42f126890aSEmmanuel Vadot		/* Mini PCIe */
43f126890aSEmmanuel Vadot		pci@1,0 {
44f126890aSEmmanuel Vadot			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
45f126890aSEmmanuel Vadot			phy-names = "pcie-0";
46f126890aSEmmanuel Vadot			status = "okay";
47f126890aSEmmanuel Vadot		};
48f126890aSEmmanuel Vadot
49f126890aSEmmanuel Vadot		/* Gigabit Ethernet */
50f126890aSEmmanuel Vadot		pci@2,0 {
51f126890aSEmmanuel Vadot			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
52f126890aSEmmanuel Vadot			phy-names = "pcie-0";
53f126890aSEmmanuel Vadot			status = "okay";
54f126890aSEmmanuel Vadot		};
55f126890aSEmmanuel Vadot	};
56f126890aSEmmanuel Vadot
57f126890aSEmmanuel Vadot	host1x@50000000 {
58f126890aSEmmanuel Vadot		hdmi@54280000 {
59f126890aSEmmanuel Vadot			status = "okay";
60f126890aSEmmanuel Vadot
61f126890aSEmmanuel Vadot			hdmi-supply = <&vdd_5v0_hdmi>;
62f126890aSEmmanuel Vadot			pll-supply = <&vdd_hdmi_pll>;
63f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_hdmi>;
64f126890aSEmmanuel Vadot
65f126890aSEmmanuel Vadot			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
66f126890aSEmmanuel Vadot			nvidia,hpd-gpio =
67f126890aSEmmanuel Vadot				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
68f126890aSEmmanuel Vadot		};
69f126890aSEmmanuel Vadot	};
70f126890aSEmmanuel Vadot
71f126890aSEmmanuel Vadot	gpu@57000000 {
72f126890aSEmmanuel Vadot		/*
73f126890aSEmmanuel Vadot		 * Node left disabled on purpose - the bootloader will enable
74f126890aSEmmanuel Vadot		 * it after having set the VPR up
75f126890aSEmmanuel Vadot		 */
76f126890aSEmmanuel Vadot		vdd-supply = <&vdd_gpu>;
77f126890aSEmmanuel Vadot	};
78f126890aSEmmanuel Vadot
79f126890aSEmmanuel Vadot	pinmux: pinmux@70000868 {
80f126890aSEmmanuel Vadot		pinctrl-names = "boot";
81f126890aSEmmanuel Vadot		pinctrl-0 = <&state_boot>;
82f126890aSEmmanuel Vadot
83f126890aSEmmanuel Vadot		state_boot: pinmux {
84f126890aSEmmanuel Vadot			clk_32k_out_pa0 {
85f126890aSEmmanuel Vadot				nvidia,pins = "clk_32k_out_pa0";
86f126890aSEmmanuel Vadot				nvidia,function = "soc";
87f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
88f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
89f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
90f126890aSEmmanuel Vadot			};
91f126890aSEmmanuel Vadot			uart3_cts_n_pa1 {
92f126890aSEmmanuel Vadot				nvidia,pins = "uart3_cts_n_pa1";
93f126890aSEmmanuel Vadot				nvidia,function = "gmi";
94f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
95f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
96f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
97f126890aSEmmanuel Vadot			};
98f126890aSEmmanuel Vadot			dap2_fs_pa2 {
99f126890aSEmmanuel Vadot				nvidia,pins = "dap2_fs_pa2";
100f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
101f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
102f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
103f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
104f126890aSEmmanuel Vadot			};
105f126890aSEmmanuel Vadot			dap2_sclk_pa3 {
106f126890aSEmmanuel Vadot				nvidia,pins = "dap2_sclk_pa3";
107f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
108f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
109f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
110f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
111f126890aSEmmanuel Vadot			};
112f126890aSEmmanuel Vadot			dap2_din_pa4 {
113f126890aSEmmanuel Vadot				nvidia,pins = "dap2_din_pa4";
114f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
115f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
116f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
117f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
118f126890aSEmmanuel Vadot			};
119f126890aSEmmanuel Vadot			dap2_dout_pa5 {
120f126890aSEmmanuel Vadot				nvidia,pins = "dap2_dout_pa5";
121f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
122f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
124f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
125f126890aSEmmanuel Vadot			};
126f126890aSEmmanuel Vadot			sdmmc3_clk_pa6 {
127f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_pa6";
128f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
129f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
130f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
131f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
132f126890aSEmmanuel Vadot			};
133f126890aSEmmanuel Vadot			sdmmc3_cmd_pa7 {
134f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_cmd_pa7";
135f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
136f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
137f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
138f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
139f126890aSEmmanuel Vadot			};
140f126890aSEmmanuel Vadot			pb0 {
141f126890aSEmmanuel Vadot				nvidia,pins = "pb0";
142f126890aSEmmanuel Vadot				nvidia,function = "uartd";
143f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
144f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
145f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146f126890aSEmmanuel Vadot			};
147f126890aSEmmanuel Vadot			pb1 {
148f126890aSEmmanuel Vadot				nvidia,pins = "pb1";
149f126890aSEmmanuel Vadot				nvidia,function = "uartd";
150f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
151f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
152f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
153f126890aSEmmanuel Vadot			};
154f126890aSEmmanuel Vadot			sdmmc3_dat3_pb4 {
155f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat3_pb4";
156f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
157f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
158f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
159f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
160f126890aSEmmanuel Vadot			};
161f126890aSEmmanuel Vadot			sdmmc3_dat2_pb5 {
162f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat2_pb5";
163f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
164f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
165f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
166f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
167f126890aSEmmanuel Vadot			};
168f126890aSEmmanuel Vadot			sdmmc3_dat1_pb6 {
169f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat1_pb6";
170f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
171f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
172f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
173f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
174f126890aSEmmanuel Vadot			};
175f126890aSEmmanuel Vadot			sdmmc3_dat0_pb7 {
176f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat0_pb7";
177f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
178f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
179f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
180f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
181f126890aSEmmanuel Vadot			};
182f126890aSEmmanuel Vadot			uart3_rts_n_pc0 {
183f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rts_n_pc0";
184f126890aSEmmanuel Vadot				nvidia,function = "gmi";
185f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
186f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
187f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
188f126890aSEmmanuel Vadot			};
189f126890aSEmmanuel Vadot			uart2_txd_pc2 {
190f126890aSEmmanuel Vadot				nvidia,pins = "uart2_txd_pc2";
191f126890aSEmmanuel Vadot				nvidia,function = "irda";
192f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
193f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
194f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
195f126890aSEmmanuel Vadot			};
196f126890aSEmmanuel Vadot			uart2_rxd_pc3 {
197f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rxd_pc3";
198f126890aSEmmanuel Vadot				nvidia,function = "irda";
199f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
200f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
201f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
202f126890aSEmmanuel Vadot			};
203f126890aSEmmanuel Vadot			gen1_i2c_scl_pc4 {
204f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_scl_pc4";
205f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
206f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
207f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
208f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
209f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
210f126890aSEmmanuel Vadot			};
211f126890aSEmmanuel Vadot			gen1_i2c_sda_pc5 {
212f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_sda_pc5";
213f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
214f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
216f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
218f126890aSEmmanuel Vadot			};
219f126890aSEmmanuel Vadot			pc7 {
220f126890aSEmmanuel Vadot				nvidia,pins = "pc7";
221f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
222f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
223f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
224f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
225f126890aSEmmanuel Vadot			};
226f126890aSEmmanuel Vadot			pg0 {
227f126890aSEmmanuel Vadot				nvidia,pins = "pg0";
228f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
229f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
230f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
231f126890aSEmmanuel Vadot			};
232f126890aSEmmanuel Vadot			pg1 {
233f126890aSEmmanuel Vadot				nvidia,pins = "pg1";
234f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237f126890aSEmmanuel Vadot			};
238f126890aSEmmanuel Vadot			pg2 {
239f126890aSEmmanuel Vadot				nvidia,pins = "pg2";
240f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
241f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
242f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
243f126890aSEmmanuel Vadot			};
244f126890aSEmmanuel Vadot			pg3 {
245f126890aSEmmanuel Vadot				nvidia,pins = "pg3";
246f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
247f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
248f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
249f126890aSEmmanuel Vadot			};
250f126890aSEmmanuel Vadot			pg4 {
251f126890aSEmmanuel Vadot				nvidia,pins = "pg4";
252f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
254f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255f126890aSEmmanuel Vadot			};
256f126890aSEmmanuel Vadot			pg5 {
257f126890aSEmmanuel Vadot				nvidia,pins = "pg5";
258f126890aSEmmanuel Vadot				nvidia,function = "spi4";
259f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
261f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
262f126890aSEmmanuel Vadot			};
263f126890aSEmmanuel Vadot			pg6 {
264f126890aSEmmanuel Vadot				nvidia,pins = "pg6";
265f126890aSEmmanuel Vadot				nvidia,function = "spi4";
266f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
269f126890aSEmmanuel Vadot			};
270f126890aSEmmanuel Vadot			pg7 {
271f126890aSEmmanuel Vadot				nvidia,pins = "pg7";
272f126890aSEmmanuel Vadot				nvidia,function = "spi4";
273f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
275f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276f126890aSEmmanuel Vadot			};
277f126890aSEmmanuel Vadot			ph0 {
278f126890aSEmmanuel Vadot				nvidia,pins = "ph0";
279f126890aSEmmanuel Vadot				nvidia,function = "gmi";
280f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
281f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
282f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
283f126890aSEmmanuel Vadot			};
284f126890aSEmmanuel Vadot			ph1 {
285f126890aSEmmanuel Vadot				nvidia,pins = "ph1";
286f126890aSEmmanuel Vadot				nvidia,function = "pwm1";
287f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
289f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
290f126890aSEmmanuel Vadot			};
291f126890aSEmmanuel Vadot			ph2 {
292f126890aSEmmanuel Vadot				nvidia,pins = "ph2";
293f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296f126890aSEmmanuel Vadot			};
297f126890aSEmmanuel Vadot			ph3 {
298f126890aSEmmanuel Vadot				nvidia,pins = "ph3";
299f126890aSEmmanuel Vadot				nvidia,function = "gmi";
300f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
301f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
302f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303f126890aSEmmanuel Vadot			};
304f126890aSEmmanuel Vadot			ph4 {
305f126890aSEmmanuel Vadot				nvidia,pins = "ph4";
306f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
307f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
308f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
309f126890aSEmmanuel Vadot			};
310f126890aSEmmanuel Vadot			ph5 {
311f126890aSEmmanuel Vadot				nvidia,pins = "ph5";
312f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
313f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
314f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
315f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316f126890aSEmmanuel Vadot			};
317f126890aSEmmanuel Vadot			ph6 {
318f126890aSEmmanuel Vadot				nvidia,pins = "ph6";
319f126890aSEmmanuel Vadot				nvidia,function = "gmi";
320f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
321f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
322f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
323f126890aSEmmanuel Vadot			};
324f126890aSEmmanuel Vadot			ph7 {
325f126890aSEmmanuel Vadot				nvidia,pins = "ph7";
326f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
327f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
328f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329f126890aSEmmanuel Vadot			};
330f126890aSEmmanuel Vadot			pi0 {
331f126890aSEmmanuel Vadot				nvidia,pins = "pi0";
332f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
333f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
334f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
335f126890aSEmmanuel Vadot			};
336f126890aSEmmanuel Vadot			pi1 {
337f126890aSEmmanuel Vadot				nvidia,pins = "pi1";
338f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
339f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
340f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
341f126890aSEmmanuel Vadot			};
342f126890aSEmmanuel Vadot			pi2 {
343f126890aSEmmanuel Vadot				nvidia,pins = "pi2";
344f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
345f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
346f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
347f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348f126890aSEmmanuel Vadot			};
349f126890aSEmmanuel Vadot			pi3 {
350f126890aSEmmanuel Vadot				nvidia,pins = "pi3";
351f126890aSEmmanuel Vadot				nvidia,function = "spi4";
352f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
353f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
354f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
355f126890aSEmmanuel Vadot			};
356f126890aSEmmanuel Vadot			pi4 {
357f126890aSEmmanuel Vadot				nvidia,pins = "pi4";
358f126890aSEmmanuel Vadot				nvidia,function = "gmi";
359f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
360f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
361f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
362f126890aSEmmanuel Vadot			};
363f126890aSEmmanuel Vadot			pi5 {
364f126890aSEmmanuel Vadot				nvidia,pins = "pi5";
365f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
366f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
367f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
368f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
369f126890aSEmmanuel Vadot			};
370f126890aSEmmanuel Vadot			pi6 {
371f126890aSEmmanuel Vadot				nvidia,pins = "pi6";
372f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
374f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375f126890aSEmmanuel Vadot			};
376f126890aSEmmanuel Vadot			pi7 {
377f126890aSEmmanuel Vadot				nvidia,pins = "pi7";
378f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
379f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
380f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
381f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
382f126890aSEmmanuel Vadot			};
383f126890aSEmmanuel Vadot			pj0 {
384f126890aSEmmanuel Vadot				nvidia,pins = "pj0";
385f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
387f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388f126890aSEmmanuel Vadot			};
389f126890aSEmmanuel Vadot			pj2 {
390f126890aSEmmanuel Vadot				nvidia,pins = "pj2";
391f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
392f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
393f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
394f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395f126890aSEmmanuel Vadot			};
396f126890aSEmmanuel Vadot			uart2_cts_n_pj5 {
397f126890aSEmmanuel Vadot				nvidia,pins = "uart2_cts_n_pj5";
398f126890aSEmmanuel Vadot				nvidia,function = "uartb";
399f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
400f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
401f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402f126890aSEmmanuel Vadot			};
403f126890aSEmmanuel Vadot			uart2_rts_n_pj6 {
404f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rts_n_pj6";
405f126890aSEmmanuel Vadot				nvidia,function = "uartb";
406f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
408f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
409f126890aSEmmanuel Vadot			};
410f126890aSEmmanuel Vadot			pj7 {
411f126890aSEmmanuel Vadot				nvidia,pins = "pj7";
412f126890aSEmmanuel Vadot				nvidia,function = "uartd";
413f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
415f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416f126890aSEmmanuel Vadot			};
417f126890aSEmmanuel Vadot			pk0 {
418f126890aSEmmanuel Vadot				nvidia,pins = "pk0";
419f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
420f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
421f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
422f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423f126890aSEmmanuel Vadot			};
424f126890aSEmmanuel Vadot			pk1 {
425f126890aSEmmanuel Vadot				nvidia,pins = "pk1";
426f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
427f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
428f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
429f126890aSEmmanuel Vadot			};
430f126890aSEmmanuel Vadot			pk2 {
431f126890aSEmmanuel Vadot				nvidia,pins = "pk2";
432f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
433f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
434f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435f126890aSEmmanuel Vadot			};
436f126890aSEmmanuel Vadot			pk3 {
437f126890aSEmmanuel Vadot				nvidia,pins = "pk3";
438f126890aSEmmanuel Vadot				nvidia,function = "gmi";
439f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
440f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
441f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
442f126890aSEmmanuel Vadot			};
443f126890aSEmmanuel Vadot			pk4 {
444f126890aSEmmanuel Vadot				nvidia,pins = "pk4";
445f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
446f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
447f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
448f126890aSEmmanuel Vadot			};
449f126890aSEmmanuel Vadot			spdif_out_pk5 {
450f126890aSEmmanuel Vadot				nvidia,pins = "spdif_out_pk5";
451f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
452f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
453f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
454f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
455f126890aSEmmanuel Vadot			};
456f126890aSEmmanuel Vadot			spdif_in_pk6 {
457f126890aSEmmanuel Vadot				nvidia,pins = "spdif_in_pk6";
458f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
460f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
461f126890aSEmmanuel Vadot			};
462f126890aSEmmanuel Vadot			pk7 {
463f126890aSEmmanuel Vadot				nvidia,pins = "pk7";
464f126890aSEmmanuel Vadot				nvidia,function = "uartd";
465f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
467f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
468f126890aSEmmanuel Vadot			};
469f126890aSEmmanuel Vadot			dap1_fs_pn0 {
470f126890aSEmmanuel Vadot				nvidia,pins = "dap1_fs_pn0";
471f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
472f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
473f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
474f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475f126890aSEmmanuel Vadot			};
476f126890aSEmmanuel Vadot			dap1_din_pn1 {
477f126890aSEmmanuel Vadot				nvidia,pins = "dap1_din_pn1";
478f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
479f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
480f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
481f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
482f126890aSEmmanuel Vadot			};
483f126890aSEmmanuel Vadot			dap1_dout_pn2 {
484f126890aSEmmanuel Vadot				nvidia,pins = "dap1_dout_pn2";
485f126890aSEmmanuel Vadot				nvidia,function = "sata";
486f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
487f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
488f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
489f126890aSEmmanuel Vadot			};
490f126890aSEmmanuel Vadot			dap1_sclk_pn3 {
491f126890aSEmmanuel Vadot				nvidia,pins = "dap1_sclk_pn3";
492f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
493f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
494f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
495f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
496f126890aSEmmanuel Vadot			};
497f126890aSEmmanuel Vadot			usb_vbus_en0_pn4 {
498f126890aSEmmanuel Vadot				nvidia,pins = "usb_vbus_en0_pn4";
499f126890aSEmmanuel Vadot				nvidia,function = "usb";
500f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
501f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
502f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
503f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
504f126890aSEmmanuel Vadot			};
505f126890aSEmmanuel Vadot			usb_vbus_en1_pn5 {
506f126890aSEmmanuel Vadot				nvidia,pins = "usb_vbus_en1_pn5";
507f126890aSEmmanuel Vadot				nvidia,function = "usb";
508f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
509f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
510f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
511f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
512f126890aSEmmanuel Vadot			};
513f126890aSEmmanuel Vadot			hdmi_int_pn7 {
514f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_int_pn7";
515f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
516f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
517f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
518f126890aSEmmanuel Vadot				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
519f126890aSEmmanuel Vadot			};
520f126890aSEmmanuel Vadot			ulpi_data7_po0 {
521f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data7_po0";
522f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
523f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
524f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
525f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
526f126890aSEmmanuel Vadot			};
527f126890aSEmmanuel Vadot			ulpi_data0_po1 {
528f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data0_po1";
529f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
530f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
531f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
532f126890aSEmmanuel Vadot			};
533f126890aSEmmanuel Vadot			ulpi_data1_po2 {
534f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data1_po2";
535f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
536f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
537f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
538f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
539f126890aSEmmanuel Vadot			};
540f126890aSEmmanuel Vadot			ulpi_data2_po3 {
541f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data2_po3";
542f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
543f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
544f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
545f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
546f126890aSEmmanuel Vadot			};
547f126890aSEmmanuel Vadot			ulpi_data3_po4 {
548f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data3_po4";
549f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
550f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
551f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
552f126890aSEmmanuel Vadot			};
553f126890aSEmmanuel Vadot			ulpi_data4_po5 {
554f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data4_po5";
555f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
556f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
557f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
558f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
559f126890aSEmmanuel Vadot			};
560f126890aSEmmanuel Vadot			ulpi_data5_po6 {
561f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data5_po6";
562f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
563f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
564f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
565f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566f126890aSEmmanuel Vadot			};
567f126890aSEmmanuel Vadot			ulpi_data6_po7 {
568f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data6_po7";
569f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
570f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
571f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
572f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
573f126890aSEmmanuel Vadot			};
574f126890aSEmmanuel Vadot			dap3_fs_pp0 {
575f126890aSEmmanuel Vadot				nvidia,pins = "dap3_fs_pp0";
576f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
577f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
578f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
579f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
580f126890aSEmmanuel Vadot			};
581f126890aSEmmanuel Vadot			dap3_din_pp1 {
582f126890aSEmmanuel Vadot				nvidia,pins = "dap3_din_pp1";
583f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
584f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
585f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
586f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
587f126890aSEmmanuel Vadot			};
588f126890aSEmmanuel Vadot			dap3_dout_pp2 {
589f126890aSEmmanuel Vadot				nvidia,pins = "dap3_dout_pp2";
590f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
591f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
592f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593f126890aSEmmanuel Vadot			};
594f126890aSEmmanuel Vadot			dap3_sclk_pp3 {
595f126890aSEmmanuel Vadot				nvidia,pins = "dap3_sclk_pp3";
596f126890aSEmmanuel Vadot				nvidia,function = "rsvd3";
597f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
599f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600f126890aSEmmanuel Vadot			};
601f126890aSEmmanuel Vadot			dap4_fs_pp4 {
602f126890aSEmmanuel Vadot				nvidia,pins = "dap4_fs_pp4";
603f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
604f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
605f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
606f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
607f126890aSEmmanuel Vadot			};
608f126890aSEmmanuel Vadot			dap4_din_pp5 {
609f126890aSEmmanuel Vadot				nvidia,pins = "dap4_din_pp5";
610f126890aSEmmanuel Vadot				nvidia,function = "rsvd3";
611f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
612f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
613f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
614f126890aSEmmanuel Vadot			};
615f126890aSEmmanuel Vadot			dap4_dout_pp6 {
616f126890aSEmmanuel Vadot				nvidia,pins = "dap4_dout_pp6";
617f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
618f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
619f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
620f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
621f126890aSEmmanuel Vadot			};
622f126890aSEmmanuel Vadot			dap4_sclk_pp7 {
623f126890aSEmmanuel Vadot				nvidia,pins = "dap4_sclk_pp7";
624f126890aSEmmanuel Vadot				nvidia,function = "rsvd3";
625f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
626f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
627f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
628f126890aSEmmanuel Vadot			};
629f126890aSEmmanuel Vadot			kb_col0_pq0 {
630f126890aSEmmanuel Vadot				nvidia,pins = "kb_col0_pq0";
631f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
632f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
633f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634f126890aSEmmanuel Vadot			};
635f126890aSEmmanuel Vadot			kb_col1_pq1 {
636f126890aSEmmanuel Vadot				nvidia,pins = "kb_col1_pq1";
637f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
638f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
639f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
640f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641f126890aSEmmanuel Vadot			};
642f126890aSEmmanuel Vadot			kb_col2_pq2 {
643f126890aSEmmanuel Vadot				nvidia,pins = "kb_col2_pq2";
644f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
645f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
646f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
647f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
648f126890aSEmmanuel Vadot			};
649f126890aSEmmanuel Vadot			kb_col3_pq3 {
650f126890aSEmmanuel Vadot				nvidia,pins = "kb_col3_pq3";
651f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
653f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654f126890aSEmmanuel Vadot			};
655f126890aSEmmanuel Vadot			kb_col4_pq4 {
656f126890aSEmmanuel Vadot				nvidia,pins = "kb_col4_pq4";
657f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
658f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
659f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
660f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
661f126890aSEmmanuel Vadot			};
662f126890aSEmmanuel Vadot			kb_col5_pq5 {
663f126890aSEmmanuel Vadot				nvidia,pins = "kb_col5_pq5";
664f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
665f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
666f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
667f126890aSEmmanuel Vadot			};
668f126890aSEmmanuel Vadot			kb_col6_pq6 {
669f126890aSEmmanuel Vadot				nvidia,pins = "kb_col6_pq6";
670f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
671f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
672f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
673f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
674f126890aSEmmanuel Vadot			};
675f126890aSEmmanuel Vadot			kb_col7_pq7 {
676f126890aSEmmanuel Vadot				nvidia,pins = "kb_col7_pq7";
677f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
678f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
679f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
680f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
681f126890aSEmmanuel Vadot			};
682f126890aSEmmanuel Vadot			kb_row0_pr0 {
683f126890aSEmmanuel Vadot				nvidia,pins = "kb_row0_pr0";
684f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
685f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
686f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
687f126890aSEmmanuel Vadot			};
688f126890aSEmmanuel Vadot			kb_row1_pr1 {
689f126890aSEmmanuel Vadot				nvidia,pins = "kb_row1_pr1";
690f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
691f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
692f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
693f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694f126890aSEmmanuel Vadot			};
695f126890aSEmmanuel Vadot			kb_row2_pr2 {
696f126890aSEmmanuel Vadot				nvidia,pins = "kb_row2_pr2";
697f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
698f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
699f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
700f126890aSEmmanuel Vadot			};
701f126890aSEmmanuel Vadot			kb_row3_pr3 {
702f126890aSEmmanuel Vadot				nvidia,pins = "kb_row3_pr3";
703f126890aSEmmanuel Vadot				nvidia,function = "kbc";
704f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
705f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
706f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
707f126890aSEmmanuel Vadot			};
708f126890aSEmmanuel Vadot			kb_row4_pr4 {
709f126890aSEmmanuel Vadot				nvidia,pins = "kb_row4_pr4";
710f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
712f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
713f126890aSEmmanuel Vadot			};
714f126890aSEmmanuel Vadot			kb_row5_pr5 {
715f126890aSEmmanuel Vadot				nvidia,pins = "kb_row5_pr5";
716f126890aSEmmanuel Vadot				nvidia,function = "rsvd3";
717f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
718f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
719f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
720f126890aSEmmanuel Vadot			};
721f126890aSEmmanuel Vadot			kb_row6_pr6 {
722f126890aSEmmanuel Vadot				nvidia,pins = "kb_row6_pr6";
723f126890aSEmmanuel Vadot				nvidia,function = "displaya_alt";
724f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
725f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
726f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727f126890aSEmmanuel Vadot			};
728f126890aSEmmanuel Vadot			kb_row7_pr7 {
729f126890aSEmmanuel Vadot				nvidia,pins = "kb_row7_pr7";
730f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
732f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733f126890aSEmmanuel Vadot			};
734f126890aSEmmanuel Vadot			kb_row8_ps0 {
735f126890aSEmmanuel Vadot				nvidia,pins = "kb_row8_ps0";
736f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
737f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
738f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
739f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
740f126890aSEmmanuel Vadot			};
741f126890aSEmmanuel Vadot			kb_row9_ps1 {
742f126890aSEmmanuel Vadot				nvidia,pins = "kb_row9_ps1";
743f126890aSEmmanuel Vadot				nvidia,function = "uarta";
744f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
745f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
746f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
747f126890aSEmmanuel Vadot			};
748f126890aSEmmanuel Vadot			kb_row10_ps2 {
749f126890aSEmmanuel Vadot				nvidia,pins = "kb_row10_ps2";
750f126890aSEmmanuel Vadot				nvidia,function = "uarta";
751f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
752f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
753f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
754f126890aSEmmanuel Vadot			};
755f126890aSEmmanuel Vadot			kb_row11_ps3 {
756f126890aSEmmanuel Vadot				nvidia,pins = "kb_row11_ps3";
757f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
758f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
759f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
760f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761f126890aSEmmanuel Vadot			};
762f126890aSEmmanuel Vadot			kb_row12_ps4 {
763f126890aSEmmanuel Vadot				nvidia,pins = "kb_row12_ps4";
764f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
765f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
766f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
767f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
768f126890aSEmmanuel Vadot			};
769f126890aSEmmanuel Vadot			kb_row13_ps5 {
770f126890aSEmmanuel Vadot				nvidia,pins = "kb_row13_ps5";
771f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
772f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
773f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
774f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
775f126890aSEmmanuel Vadot			};
776f126890aSEmmanuel Vadot			kb_row14_ps6 {
777f126890aSEmmanuel Vadot				nvidia,pins = "kb_row14_ps6";
778f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
779f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
780f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
781f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
782f126890aSEmmanuel Vadot			};
783f126890aSEmmanuel Vadot			kb_row15_ps7 {
784f126890aSEmmanuel Vadot				nvidia,pins = "kb_row15_ps7";
785f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
786f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
787f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
788f126890aSEmmanuel Vadot			};
789f126890aSEmmanuel Vadot			kb_row16_pt0 {
790f126890aSEmmanuel Vadot				nvidia,pins = "kb_row16_pt0";
791f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
792f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
793f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
794f126890aSEmmanuel Vadot			};
795f126890aSEmmanuel Vadot			kb_row17_pt1 {
796f126890aSEmmanuel Vadot				nvidia,pins = "kb_row17_pt1";
797f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
798f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
799f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
800f126890aSEmmanuel Vadot			};
801f126890aSEmmanuel Vadot			gen2_i2c_scl_pt5 {
802f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_scl_pt5";
803f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
804f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
805f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
806f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
807f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
808f126890aSEmmanuel Vadot			};
809f126890aSEmmanuel Vadot			gen2_i2c_sda_pt6 {
810f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_sda_pt6";
811f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
812f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
813f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
814f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
815f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
816f126890aSEmmanuel Vadot			};
817f126890aSEmmanuel Vadot			sdmmc4_cmd_pt7 {
818f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_cmd_pt7";
819f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
820f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
821f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
822f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
823f126890aSEmmanuel Vadot			};
824f126890aSEmmanuel Vadot			pu0 {
825f126890aSEmmanuel Vadot				nvidia,pins = "pu0";
826f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
828f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
829f126890aSEmmanuel Vadot			};
830f126890aSEmmanuel Vadot			pu1 {
831f126890aSEmmanuel Vadot				nvidia,pins = "pu1";
832f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
833f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
834f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
835f126890aSEmmanuel Vadot			};
836f126890aSEmmanuel Vadot			pu2 {
837f126890aSEmmanuel Vadot				nvidia,pins = "pu2";
838f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
839f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
840f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
841f126890aSEmmanuel Vadot			};
842f126890aSEmmanuel Vadot			pu3 {
843f126890aSEmmanuel Vadot				nvidia,pins = "pu3";
844f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
845f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
846f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
847f126890aSEmmanuel Vadot			};
848f126890aSEmmanuel Vadot			pu4 {
849f126890aSEmmanuel Vadot				nvidia,pins = "pu4";
850f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
851f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
852f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
853f126890aSEmmanuel Vadot			};
854f126890aSEmmanuel Vadot			pu5 {
855f126890aSEmmanuel Vadot				nvidia,pins = "pu5";
856f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
857f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
858f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
859f126890aSEmmanuel Vadot			};
860f126890aSEmmanuel Vadot			pu6 {
861f126890aSEmmanuel Vadot				nvidia,pins = "pu6";
862f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
864f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
865f126890aSEmmanuel Vadot			};
866f126890aSEmmanuel Vadot			pv0 {
867f126890aSEmmanuel Vadot				nvidia,pins = "pv0";
868f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
870f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871f126890aSEmmanuel Vadot			};
872f126890aSEmmanuel Vadot			pv1 {
873f126890aSEmmanuel Vadot				nvidia,pins = "pv1";
874f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
875f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
876f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
877f126890aSEmmanuel Vadot			};
878f126890aSEmmanuel Vadot			sdmmc3_cd_n_pv2 {
879f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_cd_n_pv2";
880f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
881f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
882f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
883f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
884f126890aSEmmanuel Vadot			};
885f126890aSEmmanuel Vadot			sdmmc1_wp_n_pv3 {
886f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_wp_n_pv3";
887f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
888f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
889f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
890f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
891f126890aSEmmanuel Vadot			};
892f126890aSEmmanuel Vadot			ddc_scl_pv4 {
893f126890aSEmmanuel Vadot				nvidia,pins = "ddc_scl_pv4";
894f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
895f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
896f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
897f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
898f126890aSEmmanuel Vadot				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
899f126890aSEmmanuel Vadot			};
900f126890aSEmmanuel Vadot			ddc_sda_pv5 {
901f126890aSEmmanuel Vadot				nvidia,pins = "ddc_sda_pv5";
902f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
903f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
904f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
905f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906f126890aSEmmanuel Vadot				nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
907f126890aSEmmanuel Vadot			};
908f126890aSEmmanuel Vadot			gpio_w2_aud_pw2 {
909f126890aSEmmanuel Vadot				nvidia,pins = "gpio_w2_aud_pw2";
910f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
911f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
912f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
913f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
914f126890aSEmmanuel Vadot			};
915f126890aSEmmanuel Vadot			gpio_w3_aud_pw3 {
916f126890aSEmmanuel Vadot				nvidia,pins = "gpio_w3_aud_pw3";
917f126890aSEmmanuel Vadot				nvidia,function = "spi6";
918f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
919f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
920f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
921f126890aSEmmanuel Vadot			};
922f126890aSEmmanuel Vadot			dap_mclk1_pw4 {
923f126890aSEmmanuel Vadot				nvidia,pins = "dap_mclk1_pw4";
924f126890aSEmmanuel Vadot				nvidia,function = "extperiph1";
925f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
926f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
927f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
928f126890aSEmmanuel Vadot			};
929f126890aSEmmanuel Vadot			clk2_out_pw5 {
930f126890aSEmmanuel Vadot				nvidia,pins = "clk2_out_pw5";
931f126890aSEmmanuel Vadot				nvidia,function = "extperiph2";
932f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
933f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
934f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
935f126890aSEmmanuel Vadot			};
936f126890aSEmmanuel Vadot			uart3_txd_pw6 {
937f126890aSEmmanuel Vadot				nvidia,pins = "uart3_txd_pw6";
938f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
939f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
940f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
941f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
942f126890aSEmmanuel Vadot			};
943f126890aSEmmanuel Vadot			uart3_rxd_pw7 {
944f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rxd_pw7";
945f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
946f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
947f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
948f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
949f126890aSEmmanuel Vadot			};
950f126890aSEmmanuel Vadot			dvfs_pwm_px0 {
951f126890aSEmmanuel Vadot				nvidia,pins = "dvfs_pwm_px0";
952f126890aSEmmanuel Vadot				nvidia,function = "cldvfs";
953f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
954f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
955f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
956f126890aSEmmanuel Vadot			};
957f126890aSEmmanuel Vadot			gpio_x1_aud_px1 {
958f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x1_aud_px1";
959f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
960f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
961f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
962f126890aSEmmanuel Vadot			};
963f126890aSEmmanuel Vadot			dvfs_clk_px2 {
964f126890aSEmmanuel Vadot				nvidia,pins = "dvfs_clk_px2";
965f126890aSEmmanuel Vadot				nvidia,function = "cldvfs";
966f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
967f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
968f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
969f126890aSEmmanuel Vadot			};
970f126890aSEmmanuel Vadot			gpio_x3_aud_px3 {
971f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x3_aud_px3";
972f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
973f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
974f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
975f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
976f126890aSEmmanuel Vadot			};
977f126890aSEmmanuel Vadot			gpio_x4_aud_px4 {
978f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x4_aud_px4";
979f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
980f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
981f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
982f126890aSEmmanuel Vadot			};
983f126890aSEmmanuel Vadot			gpio_x5_aud_px5 {
984f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x5_aud_px5";
985f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
986f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
987f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
988f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
989f126890aSEmmanuel Vadot			};
990f126890aSEmmanuel Vadot			gpio_x6_aud_px6 {
991f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x6_aud_px6";
992f126890aSEmmanuel Vadot				nvidia,function = "gmi";
993f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
994f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
995f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
996f126890aSEmmanuel Vadot			};
997f126890aSEmmanuel Vadot			gpio_x7_aud_px7 {
998f126890aSEmmanuel Vadot				nvidia,pins = "gpio_x7_aud_px7";
999f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1000f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1001f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1002f126890aSEmmanuel Vadot			};
1003f126890aSEmmanuel Vadot			ulpi_clk_py0 {
1004f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_clk_py0";
1005f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1006f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1007f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1008f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1009f126890aSEmmanuel Vadot			};
1010f126890aSEmmanuel Vadot			ulpi_dir_py1 {
1011f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_dir_py1";
1012f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1013f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1014f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1015f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1016f126890aSEmmanuel Vadot			};
1017f126890aSEmmanuel Vadot			ulpi_nxt_py2 {
1018f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_nxt_py2";
1019f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1020f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1021f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1022f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1023f126890aSEmmanuel Vadot			};
1024f126890aSEmmanuel Vadot			ulpi_stp_py3 {
1025f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_stp_py3";
1026f126890aSEmmanuel Vadot				nvidia,function = "spi1";
1027f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1028f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1029f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1030f126890aSEmmanuel Vadot			};
1031f126890aSEmmanuel Vadot			sdmmc1_dat3_py4 {
1032f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat3_py4";
1033f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1034f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1035f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1036f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037f126890aSEmmanuel Vadot			};
1038f126890aSEmmanuel Vadot			sdmmc1_dat2_py5 {
1039f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat2_py5";
1040f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1041f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1042f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1043f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1044f126890aSEmmanuel Vadot			};
1045f126890aSEmmanuel Vadot			sdmmc1_dat1_py6 {
1046f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat1_py6";
1047f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1048f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1049f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1050f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1051f126890aSEmmanuel Vadot			};
1052f126890aSEmmanuel Vadot			sdmmc1_dat0_py7 {
1053f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat0_py7";
1054f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
1055f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1056f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1057f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1058f126890aSEmmanuel Vadot			};
1059f126890aSEmmanuel Vadot			sdmmc1_clk_pz0 {
1060f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_clk_pz0";
1061f126890aSEmmanuel Vadot				nvidia,function = "rsvd3";
1062f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1063f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1064f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1065f126890aSEmmanuel Vadot			};
1066f126890aSEmmanuel Vadot			sdmmc1_cmd_pz1 {
1067f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_cmd_pz1";
1068f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
1069f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1070f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1071f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1072f126890aSEmmanuel Vadot			};
1073f126890aSEmmanuel Vadot			pwr_i2c_scl_pz6 {
1074f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_scl_pz6";
1075f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
1076f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1077f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1078f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1079f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1080f126890aSEmmanuel Vadot			};
1081f126890aSEmmanuel Vadot			pwr_i2c_sda_pz7 {
1082f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_sda_pz7";
1083f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
1084f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1085f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1086f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1087f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1088f126890aSEmmanuel Vadot			};
1089f126890aSEmmanuel Vadot			sdmmc4_dat0_paa0 {
1090f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat0_paa0";
1091f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1092f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095f126890aSEmmanuel Vadot			};
1096f126890aSEmmanuel Vadot			sdmmc4_dat1_paa1 {
1097f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat1_paa1";
1098f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1099f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102f126890aSEmmanuel Vadot			};
1103f126890aSEmmanuel Vadot			sdmmc4_dat2_paa2 {
1104f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat2_paa2";
1105f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1106f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109f126890aSEmmanuel Vadot			};
1110f126890aSEmmanuel Vadot			sdmmc4_dat3_paa3 {
1111f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat3_paa3";
1112f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1113f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1114f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116f126890aSEmmanuel Vadot			};
1117f126890aSEmmanuel Vadot			sdmmc4_dat4_paa4 {
1118f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat4_paa4";
1119f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1120f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123f126890aSEmmanuel Vadot			};
1124f126890aSEmmanuel Vadot			sdmmc4_dat5_paa5 {
1125f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat5_paa5";
1126f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1127f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1128f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130f126890aSEmmanuel Vadot			};
1131f126890aSEmmanuel Vadot			sdmmc4_dat6_paa6 {
1132f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat6_paa6";
1133f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1134f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1135f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137f126890aSEmmanuel Vadot			};
1138f126890aSEmmanuel Vadot			sdmmc4_dat7_paa7 {
1139f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_dat7_paa7";
1140f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1141f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1142f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1143f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1144f126890aSEmmanuel Vadot			};
1145f126890aSEmmanuel Vadot			pbb0 {
1146f126890aSEmmanuel Vadot				nvidia,pins = "pbb0";
1147f126890aSEmmanuel Vadot				nvidia,function = "vimclk2_alt";
1148f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1149f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1150f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1151f126890aSEmmanuel Vadot			};
1152f126890aSEmmanuel Vadot			cam_i2c_scl_pbb1 {
1153f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_scl_pbb1";
1154f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
1155f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1156f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1157f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1158f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1159f126890aSEmmanuel Vadot			};
1160f126890aSEmmanuel Vadot			cam_i2c_sda_pbb2 {
1161f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_sda_pbb2";
1162f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
1163f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1164f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1165f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1166f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1167f126890aSEmmanuel Vadot			};
1168f126890aSEmmanuel Vadot			pbb3 {
1169f126890aSEmmanuel Vadot				nvidia,pins = "pbb3";
1170f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1171f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1172f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1173f126890aSEmmanuel Vadot			};
1174f126890aSEmmanuel Vadot			pbb4 {
1175f126890aSEmmanuel Vadot				nvidia,pins = "pbb4";
1176f126890aSEmmanuel Vadot				nvidia,function = "vgp4";
1177f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1178f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1179f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1180f126890aSEmmanuel Vadot			};
1181f126890aSEmmanuel Vadot			pbb5 {
1182f126890aSEmmanuel Vadot				nvidia,pins = "pbb5";
1183f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1184f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1185f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1186f126890aSEmmanuel Vadot			};
1187f126890aSEmmanuel Vadot			pbb6 {
1188f126890aSEmmanuel Vadot				nvidia,pins = "pbb6";
1189f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1190f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1191f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1192f126890aSEmmanuel Vadot			};
1193f126890aSEmmanuel Vadot			pbb7 {
1194f126890aSEmmanuel Vadot				nvidia,pins = "pbb7";
1195f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1196f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1197f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1198f126890aSEmmanuel Vadot			};
1199f126890aSEmmanuel Vadot			cam_mclk_pcc0 {
1200f126890aSEmmanuel Vadot				nvidia,pins = "cam_mclk_pcc0";
1201f126890aSEmmanuel Vadot				nvidia,function = "vi_alt3";
1202f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1203f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1204f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1205f126890aSEmmanuel Vadot			};
1206f126890aSEmmanuel Vadot			pcc1 {
1207f126890aSEmmanuel Vadot				nvidia,pins = "pcc1";
1208f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1209f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1210f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1211f126890aSEmmanuel Vadot			};
1212f126890aSEmmanuel Vadot			pcc2 {
1213f126890aSEmmanuel Vadot				nvidia,pins = "pcc2";
1214f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1215f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1216f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1217f126890aSEmmanuel Vadot			};
1218f126890aSEmmanuel Vadot			sdmmc4_clk_pcc4 {
1219f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_clk_pcc4";
1220f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
1221f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1222f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1223f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1224f126890aSEmmanuel Vadot			};
1225f126890aSEmmanuel Vadot			clk2_req_pcc5 {
1226f126890aSEmmanuel Vadot				nvidia,pins = "clk2_req_pcc5";
1227f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
1228f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1229f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1230f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1231f126890aSEmmanuel Vadot			};
1232f126890aSEmmanuel Vadot			pex_l0_rst_n_pdd1 {
1233f126890aSEmmanuel Vadot				nvidia,pins = "pex_l0_rst_n_pdd1";
1234f126890aSEmmanuel Vadot				nvidia,function = "pe0";
1235f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1236f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1237f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1238f126890aSEmmanuel Vadot			};
1239f126890aSEmmanuel Vadot			pex_l0_clkreq_n_pdd2 {
1240f126890aSEmmanuel Vadot				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1241f126890aSEmmanuel Vadot				nvidia,function = "pe0";
1242f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1243f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1244f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1245f126890aSEmmanuel Vadot			};
1246f126890aSEmmanuel Vadot			pex_wake_n_pdd3 {
1247f126890aSEmmanuel Vadot				nvidia,pins = "pex_wake_n_pdd3";
1248f126890aSEmmanuel Vadot				nvidia,function = "pe";
1249f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1250f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1251f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1252f126890aSEmmanuel Vadot			};
1253f126890aSEmmanuel Vadot			pex_l1_rst_n_pdd5 {
1254f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_rst_n_pdd5";
1255f126890aSEmmanuel Vadot				nvidia,function = "pe1";
1256f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1257f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1258f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1259f126890aSEmmanuel Vadot			};
1260f126890aSEmmanuel Vadot			pex_l1_clkreq_n_pdd6 {
1261f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1262f126890aSEmmanuel Vadot				nvidia,function = "pe1";
1263f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1264f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1265f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1266f126890aSEmmanuel Vadot			};
1267f126890aSEmmanuel Vadot			clk3_out_pee0 {
1268f126890aSEmmanuel Vadot				nvidia,pins = "clk3_out_pee0";
1269f126890aSEmmanuel Vadot				nvidia,function = "extperiph3";
1270f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1271f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1272f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1273f126890aSEmmanuel Vadot			};
1274f126890aSEmmanuel Vadot			clk3_req_pee1 {
1275f126890aSEmmanuel Vadot				nvidia,pins = "clk3_req_pee1";
1276f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
1277f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1278f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1279f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1280f126890aSEmmanuel Vadot			};
1281f126890aSEmmanuel Vadot			dap_mclk1_req_pee2 {
1282f126890aSEmmanuel Vadot				nvidia,pins = "dap_mclk1_req_pee2";
1283f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1286f126890aSEmmanuel Vadot			};
1287f126890aSEmmanuel Vadot			hdmi_cec_pee3 {
1288f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_cec_pee3";
1289f126890aSEmmanuel Vadot				nvidia,function = "cec";
1290f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1291f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1292f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1293f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1294f126890aSEmmanuel Vadot			};
1295f126890aSEmmanuel Vadot			sdmmc3_clk_lb_out_pee4 {
1296f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
1297f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
1298f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1299f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1300f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1301f126890aSEmmanuel Vadot			};
1302f126890aSEmmanuel Vadot			sdmmc3_clk_lb_in_pee5 {
1303f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
1304f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
1305f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1306f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1307f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1308f126890aSEmmanuel Vadot			};
1309f126890aSEmmanuel Vadot			dp_hpd_pff0 {
1310f126890aSEmmanuel Vadot				nvidia,pins = "dp_hpd_pff0";
1311f126890aSEmmanuel Vadot				nvidia,function = "dp";
1312f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1313f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1314f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1315f126890aSEmmanuel Vadot			};
1316f126890aSEmmanuel Vadot			usb_vbus_en2_pff1 {
1317f126890aSEmmanuel Vadot				nvidia,pins = "usb_vbus_en2_pff1";
1318f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
1319f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1320f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1321f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1322f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1323f126890aSEmmanuel Vadot			};
1324f126890aSEmmanuel Vadot			pff2 {
1325f126890aSEmmanuel Vadot				nvidia,pins = "pff2";
1326f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
1327f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1328f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1329f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1330f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1331f126890aSEmmanuel Vadot			};
1332f126890aSEmmanuel Vadot			core_pwr_req {
1333f126890aSEmmanuel Vadot				nvidia,pins = "core_pwr_req";
1334f126890aSEmmanuel Vadot				nvidia,function = "pwron";
1335f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1336f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1337f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1338f126890aSEmmanuel Vadot			};
1339f126890aSEmmanuel Vadot			cpu_pwr_req {
1340f126890aSEmmanuel Vadot				nvidia,pins = "cpu_pwr_req";
1341f126890aSEmmanuel Vadot				nvidia,function = "cpu";
1342f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1343f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1344f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1345f126890aSEmmanuel Vadot			};
1346f126890aSEmmanuel Vadot			pwr_int_n {
1347f126890aSEmmanuel Vadot				nvidia,pins = "pwr_int_n";
1348f126890aSEmmanuel Vadot				nvidia,function = "pmi";
1349f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1350f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1351f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1352f126890aSEmmanuel Vadot			};
1353f126890aSEmmanuel Vadot			reset_out_n {
1354f126890aSEmmanuel Vadot				nvidia,pins = "reset_out_n";
1355f126890aSEmmanuel Vadot				nvidia,function = "reset_out_n";
1356f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1357f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1358f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1359f126890aSEmmanuel Vadot			};
1360f126890aSEmmanuel Vadot			clk_32k_in {
1361f126890aSEmmanuel Vadot				nvidia,pins = "clk_32k_in";
1362f126890aSEmmanuel Vadot				nvidia,function = "clk";
1363f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1364f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1365f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1366f126890aSEmmanuel Vadot			};
1367f126890aSEmmanuel Vadot			jtag_rtck {
1368f126890aSEmmanuel Vadot				nvidia,pins = "jtag_rtck";
1369f126890aSEmmanuel Vadot				nvidia,function = "rtck";
1370f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1371f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1372f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1373f126890aSEmmanuel Vadot			};
1374f126890aSEmmanuel Vadot			dsi_b {
1375f126890aSEmmanuel Vadot				nvidia,pins = "mipi_pad_ctrl_dsi_b";
1376f126890aSEmmanuel Vadot				nvidia,function = "dsi_b";
1377f126890aSEmmanuel Vadot			};
1378f126890aSEmmanuel Vadot		};
1379f126890aSEmmanuel Vadot	};
1380f126890aSEmmanuel Vadot
1381f126890aSEmmanuel Vadot	/*
1382f126890aSEmmanuel Vadot	 * First high speed UART, exposed on the expansion connector J3A2
1383f126890aSEmmanuel Vadot	 *   Pin 41: BR_UART1_TXD
1384f126890aSEmmanuel Vadot	 *   Pin 44: BR_UART1_RXD
1385f126890aSEmmanuel Vadot	 */
1386f126890aSEmmanuel Vadot	serial@70006000 {
1387f126890aSEmmanuel Vadot		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1388*aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
1389f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
1390f126890aSEmmanuel Vadot		status = "okay";
1391f126890aSEmmanuel Vadot	};
1392f126890aSEmmanuel Vadot
1393f126890aSEmmanuel Vadot	/*
1394f126890aSEmmanuel Vadot	 * Second high speed UART, exposed on the expansion connector J3A2
1395f126890aSEmmanuel Vadot	 *   Pin 65: UART2_RXD
1396f126890aSEmmanuel Vadot	 *   Pin 68: UART2_TXD
1397f126890aSEmmanuel Vadot	 *   Pin 71: UART2_CTS_L
1398f126890aSEmmanuel Vadot	 *   Pin 74: UART2_RTS_L
1399f126890aSEmmanuel Vadot	 */
1400f126890aSEmmanuel Vadot	serial@70006040 {
1401f126890aSEmmanuel Vadot		compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
1402*aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
1403f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
1404f126890aSEmmanuel Vadot		status = "okay";
1405f126890aSEmmanuel Vadot	};
1406f126890aSEmmanuel Vadot
1407f126890aSEmmanuel Vadot	/* DB9 serial port */
1408f126890aSEmmanuel Vadot	serial@70006300 {
1409*aa1a8ff2SEmmanuel Vadot		/delete-property/ dmas;
1410*aa1a8ff2SEmmanuel Vadot		/delete-property/ dma-names;
1411f126890aSEmmanuel Vadot		status = "okay";
1412f126890aSEmmanuel Vadot	};
1413f126890aSEmmanuel Vadot
1414f126890aSEmmanuel Vadot	/* Expansion GEN1_I2C_*, mini-PCIe I2C, on-board components */
1415f126890aSEmmanuel Vadot	i2c@7000c000 {
1416f126890aSEmmanuel Vadot		status = "okay";
1417f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1418f126890aSEmmanuel Vadot
1419f126890aSEmmanuel Vadot		rt5639: audio-codec@1c {
1420f126890aSEmmanuel Vadot			compatible = "realtek,rt5639";
1421f126890aSEmmanuel Vadot			reg = <0x1c>;
1422f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1423f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
1424f126890aSEmmanuel Vadot			realtek,ldo1-en-gpios =
1425f126890aSEmmanuel Vadot				<&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
1426f126890aSEmmanuel Vadot		};
1427f126890aSEmmanuel Vadot
1428f126890aSEmmanuel Vadot		temperature-sensor@4c {
1429f126890aSEmmanuel Vadot			compatible = "ti,tmp451";
1430f126890aSEmmanuel Vadot			reg = <0x4c>;
1431f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1432f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_EDGE_FALLING>;
1433f126890aSEmmanuel Vadot		};
1434f126890aSEmmanuel Vadot
1435f126890aSEmmanuel Vadot		eeprom@56 {
1436f126890aSEmmanuel Vadot			compatible = "atmel,24c02";
1437f126890aSEmmanuel Vadot			reg = <0x56>;
1438f126890aSEmmanuel Vadot			pagesize = <8>;
1439f126890aSEmmanuel Vadot		};
1440f126890aSEmmanuel Vadot	};
1441f126890aSEmmanuel Vadot
1442f126890aSEmmanuel Vadot	/* Expansion GEN2_I2C_* */
1443f126890aSEmmanuel Vadot	i2c@7000c400 {
1444f126890aSEmmanuel Vadot		status = "okay";
1445f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1446f126890aSEmmanuel Vadot	};
1447f126890aSEmmanuel Vadot
1448f126890aSEmmanuel Vadot	/* Expansion CAM_I2C_* */
1449f126890aSEmmanuel Vadot	i2c@7000c500 {
1450f126890aSEmmanuel Vadot		status = "okay";
1451f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1452f126890aSEmmanuel Vadot	};
1453f126890aSEmmanuel Vadot
1454f126890aSEmmanuel Vadot	/* HDMI DDC */
1455f126890aSEmmanuel Vadot	hdmi_ddc: i2c@7000c700 {
1456f126890aSEmmanuel Vadot		status = "okay";
1457f126890aSEmmanuel Vadot		clock-frequency = <100000>;
1458f126890aSEmmanuel Vadot	};
1459f126890aSEmmanuel Vadot
1460f126890aSEmmanuel Vadot	/* Expansion PWR_I2C_*, on-board components */
1461f126890aSEmmanuel Vadot	i2c@7000d000 {
1462f126890aSEmmanuel Vadot		status = "okay";
1463f126890aSEmmanuel Vadot		clock-frequency = <400000>;
1464f126890aSEmmanuel Vadot
1465f126890aSEmmanuel Vadot		pmic: pmic@40 {
1466f126890aSEmmanuel Vadot			compatible = "ams,as3722";
1467f126890aSEmmanuel Vadot			reg = <0x40>;
1468f126890aSEmmanuel Vadot			interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
1469f126890aSEmmanuel Vadot
1470f126890aSEmmanuel Vadot			ams,system-power-controller;
1471f126890aSEmmanuel Vadot
1472f126890aSEmmanuel Vadot			#interrupt-cells = <2>;
1473f126890aSEmmanuel Vadot			interrupt-controller;
1474f126890aSEmmanuel Vadot
1475f126890aSEmmanuel Vadot			gpio-controller;
1476f126890aSEmmanuel Vadot			#gpio-cells = <2>;
1477f126890aSEmmanuel Vadot
1478f126890aSEmmanuel Vadot			pinctrl-names = "default";
1479f126890aSEmmanuel Vadot			pinctrl-0 = <&as3722_default>;
1480f126890aSEmmanuel Vadot
1481f126890aSEmmanuel Vadot			as3722_default: pinmux {
1482f126890aSEmmanuel Vadot				gpio0 {
1483f126890aSEmmanuel Vadot					pins = "gpio0";
1484f126890aSEmmanuel Vadot					function = "gpio";
1485f126890aSEmmanuel Vadot					bias-pull-down;
1486f126890aSEmmanuel Vadot				};
1487f126890aSEmmanuel Vadot
1488f126890aSEmmanuel Vadot				gpio1_2_4_7 {
1489f126890aSEmmanuel Vadot					pins = "gpio1", "gpio2", "gpio4", "gpio7";
1490f126890aSEmmanuel Vadot					function = "gpio";
1491f126890aSEmmanuel Vadot					bias-pull-up;
1492f126890aSEmmanuel Vadot				};
1493f126890aSEmmanuel Vadot
1494f126890aSEmmanuel Vadot				gpio3_5_6 {
1495f126890aSEmmanuel Vadot					pins = "gpio3", "gpio5", "gpio6";
1496f126890aSEmmanuel Vadot					bias-high-impedance;
1497f126890aSEmmanuel Vadot				};
1498f126890aSEmmanuel Vadot			};
1499f126890aSEmmanuel Vadot
1500f126890aSEmmanuel Vadot			regulators {
1501f126890aSEmmanuel Vadot				vsup-sd2-supply = <&vdd_5v0_sys>;
1502f126890aSEmmanuel Vadot				vsup-sd3-supply = <&vdd_5v0_sys>;
1503f126890aSEmmanuel Vadot				vsup-sd4-supply = <&vdd_5v0_sys>;
1504f126890aSEmmanuel Vadot				vsup-sd5-supply = <&vdd_5v0_sys>;
1505f126890aSEmmanuel Vadot				vin-ldo0-supply = <&vdd_1v35_lp0>;
1506f126890aSEmmanuel Vadot				vin-ldo1-6-supply = <&vdd_3v3_run>;
1507f126890aSEmmanuel Vadot				vin-ldo2-5-7-supply = <&vddio_1v8>;
1508f126890aSEmmanuel Vadot				vin-ldo3-4-supply = <&vdd_3v3_sys>;
1509f126890aSEmmanuel Vadot				vin-ldo9-10-supply = <&vdd_5v0_sys>;
1510f126890aSEmmanuel Vadot				vin-ldo11-supply = <&vdd_3v3_run>;
1511f126890aSEmmanuel Vadot
1512f126890aSEmmanuel Vadot				vdd_cpu: sd0 {
1513f126890aSEmmanuel Vadot					regulator-name = "+VDD_CPU_AP";
1514f126890aSEmmanuel Vadot					regulator-min-microvolt = <700000>;
1515f126890aSEmmanuel Vadot					regulator-max-microvolt = <1400000>;
1516f126890aSEmmanuel Vadot					regulator-min-microamp = <3500000>;
1517f126890aSEmmanuel Vadot					regulator-max-microamp = <3500000>;
1518f126890aSEmmanuel Vadot					regulator-always-on;
1519f126890aSEmmanuel Vadot					regulator-boot-on;
1520f126890aSEmmanuel Vadot					ams,ext-control = <2>;
1521f126890aSEmmanuel Vadot				};
1522f126890aSEmmanuel Vadot
1523f126890aSEmmanuel Vadot				sd1 {
1524f126890aSEmmanuel Vadot					regulator-name = "+VDD_CORE";
1525f126890aSEmmanuel Vadot					regulator-min-microvolt = <700000>;
1526f126890aSEmmanuel Vadot					regulator-max-microvolt = <1350000>;
1527f126890aSEmmanuel Vadot					regulator-min-microamp = <2500000>;
1528f126890aSEmmanuel Vadot					regulator-max-microamp = <2500000>;
1529f126890aSEmmanuel Vadot					regulator-always-on;
1530f126890aSEmmanuel Vadot					regulator-boot-on;
1531f126890aSEmmanuel Vadot					ams,ext-control = <1>;
1532f126890aSEmmanuel Vadot				};
1533f126890aSEmmanuel Vadot
1534f126890aSEmmanuel Vadot				vdd_1v35_lp0: sd2 {
1535f126890aSEmmanuel Vadot					regulator-name = "+1.35V_LP0(sd2)";
1536f126890aSEmmanuel Vadot					regulator-min-microvolt = <1350000>;
1537f126890aSEmmanuel Vadot					regulator-max-microvolt = <1350000>;
1538f126890aSEmmanuel Vadot					regulator-always-on;
1539f126890aSEmmanuel Vadot					regulator-boot-on;
1540f126890aSEmmanuel Vadot				};
1541f126890aSEmmanuel Vadot
1542f126890aSEmmanuel Vadot				sd3 {
1543f126890aSEmmanuel Vadot					regulator-name = "+1.35V_LP0(sd3)";
1544f126890aSEmmanuel Vadot					regulator-min-microvolt = <1350000>;
1545f126890aSEmmanuel Vadot					regulator-max-microvolt = <1350000>;
1546f126890aSEmmanuel Vadot					regulator-always-on;
1547f126890aSEmmanuel Vadot					regulator-boot-on;
1548f126890aSEmmanuel Vadot				};
1549f126890aSEmmanuel Vadot
1550f126890aSEmmanuel Vadot				vdd_1v05_run: sd4 {
1551f126890aSEmmanuel Vadot					regulator-name = "+1.05V_RUN";
1552f126890aSEmmanuel Vadot					regulator-min-microvolt = <1050000>;
1553f126890aSEmmanuel Vadot					regulator-max-microvolt = <1050000>;
1554f126890aSEmmanuel Vadot				};
1555f126890aSEmmanuel Vadot
1556f126890aSEmmanuel Vadot				vddio_1v8: sd5 {
1557f126890aSEmmanuel Vadot					regulator-name = "+1.8V_VDDIO";
1558f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1559f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
1560f126890aSEmmanuel Vadot					regulator-boot-on;
1561f126890aSEmmanuel Vadot					regulator-always-on;
1562f126890aSEmmanuel Vadot				};
1563f126890aSEmmanuel Vadot
1564f126890aSEmmanuel Vadot				vdd_gpu: sd6 {
1565f126890aSEmmanuel Vadot					regulator-name = "+VDD_GPU_AP";
1566f126890aSEmmanuel Vadot					regulator-min-microvolt = <650000>;
1567f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1568f126890aSEmmanuel Vadot					regulator-min-microamp = <3500000>;
1569f126890aSEmmanuel Vadot					regulator-max-microamp = <3500000>;
1570f126890aSEmmanuel Vadot					regulator-boot-on;
1571f126890aSEmmanuel Vadot					regulator-always-on;
1572f126890aSEmmanuel Vadot				};
1573f126890aSEmmanuel Vadot
1574f126890aSEmmanuel Vadot				avdd_1v05_run: ldo0 {
1575f126890aSEmmanuel Vadot					regulator-name = "+1.05V_RUN_AVDD";
1576f126890aSEmmanuel Vadot					regulator-min-microvolt = <1050000>;
1577f126890aSEmmanuel Vadot					regulator-max-microvolt = <1050000>;
1578f126890aSEmmanuel Vadot					regulator-boot-on;
1579f126890aSEmmanuel Vadot					regulator-always-on;
1580f126890aSEmmanuel Vadot					ams,ext-control = <1>;
1581f126890aSEmmanuel Vadot				};
1582f126890aSEmmanuel Vadot
1583f126890aSEmmanuel Vadot				ldo1 {
1584f126890aSEmmanuel Vadot					regulator-name = "+1.8V_RUN_CAM";
1585f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1586f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
1587f126890aSEmmanuel Vadot				};
1588f126890aSEmmanuel Vadot
1589f126890aSEmmanuel Vadot				ldo2 {
1590f126890aSEmmanuel Vadot					regulator-name = "+1.2V_GEN_AVDD";
1591f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1592f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1593f126890aSEmmanuel Vadot					regulator-boot-on;
1594f126890aSEmmanuel Vadot					regulator-always-on;
1595f126890aSEmmanuel Vadot				};
1596f126890aSEmmanuel Vadot
1597f126890aSEmmanuel Vadot				ldo3 {
1598f126890aSEmmanuel Vadot					regulator-name = "+1.05V_LP0_VDD_RTC";
1599f126890aSEmmanuel Vadot					regulator-min-microvolt = <1000000>;
1600f126890aSEmmanuel Vadot					regulator-max-microvolt = <1000000>;
1601f126890aSEmmanuel Vadot					regulator-boot-on;
1602f126890aSEmmanuel Vadot					regulator-always-on;
1603f126890aSEmmanuel Vadot					ams,enable-tracking;
1604f126890aSEmmanuel Vadot				};
1605f126890aSEmmanuel Vadot
1606f126890aSEmmanuel Vadot				ldo4 {
1607f126890aSEmmanuel Vadot					regulator-name = "+2.8V_RUN_CAM";
1608f126890aSEmmanuel Vadot					regulator-min-microvolt = <2800000>;
1609f126890aSEmmanuel Vadot					regulator-max-microvolt = <2800000>;
1610f126890aSEmmanuel Vadot				};
1611f126890aSEmmanuel Vadot
1612f126890aSEmmanuel Vadot				ldo5 {
1613f126890aSEmmanuel Vadot					regulator-name = "+1.2V_RUN_CAM_FRONT";
1614f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1615f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1616f126890aSEmmanuel Vadot				};
1617f126890aSEmmanuel Vadot
1618f126890aSEmmanuel Vadot				vddio_sdmmc3: ldo6 {
1619f126890aSEmmanuel Vadot					regulator-name = "+VDDIO_SDMMC3";
1620f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1621f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
1622f126890aSEmmanuel Vadot				};
1623f126890aSEmmanuel Vadot
1624f126890aSEmmanuel Vadot				ldo7 {
1625f126890aSEmmanuel Vadot					regulator-name = "+1.05V_RUN_CAM_REAR";
1626f126890aSEmmanuel Vadot					regulator-min-microvolt = <1050000>;
1627f126890aSEmmanuel Vadot					regulator-max-microvolt = <1050000>;
1628f126890aSEmmanuel Vadot				};
1629f126890aSEmmanuel Vadot
1630f126890aSEmmanuel Vadot				ldo9 {
1631f126890aSEmmanuel Vadot					regulator-name = "+3.3V_RUN_TOUCH";
1632f126890aSEmmanuel Vadot					regulator-min-microvolt = <2800000>;
1633f126890aSEmmanuel Vadot					regulator-max-microvolt = <2800000>;
1634f126890aSEmmanuel Vadot				};
1635f126890aSEmmanuel Vadot
1636f126890aSEmmanuel Vadot				ldo10 {
1637f126890aSEmmanuel Vadot					regulator-name = "+2.8V_RUN_CAM_AF";
1638f126890aSEmmanuel Vadot					regulator-min-microvolt = <2800000>;
1639f126890aSEmmanuel Vadot					regulator-max-microvolt = <2800000>;
1640f126890aSEmmanuel Vadot				};
1641f126890aSEmmanuel Vadot
1642f126890aSEmmanuel Vadot				ldo11 {
1643f126890aSEmmanuel Vadot					regulator-name = "+1.8V_RUN_VPP_FUSE";
1644f126890aSEmmanuel Vadot					regulator-min-microvolt = <1800000>;
1645f126890aSEmmanuel Vadot					regulator-max-microvolt = <1800000>;
1646f126890aSEmmanuel Vadot				};
1647f126890aSEmmanuel Vadot			};
1648f126890aSEmmanuel Vadot		};
1649f126890aSEmmanuel Vadot	};
1650f126890aSEmmanuel Vadot
1651f126890aSEmmanuel Vadot	/* Expansion TS_SPI_* */
1652f126890aSEmmanuel Vadot	spi@7000d400 {
1653f126890aSEmmanuel Vadot		status = "okay";
1654f126890aSEmmanuel Vadot	};
1655f126890aSEmmanuel Vadot
1656f126890aSEmmanuel Vadot	/* Internal SPI */
1657f126890aSEmmanuel Vadot	spi@7000da00 {
1658f126890aSEmmanuel Vadot		status = "okay";
1659f126890aSEmmanuel Vadot		spi-max-frequency = <25000000>;
1660f126890aSEmmanuel Vadot
1661f126890aSEmmanuel Vadot		flash@0 {
1662f126890aSEmmanuel Vadot			compatible = "winbond,w25q32dw", "jedec,spi-nor";
1663f126890aSEmmanuel Vadot			reg = <0>;
1664f126890aSEmmanuel Vadot			spi-max-frequency = <20000000>;
1665f126890aSEmmanuel Vadot		};
1666f126890aSEmmanuel Vadot	};
1667f126890aSEmmanuel Vadot
1668f126890aSEmmanuel Vadot	pmc@7000e400 {
1669f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
1670f126890aSEmmanuel Vadot		nvidia,suspend-mode = <1>;
1671f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <500>;
1672f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <300>;
1673f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <641 3845>;
1674f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <61036>;
1675f126890aSEmmanuel Vadot		nvidia,core-power-req-active-high;
1676f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
1677f126890aSEmmanuel Vadot
1678f126890aSEmmanuel Vadot		i2c-thermtrip {
1679f126890aSEmmanuel Vadot			nvidia,i2c-controller-id = <4>;
1680f126890aSEmmanuel Vadot			nvidia,bus-addr = <0x40>;
1681f126890aSEmmanuel Vadot			nvidia,reg-addr = <0x36>;
1682f126890aSEmmanuel Vadot			nvidia,reg-data = <0x2>;
1683f126890aSEmmanuel Vadot		};
1684f126890aSEmmanuel Vadot	};
1685f126890aSEmmanuel Vadot
1686f126890aSEmmanuel Vadot	cec@70015000 {
1687f126890aSEmmanuel Vadot		status = "okay";
1688f126890aSEmmanuel Vadot	};
1689f126890aSEmmanuel Vadot
1690f126890aSEmmanuel Vadot	/* Serial ATA */
1691f126890aSEmmanuel Vadot	sata@70020000 {
1692f126890aSEmmanuel Vadot		status = "okay";
1693f126890aSEmmanuel Vadot
1694f126890aSEmmanuel Vadot		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
1695f126890aSEmmanuel Vadot		phy-names = "sata-0";
1696f126890aSEmmanuel Vadot
1697f126890aSEmmanuel Vadot		hvdd-supply = <&vdd_3v3_lp0>;
1698f126890aSEmmanuel Vadot		vddio-supply = <&vdd_1v05_run>;
1699f126890aSEmmanuel Vadot		avdd-supply = <&vdd_1v05_run>;
1700f126890aSEmmanuel Vadot
1701f126890aSEmmanuel Vadot		target-5v-supply = <&vdd_5v0_sata>;
1702f126890aSEmmanuel Vadot		target-12v-supply = <&vdd_12v0_sata>;
1703f126890aSEmmanuel Vadot	};
1704f126890aSEmmanuel Vadot
1705f126890aSEmmanuel Vadot	hda@70030000 {
1706f126890aSEmmanuel Vadot		status = "okay";
1707f126890aSEmmanuel Vadot	};
1708f126890aSEmmanuel Vadot
1709f126890aSEmmanuel Vadot	usb@70090000 {
1710f126890aSEmmanuel Vadot		phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* Micro A/B */
1711f126890aSEmmanuel Vadot		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Mini PCIe */
1712f126890aSEmmanuel Vadot		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* USB3 */
1713f126890aSEmmanuel Vadot		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>; /* USB3 */
1714f126890aSEmmanuel Vadot		phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0";
1715f126890aSEmmanuel Vadot
1716f126890aSEmmanuel Vadot		avddio-pex-supply = <&vdd_1v05_run>;
1717f126890aSEmmanuel Vadot		dvddio-pex-supply = <&vdd_1v05_run>;
1718f126890aSEmmanuel Vadot		avdd-usb-supply = <&vdd_3v3_lp0>;
1719f126890aSEmmanuel Vadot		avdd-pll-utmip-supply = <&vddio_1v8>;
1720f126890aSEmmanuel Vadot		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1721f126890aSEmmanuel Vadot		avdd-usb-ss-pll-supply = <&vdd_1v05_run>;
1722f126890aSEmmanuel Vadot		hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
1723f126890aSEmmanuel Vadot		hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>;
1724f126890aSEmmanuel Vadot
1725f126890aSEmmanuel Vadot		status = "okay";
1726f126890aSEmmanuel Vadot	};
1727f126890aSEmmanuel Vadot
1728f126890aSEmmanuel Vadot	padctl@7009f000 {
1729f126890aSEmmanuel Vadot		status = "okay";
1730f126890aSEmmanuel Vadot
1731f126890aSEmmanuel Vadot		avdd-pll-utmip-supply = <&vddio_1v8>;
1732f126890aSEmmanuel Vadot		avdd-pll-erefe-supply = <&avdd_1v05_run>;
1733f126890aSEmmanuel Vadot		avdd-pex-pll-supply = <&vdd_1v05_run>;
1734f126890aSEmmanuel Vadot		hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
1735f126890aSEmmanuel Vadot
1736f126890aSEmmanuel Vadot		pads {
1737f126890aSEmmanuel Vadot			usb2 {
1738f126890aSEmmanuel Vadot				status = "okay";
1739f126890aSEmmanuel Vadot
1740f126890aSEmmanuel Vadot				lanes {
1741f126890aSEmmanuel Vadot					usb2-0 {
1742f126890aSEmmanuel Vadot						nvidia,function = "snps";
1743f126890aSEmmanuel Vadot						status = "okay";
1744f126890aSEmmanuel Vadot					};
1745f126890aSEmmanuel Vadot
1746f126890aSEmmanuel Vadot					usb2-1 {
1747f126890aSEmmanuel Vadot						nvidia,function = "xusb";
1748f126890aSEmmanuel Vadot						status = "okay";
1749f126890aSEmmanuel Vadot					};
1750f126890aSEmmanuel Vadot
1751f126890aSEmmanuel Vadot					usb2-2 {
1752f126890aSEmmanuel Vadot						nvidia,function = "xusb";
1753f126890aSEmmanuel Vadot						status = "okay";
1754f126890aSEmmanuel Vadot					};
1755f126890aSEmmanuel Vadot				};
1756f126890aSEmmanuel Vadot			};
1757f126890aSEmmanuel Vadot
1758f126890aSEmmanuel Vadot			pcie {
1759f126890aSEmmanuel Vadot				status = "okay";
1760f126890aSEmmanuel Vadot
1761f126890aSEmmanuel Vadot				lanes {
1762f126890aSEmmanuel Vadot					pcie-0 {
1763f126890aSEmmanuel Vadot						nvidia,function = "usb3-ss";
1764f126890aSEmmanuel Vadot						status = "okay";
1765f126890aSEmmanuel Vadot					};
1766f126890aSEmmanuel Vadot
1767f126890aSEmmanuel Vadot					pcie-2 {
1768f126890aSEmmanuel Vadot						nvidia,function = "pcie";
1769f126890aSEmmanuel Vadot						status = "okay";
1770f126890aSEmmanuel Vadot					};
1771f126890aSEmmanuel Vadot
1772f126890aSEmmanuel Vadot					pcie-4 {
1773f126890aSEmmanuel Vadot						nvidia,function = "pcie";
1774f126890aSEmmanuel Vadot						status = "okay";
1775f126890aSEmmanuel Vadot					};
1776f126890aSEmmanuel Vadot				};
1777f126890aSEmmanuel Vadot			};
1778f126890aSEmmanuel Vadot
1779f126890aSEmmanuel Vadot			sata {
1780f126890aSEmmanuel Vadot				status = "okay";
1781f126890aSEmmanuel Vadot
1782f126890aSEmmanuel Vadot				lanes {
1783f126890aSEmmanuel Vadot					sata-0 {
1784f126890aSEmmanuel Vadot						nvidia,function = "sata";
1785f126890aSEmmanuel Vadot						status = "okay";
1786f126890aSEmmanuel Vadot					};
1787f126890aSEmmanuel Vadot				};
1788f126890aSEmmanuel Vadot			};
1789f126890aSEmmanuel Vadot		};
1790f126890aSEmmanuel Vadot
1791f126890aSEmmanuel Vadot		ports {
1792f126890aSEmmanuel Vadot			/* Micro A/B */
1793f126890aSEmmanuel Vadot			usb2-0 {
1794f126890aSEmmanuel Vadot				status = "okay";
1795f126890aSEmmanuel Vadot				mode = "host";
1796f126890aSEmmanuel Vadot			};
1797f126890aSEmmanuel Vadot
1798f126890aSEmmanuel Vadot			/* Mini PCIe */
1799f126890aSEmmanuel Vadot			usb2-1 {
1800f126890aSEmmanuel Vadot				status = "okay";
1801f126890aSEmmanuel Vadot				mode = "host";
1802f126890aSEmmanuel Vadot			};
1803f126890aSEmmanuel Vadot
1804f126890aSEmmanuel Vadot			/* USB3 */
1805f126890aSEmmanuel Vadot			usb2-2 {
1806f126890aSEmmanuel Vadot				status = "okay";
1807f126890aSEmmanuel Vadot				mode = "host";
1808f126890aSEmmanuel Vadot
1809f126890aSEmmanuel Vadot				vbus-supply = <&vdd_usb3_vbus>;
1810f126890aSEmmanuel Vadot			};
1811f126890aSEmmanuel Vadot
1812f126890aSEmmanuel Vadot			usb3-0 {
1813f126890aSEmmanuel Vadot				nvidia,usb2-companion = <2>;
1814f126890aSEmmanuel Vadot				status = "okay";
1815f126890aSEmmanuel Vadot			};
1816f126890aSEmmanuel Vadot		};
1817f126890aSEmmanuel Vadot	};
1818f126890aSEmmanuel Vadot
1819f126890aSEmmanuel Vadot	/* SD card */
1820f126890aSEmmanuel Vadot	mmc@700b0400 {
1821f126890aSEmmanuel Vadot		status = "okay";
1822f126890aSEmmanuel Vadot		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1823f126890aSEmmanuel Vadot		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
1824f126890aSEmmanuel Vadot		wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1825f126890aSEmmanuel Vadot		bus-width = <4>;
1826f126890aSEmmanuel Vadot		vqmmc-supply = <&vddio_sdmmc3>;
1827f126890aSEmmanuel Vadot	};
1828f126890aSEmmanuel Vadot
1829f126890aSEmmanuel Vadot	/* eMMC */
1830f126890aSEmmanuel Vadot	mmc@700b0600 {
1831f126890aSEmmanuel Vadot		status = "okay";
1832f126890aSEmmanuel Vadot		bus-width = <8>;
1833f126890aSEmmanuel Vadot		non-removable;
1834f126890aSEmmanuel Vadot	};
1835f126890aSEmmanuel Vadot
1836f126890aSEmmanuel Vadot	/* CPU DFLL clock */
1837f126890aSEmmanuel Vadot	clock@70110000 {
1838f126890aSEmmanuel Vadot		status = "okay";
1839f126890aSEmmanuel Vadot		vdd-cpu-supply = <&vdd_cpu>;
1840f126890aSEmmanuel Vadot		nvidia,i2c-fs-rate = <400000>;
1841f126890aSEmmanuel Vadot	};
1842f126890aSEmmanuel Vadot
1843f126890aSEmmanuel Vadot	ahub@70300000 {
1844f126890aSEmmanuel Vadot		i2s@70301100 {
1845f126890aSEmmanuel Vadot			status = "okay";
1846f126890aSEmmanuel Vadot		};
1847f126890aSEmmanuel Vadot	};
1848f126890aSEmmanuel Vadot
1849f126890aSEmmanuel Vadot	usb@7d000000 {
1850f126890aSEmmanuel Vadot		compatible = "nvidia,tegra124-udc";
1851f126890aSEmmanuel Vadot		status = "okay";
1852f126890aSEmmanuel Vadot		dr_mode = "peripheral";
1853f126890aSEmmanuel Vadot	};
1854f126890aSEmmanuel Vadot
1855f126890aSEmmanuel Vadot	usb-phy@7d000000 {
1856f126890aSEmmanuel Vadot		status = "okay";
1857f126890aSEmmanuel Vadot	};
1858f126890aSEmmanuel Vadot
1859f126890aSEmmanuel Vadot	/* mini-PCIe USB */
1860f126890aSEmmanuel Vadot	usb@7d004000 {
1861f126890aSEmmanuel Vadot		status = "okay";
1862f126890aSEmmanuel Vadot	};
1863f126890aSEmmanuel Vadot
1864f126890aSEmmanuel Vadot	usb-phy@7d004000 {
1865f126890aSEmmanuel Vadot		status = "okay";
1866f126890aSEmmanuel Vadot	};
1867f126890aSEmmanuel Vadot
1868f126890aSEmmanuel Vadot	/* USB A connector */
1869f126890aSEmmanuel Vadot	usb@7d008000 {
1870f126890aSEmmanuel Vadot		status = "okay";
1871f126890aSEmmanuel Vadot	};
1872f126890aSEmmanuel Vadot
1873f126890aSEmmanuel Vadot	usb-phy@7d008000 {
1874f126890aSEmmanuel Vadot		status = "okay";
1875f126890aSEmmanuel Vadot		vbus-supply = <&vdd_usb3_vbus>;
1876f126890aSEmmanuel Vadot	};
1877f126890aSEmmanuel Vadot
1878f126890aSEmmanuel Vadot	clk32k_in: clock-32k {
1879f126890aSEmmanuel Vadot		compatible = "fixed-clock";
1880f126890aSEmmanuel Vadot		clock-frequency = <32768>;
1881f126890aSEmmanuel Vadot		#clock-cells = <0>;
1882f126890aSEmmanuel Vadot	};
1883f126890aSEmmanuel Vadot
1884f126890aSEmmanuel Vadot	cpus {
1885f126890aSEmmanuel Vadot		cpu@0 {
1886f126890aSEmmanuel Vadot			vdd-cpu-supply = <&vdd_cpu>;
1887f126890aSEmmanuel Vadot		};
1888f126890aSEmmanuel Vadot	};
1889f126890aSEmmanuel Vadot
1890f126890aSEmmanuel Vadot	gpio-keys {
1891f126890aSEmmanuel Vadot		compatible = "gpio-keys";
1892f126890aSEmmanuel Vadot
1893f126890aSEmmanuel Vadot		key-power {
1894f126890aSEmmanuel Vadot			label = "Power";
1895f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1896f126890aSEmmanuel Vadot			linux,code = <KEY_POWER>;
1897f126890aSEmmanuel Vadot			debounce-interval = <10>;
1898f126890aSEmmanuel Vadot			wakeup-source;
1899f126890aSEmmanuel Vadot		};
1900f126890aSEmmanuel Vadot	};
1901f126890aSEmmanuel Vadot
1902f126890aSEmmanuel Vadot	vdd_mux: regulator-mux {
1903f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1904f126890aSEmmanuel Vadot		regulator-name = "+VDD_MUX";
1905f126890aSEmmanuel Vadot		regulator-min-microvolt = <12000000>;
1906f126890aSEmmanuel Vadot		regulator-max-microvolt = <12000000>;
1907f126890aSEmmanuel Vadot		regulator-always-on;
1908f126890aSEmmanuel Vadot		regulator-boot-on;
1909f126890aSEmmanuel Vadot	};
1910f126890aSEmmanuel Vadot
1911f126890aSEmmanuel Vadot	vdd_5v0_sys: regulator-5v0sys {
1912f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1913f126890aSEmmanuel Vadot		regulator-name = "+5V_SYS";
1914f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1915f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1916f126890aSEmmanuel Vadot		regulator-always-on;
1917f126890aSEmmanuel Vadot		regulator-boot-on;
1918f126890aSEmmanuel Vadot		vin-supply = <&vdd_mux>;
1919f126890aSEmmanuel Vadot	};
1920f126890aSEmmanuel Vadot
1921f126890aSEmmanuel Vadot	vdd_3v3_sys: regulator-3v3sys {
1922f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1923f126890aSEmmanuel Vadot		regulator-name = "+3.3V_SYS";
1924f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1925f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1926f126890aSEmmanuel Vadot		regulator-always-on;
1927f126890aSEmmanuel Vadot		regulator-boot-on;
1928f126890aSEmmanuel Vadot		vin-supply = <&vdd_mux>;
1929f126890aSEmmanuel Vadot	};
1930f126890aSEmmanuel Vadot
1931f126890aSEmmanuel Vadot	vdd_3v3_run: regulator-3v3run {
1932f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1933f126890aSEmmanuel Vadot		regulator-name = "+3.3V_RUN";
1934f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1935f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1936f126890aSEmmanuel Vadot		regulator-always-on;
1937f126890aSEmmanuel Vadot		regulator-boot-on;
1938f126890aSEmmanuel Vadot		gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
1939f126890aSEmmanuel Vadot		enable-active-high;
1940f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_sys>;
1941f126890aSEmmanuel Vadot	};
1942f126890aSEmmanuel Vadot
1943f126890aSEmmanuel Vadot	vdd_3v3_hdmi: regulator-3v3hdmi {
1944f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1945f126890aSEmmanuel Vadot		regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1946f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1947f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1948f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_run>;
1949f126890aSEmmanuel Vadot	};
1950f126890aSEmmanuel Vadot
1951f126890aSEmmanuel Vadot	vdd_usb1_vbus: regulator-usb1 {
1952f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1953f126890aSEmmanuel Vadot		regulator-name = "+USB0_VBUS_SW";
1954f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1955f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1956f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1957f126890aSEmmanuel Vadot		enable-active-high;
1958f126890aSEmmanuel Vadot		gpio-open-drain;
1959f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1960f126890aSEmmanuel Vadot	};
1961f126890aSEmmanuel Vadot
1962f126890aSEmmanuel Vadot	vdd_usb3_vbus: regulator-usb3 {
1963f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1964f126890aSEmmanuel Vadot		regulator-name = "+5V_USB_HS";
1965f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1966f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1967f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1968f126890aSEmmanuel Vadot		enable-active-high;
1969f126890aSEmmanuel Vadot		gpio-open-drain;
1970f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1971f126890aSEmmanuel Vadot	};
1972f126890aSEmmanuel Vadot
1973f126890aSEmmanuel Vadot	vdd_3v3_lp0: regulator-lp0 {
1974f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1975f126890aSEmmanuel Vadot		regulator-name = "+3.3V_LP0";
1976f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1977f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1978f126890aSEmmanuel Vadot		regulator-always-on;
1979f126890aSEmmanuel Vadot		regulator-boot-on;
1980f126890aSEmmanuel Vadot		gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
1981f126890aSEmmanuel Vadot		enable-active-high;
1982f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_sys>;
1983f126890aSEmmanuel Vadot	};
1984f126890aSEmmanuel Vadot
1985f126890aSEmmanuel Vadot	vdd_hdmi_pll: regulator-hdmipll {
1986f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1987f126890aSEmmanuel Vadot		regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL";
1988f126890aSEmmanuel Vadot		regulator-min-microvolt = <1050000>;
1989f126890aSEmmanuel Vadot		regulator-max-microvolt = <1050000>;
1990f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1991f126890aSEmmanuel Vadot		vin-supply = <&vdd_1v05_run>;
1992f126890aSEmmanuel Vadot	};
1993f126890aSEmmanuel Vadot
1994f126890aSEmmanuel Vadot	vdd_5v0_hdmi: regulator-hdmicon {
1995f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1996f126890aSEmmanuel Vadot		regulator-name = "+5V_HDMI_CON";
1997f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1998f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1999f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
2000f126890aSEmmanuel Vadot		enable-active-high;
2001f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
2002f126890aSEmmanuel Vadot	};
2003f126890aSEmmanuel Vadot
2004f126890aSEmmanuel Vadot	/* Molex power connector */
2005f126890aSEmmanuel Vadot	vdd_5v0_sata: regulator-5v0sata {
2006f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2007f126890aSEmmanuel Vadot		regulator-name = "+5V_SATA";
2008f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
2009f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
2010f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2011f126890aSEmmanuel Vadot		enable-active-high;
2012f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
2013f126890aSEmmanuel Vadot	};
2014f126890aSEmmanuel Vadot
2015f126890aSEmmanuel Vadot	vdd_12v0_sata: regulator-12v0sata {
2016f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
2017f126890aSEmmanuel Vadot		regulator-name = "+12V_SATA";
2018f126890aSEmmanuel Vadot		regulator-min-microvolt = <12000000>;
2019f126890aSEmmanuel Vadot		regulator-max-microvolt = <12000000>;
2020f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(EE, 2) GPIO_ACTIVE_HIGH>;
2021f126890aSEmmanuel Vadot		enable-active-high;
2022f126890aSEmmanuel Vadot		vin-supply = <&vdd_mux>;
2023f126890aSEmmanuel Vadot	};
2024f126890aSEmmanuel Vadot
2025f126890aSEmmanuel Vadot	sound {
2026f126890aSEmmanuel Vadot		compatible = "nvidia,tegra-audio-rt5640-jetson-tk1",
2027f126890aSEmmanuel Vadot			     "nvidia,tegra-audio-rt5640";
2028f126890aSEmmanuel Vadot		nvidia,model = "NVIDIA Tegra Jetson TK1";
2029f126890aSEmmanuel Vadot
2030f126890aSEmmanuel Vadot		nvidia,audio-routing =
2031f126890aSEmmanuel Vadot			"Headphones", "HPOR",
2032f126890aSEmmanuel Vadot			"Headphones", "HPOL",
2033f126890aSEmmanuel Vadot			"Mic Jack", "MICBIAS1",
2034f126890aSEmmanuel Vadot			"IN2P", "Mic Jack";
2035f126890aSEmmanuel Vadot
2036f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
2037f126890aSEmmanuel Vadot		nvidia,audio-codec = <&rt5639>;
2038f126890aSEmmanuel Vadot
2039f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
2040f126890aSEmmanuel Vadot
2041f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
2042f126890aSEmmanuel Vadot			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2043f126890aSEmmanuel Vadot			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2044f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
2045f126890aSEmmanuel Vadot
2046f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2047f126890aSEmmanuel Vadot				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2048f126890aSEmmanuel Vadot
2049f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2050f126890aSEmmanuel Vadot					 <&tegra_car TEGRA124_CLK_EXTERN1>;
2051f126890aSEmmanuel Vadot	};
2052f126890aSEmmanuel Vadot
2053f126890aSEmmanuel Vadot	thermal-zones {
2054f126890aSEmmanuel Vadot		cpu-thermal {
2055f126890aSEmmanuel Vadot			trips {
2056f126890aSEmmanuel Vadot				cpu-shutdown-trip {
2057f126890aSEmmanuel Vadot					temperature = <101000>;
2058f126890aSEmmanuel Vadot					hysteresis = <0>;
2059f126890aSEmmanuel Vadot					type = "critical";
2060f126890aSEmmanuel Vadot				};
2061f126890aSEmmanuel Vadot			};
2062f126890aSEmmanuel Vadot		};
2063f126890aSEmmanuel Vadot
2064f126890aSEmmanuel Vadot		mem-thermal {
2065f126890aSEmmanuel Vadot			trips {
2066f126890aSEmmanuel Vadot				mem-shutdown-trip {
2067f126890aSEmmanuel Vadot					temperature = <101000>;
2068f126890aSEmmanuel Vadot					hysteresis = <0>;
2069f126890aSEmmanuel Vadot					type = "critical";
2070f126890aSEmmanuel Vadot				};
2071f126890aSEmmanuel Vadot			};
2072f126890aSEmmanuel Vadot		};
2073f126890aSEmmanuel Vadot
2074f126890aSEmmanuel Vadot		gpu-thermal {
2075f126890aSEmmanuel Vadot			trips {
2076f126890aSEmmanuel Vadot				gpu-shutdown-trip {
2077f126890aSEmmanuel Vadot					temperature = <101000>;
2078f126890aSEmmanuel Vadot					hysteresis = <0>;
2079f126890aSEmmanuel Vadot					type = "critical";
2080f126890aSEmmanuel Vadot				};
2081f126890aSEmmanuel Vadot			};
2082f126890aSEmmanuel Vadot		};
2083f126890aSEmmanuel Vadot	};
2084f126890aSEmmanuel Vadot};
2085